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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > With Means To Control Surface Effects > Insulating Coating

Insulating Coating

Insulating Coating patent applications listed include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

08/28/14 - 20140239461 - Oxygen monolayer on a semiconductor
A Si or Ge semi-conductor substrate includes an oxygen monolayer on a surface thereof. The oxygen monolayer can be fractional or complete. A Si4+ or Ge4+ oxidation state of the surface of the Si or Ge substrate, respectively, resulting from the presence of the oxygen monolayer represents less than 50%,...

08/21/14 - 20140231968 - Conformal anti-reflective coating
In one aspect, a method is disclosed that includes providing a substrate having a topography that comprises a relief and providing an anti-reflective film conformally over the substrate using a molecular layer deposition step. The anti-reflective film may be formed of a compound selected from the group consisting of: (i)...

08/14/14 - 20140225232 - Reducing contamination during atomic layer deposition
Atomic layer deposition (ALD) techniques typically involve briefly exposing the surface of a substrate to a precursor within an atomic layer deposition chamber, and purging the chamber with a purge gas, such as nitrogen, before exposing the substrate to a second precursor. A series of such cycles results in the...

07/24/14 - 20140203413 - Composite substrate, semiconductor chip having a composite substrate and method for producing composite substrates and semiconductor chips
A composite substrate has a carrier and a utility layer. The utility layer is attached to the carrier by means of a dielectric bonding layer and the carrier contains a radiation conversion material. Other embodiments relate to a semiconductor chip having such a composite substrate, a method for producing a...

07/24/14 - 20140203414 - Method of modifying surfaces
The invention provides a method for chemically modifying a surface of a substrate, preferably a silicon substrate, including the steps of providing a substrate having at least a portion of a surface thereof coated with an organic coating composition including unsaturated moieties forming a surface coating, and introducing a vapour...

07/10/14 - 20140191375 - Methods for fabricating three-dimensional nano-scale structures and devices
A method of fabricating a 3 dimensional structure, includes: forming a stack of at least 2 layers of photo resist material having different photo resist sensitivities upon a substrate; exposing the stack to beams of electromagnetic radiation or charged particles of different dosages to achieve selective solubility along a height...

07/03/14 - 20140183706 - Dielectric films comprising silicon and methods for making same
Described herein are methods of forming dielectric films comprising silicon, such as, but not limited to, silicon oxide, silicon oxycarbide, silicon carbide, and combinations thereof, that exhibit at least one of the following characteristics: low wet etch resistance, a dielectric constant of 6.0 or below, and/or can withstand a high...

06/26/14 - 20140175617 - Oxygen-containing ceramic hard masks and associated wet-cleans
A method of forming an oxygen-containing ceramic hard mask film on a semiconductor substrate involves receiving a semiconductor substrate in a plasma-enhanced chemical vapor deposition (PECVD) process chamber and depositing forming by PEVCD on the substrate an oxygen-containing ceramic hard mask film, the film being etch selective to low-k dielectric...

06/19/14 - 20140167227 - Method of making a semiconductor device using multiple layer sets
A mechanism for forming a semiconductor device is described. The semiconductor device includes a substrate and an inter-layer dielectric (ILD) layer over the substrate. The intermediate semiconductor device further includes a first layer set over the ILD layer and a second layer set over the first layer set. The intermediate...

06/19/14 - 20140167228 - Etch process with pre-etch transient conditioning
A method for etching features with different aspect ratios in an etch layer is provided. A plurality of cycles is provided wherein each cycle comprises a pre-etch transient conditioning of the etch layer, which provides a transient condition of the etch layer, wherein the transient condition has a duration and...

06/12/14 - 20140159211 - Semiconductor structure and process thereof
A semiconductor structure includes a dielectric layer located on a substrate, wherein the dielectric layer includes nitrogen atoms, and the concentration of the nitrogen atoms in the dielectric layer is lower than 5% at a location wherein the distance between this location in the dielectric layer to the substrate is...

06/05/14 - 20140151856 - Chip module, an insulation material and a method for fabricating a chip module
The chip module includes a carrier, a semiconductor chip arranged on or embedded inside the carrier, and an insulation layer that at least partly covers a face of the carrier. The dielectric constant ∈r and the thermal conductivity λ of the insulation layer satisfy the condition λ·∈r<4.0 W·m−1·K−1....

06/05/14 - 20140151857 - Method and system for binding halide-based contaminants
A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the...

05/29/14 - 20140145312 - Semiconductor structure with rare earth oxide
A semiconductor structure with a rare earth oxide is provided. The semiconductor structure comprises: a semiconductor substrate (100); and a plurality of insulation oxide layers (201, 202 . . . 20x) and a plurality of single crystal semiconductor layers (301, 302 . . . 30x) alternately stacked on the semiconductor...

05/22/14 - 20140138800 - Small pitch patterns and fabrication method
A method is provided for fabricating small pitch patterns. The method includes providing a semiconductor substrate, and forming a target material layer having a first region and a second region on the semiconductor substrate. The method also includes forming a plurality of discrete first sacrificial layers on the first region...

05/08/14 - 20140124902 - High resistivity silicon-on-insulator substrate and method of forming
A semiconductor structure and a method of forming the same. In one embodiment, a method of forming a silicon-on-insulator (SOI) wafer substrate includes: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC),...

05/01/14 - 20140117510 - Semiconductor bonding structure and process
A system and method for bonding semiconductor devices is provided. An embodiment comprises halting the flow of a eutectic bonding material by providing additional material of one of the reactants in a grid pattern, such that, as the eutectic material flows into the additional material, the additional material will change...

04/10/14 - 20140097523 - Method for manufacturing bonded wafer and bonded soi wafer
A method for manufacturing a bonded wafer includes: an ion implantation step of using a batch type ion implanter; a bonding step of bonding an ion implanted surface of a bond wafer to a surface of a base wafer directly or through an insulator film; and a delamination step of...

03/13/14 - 20140070376 - Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements
A method for manufacturing a chip arrangement is provided, the method including: forming a hole in a carrier including at least one chip, wherein forming a hole in the carrier includes: selectively removing carrier material, thereby forming a cavity in the carrier, forming passivation material over one or more cavity...

01/30/14 - 20140027884 - System and method for gas-phase sulfur passivation of a semiconductor surface
Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase sulfur precursor to passivate the...

01/30/14 - 20140027885 - Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate
A three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least...

12/26/13 - 20130341768 - Self repairing process for porous dielectric materials
The present disclosure relates to a structure and method to create a self-repairing dielectric material for semiconductor device applications. A porous dielectric material is deposited on a substrate, and exposed with treating agent particles such that the treating agent particles diffuse into the dielectric material. A dense non-porous cap is...

12/26/13 - 20130341769 - Aluminium oxide-based metallisation barrier
The present invention relates to aluminium oxide-based passivation layers which simultaneously act as diffusion barrier for underlying wafer layers against aluminium and other metals. Furthermore, a process and suitable compositions for the production of these layers are described....

11/14/13 - 20130299952 - Method for manufacturing a semiconductor device and a semiconductor device
The deposition rate of a porous insulation film is increased, and the film strength of the porous insulation film is improved. Two or more organic siloxane raw materials each having a cyclic SiO structure as a main skeleton thereof, and having mutually different structures, are vaporized, and transported with a...

11/07/13 - 20130292806 - Methods for manganese nitride integration
Described are methods of forming a semiconductor device. Certain methods comprises depositing a film comprising manganese nitride over a dielectric; depositing a copper seed layer over the film; and depositing a copper fill layer over the copper seed layer. Also described are semiconductor devices. Certain semiconductor devices comprise a low-k...

09/12/13 - 20130234299 - Semiconductor device and method for manufacturing the same
According to one embodiment, a_semiconductor device includes a stacked body in which a plurality of conductive layers and a plurality of insulating layers are alternately stacked. The semiconductor device includes a mark and a supporting unit. The mark is opened onto a surface of the stacked body. The supporting unit...

09/12/13 - 20130234300 - Semiconductor device including a stress buffer material formed above a low-k metallization system
A bump structure or pillar structure formed above a metallization system of a complex semiconductor device may include a stress buffer layer, which may efficiently distribute the resulting mechanical stress which may typically occur during the chip package interaction due to a thermal mismatch of these components. The stress buffer...

09/05/13 - 20130228901 - Materials and methods for stress reduction in semiconductor wafer passivation layers
The present invention provides polyimide polymer materials for passivating semiconductor wafers and methods for fabricating thereof. The present invention further provides a device that includes a semiconductor wafer and a passivating layer disposed on the surface of the wafer, wherein the passivating layer comprises such polyimide polymers....

08/15/13 - 20130207244 - Process for fabricating a silicon-on-insulator structure
Embodiments of to invention relate to a process for fabricating a silicon-on-insulator structure comprising the following steps: providing a donor substrate and a support substrate, only one of the substrates being covered with an oxide layer; forming, in the donor substrate, a weak zone; plasma activating the oxide layer; bonding...

08/15/13 - 20130207245 - Methods for making porous insulating films and semiconductor devices including the same
Low-k porous insulating films with a high modulus of elasticity are made by depositing alkylated cyclic siloxane precursors over a semiconductor substrate by CVD. Plasma enhancement of the CVD is performed either during CVD or in situ on the deposited film. A UV cure of the film is effected under...

08/01/13 - 20130193564 - Semiconductor structure and method and tool for forming the semiconductor structure
A method of forming a semiconductor structure includes forming a photoresist layer over a substrate. The photoresist layer includes a first material removable by a removal process. The first material at a guard band portion of the photoresist layer along an edge portion of the photoresist layer is converted to...

07/04/13 - 20130168835 - High resistivity silicon-on-insulator substrate and method of forming
A semiconductor structure and a method of forming the same. In one embodiment, a method of forming a silicon-on-insulator (SOI) wafer substrate includes: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC),...

07/04/13 - 20130168836 - Soi structures having a sacrificial oxide layer
Methods for producing silicon on insulator structures with a reduced metal content in the device layer thereof are disclosed. Silicon on insulator structures with a reduced metal content are also disclosed....

06/20/13 - 20130154063 - Driving substrate, display device, planarizing method, and method of manufacturing driving substrate
A driving substrate includes: a protective layer including an etching surface; and a film layer including one or more convex portions on a surface thereof, the film layer being in contact with a rear surface of the protective layer, the one or more convex portions each having a surface being...

05/30/13 - 20130134561 - Backside thermal patterning of buried oxide (box)
The dominant source of thermal resistance for silicon photonic devices patterned on SOI wafers is the buried oxide layer. To ensure efficient thermally driven silicon devices there is a need for a large thermal resistance. This is in contrast to temperature sensitive components need to have low thermal resistance in...

05/30/13 - 20130134562 - Semiconductor device and method for fabricating semiconductor buried layer
The present disclosure provides a semiconductor device and a method for fabricating a semiconductor buried layer. The method includes: preparing a substrate which includes a first oxide layer; forming a first buried layer region in the surface of the substrate by using a photoresist layer with a first buried layer...

05/23/13 - 20130127021 - Methods for adhering materials, for enhancing adhesion between materials, and for patterning materials, and related semiconductor device structures
Methods for adhering materials and methods for enhancing adhesion between materials are disclosed. In some embodiments, a polymer brush material is bonded to a base material, and a developable polymer resist material is applied over the grafted polymer brush material. The resist material is at least partially miscible in the...

05/23/13 - 20130127022 - Electronic device package and method for forming the same
An embodiment of the invention provides a method for forming an electronic device package, which includes providing a carrier substrate having an upper surface and an opposite lower surface; forming a cavity from the upper surface of the carrier substrate; disposing an electronic device having a conducting electrode in the...

05/09/13 - 20130113085 - Atomic layer deposition of films using precursors containing hafnium or zirconium
Provided are low temperature methods of depositing hafnium or zirconium containing films using a Hf(BH4)4 precursor, or Zr(BH4)4 precursor, respectively, as well as a co-reactant. The co-reactant can be selected to obtain certain film compositions. Co-reactants comprising an oxidant can be used to deposit oxygen into the film. Accordingly, also...

05/09/13 - 20130113086 - Self-leveling planarization materials for microelectronic topography
Planarization methods and microelectronic structures formed therefrom are disclosed. The methods and structures use planarization materials comprising fluorinated compounds or acetoacetylated compounds. The materials are self-leveling and achieve planarization over topography without the use of etching, contact planarization, chemical mechanical polishing, or other conventional planarization techniques....

04/25/13 - 20130099363 - Molecular self-assembly in substrate processing
Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming...

04/04/13 - 20130082361 - Manufacturing method for flexible device and flexible device manufactured by the same
The method of manufacturing a flexible device according to the present disclosure includes: fabricating a device on an upper silicon layer of a silicon-on-insulator (SOI) substrate comprising a lower silicon layer, an insulation layer and the upper silicon layer stacked sequentially; adhering a second silicon substrate to the upper silicon...

03/28/13 - 20130075872 - Metal pad structures in dies
A die includes a substrate, a metal pad over the substrate, and a passivation layer that has a portion over the metal pad. A dummy pattern is disposed adjacent to the metal pad. The dummy pattern is level with, and is formed of a same material as, the metal pad....

03/28/13 - 20130075873 - Glass composition for protecting semiconductor junction, method of manufacturing semiconductor device and semiconductor device
Provided is a glass composition for protecting a semiconductor junction which contains at least SiO2, Al2O3, ZnO, CaO and 3 mol % to 10 mol % of B2O3, and substantially contains none of Pb, P, As, Sb, Li, Na and K. It is preferable that a content of SiO2 falls...

03/21/13 - 20130069207 - Method for producing a deposit and a deposit on a surface of a silicon substrate
A deposit and a method for producing a deposit on a surface of a silicon substrate. The deposit comprises aluminum oxide, and the method comprises in any order the alternating steps of a) introducing into a reaction space one of water and ozone as a precursor for oxygen, b) introducing...

01/31/13 - 20130026608 - Process for manufacturing a semiconductor structure comprising a functionalized layer on a support substrate
The invention relates to a process for manufacturing a semiconductor structure comprising a functionalized layer on a support substrate, comprising the following steps: (a) implanting ionic species in a source substrate comprising the said functionalized layer and a sacrificial buffer layer located under the functionalized layer relative to the direction...

01/31/13 - 20130026609 - Package assembly including a semiconductor substrate with stress relief structure
An apparatus configured to be coupled onto a substrate, wherein the apparatus comprises a semiconductor substrate and the semiconductor substrate includes a plurality of trenches defined within a side of the semiconductor substrate. The apparatus further comprises an interconnect layer over portions of the side of the semiconductor substrate, wherein...

01/24/13 - 20130020684 - Actinic ray-sensitive or radiation-sensitive resin composition, and actinic ray-sensitive or radiation-sensitive film and pattern forming method using the same
The actinic ray-sensitive or radiation-sensitive resin composition according to the present invention includes a resin (A) which contains at least one type of repeating unit which is represented by the general formula (PG1), at least one type of repeating unit which is selected from the repeating units which are represented...

01/17/13 - 20130015562 - Actinic-ray- or radiation-sensitive resin composition, actinic-ray- or radiation-sensitive film therefrom and method of forming pattern using the composition
Provided is an actinic-ray- or radiation-sensitive resin composition including (A) a resin that when acted on by an acid, is decomposed to thereby increase its solubility in an alkali developer, (B) an onium salt containing a nitrogen atom in its cation moiety, which onium salt when exposed to actinic rays...

01/10/13 - 20130009286 - Semiconductor chip and flip-chip package comprising the same
A semiconductor chip includes stress-relief to mitigate the effects of differences in coefficients of thermal expansion (CTE) between a printed circuit board (PCB) and a semiconductor chip and a flip-chip package including the semiconductor chip. The semiconductor chip includes a stress-relief buffer coupling a bump and a semiconductor chip pad....

01/10/13 - 20130009287 - Accurate deposition of nano-objects on a surface
The invention notably concerns a method for depositing nano-objects on a surface. The method includes: providing a substrate with surface patterns on one face thereof; providing a transfer layer on said face of the substrate; functionalizing areas on a surface of the transfer layer parallel to said face of the...