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Passive Components In Ics

Passive Components In Ics patent applications listed include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes)


Integrated Circuit Structure With Electrically Isolated Components > Passive Components In Ics



Lithium battery, method for manufacturing a lithium battery, integrated circuit and method of manufacturing an integrated circuit
10/30/14 - 20140319649 - A lithium battery includes a cathode, an anode including a component made of silicon, a separator element disposed between the cathode and the anode, an electrolyte, and a substrate. The anode is disposed over the substrate or the anode is integrally formed with the substrate....

Semiconductor device
10/02/14 - 20140291800 - When a conductive layer occupying a large area is provided in a coiled antenna portion, it has been difficult to supply power stably. A memory circuit portion and a coiled antenna portion are disposed by being stacked together; therefore, it is possible to prevent a current from flowing through a...

Integrated passive devices for finfet technologies
09/25/14 - 20140284760 - Integrated passive devices for silicon on insulator (SOI) FinFET technologies and methods of manufacture are disclosed. The method includes forming a passive device on a substrate on insulator material. The method further includes removing a portion of the insulator material to expose an underside surface of the substrate on insulator...

Package arrangement and a method of manufacturing a package arrangement
09/11/14 - 20140252537 - In various embodiments, a package arrangement is provided. The package arrangement may include a first package. The package arrangement may further include a through hole package including at least one contact terminal. The first package may include at least one hole in an encapsulant to receive the at least one...

Semiconductor device
08/28/14 - 20140239438 - A number of semiconductor chips each include a first main face and a second main face opposite to the first main face. A first encapsulation layer is applied over the second main faces of the semiconductor chips. An electrical wiring layer is applied over the first main faces of the...

3d nand flash memory
08/21/14 - 20140231954 - A memory device includes an array of NAND strings of memory cells. The device includes a plurality of stacks of conductive strips separated by insulating material, including at least a bottom plane of conductive strips, a plurality of intermediate planes of conductive strips, and a top plane of conductive strips....

Chip with through silicon via electrode and method of forming the same
07/24/14 - 20140203394 - The present invention provides a method of forming a chip with TSV electrode. A substrate with a first surface and a second surface is provided. A thinning process is performed from a side of the second surface so the second surface becomes a third surface. Next, a penetration via which...

Semiconductor package and method of manufacturing the same
07/24/14 - 20140203395 - A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an...

Integrated circuit package with printed circuit layer
06/26/14 - 20140175599 - An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die....

Semiconductor package and fabrication method thereof
05/22/14 - 20140138791 - A semiconductor package is provided. The semiconductor package includes a semiconductor chip having opposite first and second surfaces; an RDL structure formed on the first surface of the semiconductor chip and having opposite third and fourth surfaces and a plurality of first conductive through holes penetrating the third and fourth...

Hybrid semiconductor module structure
04/10/14 - 20140097512 - Some implementations provide a structure that includes a first package substrate, a first component, a second package substrate, a second component, and a third component. The first package substrate has a first area. The first component has a first height and is positioned on the first area. The second package...

Package-on-package type package including integrated circuit devices and associated passive components on different levels
04/10/14 - 20140097513 - A package-on-package (PoP)-type package includes a first semiconductor package having a first passive element and a first semiconductor device mounted on a first substrate, and a second semiconductor package having a second semiconductor device mounted on a second substrate. The first passive element is electrically connected to the second semiconductor...

Package substrate and method of fabricating the same
03/27/14 - 20140084413 - A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a top surface and a bottom surface opposing the top surface; an insulating protective layer formed on the top surface of the substrate; an interposer embedded in and exposed from...

Semiconductor package and method for fabricating base for semiconductor package
02/06/14 - 20140035095 - The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure....

Method for controlling electrical property of passive device during fabrication of integrated component and related integrated component
02/06/14 - 20140035096 - A method for controlling an electrical property of a passive device during a fabrication of an integrated component includes providing a substrate, manufacturing the passive device on the substrate, measuring the electrical property of the passive device to obtain a measuring result, determining at least one layout pattern corresponding to...

Semiconductor device
11/21/13 - 20130307113 - A semiconductor device includes a first insulating layer; a wiring layer formed on a first surface of the first insulating layer and including a first electrode pad; a semiconductor chip; a second insulating layer including a semiconductor chip accommodating portion; a third insulating layer on the second insulating layer; and...

Packaged semiconductor device having multilevel leadframes configured as modules
09/26/13 - 20130249051 - A semiconductor system (100) has a first planar leadframe (101) with first leads (102) and pads (103) having attached electronic components (120), the first leadframe including a set of elongated leads (104) bent at an angle away from the plane of the first leadframe; a second planar leadframe (110) with...

Semiconductor packages and methods of forming the same
09/12/13 - 20130234283 - In one embodiment, a method of fabricating a semiconductor package includes forming a first plurality of die openings on a laminate substrate. The laminate substrate has a front side and an opposite back side. A plurality of first dies is placed within the first plurality of die openings. An integrated...

Package-in-package using through-hole via die on saw streets
08/22/13 - 20130214385 - A semiconductor device includes a first die having top, bottom, and peripheral surfaces. A bond pad is formed over the top surface. An organic material is connected to the first die and disposed around the peripheral surface. A via hole is formed in the organic material. A metal trace connects...

Sip system-integration ic chip package and manufacturing method thereof
08/22/13 - 20130214386 - A system-in-package (SiP) system-integration integrated circuit (IC) chip package and a manufacturing method thereof are provided. The package includes a substrate, a passive device and two IC chips are provided on the substrate, an adhesive film is disposed between each of the two IC chips and the substrate, the IC...

Packages with passive devices and methods of forming the same
07/04/13 - 20130168805 - A device includes a substrate, a metal pad over the substrate, and a passivation layer having a portion over the metal pad. A Post-Passivation Interconnect (PPI) line is disposed over the passivation layer and electrically coupled to the metal pad. An Under-Bump Metallurgy (UBM) is disposed over and electrically coupled...

Semiconductor package
06/27/13 - 20130161784 - A semiconductor package includes a substrate; first and second pads that are disposed separate from each other on the substrate; and a solder resist that allows a portion of the substrate in a region between the first and second pads and to be exposed while covering a portion of the...

Device matching layout and method for ic
05/02/13 - 20130105938 - The present invention relates to device matching in an integrated circuit. In one embodiment, an integrated circuit of matched devices can include: N main-devices to be matched by 4×K sub-devices configured to form K device arrays, where each of the device arrays includes four sub-device groups arrayed symmetrically around a...

Semiconductor device
05/02/13 - 20130105939 - A semiconductor device includes a first interposer, a semiconductor chip located above the first interposer, and a second interposer located in a region above the first interposer without the semiconductor chip. The first interposer includes a through electrode electrically coupled to the semiconductor chip, and a through electrode electrically coupled...

Heat spreader for thermally enhanced flip-chip ball grid array package
01/03/13 - 20130001740 - A heat spreader is provided for use with a thermally enhanced flip-chip ball grid array package. In the package, a semiconductor die is positioned front-side down on a package substrate, coupled thereto via solder balls. Passive devices can also be coupled to the substrate alongside the die. The heat spreader...

Semicinductor device with cross-talk isolation using m-cap and method thereof
11/29/12 - 20120299149 - A semiconductor device is made by forming an oxide layer over a substrate and forming a first conductive layer over the oxide layer. The first conductive layer is connected to ground. A second conductive layer is formed over the first conductive layer as a plurality of segments. A third conductive...

Semiconductor device and method for manufacturing same
06/21/12 - 20120153432 - According to an embodiment, a semiconductor device includes a substrate, a control element provided on the substrate, a resin provided on the control element and a memory element provided above the control element. The memory element is in contact with the resin and electrically connected to the control element provided...

Semiconductor device and method of forming recesses in substrate for same size or different sized die with vertical integration
06/14/12 - 20120146177 - A semiconductor device has a substrate with a first and second recess formed in a surface of the substrate using a wet etch process. The second recess can have a size different from a size of the first recess. A plurality of conductive vias are formed in a surface of...

Overmolded semiconductor package with wirebonds for electromagnetic shielding
06/14/12 - 20120146178 - According to one exemplary embodiment, an overmolded package includes a component situated on a substrate. The overmolded package further includes an overmold situated over the component and the substrate. The overmolded package further includes a wirebond cage situated over the substrate and in the overmold, where the wirebond cage surrounds...

High-speed memory sockets and interposers
05/03/12 - 20120104543 - High-speed memory systems that consume a reduced amount of board space, have a low height or profile, or both. This reduction in board space and height may result in shorter signal paths from a board to a memory device, thereby improving the high-speed performance of the high-speed memory system. One...

Sheet-molded chip-scale package
04/05/12 - 20120080768 - Embodiments include but are not limited to apparatuses and systems including a microelectronic device including a die having a first surface and a second surface opposite the first surface, a conductive pillar formed on the first surface of the die, and an encapsulant material encasing the die, including covering the...

Electronic device including a feature in a trench
03/01/12 - 20120049320 - A semiconductor substrate can be patterned to define a trench and a feature. In an embodiment, the trench can be formed such that after filling the trench with a material, a bottom portion of the filled trench may be exposed during a substrate thinning operation. In another embodiment, the trench...

Semiconductor device, semiconductor circuit substrate, and method of manufacturing semiconductor circuit substrate
02/09/12 - 20120032296 - A semiconductor circuit substrate includes a transistor-forming substrate and a circuit-forming substrate. The transistor-forming substrate is a GaN substrate and has a Bipolar Junction Transistor (BJT) located in its top surface. The bottom surface of the transistor-forming substrate is flat and has contact regions. The circuit-forming substrate is a material...

Semiconductor integrated circuit device
01/19/12 - 20120012975 - A semiconductor integrated circuit device includes a semiconductor substrate including a digital circuit area and an analog circuit area that is divided into an active element area disposed away from the digital circuit area and a passive element area disposed adjacent to the digital circuit area; a first well having...

Electrostatic discharge protection scheme for semiconductor device stacking process
12/15/11 - 20110304010 - An electrostatic discharge (ESD) protection scheme for a semiconductor device stacking process is provided, in which an equivalent electrical resistance of a specific path is designed to be less than an equivalent electrical resistance of other paths. Accordingly, when a first active layer and a second active layer in the...

Package structure and method for making the same
12/01/11 - 20110291228 - A package structure which includes a non-conductive substrate, a conductive element, a passivation, a jointed side, a conductive layer, a solder and a solder mask is disclosed. The conductive element is disposed on a surface of the non-conductive substrate and consists of a passive element and a corresponding circuit. The...

Semiconductor package with penetrable encapsulant joining semiconductor die and method thereof
11/03/11 - 20110266652 - A semiconductor device includes a first substrate. A first semiconductor die is mounted to the first substrate. A bond wire electrically connects the first semiconductor die to the first substrate. A first encapsulant is deposited over the first semiconductor die, bond wire, and first substrate. The first encapsulant includes a...

High voltage semiconductor devices and methods of forming the same
10/06/11 - 20110241160 - High voltage semiconductor devices and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes forming first trenches in an insulating material. A trap region is formed in the insulating material by introducing an impurity into the first trenches. The first trenches are...

Chip package with channel stiffener frame
10/06/11 - 20110241161 - Various semiconductor chip packages and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a substrate that has a first side and a first plurality of passive devices on the first side. A stiffener frame is coupled on the first...

Semiconductor device and method of forming 3d inductor from prefabricated pillar frame
08/25/11 - 20110204472 - A semiconductor device is made by mounting a semiconductor component over a carrier. A ferromagnetic inductor core is formed over the carrier. A pillar frame including a plurality of bodies is mounted over the carrier, semiconductor component, and inductor core. An encapsulant is deposited around the semiconductor component, plurality of...

Packaged semiconductor product and method for manufacture thereof
07/28/11 - 20110180897 - Packaged semiconductor product (2) including a first semiconductor device (4A) and a packaging structure with a protective envelope (6) and a first and second external electrode (8,10). The first semiconductor device (4A) has a first substrate (11A) and is provided with a first passivation layer (12A) and a first electronic...

In-situ passivation methods to improve performance of polysilicon diode
07/14/11 - 20110169126 - A nonvolatile memory cell including a storage element in series with a diode steering element. At least one interface of the diode steering element is passivated....

Integrated passive device assembly
06/30/11 - 20110156203 - There is provided an integrated passive device assembly. An integrated passive device assembly according to an aspect of the invention may include: a board having a wiring pattern provided thereon; an integrated passive device mounted on an upper surface of the board and having conductive patterns provided on upper and...

Integrated passive device assembly
06/02/11 - 20110127636 - There is provided an integrated passive device assembly including: a substrate having a wiring pattern disposed therein; a mounting part disposed on an upper surface of the substrate, formed of an insulating material, and having an integrated passive device mounted on an upper surface thereof; a conductive pattern disposed inside...

Open cavity leadless surface mountable package for high power rf applications
04/21/11 - 20110089529 - An RF semiconductor package includes a substrate having generally planar top and bottom surfaces. The substrate includes a metallic base region and one or more metallic signal terminal regions extending from the top surface to the bottom surface, and an insulative material separating the metallic regions from one another. The...

Passive device, semiconductor module, electronic circuit board, and electronic system having the passive device, and methods of fabricating and inspecting the semiconductor module
04/07/11 - 20110079872 - Provided are a passive device of a semiconductor module, a semiconductor module having the passive device, an electronic circuit board and electronic system having the passive device or semiconductor module, and methods of fabricating and inspecting the semiconductor module. The passive device of the semiconductor module includes a main body...

Methods and apparatus for forming line and pillar structures for three dimensional memory arrays using a double subtractive process and imprint lithography
12/02/10 - 20100301449 - The present invention provides systems, apparatus, and methods for forming three dimensional memory arrays using a multi-depth imprint lithography mask and a double subtractive process. An imprint lithography mask for manufacturing a memory layer in a three dimensional memory is described. The mask includes a translucent material formed with features...

Deformable integrated circuit device
10/28/10 - 20100270640 - An integrated-circuit device is provided, which comprises a rigid substrate island having a main substrate surface with a circuit region circuit elements and at least one fold structure. The fold structure is attached to the substrate island and is unfoldable from a relaxed, folded state to a strained unfolded state....

Semiconductor device and method of forming high-frequency circuit structure and method thereof
10/21/10 - 20100264512 - A semiconductor device is made by providing an integrated passive device (IPD). Through-silicon vias (TSVs) are formed in the IPD. A capacitor is formed over a surface of the IPD by depositing a first metal layer over the IPD, depositing a resistive layer over the first metal layer, depositing a...

Integrated circuit devices including passive device shielding structures
10/21/10 - 20100264513 - Integrated circuit devices include a semiconductor substrate and a flux line generating passive electronic element on the semiconductor substrate. A dummy gate structure is arranged on the semiconductor substrate in a region below the passive electronic element. The dummy gate includes a plurality of segments, each segment including a first...

Integrated circuit package and method of forming the same
07/29/10 - 20100187651 - Aspects of the invention are directed towards an integrated circuit package and method of forming the same, and more particularly to a redistributed chip packaging for an integrated circuit. The integrated circuit package includes an integrated circuit having a protective material on at least a portion of the integrated circuit....

Wafer-level flip chip package with rf passive element/ package signal connection overlay
07/22/10 - 20100181642 - A packaged integrated circuit includes an integrated circuit having a Radio Frequency (RF) passive element formed therein and a wafer level chip scale flip chip package that contains the integrated circuit. The wafer level chip scale flip chip package includes at least one dielectric layer isolating a top metal layer...

Integrated mems and ic systems and related methods
06/24/10 - 20100155883 - An integrated MEMS and IC system (MEMSIC), as well as related methods, are described herein. According to some embodiments, a mechanical resonating structure is coupled to an electrical circuit (e.g., field-effect transistor). For example, the mechanical resonating structure may be coupled to a gate of a transistor. In some cases,...

Semiconductor device and method of embedding integrated passive devices into the package electrically interconnected using conductive pillars
06/10/10 - 20100140736 - A semiconductor device has a first insulation layer formed over a sacrificial substrate. A first conductive layer is formed over the first insulating layer. Conductive pillars are formed over the first conductive layer. A pre-fabricated IPD is disposed between the conductive pillars. An encapsulant is formed around the IPD and...

Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures
06/10/10 - 20100140737 - A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A...

Semiconductor device and method of forming compact coils for high performance filter
06/10/10 - 20100140738 - The first, second, and third coil structures are arranged in rounded or polygonal pattern horizontally across the substrate with a substantially flat vertical profile....

3-d circuits with integrated passive devices
05/27/10 - 20100127345 - 3-D ICs (18, 18′, 90) with integrated passive devices (IPDs) (38) having reduced cross-talk and high packing density are provided by stacking separately prefabricated substrates (20, 30, 34) coupled by through-substrate-vias (TSVs) (40). An active device (AD) substrate (20) has contacts on its upper portion (26). An isolator substrate (30)...

Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias
03/25/10 - 20100072570 - A semiconductor die has a first insulating material disposed around a periphery of the die. A portion of the first insulating material is removed to form a through hole via (THV). Conductive material is deposited in the THV. A second insulating layer is formed over an active surface of the...

Semiconductor device and method of forming shielding layer over integrated passive device using conductive channels
03/11/10 - 20100059853 - A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion...

Semiconductor device and method of forming an ipd over a high-resistivity encapsulant separated from other ipds and baseband circuit
03/11/10 - 20100059854 - A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over...

Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component
03/11/10 - 20100059855 - A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) is mounted to the temporary carrier using an adhesive. The IPD includes a capacitor and a resistor and has a plurality of through-silicon vias (TSVs). A discrete component is mounted...

Method of configuring a semiconductor integrated circuit involving capacitors having a width equal to the length of active resistors
03/11/10 - 20100059856 - A method of configuring a semiconductor integrated circuit (IC) includes arranging a circuit region in the center of a unit cell. Capacitor/resistor regions are arranged along the left and right edge portions of the unit cell. The capacitor/resistor regions include a plurality of active resistors having the same length and...

Method and system for secure heat sink attachment on semiconductor devices with macroscopic uneven surface features
02/04/10 - 20100025810 - An integrated circuit package is provided. The integrated circuit package includes a heat sink, a cured silicone thermally conductive adhesive material, and a surface. The adhesive material attaches the heat sink to the surface. The surface is a surface of at least one of a substrate, a surface of an...

Integrated circuit with built-in heating circuitry to reverse operational degeneration
02/04/10 - 20100025811 - An integrated circuit device (100) includes structures (104) that exhibit performance degradation as a function of use (e.g., accumulated defects within the tunneling oxide of a Flash memory cell, or trapped charge within a charge storage layer) and heating circuitry (101) disposed in proximity to the structures to heat the...

Semiconductor component and method of manufacture
12/24/09 - 20090315142 - A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in a first level above a substrate, a capacitor is manufactured in a second level that...

Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias
12/03/09 - 20090294899 - A semiconductor die has a first insulating material disposed around a periphery of the die. A portion of the first insulating material is removed to form a through hole via (THV). Conductive material is deposited in the THV. A second insulating layer is formed over an active surface of the...

Semiconductor device including analog circuitry having a plurality of devices of reduced mismatch
11/05/09 - 20090273053 - In an analog circuit portion, a systematic mismatch between a plurality of circuit elements may be reduced in view of a technology gradient by appropriately positioning the unit devices of the circuit elements so as to obtain a similar response of the circuit elements with respect to the gradient. For...

Semiconductor device and method of forming ubm fixed relative to interconnect structure for alignment of semiconductor die
09/24/09 - 20090236686 - A semiconductor device is made by forming a first conductive layer over a temporary carrier. A UBM layer is formed over the temporary carrier and fixed in position relative to the first conductive layer. A conductive pillar is formed over the first conductive layer. A semiconductor die is mounted to...

Integrated passive devices
09/03/09 - 20090218655 - The specification describes an integrated passive device (IPD) that is formed on a polysilicon substrate. A method for making the IPD is disclosed wherein the polysilicon substrate is produced starting with a single crystal handle wafer, depositing a thick substrate layer of polysilicon on one or both sides of the...

Semiconductor device having capacitor, transistor and diffusion resistor and manufacturing method thereof
06/25/09 - 20090160017 - In manufacturing a semiconductor device including a substrate having a (111)-plane orientation and an off-set angle in a range between 3 degrees and 4 degrees, a capacitor, a transistor and a diffusion resistor are formed in the substrate, each of which are separated by a junction separation layer. A first...

Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures
06/04/09 - 20090140381 - A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A...