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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Field Effect Device > Having Insulated Electrode (e.g., Mosfet, Mos Diode) > Gate Electrode Of Refractory Material (e.g., Polysilicon Or A Silicide Of A Refractory Or Platinum Group Metal) Gate Electrode Of Refractory Material (e.g., Polysilicon Or A Silicide Of A Refractory Or Platinum Group Metal)Gate Electrode Of Refractory Material (e.g., Polysilicon Or A Silicide Of A Refractory Or Platinum Group Metal) patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.12/20/07 - 20070290280 - Semiconductor device having silicide thin film and method of forming the same The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region of a semiconductor substrate. A gate electrode is formed on the gate insulation layer. An impurity region is formed ... 12/13/07 - 20070284678 - Methods of manufacturing metal-silicide features A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening by a metal deposition process employing a target which ... 12/13/07 - 20070284676 - Semiconductor device having multiple work functions and method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a first transistor (120) located over a semiconductor substrate (110), wherein the first transistor (120) has a metal gate electrode (135) ... 09/06/07 - 20070205472 - Formation of a disposable spacer to post dope a gate conductor A method of forming a doped gate structure on a semiconductor device and a semiconductor structure formed in that method are provided. The method comprises the steps of providing a semiconductor device including a gate dielectric layer, and forming a gate stack on said dielectric layer. This latter step, in ... 08/16/07 - 20070187784 - Double-diffused-drain mos device with floating non-insulator spacer A double-diffused-drain metal-oxide-semiconductor device has a gate structure overlying a semiconductor substrate, a pair of insulator spacers on the sidewalls of the gate structure respectively, and a pair of floating non-insulator spacers embedded in the pair of insulator spacers respectively. ... 07/19/07 - 20070164376 - Method for edge sealing barrier films An edge-sealed, encapsulated environmentally sensitive device. The device includes an environmentally sensitive device, and at least one edge-sealed barrier stack. The edge-sealed barrier stack includes a decoupling layer and at least two barrier layers. The environmentally sensitive device is sealed between an edge-sealed barrier stack and either a substrate or ... 06/21/07 - 20070138580 - Semiconductor device and method of fabricating the same There is provided a semiconductor device which is capable of solving a problem of threshold control in CMOS transistor, accompanied with combination of a gate insulating film having a high dielectric constant and a metal gate electrode, and significantly enhancing performances without deterioration in reliability of a device. The semiconductor ... 06/07/07 - 20070126067 - Angled implantation for removal of thin film layers Embodiments of the invention provide a device with a reverse-tapered gate electrode and a gate dielectric layer with a length close to that of the gate length. In an embodiment, this may be done by altering portions of a blanket dielectric layer with one or more angled ion implants, then ... 05/17/07 - 20070108538 - Semiconductor device and method for manufacturing the same A semiconductor device is provided that has MIS transistors with metal gates that can prevent an increase in the number of manufacturing steps as much as possible and also restrain difficulties in the manufacturing conditions. This semiconductor device has a substrate; and an n-channel MIS transistor including: a p-type semiconductor ... 04/26/07 - 20070090472 - Semiconductor device and method for production thereof A semiconductor device having a silicon substrate, an element isolating film, an active region, a gate electrode provided via a gate insulating film, a diffusion layer provided on the active region on opposite sides of the gate electrode, an interlayer insulating film, and a plug filled in a hole formed ... 03/29/07 - 20070069312 - Semiconductor device and method for fabricating the same A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region formed in the semiconductor substrate and surrounded by the isolation region; a fully-silicided gate line formed on the isolation region and the active region; and an insulating sidewall continuously covering a side face of the ... 03/22/07 - 20070063296 - Methods of modulating the work functions of film layers Methods for fabricating two metal gate stacks with varying work functions for complementary metal oxide semiconductor (CMOS) devices are provided A first metal layer may be deposited onto a gate dielectric, followed by the deposition of a second metal layer, where the second metal layer modulated the work function of ... 03/15/07 - 20070057335 - Semiconductor device It is made possible to control the effective work function of the gate electrode so that the transistor can have an optimum operating threshold voltage. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided on the semiconductor substrate; a gate electrode provided on the gate insulating film; ... 03/15/07 - 20070057334 - Mosfet with high angle sidewall gate and contacts for reduced miller capacitance The present invention relates to an FET device having a conductive gate electrode with angled sidewalls. Specifically, the sidewalls of the FET device are offset from the vertical direction by an offset angle that is greater than about 0° and not more than about 45°. In such a manner, such ... 03/08/07 - 20070052043 - Multilayer gate electrode, semiconductor device having the same and method of fabricating the same Example embodiments relate to a multilayer gate electrode, a semiconductor device having the same and methods of fabricating the same. Other example embodiments relate to a semiconductor device with a multilayer gate electrode which is relatively stable at higher temperatures, has improved resistance characteristics and improved reliability, and methods of ... 03/01/07 - 20070045754 - Semiconductor device with recessed l-shaped spacer and method of fabricating the same A semiconductor device with a recessed L-shaped spacer and a method for fabricating the same. A recessed L-shaped spacer includes a vertical portion and a horizontal portion. The vertical portion is disposed on lower sidewalls of a conductor pattern, exposing upper sidewalls thereof. A top spacer is on the L-shaped ... 02/22/07 - 20070040228 - Semiconductor device utilizing a metal gate material such as tungsten and method of manufacturing the same Known drawbacks associated with use of tungsten as a gate material in a semiconductor device are prevented. A gate oxide layer, a polysilicon layer, and a nitride layer are sequentially formed on a semiconductor substrate having a isolation layer for defining the active region. A recess is defined by etching ... 02/08/07 - 20070029628 - Semiconductor device and method of manufacturing the same A semiconductor device includes a gate structure formed on a substrate. The gate structure includes an uppermost first metal silicide layer pattern having a first thickness. Spacers are formed on sidewalls of the gate structure. One or more impurity regions are formed in the substrate adjacent to at least one ... 02/01/07 - 20070023849 - Method for forming a fully germano-silicided gate mosfet and devices obtained thereof A MOSFET comprising a fully germano-silicided gate electrode having a high work function is disclosed. This gate electrode is formed by a self-aligned reaction process between a silicidation metal and a semiconductor material comprising silicon and germanium. Preferably, the fully germano-silicided gate is formed by a reaction between nickel and ... 01/18/07 - 20070013012 - Etch-stop layer structure A semiconductor structure that includes a first gate structure, second gate structure and a nitrogen-containing etch-stop layer. The first gate structure whose sidewalls are bounded by at least one first spacer is formed on a semiconductor substrate. The second gate structure whose sidewalls are bounded by at least one second ... 01/11/07 - 20070007606 - Method for manufacturing mos transistor Disclosed is a method for fabricating a MOS transistor. The present method includes forming a buffer layer pattern including nitrogen on the semiconductor substrate; forming a gate insulating layer and a gate electrode on the exposed substrate surface; forming a LDD region in the substrate under the buffer pattern; forming ... 01/11/07 - 20070007605 - Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate The invention is directed to a device for regulating the flow of electric current with high dielectric constant gate insulating layer and a source and/or drain forming a Schottky contact or Schottky-like region with a substrate and its fabrication method. In one aspect, the gate insulating layer has a dielectric ... 01/04/07 - 20070001246 - Gate electrode with double diffusion barrier and fabrication method of semiconductor device including the same A gate electrode with a double diffusion barrier and a fabrication method of a semiconductor device including the same are provided. The gate electrode of a semiconductor device includes: a silicon electrode; a double diffusion barrier formed on the silicon electrode and including at least a crystalline tungsten nitride-based layer; ... 01/04/07 - 20070001245 - Semiconductor device and method of fabricating the same An impurity having a conductivity type same as that contained in a source-and-drain region is implanted to an exposed surface of a gate electrode along a direction inclined to the surface of said semiconductor substrate, while using over-etched sidewalls as a mask, where the gate electrode is implanted both at ... 12/28/06 - 20060289953 - Semiconductor device and manufacturing method of the same A semiconductor device includes a first semiconductor layer of a first conductivity type, a first gate insulating film, a first gate electrode and first source/drain regions. The first gate insulating film is formed on the first semiconductor layer. The first gate electrode is formed on the first gate insulating film. ... 12/21/06 - 20060284272 - Gate structure and method for preparing the same The present gate structure comprises a gate oxide layer positioned on a substrate, a conductive stack positioned on the gate oxide layer, a passivation layer positioned on the sidewall of the conductive stack, and a cap layer positioned on the conductive stack. The conductive stack includes a polysilicon layer, a ... 12/14/06 - 20060278941 - Semiconductor device with a high-k gate dielectric and a metal gate electrode A semiconductor device is described. That semiconductor device comprises a high-k gate dielectric layer that is formed on a substrate that applies strain to the high-k gate dielectric layer, and a metal gate electrode that is formed on the high-k gate dielectric layer. ... 12/07/06 - 20060273414 - Refractory metal-based electrodes for work function setting in semiconductor devices The present invention provides, in one embodiment, a gate structure (100). The gate structure comprises a gate dielectric (105) and a gate (110). The gate dielectric includes a refractory metal and is located over a semiconductor substrate (115). The semiconductor substrate has a conduction band and a valence band. The ... 11/30/06 - 20060267119 - Refractory metal-based electrodes for work function setting in semiconductor devices The present invention provides, in one embodiment, a gate structure (100). The gate structure comprises a gate dielectric (105) and a gate (110). The gate dielectric includes a refractory metal and is located over a semiconductor substrate (115). The semiconductor substrate has a conduction band and a valence band. The ... 11/30/06 - 20060267118 - Semiconductor device and method of manufacturing the same A semiconductor device provided with a semiconductor silicon substrate and gate wiring provided on the semiconductor silicon substrate via a gate oxide film, where the gate wiring has a gate electrode, a gate wiring upper structure provided in contact with the gate electrode, and a side wall spacer, the side ... 11/30/06 - 20060267117 - Nickel silicide method and structure Nickel silicide contact regions are formed on a source (2), drain (3) and polycrystalline silicon gate (5) of an integrated circuit transistor by annealing it after a nickel layer has been deposited on the source, drain, and gate, with no cap layer on the nickel layer. Nickel silicide bridging between ... 11/23/06 - 20060261422 - Semiconductor device and method for manufacturing the same A semiconductor device includes a gate insulating film formed on a silicon substrate, a gate electrode formed on the gate insulating film, and an electrical insulating film formed on the gate electrode. The electrical insulating film includes a N—H bond and substantially no Si—H bond. The electrical insulating film is ... 11/02/06 - 20060244084 - Semiconductor devices having polymetal gate electrodes and methods of manufacturing the same Semiconductor devices and methods of fabricating the same are provided. A gate insulating film is provided on a semiconductor substrate. A polymetal gate electrode is provided on the gate insulating film. The polymetal gate electrode includes a conductive polysilicon film on the gate insulating film, a first metal silicide film ... 10/26/06 - 20060237804 - Replacement gate flow facilitating high yield and incorporation of etch stop layers and/or stressed films The present invention relates to the deposition of a layer above a transistor structure, causing crystalline stress within the transistor, and resulting in increased performance. The stress layer may be formed above a plurality of transistors formed on a substrate, or above a plurality of selected transistors. ... 10/05/06 - 20060220158 - Semiconductor device and manufacturing method thereof A semiconductor device includes: a semiconductor layer; a high dielectric constant gate insulation film disposed above the semiconductor layer, the high dielectric constant gate insulation film containing a plurality of elements; a gate electrode disposed on the high dielectric constant gate insulation film; and an impurity region disposed in the ... 09/07/06 - 20060197166 - Semiconductor device and method of manufacturing the same A semiconductor device which includes a field effect transistor having a gate electrode on the upper side of a semiconductor substrate, with a gate insulation film therebetween, wherein at least the gate insulation film side of the gate electrode includes a film containing hafnium and silicon. ... 09/07/06 - 20060197165 - Semiconductor device having a dual gate electrode and methods of forming the same A semiconductor device having a dual gate electrode and a method of forming the same are provided. The semiconductor device includes a substrate including first and second regions. A first gate electrode formed of a first metal silicide is disposed on the substrate of the first region. A second gate ... 08/31/06 - 20060192258 - Semiconductor device A semiconductor device includes a semiconductor substrate having a semiconductor layer, a gate electrode, a source region, a drain region, an element separation insulating film layer and a wiring. The gate electrode include a laminated structure having a gate insulating film formed on the semiconductor layer, a metal or a ... 08/24/06 - 20060186491 - Methods of forming semiconductor devices having metal gate electrodes and related devices Methods of forming semiconductor devices and the devices so formed include forming an oxidation barrier pattern to cover sidewalls of a metal-containing pattern. The metal-containing pattern is located on a gate polysilicon layer and includes a metal silicide pattern, a metal barrier pattern and a gate metal pattern which are ... 08/24/06 - 20060186490 - Metal carbide gate structure and method of fabrication A semiconductor device such as a complementary metal oxide semiconductor (CMOS) comprising at least one FET that comprises a gate electrode comprising a metal carbide and method of fabrication are provided. The CMOS comprises dual work function metal gate electrodes whereby the dual work functions are provided by a metal ... 08/10/06 - 20060175673 - System and device including a barrier layer Systems and devices are disclosed utilizing a silicon-containing barrier layer. A semiconductor device is disclosed and includes a substrate, a gate oxide, a silicon-containing barrier layer and a gate electrode. The gate oxide is formed over the substrate. The silicon-containing barrier layer is formed over the gate oxide by causing ... 07/06/06 - 20060145275 - Method and structure to use an etch resistant liner on transistor gate structure to achieve high device performance An etch resistant liner covering sidewalls of a transistor gate stack and along a portion of the substrate at a base of the transistor gate stack. The liner prevents silicide formation on the sidewalls of the gate stack, which may produce electrical shorting, and determines the location of silicide formation ... 07/06/06 - 20060145274 - Nfets using gate induced stress modulation A method for manufacturing an integrated circuit comprising a plurality of semiconductor devices including an n-type field effect transistor and a p-type field effect transistor by covering the p-type field effect transistor with a mask, and oxidizing a portion of a gate polysilicon of the n-type field effect transistor, such ... 06/22/06 - 20060131676 - Semiconductor device and manufacturing method thereof A semiconductor device includes: a substrate having a silicon layer on at least a surface thereof; an insulating film formed on the silicon layer; a first electrode formed on the insulating film and including a first metal thin film and a film having silicon formed on the first metal thin ... 06/08/06 - 20060118892 - Methods and structures to produce a strain-inducing layer in a semiconductor device Described are methods of manufacturing a strain-inducing layer in semiconductor devices and structures formed to have such strain-inducing layers. Circuit elements are formed on a semiconductor substrate with conductive channel regions within the semiconductor substrate. Metal silicide contacts are formed on the semiconductor substrate and some are electrically connected to ... 06/01/06 - 20060113616 - Selective spacer layer deposition method for forming spacers with different widths A method of forming spacers with different widths on a semiconductor substrate, includes the steps of disposing a first spacer layer over the substrate, defining the first spacer layer into a plurality of spacers of a first width, and disposing a second spacer layer selectively over the first spacer layer ... 05/04/06 - 20060091483 - Method for making a semiconductor device with a high-k gate dielectric layer and a silicide gate electrode A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, forming a barrier layer on the high-k gate dielectric layer, and forming a fully silicided gate electrode on the barrier layer. ... 04/13/06 - 20060076630 - Integrated transistor devices A self-aligned enhancement mode metal-oxide-compound semiconductor field effect transistor (10) includes a lower oxide layer that is a mixture of Ga2O, Ga2O3, and other gallium oxide compounds (30), and a second insulating layer that is positioned immediately on top of the gallium oxygen layer together positioned on upper surface (14) ... 03/30/06 - 20060065939 - Metal gate electrode semiconductor device A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate. A metal barrier layer may be formed over the gate dielectric. A workfunction setting metal layer is formed over the metal barrier layer ... 02/16/06 - 20060033173 - Versatile system for charge dissipation in the formation of semiconductor device structures The present invention provides a system for dissipating any aberrant charge that may accumulate during the fabrication of a semiconductor device segment (200), obviating overstress or break down damage to a focal device structure (208) that might result from uncontrolled dissipation of the aberrant charge. A substrate (202) has first ... 02/09/06 - 20060027883 - Semiconductor device and manufacturing method thereof An object is to obtain a semiconductor device in which channel length is reduced without increasing the gate resistance to realize higher operation speed and its manufacturing method. An MOSFET has a trench-type element isolation structure (2) formed in the main surface of a semiconductor substrate (1), a pair of ... 01/19/06 - 20060011996 - Semiconductor structure including silicide regions and method of making same A method of forming a silicided gate on a substrate having active regions, comprising the steps of: forming a first silicide in the active regions from a first material; and forming a second silicide in the gate from a second material, wherein the first silicide forms a barrier against the ... 01/12/06 - 20060006481 - Method and structure for reducing resistance of a semiconductor device feature A method used to form a semiconductor device comprises forming a polysilicon layer, forming a conductive barrier layer on the polysilicon layer, then forming a conductive nitride layer on the conductive barrier layer. Next, a conductive amorphous layer is formed on the conductive barrier layer, and an elemental metal layer ... 01/05/06 - 20060001112 - Semiconductor device and method for manufacturing the same The present invention discloses method for manufacturing semiconductor device employing an EXTIGATE structure. In accordance with the method, a predetermined thickness of the device isolation film is etched to form a recess. The recess is then filled with a second nitride film. A stacked structure of a barrier metal film, ... 12/15/05 - 20050275046 - Multi-layer gate stack structure comprising a metal layer for a fet device, and method for fabricating the same A multi-layer gate stack structure of a field-effect transistor device is fabricated by providing a gate electrode layer stack with a polysilicon layer, a transition metal interface layer, a nitride barrier layer and then a metal layer on a gate dielectric, wherein the transition metal is titanium, tantalum or cobalt. ... 11/24/05 - 20050258500 - Refractory metal-based electrodes for work function setting in semiconductor devices The present invention provides, in one embodiment, a gate structure (100). The gate structure comprises a gate dielectric (105) and a gate (110). The gate dielectric includes a refractory metal and is located over a semiconductor substrate (115). The semiconductor substrate has a conduction band and a valence band. The ... 11/17/05 - 20050253205 - Semiconductor device and method for fabricating the same The method for fabricating a semiconductor device comprises the step of forming an Ni film 66 on a source/drain diffused layers 64, the first thermal processing step of reacting a part of the Ni film 66 on the lower side and a part of the source/drain diffused layers 64 on ... 11/17/05 - 20050253204 - Method of forming silicided gate structure A method of forming a silicided gate on a substrate having active regions is provided. The method comprises forming silicide in the active regions and a portion of the gate, leaving a remaining portion of the gate unsilicided; forming a shielding layer over the active regions and gate after the ... 09/15/05 - 20050199968 - Semiconductor device and method for fabricating the same An N-channel transistor includes: an N-type source region, a gate electrode, a P-type body region, an N-type drain offset region, and a drain contact region, which is an N-type drain region. The transistor further includes a gate insulating film that has a thin oxide silicon film (a thin film portion) ... 09/01/05 - 20050189600 - Semiconductor device having gate electrode of staked structure including polysilicon layer and metal layer and method of manufacturing the same The present invention provides a semiconductor device, comprising a gate electrode of a stacked structure consisting of a polysilicon layer and a metal layer, a cap insulating film formed on the gate electrode, and a gate side wall film formed on the side wall of the gate electrode. The cap ... 09/01/05 - 20050189599 - Semiconductor device having a silicided gate electrode and method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device (100), among other possible elements, includes a gate oxide (140) located over a substrate (110), and a silicided gate electrode (150) located over the gate oxide (140), ... 08/18/05 - 20050179098 - Method to form a metal silicide gate device A new method to form metal silicide gates in the fabrication of an integrated circuit device is achieved. The method comprises forming polysilicon lines overlying a substrate with a dielectric layer therebetween. A first isolation layer is formed overlying the substrate and the sidewalls of the polysilicon lines. The first ... 07/21/05 - 20050156258 - Method of forming silicide film having excellent thermal stability, semiconductor device and semiconductor memory device comprising silicide film formed of the same, and methods of manufacturing the semiconductor device and the semiconductor memory device Provided are a method of forming a silicide film having excellent thermal stability, a semiconductor device and a semiconductor memory device comprising the silicide film formed using the same, and methods of manufacturing the semiconductor device and the semiconductor memory device. A method of forming a nickel mono silicide film ... 07/07/05 - 20050145959 - Technique to mitigate short channel effects with vertical gate transistor with different gate materials A process of forming a transistor with three vertical gate electrodes including a high-k gate dielectric and the resulting transistor. By forming such a transistor it is possible to maintain an acceptable aspect ratio as MOSFET structures are scaled down to sub-micron sizes. The transistor gate electrodes can be formed ... 07/07/05 - 20050145958 - Formation of a disposable spacer to post dope a gate conductor A method of forming a doped gate structure on a semiconductor device and a semiconductor structure formed in that method are provided. The method comprises the steps of providing a semiconductor device including a gate dielectric layer, and forming a gate stack on said dielectric layer. This latter step, in ... 06/30/05 - 20050139938 - Semiconductor device and method of manufacturing the same Provided is a semiconductor device capable of reducing the resistance of the gate electrode of a transistor. The semiconductor device comprises a semiconductor substrate, a gate oxide film formed on the substrate, a gate formed on the gate oxide film, and a metal silicide layer formed on the top surface ... 06/16/05 - 20050127460 - Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device comprises: forming a first pattern in a first region over a semiconductor substrate; forming a second pattern in a second region separated from the first region over the semiconductor substrate; depositing an interlayer insulation film to cover the first and second patterns; forming ... ### FreshPatents.com Support - Terms & Conditions |