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Combined With Passive Components (e.g., Resistors)

Combined With Passive Components (e.g., Resistors) patent applications listed include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

Related Categories:

Active Solid-state Devices (e.g., Transistors, Solid-state Diodes)


Field Effect Device > Having Insulated Electrode (e.g., Mosfet, Mos Diode) > Insulated Gate Field Effect Transistor In Integrated Circuit > Combined With Passive Components (e.g., Resistors)



Integrated circuits with resistors
12/18/14 - 20140367793 - An integrated circuit includes a transistor. The transistor includes a first gate dielectric structure over a substrate, a work-function layer over the first gate dielectric structure, a conductive layer over the work-function layer, and a source/drain (S/D) region adjacent to each sidewall of the first gate dielectric structure. Additionally, the...

Methods for fabricating integrated circuits with polycrystalline silicon resistor structures using a replacment gate process flow, and the integrated circuits fabricated thereby
10/30/14 - 20140319620 - Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, an integrated circuit includes a first transistor structure that includes an etch-stop material layer, a first workfunction material layer disposed over the etch-stop material layer, a second workfunction material layer disposed over the first workfunction material layer,...

Method of semiconductor integrated circuit fabrication
09/25/14 - 20140284724 - A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a semiconductor device, patterning a first hard mask to form a first recess in a high-resistor (Hi-R) stack, removing the first hard mask, forming a second recess in the Hi-R stack, forming a second hard...

Metal gate structure and method
09/18/14 - 20140264624 - A semiconductor structure comprises a metal gate structure formed in a substrate, wherein the metal gate structure comprises a first film formed of a first material and formed on a bottom and sidewalls of a gate trench, a second film formed of a second material and formed over the first...

Integrated snubber in a single poly mosfet
09/11/14 - 20140252494 - Aspects of the present disclosure describe MOSFET devices that have snubber circuits. The snubber circuits comprise one or more resistors with a dynamically controllable resistance that is controlled by changes to a gate and/or drain potentials of the one or more MOSFET structures during switching events. It is emphasized that...

Embedded resistor
09/04/14 - 20140246730 - An embedded resistor including a first interdielectric layer, a cap layer, a resistive layer and a cap film is provided. The first interdielectric layer is located on a substrate. The cap layer is located on the first interdielectric layer, wherein the cap layer has a trench. The resistive layer conformally...

Non-volatile anti-fuse with consistent rupture
08/28/14 - 20140239409 - In an embodiment of the invention, a non-volatile anti-fuse memory cell is disclosed. The memory cell consists of a programmable n-channel diode-connectable transistor. The poly-silicon gate of the transistor has two portions. One portion is doped more highly than a second portion. The transistor also has a source with two...

Method and apparatus for forming an integrated circuit with a metalized resistor in a standard cell configuration
07/31/14 - 20140210014 - An integrated circuit includes a layer of a semiconductor device including a standard cell configuration having a fixed gate electrode pitch between gate electrode lines and a resistor formed of metal between the fixed gate electrode pitch of the standard cell configuration. In one embodiment, the integrated circuit can be...

Reduced substrate coupling for inductors in semiconductor devices
07/24/14 - 20140203375 - The present disclosure provides reduced substrate coupling for inductors in semiconductor devices. A method of fabricating a semiconductor device having reduced substrate coupling includes providing a substrate having a first region and a second region. The method also includes forming a first gate structure over the first region and a...

Method and system for split threshold voltage programmable bitcells
07/03/14 - 20140183656 - A bitcell may include an insulating region, a first doping proximate to the insulating region, and a second doping surrounding the first doping. The second doping can be characterized by a higher gate voltage breakdown than the first doping. Also, the bitcell may include a gate terminal, and the bitcell...

Semiconductor devices including a resistor structure
06/19/14 - 20140167180 - Semiconductor devices are provided. A semiconductor device may include a transistor area and a resistor area. The transistor area may include a gate structure. The resistor area may include an insulating layer and a resistor structure on the insulating layer. A top surface of the gate structure and a top...

Semiconductor devices including a resistor structure and methods of forming the same
06/19/14 - 20140167181 - Semiconductor devices including a resistor structure is provided. The semiconductor device may include a gate structure on an active region, a resistor structure on a field region and a first interlayer insulating layer on the gate structure and the resistor structure. The semiconductor devices may also include a resistor trench...

Integrated circuit device and method for making same
05/22/14 - 20140138777 - One feature pertains to an integrated circuit (IC) that includes a metal gate terminal that has a gate metal that is either p-type or n-type. The IC further includes a first semiconductor region having either a p-type doping or an n-type doping, such that if the gate metal is p-type...

Power rf amplifiers
04/17/14 - 20140103447 - A power transistor circuit uses first and second power transistors in differential mode. An inductor arrangement of inductors is formed by wire bonds between the drains. The transistors are in a mirrored configuration, and the inductor arrangement comprises wire bonds which extend between the drain connections across the space between...

Methods of forming secured metal gate antifuse structures
04/17/14 - 20140103448 - Methods of forming and using a microelectronic structure are described. Embodiments include forming a diode between a metal fuse gate and a PMOS device, wherein the diode is disposed between a contact of the metal fuse gate and a contact of the PMOS device, and wherein the diode couples the...

Integrated power module for multi-device parallel operation
04/10/14 - 20140097501 - An integrated power module having a dielectric substrate, a source conductor trace formed on the dielectric substrate, a drain conductor trace formed on the dielectric substrate, a gate conductor trace formed on the dielectric substrate, a transistor chip having a top surface and a bottom surface connected to the drain...

Arrays of vertically-oriented transistors, and memory arrays including vertically-oriented transistors
02/27/14 - 20140054718 - An array includes vertically-oriented transistors. The array includes rows of access lines and columns of data/sense lines. Individual of the rows include an access line interconnecting transistors in that row. Individual of the columns include a data/sense line interconnecting transistors in that column. The array includes a plurality of conductive...

High-frequency device including high-frequency switching circuit
02/06/14 - 20140035065 - A high-frequency device having a switching circuit including a semiconductor substrate; a first high-frequency input/output terminal; a second high-frequency input/output terminal; a control signal input terminal; a power terminal; a ground terminal; an insulating portion disposed on a main surface of the semiconductor substrate; and a voltage-applying electrode for applying...

Semiconductor device and a method of increasing a resistance value of an electric fuse
01/23/14 - 20140021559 - Provided is a semiconductor device having an electric fuse structure which receives the supply of an electric current to be permitted to be cut without damaging portions around the fuse. An electric fuse is electrically connected between an electronic circuit and a redundant circuit as a spare of the electronic...

Fet transistor on high-resistivity substrate
01/02/14 - 20140001567 - Systems and methods are disclosed for processing radio frequency (RF) signals using one or more FET transistors disposed on or above a high-resistivity region of a substrate. The substrate may include bulk silicon, at least a portion of which has high-resistivity characteristics. For example, the bulk substrate may have a...

Integrated circuit device featuring an antifuse and method of making same
01/02/14 - 20140001568 - One feature pertains to an integrated circuit, comprising an access transistor and an antifuse. The access transistor includes at least one source/drain region, and the antifuse has a conductor-insulator-conductor structure. The antifuse includes a first conductor that acts as a first electrode, and also includes an antifuse dielectric, and a...

Semiconductor devices and structures
12/26/13 - 20130341730 - Devices, semiconductor structures and methods are provided, where a substrate is around a semiconductor device is biased via a resistive element....

Substrate resistor and method of making same
12/26/13 - 20130341731 - A semiconductor structure can include a resistor on a substrate formed simultaneously with other devices, such as transistors. A diffusion barrier layer formed on a substrate is patterned to form a resistor and barrier layers under a transistor gate. A filler material, a first connector, and a second connector are...

Semiconductor device and manufacturing method thereof
12/19/13 - 20130334611 - The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating...

Semiconductor devices, methods of manufacture thereof, and methods of forming resistors
12/12/13 - 20130328131 - Semiconductor devices, methods of manufacture thereof, and methods of forming resistors are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a first insulating material over a workpiece, and forming a conductive chemical compound material over the first insulating material. The conductive chemical compound material is...

Mos transistor with multi-finger gate electrode
11/28/13 - 20130313653 - A field effect transistor is described. In accordance with the one example, the transistor includes a semiconductor substrate, a gate pad for receiving a gate signal, a number of transistor cells integrated in the substrate, wherein each transistor cell has at least one gate electrode. The transistor further includes a...

Semiconductor integrated structure
10/24/13 - 20130277754 - The present invention provides a resistor structure including a substrate, an ILD layer, a transistor and a resistor. The substrate includes a resistor region and an active region. The ILD layer is disposed directly on the substrate. The transistor is disposed in the active region in the ILD layer wherein...

Resistor and manufacturing method thereof
10/17/13 - 20130270650 - A manufacturing method for a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor, a transitional structure, and a dielectric layer covering the transistor and the transitional structure formed thereon, forming a recess in between two opposite polysilicon end portions in the transitional structure,...

Integrated dual power converter package having internal driver ic
10/03/13 - 20130256807 - An integrated dual power converter package is disclosed. The package includes a leadframe having a first control FET paddle configured to support a drain of a first control FET, and a second control FET paddle configured to support a drain of a second control FET. The leadframe further includes a...

Nonvolatile memory device and method of fabricating the same
09/26/13 - 20130249017 - The nonvolatile memory device includes a memory cell having a transistor in which an insulating isolation layer is formed in a channel region. The nonvolatile memory device includes a metal-oxide-semiconductor (MOS) transistor as a basic component. An insulating isolation layer is formed in at least a channel region, and a...

High-integration semiconductor memory device and method of manufacturing the same
09/19/13 - 20130241000 - A semiconductor memory device includes a semiconductor substrate, an active region including a plurality of unit active regions and disposed over and spaced from the semiconductor substrate, a pair of word lines formed on a top surface and sides of the unit active region, a dummy word line disposed at...

Semiconductor arrangement with active drift zone
08/01/13 - 20130193525 - A semiconductor device arrangement includes a first semiconductor device having a load path and a plurality of second semiconductor devices, each having a load path between a first and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected...

Semiconductor device
07/11/13 - 20130175636 - A semiconductor device includes a substrate, a transistor formed over the substrate, insulating layers formed over the substrate, a multilayer wiring formed in the insulating layers, a first inductor formed in the insulating layers, and a second inductor formed over the first inductor and overlapping the first inductor. The insulating...

One-time programmable memory and method for making the same
06/27/13 - 20130161761 - A one time programmable nonvolatile memory formed from metal-insulator-semiconductor cells. The cells are at the crosspoints of conductive gate lines and intersecting doped semiconductor lines formed in a semiconductor substrate....

Semiconductor device including capacitor stabilizing variation of power supply voltage
06/20/13 - 20130154025 - Disclosed herein is a semiconductor device that includes a first line supplied with a first voltage, a second line supplied with a second voltage, a first node, at least one first capacitor connected between the first line and the first node, at least one second capacitor connected between the node...

Integrated semiconductor device and manufacturing method therefor
06/13/13 - 20130146989 - An integrated device includes a field effect transistor formed within and upon an active region of a substrate and a resistor formed on an isolation region of the substrate. The field effect transistor includes a gate stacked structure having respective portions of a dielectric layer, a first conductive layer and...

Integrated circuits with electrical fuses and methods of forming the same
05/23/13 - 20130126979 - A method of forming an integrated circuit includes forming at least one transistor over a substrate. Forming the at least one transistor includes forming a gate dielectric structure over a substrate. A work-function metallic layer is formed over the gate dielectric structure. A conductive layer is formed over the work-function...

Fuse circuit for final test trimming of integrated circuit chip
05/09/13 - 20130113049 - The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in...

Semiconductor device
05/02/13 - 20130105912 - A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation (STI) on the substrate of the resistor region; forming a tank in the STI of the resistor region; and forming...

Structure and method for integrating front end sicr resistors in hik metal gate technologies
04/18/13 - 20130093024 - An integrated circuit having a replacement HiK metal gate transistor and a front end SiCr resistor. The SiCr resistor replaces the conventional polysilicon resistor in front end processing and is integrated into the contact module. The first level of metal interconnect is located above the SiCr resistor. First contacts connect...

Semiconductor device and fabrication method thereof
04/11/13 - 20130087861 - A semiconductor device comprises a metal gate electrode, a passive device and a hard mask layer. The passive device has a poly-silicon element layer. The hard mask layer is disposed on the metal gate electrode and the passive electrode and has a first opening and a second opening substantially coplanar...

Electronic module
03/14/13 - 20130062706 - An electronic module includes a first semiconductor chip and a passive component, wherein the first semiconductor chip is arranged on a surface of the passive component....

Semiconductor device comprising metal gate electrode structures and non-fets with different height by early adaptation of gate stack topography
02/07/13 - 20130032893 - Gate height scaling in sophisticated semiconductor devices may be implemented without requiring a redesign of non-transistor devices. To this end, the semiconductor electrode material may be adapted in its thickness above active regions and isolation regions that receive the non-transistor devices. Thereafter, the actual patterning of the adapted gate layer...

Semiconductor device comprising metal gates and a silicon containing resistor formed on an isolation structure
01/31/13 - 20130026581 - In a semiconductor device comprising sophisticated high-k metal gate structures formed in accordance with a replacement gate approach, semiconductor-based resistors may be formed above isolation structures substantially without being influenced by the replacement gate approach. Consequently, enhanced area efficiency may be achieved compared to conventional strategies, in which the resistive...

Power mosfet with integrated gate resistor and diode-connected mosfet
01/10/13 - 20130009253 - A power MOSFET is formed in a semiconductor device with a parallel combination of a shunt resistor and a diode-connected MOSFET between a gate input node of the semiconductor device and a gate of the power MOSFET. A gate of the diode-connected MOSFET is connected to the gate of the...

Electrical device and fabrication method
01/10/13 - 20130009254 - An electrical device with a fin structure, a first section of the fin structure having a first width and a first height, a second section of the fin structure having a second width and a second height, wherein the first width is smaller than the second width and the first...

Resistors formed based on metal-oxide-semiconductor structures
01/03/13 - 20130001704 - A device includes a metal-oxide-semiconductor (MOS) device, which includes a gate electrode and a source/drain region adjacent the gate electrode. A first and a second contact plug are formed directly over and electrically connected to two portions of a same MOS component, wherein the same MOS component is one of...

Semiconductor device having mixedly mounted components with common film layers and method of manufacturing the same
12/20/12 - 20120319209 - A metal gate electrode and a poly-silicon resistance element are mixedly mounted in the same semiconductor substrate. The metal gate electrode is formed on a first gate insulating film and includes a first gate metal film and a first gate silicon film. The poly-silicon resistance element includes a silicon film...

Switching circuit
12/13/12 - 20120313184 - A switching circuit (80) includes: a plurality of insulated gate transistors (30-33) connected in parallel between a high voltage line (L1) and a low voltage line (L2); gate resistors (50-53) each provided for one of the plurality of insulated gate transistors (30-33) and each including a first terminal connected to...

Semiconductor structure with suppressed sti dishing effect at resistor region
11/29/12 - 20120299115 - A method includes forming a first isolation feature of a first width and a second isolation feature of a second width in a substrate, the first width being substantially greater than the second width; forming an implantation mask on the substrate, wherein the implantation mask covers the first isolation feature...

Semiconductor device and electric power conversion device using same
11/01/12 - 20120273897 - The trench IGBT is provided with a plurality of trench gates disposed in a manner so as to form wide and narrow of gaps; has a MOS structure that has a channel of a first conductivity type and that is between the trench gate pair that is disposed with a...

Method and apparatus for modeling multi-terminal mos device for lvs and pdk
10/11/12 - 20120256271 - An apparatus comprises two n-type metal oxide semiconductor (MOS) devices formed next to each other. Each n-type MOS device further includes a pair of face-to-face diodes formed in an isolation ring. A method of modeling the apparatus comprises reusing four-terminal MOS device models in standard cell libraries and combining the...

Methods of forming secured metal gate antifuse structures
10/04/12 - 20120248546 - Methods of forming and using a microelectronic structure are described. Embodiments include forming a diode between a metal fuse gate and a PMOS device, wherein the diode is disposed between a contact of the metal fuse gate and a contact of the PMOS device, and wherein the diode couples the...

Method of forming an electrical fuse and a metal gate transistor and the related electrical fuse
09/13/12 - 20120228718 - The present invention provides a method of integrating an electrical fuse process into a high-k/metal gate process. The method simultaneously forms a dummy gate stack of a transistor and a dummy gate stack of an e-fuse; and simultaneously removes the polysilicon of the dummy gate stack in the transistor region...

Method of manufacturing semiconductor device
08/16/12 - 20120205750 - According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming first and second cores on a processed material, forming a covering material having a stacked layer includes first and second layers, the covering material covering an upper surface and a side surface of the first...

Patterning embedded control lines for vertically stacked semiconductor elements
08/09/12 - 20120199915 - The present invention is generally directed to an apparatus with embedded (bottom side) control lines for vertically stacked semiconductor elements. In accordance with various embodiments, a first semiconductor wafer is provided with a first facing surface on which a first conductive layer is formed. The first semiconductor wafer is attached...

Semiconductor memory device and method of manufacturing the same
07/26/12 - 20120187503 - Provided are a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device includes a semiconductor substrate including a first active region and a second active region, a gate electrode including a silicide layer formed on the first active region and a resistor pattern...

Field effect devices controlled via a nanotube switching element
07/19/12 - 20120181621 - Field effect devices having a drain controlled via a nanotube switching element. Under one embodiment, a field effect device includes a source region and a drain region of a first semiconductor type and a channel region disposed therebetween of a second semiconductor type. The source region is connected to a...

Semiconductor device and method for fabricating same
06/14/12 - 20120146156 - A semiconductor device includes an MIS transistor and an electric fuse. The MIS transistor includes a gate insulating film formed on the semiconductor substrate, and a gate electrode including a first polysilicon layer, a first silicide layer, and a first metal containing layer made of a metal or a conductive...

Semiconductor package for higher power transistors
03/29/12 - 20120074506 - A semiconductor package for mounting multiple field effect transistors (FETs) is disclosed. The package includes a drain conductor between each FET's drain connection point and a drain terminal connector on the semiconductor package; a source conductor between each FET's source connection point and a source terminal connector of the source...

Integration of an amorphous silicon resistive switching device
03/29/12 - 20120074507 - An integrated circuit device. The integrated circuit device includes a semiconductor substrate having a surface region. A gate dielectric layer overlies the surface region of the substrate. The device includes a MOS device having a p+ active region. The p+ active region forms a first electrode for a resistive switching...

System and circuit for simulating gate-to-drain breakdown
02/23/12 - 20120043619 - A system and circuit for simulating gate-to-drain breakdown in an N-channel field effect transistor (NFET). In one embodiment, a simulation circuit includes a primary field effect transistor (FET), a first depletion mode FET and a second depletion mode FET. The first depletion mode FET and the second depletion mode FET...

Anti-fuse of semiconductor device and method of manufacturing the same
01/19/12 - 20120012943 - The present invention provides an anti-fuse of a semiconductor device and a method of manufacturing the same, which has a stable current level and a stable operation. According to the present invention, in order for the anti-fuse to be stably operated, a region in which a gate and an active...

Semiconductor device
01/05/12 - 20120001269 - According to one embodiment, a semiconductor device including a field-effect transistor, and a resistance element connected between a gate electrode of the field effect transistor and a connection point connected between a back gate electrode of the field effect transistor and one of source-drain regions of the field effect transistor,...

Boost converter with integrated high power discrete fet and low voltage controller
12/29/11 - 20110316090 - A boost converter for high power and high output voltage applications includes a low voltage controller integrated circuit and a high voltage, vertical, discrete field effect transistor, both of which are packed in a single package on separate electrically isolated die pads....

Semiconductor device and level shift circuit using the same
12/15/11 - 20110303988 - A level shift circuit includes: a pair of first and second P-channel transistors which are connected in a flip-flop manner and whose sources connected to a first power supply line; a pair of first and second N-channel transistors with the first N-channel transistor provided between the first P-channel transistor and...

Semiconductor device comprising metal gates and semiconductor resistors formed on the basis of a replacement gate approach
11/03/11 - 20110266633 - In a replacement gate approach, the semiconductor material or at least a significant portion thereof in a non-transistor structure, such as a precision resistor, an electronic fuse and the like, may be preserved upon replacing the semiconductor material in the gate electrode structures. To this end, an appropriate dielectric material...

Semiconductor device comprising high-k metal gate electrode structures and efuses formed in the semiconductor material
10/06/11 - 20110241124 - A semiconductor-based electronic fuse may be provided in a sophisticated semiconductor device having a bulk configuration by appropriately embedding the electronic fuse into a semiconductor material of reduced heat conductivity. For example, a silicon/germanium fuse region may be provided in the silicon base material. Consequently, sophisticated gate electrode structures may...

Reduced substrate coupling for inductors in semiconductor devices
09/22/11 - 20110227167 - The present disclosure provides reduced substrate coupling for inductors in semiconductor devices. A method of fabricating a semiconductor device having reduced substrate coupling includes providing a substrate having a first region and a second region. The method also includes forming a first gate structure over the first region and a...

Power switch with active snubber
08/18/11 - 20110198704 - A power switch with active snubber. In accordance with a first embodiment, an electronic circuit includes a first power semiconductor device and a second power semiconductor device coupled to the first power semiconductor device. The second power semiconductor device is configured to oppose ringing of the first power semiconductor device....

Methods of manufacturing resistors and structures thereof
07/21/11 - 20110175174 - A semiconductor device includes a semiconductor body of a first semiconductive material. A transistor is disposed in the semiconductor body. The transistor includes source and drain regions of a second semiconductive material embedded in the semiconductor body. A resistor overlies a top surface of the semiconductor body and is laterally...