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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Field Effect Device > Having Insulated Electrode (e.g., Mosfet, Mos Diode) > Insulated Gate Field Effect Transistor In Integrated Circuit > Complementary Insulated Gate Field Effect Transistors > Combined With Bipolar Transistor Combined With Bipolar TransistorCombined With Bipolar Transistor patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/11/07 - 20070235816 - Single poly bicmos flash cell with floating body A BiCMOS integrated circuit (IC) includes a floating gate-type non-volatile memory (NVM) device that uses the polycrystalline silicon gate of a CMOS FET and the P-base and N-emitter diffusions of a bipolar transistor to provide an isolated P-type body and N-type source/drain diffusions. The P-body diffusion of the NVM device ... 09/27/07 - 20070221996 - Cascode circuit and semiconductor device A reference voltage circuit having a high power supply rejection ratio, and can operate at low voltage is provided. The reference voltage circuit includes a bias circuit constructed such that a depletion type transistor (3) is connected in series to a power supply voltage supply terminal of a load circuit, ... 08/16/07 - 20070187775 - Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same There are many inventions described herein as well as many aspects and embodiments of those inventions, for example, multi-bit memory cell and circuitry and techniques for reading, writing and/or operating a multi-bit memory cell (and memory cell array having a plurality of such memory cells) having one or more electrically ... 07/26/07 - 20070170514 - Igbt device and related device having robustness under extreme conditions A semiconductor device in the form of an IGBT has a front side contact, a rear side contact, and a semiconductor volume disposed between the front side contact and the rear side contact. The semiconductor volume includes a field stop layer for spatially delimiting an electric field that can be ... 07/12/07 - 20070158754 - Semiconductor device and method of manufacturing the same In a semiconductor device of the present invention, two epitaxial layers are formed on a P type single crystal silicon substrate. In the epitaxial layers, P type buried diffusion layers and P type diffusion layers are formed, which form isolation regions. In this event, the P type buried diffusion layers ... 06/28/07 - 20070145489 - Design of high-frequency substrate noise isolation in bicmos technology A high-frequency noise isolation structure and a method for forming the same are provided. The noise isolation structure isolates a first device region and a second device region over a semiconductor substrate. The noise isolation structure preferably includes a sinker region substantially encircling a first device region, a buried layer ... 05/03/07 - 20070096219 - Lateral bipolar cmos integrated circuit A lateral bipolar CMOS integrated circuit having an inverter circuit including an n-channel MOS transistor and a p-channel MOS transistor, and having four terminals of: a gate input terminal Vin connected with the gates of the n-channel MOS transistor and the p-channel MOS transistor; an output terminal Vout connected with ... 04/12/07 - 20070080407 - Insulated gate bipolar transistor An IGBT is provided which comprises N+ type extended region 9 sectively formed in P+ type collector region 1 to define a built-in diode in cooperation with N+ type extended region 9, an N− type base region 2 and a P− type base region 3 in semiconducting substrate 10. N− ... 04/05/07 - 20070075376 - Semiconductor device A semiconductor device comprises a semiconductor substrate having an N-type base region, a collector region, a P-type base region, an emitter region, a collector-shorting region, a buffer region, and a P-type semiconductor region, and a gate bus line disposed on the P-type semiconductor region through an insulating film. The collector-shorting ... 04/05/07 - 20070075375 - Field effect semiconductor component and method for its production A field effect semiconductor component has a bipolar transistor structure in a semiconductor body consisting of a lightly doped upper area of a first conductivity type as base region and of a lower heavily doped area as emitter region with a complementary conductivity type. Between the base region and the ... 12/28/06 - 20060289941 - Transistor component A source connection of a field effect transistor is formed using a contact region, which adjoins a source region, is highly oppositely doped and forms a butting contact with the source region. A well or substrate connecting region which is electrically conductively connected to a supply potential lead is arranged ... 12/07/06 - 20060273402 - Semiconductor device and method of manufacture A semiconductor component and method of manufacture, including an insulated gate bipolar transistor (IGBT) (100, 200, 300, 400) that includes a semiconductor substrate (110, 210, 310, 410) having a first conductivity type and buried semiconductor region (115, 215, 315, 415) having a second conductivity type located above the semiconductor substrate. ... 11/23/06 - 20060261417 - Semiconductor device with nmos transistors arranged continuously A semiconductor device includes a plurality of PMOS transistors formed on a semiconductor substrate; and a plurality of NMOS transistors formed on the semiconductor substrate. The plurality of PMOS transistors are electrically isolated from each other by a device isolation structure formed in the semiconductor substrate. The plurality of NMOS ... 11/02/06 - 20060244073 - Fabrication of an eeprom cell with sige source/drain regions An EEPROM memory cell uses silicon-germanium/silicon and emitter polysilicon film for fabricating shallow source/drain regions to increase a breakdown voltage with respect to a well. The source/drain regions are fabricated to be approximately 100 nm (0.1 micrometers (μm)) in depth with a breakdown voltage of approximately 14 volts or more. ... 07/27/06 - 20060163664 - Semiconductor device and manufacturing process thereof The semiconductor device according to one of the aspects of the present invention includes a semiconductor substrate of a first conductivity type, having upper and lower surfaces. A collector region of a second conductivity type is formed on the lower surface of the semiconductor substrate, and a collector electrode is ... 06/08/06 - 20060118881 - Lateral pnp transistor and the method of manufacturing the same The present invention relates to a lateral PNP transistor and the method of manufacturing the same. The medium doping N-type base area and the light doping P− collector area were first introduced in the structure before the formation of P+ doping emitter area and the collector area. The emitter-base-collector doping ... 06/01/06 - 20060113608 - Electron-emitting device and method for manufacturing same An electron-emitting device includes an emitter section composed of a dielectric material, a lower electrode disposed on the lower side of the emitter section, and an upper electrode disposed on the upper side of the emitter section so as to be opposed to the lower electrode with the emitter section ... 01/12/06 - 20060006475 - Fabrication of an eeprom cell with emitter-polysilicon source/drain regions An EEPROM memory cell uses an emitter polysilicon film for fabricating shallow source/drain regions to increase a breakdown voltage of the wells. The wells are fabricated to be approximately 100 nm (0.1 micrometers (μm)) in depth with a breakdown voltage of approximately 14 volts or more. A typical breakdown voltage ... 11/24/05 - 20050258493 - Reverse conducting semiconductor device and a fabrication method thereof To provide a reverse conducting semiconductor device in which an insulated gate bipolar transistor and a free wheeling diode excellent in recovery characteristic are monolithically formed on a substrate, the free wheeling diode including; a second conductive type base layer to constitute the insulated gate bipolar transistor; a first conductive ... 10/20/05 - 20050230762 - Semiconductor device and method of fabricating same A semiconductor device (100) according to the present invention comprises a vertical PNP bipolar transistor (20), an NMOS transistor (50) and a PMOS transistor (60) that are of high dielectric strength, and a P-type semiconductor substrate 1, as shown in FIG. 2. A substrate isolation layer (21) of the PNP ... 10/20/05 - 20050230761 - Semiconductor device A semiconductor device includes an output pad and a surge absorption unit formed above a semiconductor region of a first conductivity type. The surge absorption unit includes: a semiconductor island region of a second conductivity type; a buried layer of the second conductivity type formed between a bottom of the ... 08/18/05 - 20050179092 - Method of fabricating high voltage device using double epitaxial growth The present invention provides a method of fabricating a high voltage device using double expitaxial growth, by which an optimized device can be fabricated in a manner of differentiating epitaxial layers of high and low voltage devices in thickness and by which a chip size can be reduced. The present ... 07/28/05 - 20050161746 - Semiconductor diode and igbt A semiconductor diode (1, 1′) has an anode (2), a cathode (3) and a semiconductor volume (7) provided between anode (2) and cathode (3). A plurality of semiconductor zones (81 to 84) are formed in the semiconductor volume (7), which semiconductor zones are inversely doped with respect to their immediate ... 07/07/05 - 20050145951 - Method of manufacturing a semiconductor component, and semiconductor component formed thereby A method of manufacturing a semiconductor component includes: providing a semiconductor substrate (210, 510); forming a trench (130, 430) in the semiconductor substrate to define a plurality of active areas separated from each other by the trench; forming a buried layer (240, 750) in the semiconductor substrate underneath a portion ... 06/30/05 - 20050139933 - Semiconductor devices and methods for fabricating the same Semiconductor devices having an elevated contact region and methods of fabricating the same are disclosed. A disclosed semiconductor device includes a semiconductor substrate, a gate on the semiconductor substrate, spacers on sidewalls of the gate, an epitaxial layer on the semiconductor substrate, source/drain regions within the semiconductor substrate below the ... 06/30/05 - 20050139932 - Transistors of semiconductor devices and methods of fabricating the same Transistors and methods of fabricating transistors are disclosed. A disclosed method comprises forming an inversion epitaxial layer on a silicon substrate; forming a hard mask on the inversion epitaxial layer; depositing a silicon epitaxial layer over the inversion epitaxial layer; forming a trench through the silicon epitaxial layer by removing ... 06/30/05 - 20050139931 - Analog switch An analog switch has a first circuit and a second circuit. The first circuit has an NMOS and PMOS connected in series, and the second circuit has a PMOS and NMOS connected in series. The first and second circuits are provided in parallel between an input terminal and output terminal ... ### FreshPatents.com Support |