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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Field Effect Device > Having Insulated Electrode (e.g., Mosfet, Mos Diode) > Single Crystal Semiconductor Layer On Insulating Substrate (soi) > Substrate Is Single Crystal Insulator (e.g., Sapphire Or Spinel) > Single Crystal Islands Of Semiconductor Layer Containing Only One Active Device Single Crystal Islands Of Semiconductor Layer Containing Only One Active DeviceSingle Crystal Islands Of Semiconductor Layer Containing Only One Active Device patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.01/17/08 - 20080012078 - Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer A semiconductor device including a first semiconductor layer formed on a semiconductor substrate, a second semiconductor layer surrounding the first semiconductor layer, the second semiconductor layer being formed on the semiconductor substrate with one of an insulating film and a cavity, and a third semiconductor layer surrounding the second semiconductor ... 01/10/08 - 20080006878 - Attaching device and method of fabricating organic light emmiting device using the same An attaching device and a method of fabricating an organic light emitting device using the same are disclosed. The attaching device includes a process chamber, first and second substrate supporters, a substrate detachable part, and an open-close valve. The first and second substrate supporters are positioned inside the process chamber, ... 10/04/07 - 20070228473 - Ultra-thin si mosfet device structure and method of manufacture The present invention comprises a method for forming an ultra-thin channel MOSFET and the ultra-thin channel MOSFET produced therefrom. Specifically, the method comprises providing an SOI substrate having a buried insulating layer underlying an SOI layer; forming a pad stack atop the SOI layer; forming a block mask having a ... 08/30/07 - 20070200178 - Gate-all-around type of semiconductor device and method of fabricating the same A gate-all-around (GAA) transistor device has a pair of pillars that include the source/drain regions, a channel region bridging the source/drain regions, and a gate electrode and gate oxide which surround the channel region. The pillars are formed by providing a mono-crystalline silicon substrate, etching the substrate to form a ... 07/26/07 - 20070170509 - Semiconductor device and method of manufacturing the same A semiconductor device includes a Fin, a source region and a drain region, a first extension region, a second extension region and a channel region. The Fin is formed on a major surface of a semiconductor substrate. The source region and drain region are formed at both end portions of ... 06/28/07 - 20070145483 - Semiconductor device A highly-integrated, high-performance semiconductor device with a simplest possible structure can be provided. This semiconductor device comprises a semiconductor element that includes: a first semiconductor region of a first conductivity type provided in a plate-like form on a semiconductor substrate; a first ferroelectric insulating film provided on a first side ... 05/24/07 - 20070114610 - Semiconductor device and method of fabricating the same Disclosed are a semiconductor device and a method of fabricating the same. The semiconductor device includes an isolation layer on a semiconductor substrate, and an active area which protrudes from the isolation layer (and the substrate) and which has rounded edge portions; a gate insulating layer and a gate electrode ... 05/10/07 - 20070102763 - Multiple-gate transistors formed on bulk substrates In one aspect, the present invention teaches a multiple-gate transistor 130 that includes a semiconductor fin 134 formed in a portion of a bulk semiconductor substrate 132. A gate dielectric 144 overlies a portion of the semiconductor fin 134 and a gate electrode 146 overlies the gate dielectric 144. A ... 04/19/07 - 20070085140 - One transistor memory cell having strained electrically floating body region, and method of operating same A semiconductor memory cell comprising a transistor having (i) an electrically floating body region and (ii) semiconductor source, drain and/or body regions that are “locally” or “globally” under mechanical strain (for example, strain introduced via tensile or compressive forces). The semiconductor memory cell includes (1) a first data state which ... 02/01/07 - 20070023839 - Finfet gate formed of carbon nanotubes A fin field effect transistor (FinFET) gate comprises a semiconductor wafer; a gate dielectric layer over the semiconductor wafer; a conductive material on the gate dielectric layer; an activated carbon nanotube on a surface of the conductive material; and a plated metal layer on the activated carbon nanotube. Preferably, the ... 11/23/06 - 20060261411 - Nonplanar device with stress incorporation layer and method of fabrication A semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls is formed on an insulating substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed ... 11/16/06 - 20060255410 - Finfet transistor and circuit A drive strength tunable FinFET, a method of drive strength tuning a FinFET, a drive strength ratio tuned FinFET circuit and a method of drive strength tuning a FinFET, wherein the FinFET has either at least one perpendicular and at least one angled fin or has at least one double-gated ... 09/28/06 - 20060214233 - Finfet semiconductor device A FinFET semiconductor device includes a source region, a drain region, and a channel region defined therebetween. The source region, drain region, and channel region form a fin structure extending upwardly away from a substrate to a fin height greater than a standard minimum fin height. ... 08/03/06 - 20060170053 - Accumulation mode multiple gate transistor A transistor (1) having, a fin (2) and a gate electrode (3) extending on more than one side of the fin (2) to comprise more than one gate (9) of the transistor (1), and a dopant in each of a source (6), drain (7) and a channel region (8), comprising ... 07/20/06 - 20060157789 - Semiconductor device with a cavity therein and a method of manufacturing the same A semiconductor device includes a semiconductor substrate, cavities, and an element isolating region. The cavities, which are each shaped like a flat plate, are made in the semiconductor substrate. The element isolating region is formed in the surface of the semiconductor substrate and located at the sides of the cavities. ... 05/11/06 - 20060097319 - Method of forming single crystal semiconductor thin film on insulator and semiconductor device fabricated thereby Methods of forming a single crystal semiconductor thin film on an insulator and semiconductor devices fabricated thereby are provided. The methods include forming an interlayer insulating layer on a single crystal semiconductor layer. A single crystal semiconductor plug is formed to penetrate the interlayer insulating layer. A semiconductor oxide layer ... 05/04/06 - 20060091463 - Finfet body contact structure A FinFET body contact structure and a method for creating the FinFET body contact structure are disclosed. The body contact structure comprises a wide fin portion of a semiconductor fin, the wide fin portion having a polysilicon polygon shape formed on a top surface of the wide fin portion. The ... 04/13/06 - 20060076625 - Field effect transistors having a strained silicon channel and methods of fabricating same Field effect transistors (FETs) and methods of fabricating FETs that include a channel layer on sidewalls of a structure on a semiconductor substrate and having at least a portion of the channel layer strained in a direction that the sidewalls of the structure extend from the semiconductor substrate are provided. ... 02/09/06 - 20060027870 - Semiconductor device and method of manufacturing the same A Fin-FET includes a support substrate, a buried insulation film provided on the support substrate, a fin part provided on the buried insulation film, the fin part being formed of a silicon layer and having mutually opposed side surfaces, and a gate electrode provided via an insulation film so as ... 01/26/06 - 20060017108 - Nano and mems power sources and methods thereof A power source and methods thereof includes a structure comprising one or more p type layers, one or more n type layers, and one or more intrinsic layers and at least one source of radiation is disposed on at least a portion of the structure. Each of the p type ... 01/05/06 - 20060001096 - Photodetector using mosfet with quantum channel and manufacturing method thereof The present invention relates to a photodetector using MOSFET with quantum channels and a method for making thereof. A photodetector using MOSFET with quantum channels according to the present invention comprises a quantum channel formed on an activated SOI wafer, a gate oxide film covering said quantum channel; a gate ... 07/21/05 - 20050156248 - Semiconductor device with raised segment A device having a raised segment, and a manufacturing method for same. An SOI wafer is provided having a substrate, an insulating layer disposed over the substrate, and a layer of semiconductor material disposed over the insulating layer. The semiconductor material is patterned to form a mesa structure. The wafer ... 07/14/05 - 20050151199 - Polysilicon thin film transistor and method of forming the same A polysilicon thin film transistor and a method of forming the same is provided. A poly-island layer is formed over a substrate. A gate insulation layer is formed over the poly-island layer. A gate is formed over the gate insulation layer. Using the gate as a mask, an ion implantation ... ### FreshPatents.com Support |