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Short Channel Insulated Gate Field Effect Transistor

Short Channel Insulated Gate Field Effect Transistor patent applications listed include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.

Related Categories:

Active Solid-state Devices (e.g., Transistors, Solid-state Diodes)


Field Effect Device > Having Insulated Electrode (e.g., Mosfet, Mos Diode) > Short Channel Insulated Gate Field Effect Transistor



Semiconductor device and fabrication method thereof
12/18/14 - 20140367768 - A method for fabricating a semiconductor device includes forming an isolation feature in a substrate, forming a gate stack over the substrate, forming a source/drain (S/D) recess cavity in the substrate, where the S/D recess cavity is positioned between the gate stack and the isolation feature. The method further includes...

Bottled epitaxy in source and drain regions of fets
12/04/14 - 20140353741 - A method for fabricating enhanced-mobility pFET devices having channel lengths below 50 nm. Gates for pFETs may be patterned in dense arrays on a semiconductor substrate that includes shallow trench isolation (STI) structures. Partially-enclosed voids in the semiconductor substrate may be formed at source and drain regions for the gates,...

Integrated circuit having mosfet with embedded stressor and method to fabricate same
11/27/14 - 20140346587 - A method includes forming a recess into a crystalline semiconductor substrate, the recess being disposed beneath and surrounding a channel region of a transistor; depositing a layer of crystalline dielectric material onto a surface of the substrate that is exposed within the recess; and depositing stressor material into the recess...

Silicon on germanium
09/18/14 - 20140264555 - A monolayer or partial monolayer sequencing processing, such as atomic layer deposition (ALD), can be used to form a semiconductor structure of a silicon film on a germanium substrate. Such structures may be useful in high performance electronic devices. A structure may be formed by deposition of a thin silicon...

Thin film transistor
07/31/14 - 20140209997 - A thin film transistor based on carbon nanotubes includes a source electrode, a drain electrode, a semiconducting layer, an insulating layer and a gate electrode. The drain electrode is spaced apart from the source electrode. The semiconductor layer is electrically connected with the source electrode and the drain electrode. The...

Semiconductor devices and methods of fabricating the same
07/24/14 - 20140203348 - Provided is a semiconductor device, which includes a gate electrode crossing over a semiconductor fin disposed on a substrate, a gate dielectric layer disposed between the gate electrode and the semiconductor fin, a channel region having a three dimensional structure defined in the semiconductor fin under the gate electrode, impurity...

Laterally diffused metal oxide semiconductor transistor with partially unsilicided source/drain
06/12/14 - 20140159139 - A transistor includes a substrate, a gate over the substrate, a source and a drain over the substrate on opposite sides of the gate, a first silicide on the source, and a second silicide on the drain. Only one of the drain or the source has an unsilicided region adjacent...

Field effect transistor devices with dopant free channels and back gates
05/15/14 - 20140131790 - A method of forming a back gate transistor device includes forming an open isolation trench in a substrate; forming sidewall spacers in the open isolation trench; and using the open isolation trench to perform a doping operation so as to define a doped well region below a bottom surface of...

Integrating transistors with different poly-silicon heights on the same die
05/01/14 - 20140117435 - A method of fabricating an integrated circuit including a first region and a second region each having different poly-silicon gate structures is provided. The method includes depositing a first poly-silicon layer over the first and the second region and depositing, within the second region, an oxide layer over the first...

Plasma doping a non-planar semiconductor device
04/10/14 - 20140097487 - In plasma doping a non-planar semiconductor device, a substrate having a non-planar semiconductor body formed thereon is obtained. The substrate having the non-planar semiconductor body may be placed into a chamber. A plasma may be formed in the chamber and the plasma may contain dopant ions. A first bias voltage...

Semiconductor device and method for manufacturing the same
03/27/14 - 20140084359 - According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of a first conductivity type, a first electrode, and a contact region. The second semiconductor region is provided on the...

Field-effect transistor
03/20/14 - 20140077286 - According to one embodiment, a field-effect transistor is provided with a first conductivity-type first semiconductor layer, a source layer formed of a second conductivity-type semiconductor, a drain layer formed of a second conductivity-type semiconductor, and a gate electrode. The source layer is located on the first semiconductor layer. The drain...

Mosfet with recessed channel film and abrupt junctions
02/13/14 - 20140042521 - MOSFETs and methods for making MOSFETs with a recessed channel and abrupt junctions are disclosed. The method includes creating source and drain extensions while a dummy gate is in place. The source/drain extensions create a diffuse junction with the silicon substrate. The method continues by removing the dummy gate and...

Variable gate width for gate all-around transistors
12/26/13 - 20130341704 - Nanowire-based gate all-around transistor devices having one or more active nanowires and one or more inactive nanowires are described herein. Methods to fabricate such devices are also described. One or more embodiments of the present invention are directed at approaches for varying the gate width of a transistor structure comprising...

Gated circuit structure with self-aligned tunneling region
12/05/13 - 20130320427 - A tunnel field-effect transistor is provided, which includes a fin-shaped, source-drain circuit structure with a source region and a drain region. The circuit structure is angled in cross-sectional elevation, and includes a first portion and a second portion. The first portion extends away from the second portion, and the source...

Electronic device including a gate electrode and a gate tap
12/05/13 - 20130320428 - An electronic device can include a gate electrode and a gate tap that makes an unlanded contact to the gate electrode. The electronic device can further include a source region and a drain region that may include a drift region. In an embodiment, the gate electrode has a height that...

Gate structures
09/19/13 - 20130240979 - A semiconductor device is provided. The device includes a semiconductor substrate, first and second projections extending upwardly from the substrate, the projections having respective first and second channel regions therein, and a first gate structure engaging the first projection adjacent the first channel region. The first gate structure includes a...

Field-effect transistor and method of making
06/06/13 - 20130140625 - The present invention belongs to the field of microelectronic device technologies. Specifically, an asymmetric source/drain field-effect transistor and its methods of making are disclosed. A structure of the field-effect transistor comprises: a semiconductor substrate, a gate structure, and a source region and a drain region having a mixed junction and...

Replacement gate etsoi with sharp junction
02/07/13 - 20130032876 - A transistor structure includes a channel disposed between a source and a drain; a gate conductor disposed over the channel and between the source and the drain; and a gate dielectric layer disposed between the gate conductor and the source, the drain and the channel. In the transistor structure a...

Electronic device including a gate electrode and a gate tap and a process of forming the same
12/20/12 - 20120319188 - An electronic device can include a gate electrode and a gate tap that makes an unlanded contact to the gate electrode. The electronic device can further include a source region and a drain region that may include a drift region. In an embodiment, the gate electrode has a height that...

Accumulation type finfet, circuits and fabrication method thereof
12/06/12 - 20120306002 - This description relates to a fin field-effect-transistor (FinFET) including a substrate and a fin structure on the substrate. The fin structure includes a channel between a source and a drain, wherein the source, the drain, and the channel have a first type dopant, and the channel comprises at least one...

Tunnel field effect transistor
11/15/12 - 20120286350 - An FET device characterized as being an asymmetrical tunnel FET (TFET) is disclosed. The TFET includes a gate-stack, a channel region underneath the gate-stack, a first and a second junction adjoining the gate-stack and being capable for electrical continuity with the channel. The first junction and the second junction are...

Semiconductor device and fabrication method thereof
08/30/12 - 20120217574 - A semiconductor device includes a semiconductor substrate having an active layer in which an element region and a contact region are formed, a support substrate supporting the active layer, and a buried insulation layer interposed between the active layer and the support substrate. A transistor clement is formed in the...

Semiconductor device and method of manufacturing the same
06/07/12 - 20120139033 - Semiconductors devices and methods of making semiconductor devices are provided. According to one embodiment, a semiconductor device can include a p-type field effect transistor area having an active region with an epitaxial layer grown thereupon and an isolation feature adjacent to the active region. A height of the isolation feature...

Semiconductor structures and methods of manufacture
05/17/12 - 20120119284 - Semiconductor structures and methods of manufacture semiconductors are provided which relate to transistors. The method of forming a transistor includes thermally annealing a selectively patterned dopant material formed on a high-k dielectric material to form a high charge density dielectric layer from the high-k dielectric material. The high charge density...

Transistor and method for forming the same
05/03/12 - 20120104486 - The present invention relates to a transistor and the method for forming the same. The transistor of the present invention comprises a semiconductor substrate; a gate dielectric layer formed on the semiconductor substrate; a gate formed on the gate dielectric layer; and a source region and a drain region located...

Stress memorization process improvement for improved technology performance
04/12/12 - 20120086071 - Semiconductor substrate with a deformed gate region and a method for the fabrication thereof. The semiconductor substrate has improved device performance compared to devices without a deformed gate region and decreased dopant loss compared to devices with deformed source/drain regions....

Semiconductor device capable of suppressing short channel effect
01/12/12 - 20120007168 - A semiconductor device includes a semiconductor substrate including at least one memory channel region and at least one memory source/drain region, the memory channel region and the memory source/drain region being arranged alternately, and at least one word line on the memory channel region, wherein the memory source/drain region has...

Transistor with embedded si/ge material having reduced offset and superior uniformity
01/05/12 - 20120001254 - In sophisticated semiconductor devices, a strain-inducing embedded semiconductor alloy may be provided on the basis of a crystallographically anisotropic etch process and a self-limiting deposition process, wherein transistors which may not require an embedded strain-inducing semiconductor alloy may remain non-masked, thereby providing superior uniformity with respect to overall transistor configuration....

Semiconductor component and method of manufacture
11/03/11 - 20110266613 - A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one...

Tunnel field effect transistor
10/20/11 - 20110254080 - A method for fabricating an FET device characterized as being a tunnel FET (TFET) device is disclosed. The method includes processing a gate-stack, and processing the adjoining source and drain junctions, which are of a first conductivity type. A hardmask is formed covering the gate-stack and the junctions. A tilted...

High-performance semiconductor device and method of manufacturing the same
09/22/11 - 20110227144 - The present invention relates to a method of manufacturing a semiconductor device, and the method uses the mode of thermal annealing the source/drain regions and performing Halo ion implantation to form a Halo ion-implanted region by: first removing the dummy gate to expose the gate dielectric layer to form an...

Integrated native device without a halo implanted channel region and method for its fabrication
09/01/11 - 20110210388 - According to one embodiment, a semiconductor structure including an integrated native device without a halo implanted channel region comprises an arrangement of semiconductor devices formed over a common substrate, the arrangement includes native devices disposed substantially perpendicular to non-native devices, wherein each of the native and non-native devices includes a...

Semiconductor device and method of fabricating the same
08/25/11 - 20110204434 - Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes, a gate structure having a gate dielectric layer, a gate electrode, and a spacer, which are each formed on a substrate, a first impurity area formed in a portion of the substrate located below...

Semiconductor nanostructures, semiconductor devices, and methods of making same
06/30/11 - 20110156133 - A semiconductor structure is provided, which includes multiple sections arranged along a longitudinal axis. Preferably, the semiconductor structure comprises a middle section and two terminal sections located at opposite ends of the middle section. A semiconductor core having a first dopant concentration preferably extends along the longitudinal axis through the...

Semiconductor device having doped epitaxial region and its methods of fabrication
06/23/11 - 20110147828 - Embodiments of the present invention describe a epitaxial region on a semiconductor device. In one embodiment, the epitaxial region is deposited onto a substrate via cyclical deposition-etch process. Cavities created underneath the spacer during the cyclical deposition-etch process are backfilled by an epitaxial cap layer. The epitaxial region and epitaxial...

Multilayered box in fdsoi mosfets
05/12/11 - 20110108908 - A fully depleted MOSFET has a semiconductor-on-insulator substrate that includes a substrate material, a BOX positioned on the substrate material, and an active layer positioned on the BOX. The BOX includes a first layer of material with a first dielectric constant and a first thickness and a second layer of...

Nonplanar device with thinned lower body portion and method of fabrication
03/17/11 - 20110062512 - A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top...

Semiconductor device and method of manufacturing same
03/10/11 - 20110057253 - A semiconductor device includes a first transistor including a first source/drain region and a first sidewall spacer, and a second transistor including a second source/drain region and a second sidewall spacer, the first sidewall spacer has a first width and the second sidewall spacer has a second width wider than...

Accumulation type finfet, circuits and fabrication method thereof
03/03/11 - 20110049613 - A FinFET includes a substrate and a fin structure on the substrate. The fin structure includes a channel between a source and a drain, wherein the source, the drain, and the channel have the first type dopant. The channel includes a Ge, SiGe, or III-V semiconductor. A gate dielectric layer...

Semiconductor structures and methods of manufacture
01/13/11 - 20110006359 - Semiconductor structures and methods of manufacture semiconductors are provided which relate to transistors. The method of forming a transistor includes thermally annealing a selectively patterned dopant material formed on a high-k dielectric material to form a high charge density dielectric layer from the high-k dielectric material. The high charge density...

Device
01/06/11 - 20110001185 - A semiconductor device includes a first diffusion region and a second diffusion region in an active region surrounded by an isolation insulation region, a recessed trench region formed between the first diffusion region and the second diffusion region, a gate insulation film formed on the trench region, a gate electrode...

Integrated circuit system with high voltage transistor and method of manufacture thereof
12/23/10 - 20100320529 - A method of manufacture of an integrated circuit system includes: providing a semiconductor substrate having an active region, implanted with impurities of a first type at a first concentration; forming an isolation region around the active region; forming a parasitic transistor by applying a gate electrode, implanted with impurities of...

Semiconductor device having internal gate structure and method for manufacturing the same
08/19/10 - 20100207196 - A semiconductor device includes a main gate formed on a semiconductor substrate and a source region and a drain region formed in a surface of the semiconductor substrate on opposite sides of the main gate. An internal gate formed within a portion of the main gate that adjoins the source...

Short channel transistor with reduced length variation by using amorphous electrode material during implantation
08/05/10 - 20100193860 - In sophisticated transistor elements, enhanced profile uniformity along the transistor width direction may be accomplished by using a gate material in an amorphous state, thereby reducing channeling effects and line edge roughness. In sophisticated high-k metal gate approaches, an appropriate sequence may be applied to avoid a change of the...

Semiconductor device having reduced sub-threshold leakage
07/08/10 - 20100171170 - A semiconductor device fabricated in the semiconductor substrate includes a FinFET transistor having opposed source and drain pillars, and a fin interposed between the source and drain pillars. A cavity is formed in the semiconductor substrate extending at least partially between the fin and the semiconductor substrate. The cavity may...

Trigate transistor having extended metal gate electrode
07/01/10 - 20100163970 - A trigate device having an extended metal gate electrode comprises a semiconductor body having a top surface and opposing sidewalls formed on a substrate, an isolation layer formed on the substrate and around the semiconductor body, wherein a portion of the semiconductor body remains exposed above the isolation layer, and...

Dielectric punch-through stoppers for forming finfets having dual fin heights
07/01/10 - 20100163971 - A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over...

Semiconductor device having a multi-channel type mos transistor
06/24/10 - 20100155827 - In a method of manufacturing a semiconductor device, an active channel pattern is formed on a substrate. The active channel pattern includes preliminary gate patterns and single crystalline silicon patterns that are alternately stacked with each other. A source/drain layer is formed on a sidewall of the active channel pattern....

Semiconductor device and method for fabricating the same
06/17/10 - 20100148243 - A semiconductor device comprises an active region including a first active area to be a source/drain and a second active area to be a gate, and a device isolation region defining the active region. The first active area is obtained by growing a semiconductor substrate located between the gates as...

Semiconductor and manufacturing method for the same
05/27/10 - 20100127321 - A semiconductor device and a manufacturing method for the same are disclosed. The semiconductor device includes a gate pattern formed at an upper part of the semiconductor substrate to overlap one side of a drift region, and a shallow oxide region disposed adjacent to the gate pattern, having a shallower...

Semiconductor device for improving the peak induced voltage in switching converter
05/13/10 - 20100117142 - A power semiconductor device includes a backside metal layer, a substrate formed on the backside metal layer, a semiconductor layer formed on the substrate, and a frontside metal layer. The semiconductor layer includes a first trench structure including a gate oxide layer formed around a first trench with poly-Si implant,...

Semiconductor device with increased channel area
04/22/10 - 20100096690 - A semiconductor device includes an active region defining at least four surfaces, the four surfaces including first, second, third, and fourth surfaces, a gate insulation layer formed around the four surfaces of the active region, and a gate electrode formed around the gate insulation layer and the four surfaces of...

Transistor with gain variation compensation
02/25/10 - 20100044780 - A semiconductor device and method of making comprises providing an active device region and an isolation region, the isolation region forming a boundary with the active device region. A patterned gate material overlies the active device region between first and second portions of the boundary. The patterned gate material defines...

Semiconductor device
02/25/10 - 20100044781 - To suppress short channel effects and obtain a high driving current by means of a semiconductor device having an MISFET wherein a material having high mobility and high dielectric constant, such as germanium, is used for a channel. A p-type well is formed on a surface of a p-type silicon...

Integrated circuit having long and short channel metal gate devices and method of manufacture
02/25/10 - 20100044782 - Embodiments of an integrated circuit are provided. In one embodiment, the integrated circuit includes a substrate, a short channel (SC) device, and a long channel (LC) device. The short channel device includes an SC gate insulator overlying a first portion of the substrate, an SC metal gate overlying the SC...

Field effect device with gate electrode edge enhanced gate dielectric and method for fabrication
02/18/10 - 20100038705 - A semiconductor structure and a method for fabricating the semiconductor structure provide an undercut beneath a spacer that is adjacent a gate electrode within a field effect structure such as a field effect transistor structure. The undercut, which may completely or incompletely encompass the area interposed between the spacer and...

Cmos thermoelectric refrigerator
02/11/10 - 20100032748 - A CMOS thermoelectric refrigerator made of an NMOS transistor and PMOS transistor connected in series through a cold terminal is disclosed. Active areas of the NMOS and PMOS transistors are less than 300 nanometers wide, to reduce thermal conduction between the cold terminal and the IC substrate. Drain nodes of...

Semiconductor circuit including a long channel device and a short channel device
01/28/10 - 20100019313 - A semiconductor circuit is provided that includes a short channel device, and a long channel device that is electrically isolated from the short channel device. The long channel device comprises a plurality of first gate electrodes, a first source region adjacent one of the plurality of first gate electrodes, a...

Recessed channel transistor and method for preparing the same
01/21/10 - 20100013004 - A recessed channel transistor comprises a semiconductor substrate having a trench isolation structure, a gate structure having a lower block in the semiconductor substrate and an upper block on the semiconductor substrate, two doped regions positioned at two sides of the upper block and above the lower block, and an...

Methods for forming high performance gates and structures thereof
01/14/10 - 20100006926 - Methods for forming high performance gates in MOSFETs and structures thereof are disclosed. One embodiment includes a method including providing a substrate including a first short channel active region, a second short channel active region and a long channel active region, each active region separated from another by a shallow...

Notched-base spacer profile for non-planar transistors
12/24/09 - 20090315101 - A method of forming a notched-base spacer profile for non-planar transistors includes providing a semiconductor fin having a channel region on a substrate and forming a gate electrode adjacent to sidewalls of the channel region and on a top surface of the channel region, the gate electrode having on a...

Vertical transistor with integrated isolation
12/17/09 - 20090309155 - A vertical transistor with integrated isolation is provided. The vertical transistor includes a vertical semiconductor structure and an isolation layer on a bottom surface of the vertical semiconductor structure. The vertical transistor further includes a plurality of terminals on a top surface of the vertical semiconductor structure....

Fin field effect transistor devices with self-aligned source and drain regions
12/10/09 - 20090302372 - Improved fin field effect transistor (FinFET) devices and methods for the fabrication thereof are provided. In one aspect, a method for fabricating a field effect transistor device comprises the following steps. A substrate is provided having a silicon layer thereon. A fin lithography hardmask is patterned on the silicon layer....

Recessed channel array transistor (rcat) structures and method of formation
12/03/09 - 20090294839 - Recessed channel array transistor (RCAT) structures and method of formation are generally described. In one example, an electronic device includes a semiconductor substrate, a first fin coupled with the semiconductor substrate, the first fin comprising a first source region and a first drain region, and a first gate structure of...

Methods of providing electrical isolation and semiconductor structures including same
12/03/09 - 20090294840 - Methods of isolating gates in a semiconductor structure. In one embodiment, isolation is achieved using a spacer material in combination with fins having substantially vertical sidewalls. In another embodiment, etch characteristics of various materials utilized in fabrication of the semiconductor structure are used to increase the effective gate length (“Leffective”)...

Self-aligned impact-ionization field effect transistor
11/26/09 - 20090289298 - An impact ionisation MOSFET is formed with the offset from the gate to one of the source/drain regions disposed vertically within the device structure rather than horizontally. The semiconductor device comprises a first source/drain region having a first doping level; a second source/drain region having a second doping level and...

Integrated circuit long and short channel metal gate devices and method of manufacture
09/17/09 - 20090230463 - A method is provided for manufacturing an integrated circuit including a short channel (SC) device and a long channel (LC) device each overlaid by an interlayer dielectric. The SC device has an SC gate stack and the LC device initially has a dummy gate. In one embodiment, the method includes...

Strained channel pmos transistor and corresponding production method
08/20/09 - 20090206394 - The PMOS transistor (TR) has a channel width W of less than 1 micrometer, a channel length of less than or equal to 0.1 micrometer, and a distance of more than 0.5 micrometer between one edge of the channel and the corresponding edge of the active zone. The production of...

Semiconductor device with improved performance characteristics
07/09/09 - 20090173992 - The semiconductor device includes an active region, a recess, a Fin channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the active region and its neighboring device isolation...

Method of predicting drain current in mos transistor
07/02/09 - 20090166718 - Embodiments relate to a method of predicting a drain current that may accurately predict drain current in a linear region, a saturation region, and a breakdown region by modeling a drain current in the breakdown region, in which inconsistency occurs when a drain current depending on a drain voltage is...

Ldmos semiconductor device mask
07/02/09 - 20090166719 - Embodiments relate to an LDMOS semiconductor device mask that may reduce current leakage under a gate-off condition. According to embodiments, an LDMOS semiconductor device mask may include a moat mask to define a moat region, an NDT mask to define an N drift region, a PDT mask to define a...