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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Heterojunction Device > Field Effect Transistor Field Effect TransistorField Effect Transistor patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.01/10/08 - 20080006846 - Iii-v nitride semiconductor device and method of forming electrode A III-V nitride semiconductor device includes an n-type layer of a III-V nitride semiconductor and an electrode formed on a surface of the n-type layer. A material of the electrode includes at least titanium, aluminum, and silicon. ... 01/10/08 - 20080006845 - Enhancement mode field effect device and the method of production thereof A method is disclosed for producing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET or MESFET devices, comprising two active layers, e.g. a GaN/AlGaN layer. The method produces an enhancement mode device of this type, i.e. a normally-off device, by providing a passivation layer on the AlGaN layer, etching ... 12/27/07 - 20070295990 - Gan-based field effect transistor and production method therefor A GaN-based heterostructure field effect transistor capable of accomplishing higher output, higher breakdown voltage, higher speed, higher frequency, and the like. A heterostructure field effect transistor including a channel layer (4) of GaN and a barrier layer (6) of AlGaN, wherein the surface of a transistor element has an insulating ... 12/06/07 - 20070278520 - Field effect transistor having multiple pinch off voltages A compound field effect transistor having multiple pinch-off voltages comprising: first and second field effect transistors, each field effect transistor comprising a semiconductor layer, the semiconductor layer having an electrically conducting layer therein; an ohmic contact layer on the semiconductor layer; a source and a drain on the ohmic contact ... 12/06/07 - 20070278519 - Enhancement depletion field effect transistor structure and method of manufacture The invention relates to a transistor structure with both enhancement and depletion mode transistors. In order to allow good control over the manufacture of both transistors, a first Schottky layer (10) and a second Schottky layer (12) are used made of first and second semiconductor materials respectively. The first and ... 12/06/07 - 20070278518 - Enhancement-mode iii-n devices, circuits, and methods A method of fabricating AlGaN/GaN enhancement-mode heterostructure field-effect transistors (HFET) using fluorine-based plasma immersion or ion implantation. The method includes: 1) generating gate patterns; 2) exposing the AlGaN/GaN heterostructure in the gate region to fluorine-based plasma treatment with photoresist as the treatment mask in a self-aligned manner; 3) depositing the ... 10/18/07 - 20070241368 - Field effect transistor with independently biased gates A field effect transistor (FET) having at least two independently biased gates can provide uniform electric field in the channel region of the FET. The same AC voltage may be applied to each gate for modulating the FET. One of the gates is positioned closer to the channel region than ... 10/11/07 - 20070235759 - Cmos process with si gates for nfets and sige gates for pfets An integration scheme for providing Si gates for nFET devices and SiGe gates for pFET devices on the same semiconductor substrate is provided. The integration scheme includes first providing a material stack comprising, from bottom to top, a gate dielectric, a Si film, and a hard mask on a surface ... 10/04/07 - 20070228417 - Semiconductor device and method of fabricating the same A semiconductor device according to an embodiment of the present invention includes: a semiconductor substrate; a gate electrode formed on the semiconductor substrate through a gate insulating film; a source/drain region formed apart from the gate electrode; and a source/drain extension region formed between the gate electrode and the source/drain ... 10/04/07 - 20070228416 - Monolithic integration of enhancement- and depletion-mode algan/gan hfets A method for and devices utilizing monolithic integration of enhancement-mode and depletion-mode AlGaN/GaN heterojunction field-effect transistors (HFETs) is disclosed. Source and drain ohmic contacts of HFETs are first defined. Gate electrodes of the depletion-mode HFETs are then defined. Gate electrodes of the enhancement-mode HFETs are then defined using fluoride-based plasma ... 09/20/07 - 20070215902 - Coating liquid for forming organic layered film, method of manufacturing field effect transistor, and field effect transistor A method of manufacturing a field effect transistor of the present invention includes: applying a coating liquid 20 containing a solvent 13 as well as first and second organic molecules 11 and 12 that have been dissolved in the solvent 13; and forming a first layer and a second layer ... 09/13/07 - 20070210332 - Semiconductor device It is an object of the present invention to provide a semiconductor device, which can simultaneously achieve a normally-off mode of HFET and an improvement in Imax, and further achieve an improvement in gm and a reduction in gate leakage current. In order to keep a thin barrier layer 13 ... 09/06/07 - 20070205433 - Insulating gate algan/gan hemts AlGaN/GaN HEMTs are disclosed having a thin AlGaN layer to reduce trapping and also having additional layers to reduce gate leakage and increase the maximum drive current. One HEMT according to the present invention comprises a high resistivity semiconductor layer with a barrier semiconductor layer on it. The barrier layer ... 08/30/07 - 20070200143 - Nitride semiconductor device A nitride semiconductor device comprises: a laminated body; a first and second main electrode provided in a second and third region, respectively, adjacent to either end of the first region on the major surface of the laminated body; and a third main electrode. The laminated body includes a first semiconductor ... 08/30/07 - 20070200142 - High linear enhancement-mode heterostructure field-effect transistor The present invention relates to a high linear enhancement-mode heterostructure field-effect transistor. More, the present invention uses an InGaAs channel structure with a linear change, and integrates an adjusting effect of working region corresponding to the threshold voltage of the element. It not only directly provides a complementary structure for ... 08/16/07 - 20070187717 - Semiconductor device having reduced on-resistance and method of forming the same A semiconductor device and method of forming the same. The semiconductor device includes an epitaxially grown and conductive buffer layer having a contact covering a substantial portion of a bottom surface thereof and a lateral channel above the buffer layer. The semiconductor device also includes another contact above the lateral ... 08/16/07 - 20070187716 - High speed ge channel heterostructures for field effect devices A method and a layered heterostructure for forming high mobility Ge channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate, and a channel structure of a compressively strained epitaxial Ge layer having a higher barrier or a deeper confining quantum well and having ... 08/09/07 - 20070181910 - Heterobipolar transistor and method of fabricating the same The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher than the concentration of carbon on the side bordering on ... 08/02/07 - 20070176201 - Integrated iii-nitride devices A III-nitride heterojunction semiconductor device that includes a power electrode that is electrically connected to a conductive substrate through a trench in the heterojunction thereof. ... 07/26/07 - 20070170464 - Transistor gate electrode having conductor material layer Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor material having a work function in a range between ... 07/19/07 - 20070164313 - Gallium nitride high electron mobility transistor structure A semiconductor structure, comprising: a substrate; a first aluminum nitride (AlN) layer having an aluminum/reactive nitride (Al/N) flux ratio less than 1 disposed on the substrate; and a second AlN layer having an Al/reactive N flux ratio greater than 1 disposed on the first AlN layer. The substrate is a ... 07/12/07 - 20070158685 - Transistor epitaxial wafer and transistor produced by using same A transistor epitaxial wafer having: a substrate; an n-type collector layer, a p-type base layer and an n-type emitter layer formed on the substrate in this order; and an n-type InGaAs non-alloy layer having an n-type InGaAs nonuniform composition layer formed on the n-type emitter layer and having an nonuniform ... 07/05/07 - 20070152239 - Semiconductor device A semiconductor device has a semiconductor layer, and a first electrode (Schottky electrode or MIS electrode) and a second electrode (ohmic electrode) which are formed on the semiconductor layer apart from each other. The first electrode has a cross section in the shape of a polygon. A second electrode-side corner ... 07/05/07 - 20070152238 - Heterostructure field effect transistor and associated method A device including a first layer having a first material, and the first material having a hexagonal crystal lattice structure defining a first bandgap and one or more non-polar planes is provided. The device further includes a second layer that is adjacent to the first layer having a second material. ... 06/21/07 - 20070138506 - Nitride metal oxide semiconductor integrated transistor devices A self-aligned enhancement mode or depletion mode nitride based metal-oxide-compound semiconductor field effect transistor (10) includes a gate insulating structure comprised of a first oxide layer that in comprised of gallium oxides or indium oxides compounds (30) positioned immediately on top of the nitride compound semiconductor structure, and a second ... 06/14/07 - 20070131969 - Semiconductor device and method of manufacturing the same On a semiconductor substrate having a lamination structure in which Si and SiGe are stacked together, a gate electrode is formed, with a gate insulating film interposed between the semiconductor substrate and the gate electrode. Further, a channel region is provided in a surface of the semiconductor substrate, which is ... 06/14/07 - 20070131968 - Field effect transistor A material of a gate electrode is a conductive oxide having a higher work function than that of conventionally used Pd and so on, thereby achieving a normally-off transistor without reducing the sheet carrier concentration of a heterojunction. It is thus possible to achieve a normally-off operation while reducing an ... 06/07/07 - 20070126027 - Super luminescent diode and manufacturing method thereof To provide a superluminescent diode capable of emitting high output super luminescent light having a central wavelength within a range of 0.95 μm to 1.2 μm and an undistorted beam cross section, having a long element life. The super luminescent diode is constituted by: an n-type GaAs substrate; an optical ... 06/07/07 - 20070126026 - Semiconductor device A semiconductor device includes: a first group-III nitride semiconductor layer formed on a substrate; a second group-III nitride semiconductor layer made of a single layer or two or more layers, formed on the first group-III nitride semiconductor layer, and acting as a barrier layer; a source electrode, a drain electrode, ... 06/07/07 - 20070126025 - Semiconductor device and method for manufacturing the same A semiconductor device includes a semiconductor substrate, a plurality of first wirings disposed above the semiconductor substrate along a first direction, a diffusion layer that is disposed on the surface of the semiconductor substrate so as to extend along a second direction perpendicular to the first direction and which includes ... 05/31/07 - 20070120147 - Gallium nitride material transistors and methods associated with the same Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission ... 05/24/07 - 20070114568 - Semiconductor device and circuit having multiple voltage controlled capacitors An improved solution for performing switching, routing, power limiting, and/or the like in a circuit, such as a radio frequency (RF) circuit, is provided. A semiconductor device that includes at least two electrodes, each of which forms a capacitor, such as a voltage-controlled variable capacitor, with a semiconductor channel of ... 05/24/07 - 20070114567 - Vertical heterostructure field effect transistor and associated method A vertical heterostructure field effect transistor including a first layer having a first material, and the first material having a hexagonal crystal lattice structure defining a first bandgap and one or more non-polar planes is provided. The transistor further includes a second layer that is adjacent to the first layer ... 05/17/07 - 20070108472 - Thin film transistor and method of manufacturing the same A thin film transistor (TFT) and a method of manufacturing the same, and more particularly, a TFT for reducing leakage current and a method of manufacturing the same are provided. The TFT includes a flexible substrate, a diffusion preventing layer formed on the flexible substrate, a buffer layer formed of ... 05/17/07 - 20070108471 - Semiconductor device A semiconductor device includes a substrate, a semiconductor region provided in the substrate, a group of transistors including a plurality of MIS transistors and provided in the semiconductor region, the MIS transistors including a plurality of gate electrodes which extend in a first direction and are provided on the semiconductor ... 05/03/07 - 20070096149 - Implant damage control by in-situ c doping during sige epitaxy for device applications Some example embodiments of the invention comprise methods for and semiconductor structures comprised of: a MOS transistor comprised of source/drain regions, a gate dielectric, a gate electrode, channel region; a carbon doped SiGe region that applies a stress on the channel region whereby the carbon doped SiGe region retains stress/strain ... 05/03/07 - 20070096148 - Embedded strain layer in thin soi transistors and a method of forming the same By forming a deep recess through the buried insulating layer and re-growing a strained semiconductor material, an enhanced strain generation mechanism may be provided in SOI-like transistors. Consequently, the strain may also be efficiently created by the embedded strained semiconductor material across the entire active layer, thereby significantly enhancing the ... 04/26/07 - 20070090398 - Systems and methods for electromagnetic noise suppression using hybrid electromagnetic bandgap structures A hybrid electromagnetic bandgap (EBG) structure for broadband suppression of noise on printed wiring boards includes an array of coplanar patches interconnected into a grid by series inductances, and a corresponding array of shunt LC networks connecting the coplanar patches to a second conductive plane. This combination of series inductances ... 04/05/07 - 20070075333 - Field effect transistor comprising compound semiconductor The present invention provides a field effect transistor having a double recess structure, which minimizes an influence exerted on a channel region depending upon the surface state of an outer recess section. In the field effect transistor having such a double recess structure, an ohmic contact layer at the surface ... 03/29/07 - 20070069240 - Iii-v compound semiconductor heterostructure mosfet device A III-V based, implant free MOS heterostructure field-effect transistor device comprises a gate insulator layer overlying a compound semiconductor substrate; ohmic contacts coupled to the compound semiconductor substrate proximate opposite sides of an active device region defined within the compound semiconductor substrate; and a gate metal contact electrode formed on ... 03/22/07 - 20070063222 - Semiconductor device and method for manufacturing the same In a semiconductor film having a heterojunction structure, for example a semiconductor film (11) including a SiGe layer (2) and a Si layer (3) formed on the SiGe layer (2), impurity concentration is controlled in such a manner that the concentration of impurity in the lower, SiGe layer (2) becomes ... 03/22/07 - 20070063221 - Method and structure using a pure silicon dioxide hardmask for gate patterning for strained silicon mos transistors A partially completed semiconductor integrated circuit device. The device has a semiconductor substrate and a dielectric layer overlying the semiconductor substrate. The device has a gate structure including edges and a substantially pure silicon dioxide mask structure overlying the gate structure. A thickness ranging from about 400 to about 600 ... 03/15/07 - 20070057288 - Methods of fabricating semiconductor devices with enlarged recessed gate electrodes A semiconductor device includes a semiconductor substrate having a recess therein. A gate insulator is disposed on the substrate in the recess. The device further includes a gate electrode including a first portion on the gate insulator in the recess and a second reduced-width portion extending from the first portion. ... 03/08/07 - 20070051977 - Nitride semiconductor device A nitride semiconductor device comprises: a substrate body including a conductive substrate portion and a high resistance portion; a first semiconductor layer of a nitride semiconductor provided on the substrate body; a second semiconductor layer provided on the first semiconductor layer; a first main electrode provided on the second semiconductor ... 02/08/07 - 20070029574 - Strained semiconductor devices In a transistor in which the majority carriers are holes, at least one narrow bandgap region or layer is doped p-type or contains an excess of holes and is subject to compressive mechanical strain, whereby hole mobility may be significantly increased. In a p-channel quantum well FET, the quantum well ... 02/01/07 - 20070023781 - Semiconductor rectifier A semiconductor rectifier has a semiconductor layer formed on a substrate, an electric field reduced layer of conductive type contrary to that of the semiconductor layer, which is formed on the semiconductor layer positioned on a bottom portion of a trench formed on a portion of the semiconductor layer, a ... 01/18/07 - 20070012949 - Bipolar transistor and power amplifier A base mesa finger (an emitter ledge layer 15, a base layer 16, and a collector layer 17) is interposed between two collector fingers (collector electrodes 13), and on the base mesa finger, a base finger (a base electrode 12) and two emitter fingers (an emitter layer 14 and an ... 12/28/06 - 20060289895 - Semiconductor device A semiconductor device includes a channel region, an oxide film, a gate electrode and source/drain regions. The channel region includes Ge. The oxide film is formed on the channel region. The oxide film includes Si and a metallic element M selected from the group consisting of Zr, Hf, La, Ce, ... 12/28/06 - 20060289894 - Semiconductor device A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1−xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1−N; and a source electrode, a drain electrode and a gate ... 12/14/06 - 20060278891 - Highly uniform group iii nitride epitaxial layers on 100 millimeter diameter silicon carbide substrates A semiconductor structure is disclosed that includes a silicon carbide wafer having a diameter of at least 100 mm with a Group III nitride heterostructure on the wafer that exhibits high uniformity in a number of characteristics. These include: a standard deviation in sheet resistivity across the wafer less than ... 12/07/06 - 20060273348 - Transistor and display and method of driving the same A field-effect transistor including an electrically conductive substrate; a first insulating film coating the electrically conductive substrate; a gate electrode disposed on the electrically conductive substrate with the first insulating film interposed therebetween; a source electrode; a drain electrode opposing the source electrode with the channel therebetween; a second insulating ... 12/07/06 - 20060273347 - Field-effect transistor and method for fabricating the same An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are ... 11/30/06 - 20060267046 - Semiconductor device and method of manufacturing the same A semiconductor device with including a MIS transistor. The device comprises a buried insulating film formed in one part of a substrate, the buried insulating film being elongated in a gate-width direction and shortened in a gate-length direction of the MIS transistor, a first semiconductor layer formed on the buried ... 11/30/06 - 20060267045 - Negative resistance field-effect element A negative resistance field-effect element that is a negative differential resistance field-effect element capable of achieving negative resistance at a low power supply voltage (low drain voltage) and also enabling securement of a high PVCR is formed on its InP substrate 11 having an asymmetrical V-groove whose surface on one ... 11/16/06 - 20060255365 - Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit A semiconductor chip includes a semiconductor substrate 126, in which first and second active regions are disposed. A resistor 124 is formed in the first active region and the resistor 124 includes a doped region 128 formed between two terminals 136. A strained channel transistor 132 is formed in the ... 11/16/06 - 20060255364 - Heterojunction transistors including energy barriers and related methods A heterojunction transistor may include a channel layer comprising a Group III nitride, a barrier layer comprising a Group III nitride on the channel layer, and an energy barrier comprising a layer of a Group III nitride including indium on the channel layer such that the channel layer is between ... 11/09/06 - 20060249750 - Gallium nitride material devices including an electrode-defining layer and methods of forming the same Gallium nitride material devices and methods of forming the same are provided. The devices include an electrode-defining layer. The electrode-defining layer typically has a via formed therein in which an electrode is formed (at least in part). Thus, the via defines (at least in part) dimensions of the electrode. In ... 11/09/06 - 20060249749 - Electronic device An electronic device is described which comprises: an electrically conductive p-type semiconductor layer (4,6); an electrically isolating semiconductor layer (10) formed on the p-type semiconductor layer (4,6); and at least one further transistor layer (12;14;16;18;20;22) formed on the isolating semiconductor layer (10). The electrically conductive p-type semiconductor layer (4,6) provides ... 10/26/06 - 20060237746 - Gesoi transistor with low junction current and low junction capacitance and method for making the same A semiconductor device (101) is provided herein which comprises a substrate (103) comprising germanium. The substrate has source (107) and drain (109) regions defined therein. A barrier layer (111) comprising a first material that has a higher bandgap (Eg) than germanium is disposed at the boundary of at least one ... 10/19/06 - 20060231861 - Field effect transistor and method of manufacturing the same An FET includes a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being formed on the first semiconductor layer and having a band gap energy greater than that of the first semiconductor layer. The first and second semiconductor layers are made of a Group III-V compound ... 10/19/06 - 20060231860 - Polarization-doped field effect transistors (polfets) and materials and methods for making the same Novel GaN/AlGaN metal-semiconductor field-effect transistor (MESFET) structures grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge is created by grading the channel region linearly from GaN to Al0.3Ga0.7N over a distance, e.g., 1000 Å. A polarization-doped field effect transistor (PolFET) was fabricated and tested under ... 10/12/06 - 20060226443 - High-performance fet devices and methods An epitaxially layered structure with gate voltage bias supply circuit element for improvement in performance for semiconductor field effect transistor (FET) devices utilizes a structure comprised of a substrate, a first layer semiconductor film of either an n-type or a p-type grown epitaxially on the substrate, with the possibility of ... 10/12/06 - 20060226442 - Gan-based high electron mobility transistor and method for making the same A high electron mobility transistor including: a GaN material system based heterostructure; a passivating nitride layer over the heterostructure and defining a plurality of openings; and a plurality of electrical contacts for the heterostructure and formed through the openings. ... 10/05/06 - 20060220061 - Semiconductor device and method of manufacturing the same A semiconductor device of the invention includes a first conductive type semiconductor base substrate; and a switching mechanism which is formed on a first main surface of the semiconductor base substrate and switches ON/OFF of a current. In the semiconductor base substrate, a plurality of columnar hetero-semiconductor regions are formed ... 09/07/06 - 20060197106 - Semiconductor switches and switching circuits for microwave The purpose of the present invention is to provide a small-sized switch attaining high isolation of not less than 80 dB, maintaining low insertion loss also in high frequencies not less than 60 GHz. A semiconductor switch according to the present invention utilizes FETs a gate electrode, a source electrode, ... 08/31/06 - 20060192228 - Compound semiconductor epitaxial substrate and method for manufacturing same A compound semiconductor epitaxial substrate having a pseudomorphic high electron mobility field effect transistor structure including an InGaAs layer as a strained channel layer and an AlGaAs layer containing n type impurities as a front side electron-donating layer, wherein said substrate contains an InGaP layer in an orderly state on ... 08/24/06 - 20060186436 - Semiconductor device A semiconductor device includes a gate electrode formed on a silicon substrate in correspondence to a channel region via a gate insulation film, and source and drain regions of p-type formed in the silicon substrate at respective outer sides of sidewall insulation films on the gate electrode, a pair of ... 08/17/06 - 20060180832 - Method of forming a semi-insulating region A semiconductor substrate is provided, and at least one first mask is formed above the semiconductor substrate. The first mask has a plurality of thicknesses and blocks at least one semi-insulating region. A second mask is thereafter formed on a surface of the semiconductor substrate. The second mask covers the ... 08/10/06 - 20060175633 - Iii-nitride integrated schottky and power device A III-nitride power device that includes a Schottky electrode integrated with a power switch. The combination is used in power supply circuits such as a boost converter circuit. ... 08/10/06 - 20060175632 - Monolithic integrated circuit having enhancement mode/depletion mode field effect transistors and rf/rf/microwave/milli-meter wave milli-meter wave field effect transistors A semiconductor structure having: a III-V substrate structure; an enhancement mode transistor device disposed in a first region of the structure; a depletion mode transistor device disposed in a laterally displaced second region of the structure; and a RF/microwave/milli-meter wave transistor device formed in a laterally displaced third region thereof. ... 08/10/06 - 20060175631 - Monolithic integrated circuit having enhanced breakdown voltage A field effect transistor structure is provided having: a III-V substrate structure; an InGaAs layer disposed over the substrate structure; an AlGaAs layer disposed on the InGaAs layer; an semiconductor layer disposed on the AlGaAs layer, where the bandgap energy of the semiconductor layer is greater than 1.8 eV; an ... 07/27/06 - 20060163609 - Compound semiconductor switching circuit device High resistance elements of 5 KΩ or more are connected near first and second control terminals between the first and second control terminals and respective crossing portion of first and second connectings. Even when a high frequency analog signal transmitted in a pad wire leaks to the first and second ... 07/27/06 - 20060163608 - Protecting silicon germanium sidewall with silicon for strained silicon silicon mosfets Raised Si/SiGe source and drain regions include epitaxially grown silicon on SiGe sidewalls. The epi silicon prevents adverse effects of Ge during silicidation, including Ge out diffusion and silicide line breakage. The Si also increases the active area. ... 07/20/06 - 20060157734 - Semiconductor device and method of manufacturing semiconductor device A semiconductor device is provided. The semiconductor device in which a field effect transistor utilizing a heterojunction is formed in a device formation region sectioned by a device separation region of a substrate comprising a semiconductor layer laminated while including a semiconductor layer having a heterojunction on a semiconductor substrate. ... 07/20/06 - 20060157733 - Complex oxides for use in semiconductor devices and related methods in which the elemental oxide components, (AmOn) and (BqOr) are combined so that h=j or, equivalently, ma=bq, and a, b, h, j, k, m, n, q and r are non-zero integers; and wherein: A is an element of the lanthanide rare earth elements of the periodic table or the trivalent ... 07/06/06 - 20060145190 - Surface passivation for iii-v compound semiconductors A structure and method of fabrication are disclosed for improving surface passivation of III-V compound semiconductors. The invention exploits certain anion-rich compound semiconductors to form a high quality interface with a dielectric when anion mobility is increased during an annealing step. Low post-annealing surface state densities result in a low ... 07/06/06 - 20060145189 - Iii-nitride power semiconductor with a field relaxation feature A III-nitride power semiconductor device that includes a field relaxation feature to relax the electric fields around the gate thereof to improve the breakdown voltage of the device. ... 06/29/06 - 20060138454 - Semiconductor device using a nitride semiconductor A semiconductor device includes: a first semiconductor layer represented by a composition formula AlxGa1-xN (0≦x≦1); a first conductivity type or non-doped second semiconductor layer represented by a composition formula AlyGa1-yN (0≦y≦1, x<y) and formed on the first semiconductor layer; a second conductivity type third semiconductor layer represented by a composition ... 06/15/06 - 20060124962 - Field effect transistor and method for fabricating the same A field effect transistor includes a first semiconductor layer made of a multilayer of a plurality of semiconductor films and a second semiconductor layer formed on the first semiconductor layer. A source electrode and a drain electrode are formed on the second semiconductor layer to be spaced from each other. ... 06/15/06 - 20060124961 - Semiconductor substrate, manufacturing method thereof, and semiconductor device A separation layer is formed on a silicon substrate. An SiGe layer serving as a strain induction layer and a silicon layer serving as a strained semiconductor layer are formed sequentially on the separation layer to prepare a first substrate. The first substrate is bonded to a second substrate made ... 06/08/06 - 20060118822 - Semiconductor device A semiconductor device comprises an active layer formed on a substrate, a superlattice layer formed on the active layer, and an ohmic electrode formed on the superlattice layer. In the superlattice layer, a first thin film and a second thin film are alternately laminated. The second thin film is made ... 06/01/06 - 20060113564 - Heterostructure with rear-face donor doping The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar material and either the region around ... 06/01/06 - 20060113563 - Compound semiconductor epitaxial substrate and method for manufacturing the same In a compound semiconductor epitaxial substrate used for a strain channel high electron mobility field effect transistor which comprises an InGaAs layer as a channel layer 9 and AlGaAs layers containing n-type impurities as electron supplying layers 6 and 12, the channel layer 9 has an electron mobility at room ... 05/25/06 - 20060108602 - Field effect transistor and method of manufacturing the same A field effect transistor includes an i-type first semiconductor layer and a second semiconductor layer that is formed on the first semiconductor layer and the band gap energy of that is higher in magnitude than that of the first semiconductor layer. The first semiconductor layer and second semiconductor layer are ... 05/18/06 - 20060102931 - Field effect transistor having a carrier exclusion layer A field-effect transistor comprises a substrate, a channel layer over the substrate, a gate insulator, a gate separated from the channel layer by the gate insulator, and a carrier exclusion layer between the channel layer and the gate insulator, wherein the conduction band energy of the carrier exclusion layer is ... 05/11/06 - 20060097281 - Strained semiconductor by wafer bonding with misorientation One aspect of the present invention relates to a method for forming a strained semiconductor structure. In various embodiments, at least two strong bonding regions are defined for a desired bond between a crystalline semiconductor membrane and a crystalline semiconductor substrate. The two strong bonding regions are separated by a ... 04/20/06 - 20060081876 - Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor The insulated-gate field-effect transistor includes a substrate surmounted by a layer of silicon-germanium alloy, the ratio of the germanium concentration to the silicon concentration of which increases towards the surface of the substrate. The transistor is formed on the active zone in the silicon-germanium alloy layer and lies between two ... 04/13/06 - 20060076576 - High electron mobility epitaxial substrate A compound semiconductor epitaxial substrate for use in a strain channel high electron mobility field effect transistor, comprising an InGaAs layer as a strain channel layer 6 and AlGaAs layers containing n-type impurities as back side and front side electron supplying layers 3 and 9, wherein an emission peak wavelength ... 04/06/06 - 20060071239 - Semiconductor device A high capacity semiconductor device having a narrowed emitter layer. The semiconductor device includes a collector layer formed on a semiconductor substrate. An SiGe alloy layer is formed on the collector layer. A silicon film is formed on the SiGe layer. An emitter electrode is formed on the silicon film. ... 03/30/06 - 20060065911 - Electronic device and heterojunction fet In an electronic device of the present invention a gate Schottky electrode is formed on an active layer constructed of a GaN layer and an AlGaN layer, and a source ohmic electrode and a drain ohmic electrode are further formed on both sides of the gate Schottky electrode on the ... 03/30/06 - 20060065910 - Method of forming vias in silicon carbide and resulting devices and circuits A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for ... 03/30/06 - 20060065909 - Selective delamination of thin-films by interface adhesion energy contrasts and thin film transistor devices formed thereby Various exemplary embodiments of the systems and methods according to this invention provide for a method of producing a self-aligned thin film transistor, the transistor including a metal layer covering at least a portion of a doped layer, the doped layer covering at least a portion of a dielectric layer, ... 03/16/06 - 20060054925 - Compound semiconductor device and method for fabricating the same The compound semiconductor device comprises an i-GaN buffer layer 12 formed on an SiC substrate 10; an n-AlGaN electron supplying layer 16 formed on the i-GaN buffer layer 12; an n-GaN cap layer 18 formed on the n-AlGaN electron supplying layer 16; a source electrode 20 and a drain electrode ... 03/16/06 - 20060054924 - Nitride-based semiconductor device A nitride-based semiconductor device includes a first semiconductor layer consisting essentially of a nitride-based semiconductor, and a second semiconductor layer disposed on the first semiconductor layer and consisting essentially of a non-doped or first conductivity type nitride-based semiconductor. The first and second semiconductor layers forms a hetero-interface. A gate electrode ... 03/16/06 - 20060054923 - Compound semiconductor epitaxial substrate and method for manufacturing same A compound semiconductor epitaxial substrate having a pseudomorphic high electron mobility field effect transistor structure which comprises an InGaAs layer as a channel layer 9 and an InGaP layer containing n-type impurities as a front side electron supplying layer 12, wherein an electron mobility in the InGaAs layer at room ... 03/02/06 - 20060043416 - Recessed semiconductor device A semiconductor structure includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, a third semiconductor layer over the second semiconductor layer, and a fourth semiconductor layer over the third semiconductor layer. A first conductive portion is coupled to the first semiconductor layer, and a second ... 03/02/06 - 20060043415 - Field-effect transistor An electric-field control electrode (5) is formed between a gate electrode (2) and a drain electrode (3). A multilayered film including a SiN film (21) and a SiO2 film (22) is formed below the electric-field control electrode (5). The SiN film (21) is formed so that a surface of an ... 02/23/06 - 20060038200 - Transistors having reinforcement layer patterns and methods of forming the same According to some embodiments of the invention, there is provided line photo masks that includes transistors having reinforcement layer patterns and methods of forming the same. The transistors and the methods provide a way of compensating a partially removed amount of a strained silicon layer during semiconductor fabrication processes. To ... 02/23/06 - 20060038199 - Cmosfet with hybrid strained channels Disclosed is a method of manufacturing microelectronic devices including forming a silicon substrate with first and second wells of different dopant characteristics, forming a first strained silicon-germanium-carbon layer of a first formulation proximate to the first well, and forming a second strained silicon-germanium-carbon layer of a second formulation distinct from ... 02/02/06 - 20060022218 - Field-effect transistor The present invention, which aims to provide a gallium arsenide field-effect transistor that can reduce degradation of field-effect transistor characteristics, and to realize miniaturization of the transistor, includes: a substrate; a mesa which includes a channel layer and is formed on the substrate; a source electrode formed on the mesa; ... 02/02/06 - 20060022217 - Complementary metal-oxide-semiconductor field effect transistor structure having ion implant in only one of the complementary devices A complementary metal-oxide-semiconductor field effect transistor structure includes ion implants in only one of the two complementary devices. The transistor structure generally includes a compound semiconductor substrate and an epitaxial layer structure that includes one or more donor layers that establish a conductivity type for the epitaxial layer structure. The ... 01/19/06 - 20060011942 - 2-terminal semiconductor device using abrupt metal-insulator transition semiconductor material Provided is a 2-terminal semiconductor device that uses an abrupt MIT semiconductor material layer. The 2-terminal semiconductor device includes a first electrode layer, an abrupt MIT semiconductor organic or inorganic material layer having an energy gap less than 2eV and holes in a hole level disposed on the first electrode ... 01/12/06 - 20060006414 - Algan/gan high electron mobility transistor devices The present invention recites a new method for manufacturing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET devices or MESFET devices, grown by Metal-Organic Vapor Phase Expitaxy, with higher performance (power), by covering the surface with a thin SiN layer on the top AlGaN layer, in the reactor where ... 01/12/06 - 20060006413 - Iii-nitride device passivation and method An embodiment of a III-nitride semiconductor device and method for making the same may include a low resistive passivation layer that permits the formation of device contacts without damage to the III-nitride material during high temperature processing. The passivation layer may be used to passivate the entire device. The passivation ... 12/29/05 - 20050285143 - Semiconductor device An island-shaped floating conducting region is provided in a region of the substrate between the adjacent wires on the nitride film, between the adjacent wire on the nitride film and conducting region (the operating region, resistor, or peripheral impurity region), or between the adjacent wire on the nitride film and ... 12/29/05 - 20050285142 - Gallium nitride materials and methods associated with the same Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the ... 12/29/05 - 20050285141 - Gallium nitride materials and methods associated with the same Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the ... 12/29/05 - 20050285140 - Isolation structure for strained channel transistors A method and system is disclosed for forming an improved isolation structure for strained channel transistors. In one example, an isolation structure is formed comprising a trench filled with a nitrogen-containing liner and a gap filler. The nitrogen-containing liner enables the isolation structure to reduce compressive strain contribution to the ... 12/22/05 - 20050280029 - Semiconductor device A semiconductor device of the present invention has an insulating gate type field effect transistor portion having an n-type emitter region (3) and an n− silicon substrate (1), which are opposed to each other sandwiching a p-type body region (2), as well as a gate electrode (5a) which is opposed ... 12/22/05 - 20050280028 - Semiconductor device A semiconductor device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a body arranged between the source and drain for ... 12/22/05 - 20050280027 - Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method A first film of rare-earth metal is formed on a semiconductor region of compound semiconductor exposed on a substrate. A second film essentially comprising silicon is formed on the surface of the first film. The first and second films are heated to silicidate at least a portion of the first ... 12/22/05 - 20050280026 - Strained silicon-on-silicon by wafer bonding and layer transfer A semiconductor-based structure includes first and second layers bonded directly to each other at an interface. Parallel to the interface, the lattice spacing of the second layer is different than the lattice spacing of the first layer. The first and second layers are each formed of essentially the same semiconductor. ... 12/15/05 - 20050274981 - Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device A multi-layered structure of a semiconductor device includes a substrate, and a heteroepitaxial layer having a low dislocation defect density on the substrate. The heteroepitaxial layer consists of a main epitaxial layer and at least one intermediate epitaxial layer sandwished in the main epitaxial layer. At their interface, the heteroepitaxial ... 12/15/05 - 20050274980 - Semiconductor multilayer structure, semiconductor device and hemt device A semiconductor device includes an underlying layer made of a group-III nitride containing at least Al and formed on. a substrate, and a group of stacked semiconductor layers including a first semiconductor layer made of a group-III nitride, preferably GaN, a second semiconductor layer made of AlN and a third ... 12/15/05 - 20050274979 - Compound semiconductor device and manufacturing method thereof A pad electrode of a field effect transistor is formed solely of a pad metal layer without providing a gate metal layer. A high concentration impurity region is provided below the pad electrode, and the pad electrode is directly contacted to a substrate. Predetermined isolation is ensured by the high ... 12/15/05 - 20050274978 - Single metal gate material cmos using strained si-silicon germanium heterojunction layered substrate Strained Si/strained SiGe dual-channel layer substrate provides mobility advantage and when used as a CMOS substrate enables single workfunction metal-gate electrode technology. A single metal electrode with workfunction of 4.5 eV produces near ideal CMOS performance on a dual-channel layer substrate that consists sequentially of a silicon wafer, an epitaxially ... 12/15/05 - 20050274977 - Nitride semiconductor device The nitride semiconductor device according to one embodiment of the present invention comprises: a silicon substrate; a first aluminum gallium nitride (AlxGa1-xN (0≦x≦1)) layer formed as a channel layer on the silicon substrate in an island shape; and a second aluminum gallium nitride (AlyGa1-yN (0≦y≦1, x≦y)) layer formed as a ... 12/01/05 - 20050263788 - Heterojunction field effect semiconductor device A heterojunction field effect transistor comprises a semi-insulating GaAs substrate, an n-InGaAs channel layer on the substrate, and a barrier layer on the n-InGaAs channel layer. The barrier layer is composed of a substantially fully depleted p-AlGaAs layer between two i-AlGaAs layers. A gate electrode is in Schottky contact with ... 11/24/05 - 20050258451 - Methods of fabricating nitride-based transistors having regrown ohmic contact regions and nitride-based transistors having regrown ohmic contact regions Transistor fabrication includes forming a nitride-based channel layer on a substrate, forming a barrier layer on the nitride-based channel layer, forming a contact recess in the barrier layer to expose a contact region of the nitride-based channel layer, forming a contact layer on the exposed contact region of the nitride-based ... 11/24/05 - 20050258450 - Semiconductor devices having a hybrid channel layer, current aperture transistors and methods of fabricating same Transistors and/or methods of fabricating transistors that include a source contact, drain contact and gate contact are provided. In some embodiments, a channel region is provided between the source and drain contacts and at least a portion of the channel regions includes a hybrid layer comprising semiconductor material. In particular ... 11/17/05 - 20050253168 - Wide bandgap transistors with multiple field plates A transistor comprising a plurality of active semiconductor layers on a substrate, with source and drain electrodes in contact with the semiconductor layers. A gate is formed between the source and drain electrodes and on the plurality of semiconductor layers. A plurality of field plates are arranged over the semiconductor ... 11/17/05 - 20050253167 - Wide bandgap field effect transistors with source connected field plates A field effect transistor comprising a buffer and channel layer formed successively on a substrate. A source electrode, drain electrode, and gate are all formed in electrical contact with the channel layer, with the gate between the source and drain electrodes. A spacer layer is formed on at least a ... 11/17/05 - 20050253166 - Thermal anneal process for strained-si devices A method is disclosed for forming a semiconductor device using strained silicon. After forming a first substrate material with a first natural lattice constant on a device substrate and a second substrate material with a second natural lattice constant on the first substrate material, a channel, source and drain regions ... 11/10/05 - 20050247956 - Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions An electrical device in which an interface layer is disposed between and in contact with a metal and a Si-based semiconductor, the interface layer being of a thickness effective to depin of the Fermi level of the semiconductor while still permitting current to flow between the metal and the semiconductor. ... 10/27/05 - 20050236646 - Nitride semiconductor device and manufacturing method thereof A nitride semiconductor device including an ohmic electrode with low contact resistance and manufacturing method thereof including a first nitride semiconductor layer made of a III-V group nitride semiconductor layer deposited on a substrate, a second nitride semiconductor layer including the III-V group nitride semiconductor layer whose film formation temperature ... 10/06/05 - 20050218427 - Method for making a fet channel A channel 16 of a FinFET 10 has a channel core 24 and a channel envelope 32, each made from a semiconductor material defining a different lattice structure to exploit strained silicon properties. A gate is coupled to the channel envelope through a gate dielectric. Exemplary materials are Si and ... 09/15/05 - 20050199906 - Split poly-sige/poly-si alloy gate stack A multi-layered gate electrode stack structure of a field effect transistor device is formed on a silicon nano crystal seed layer on the gate dielectric. The small grain size of the silicon nano crystal layer allows for deposition of a uniform and continuous layer of poly-SiGe with a [Ge] of ... 09/08/05 - 20050194612 - Iii-nitride current control device and method of manufacture A III-nitride device includes a recessed electrode to produce a nominally off, or an enhancement mode, device. By providing a recessed electrode, a conduction channel formed at the interface of two III-nitride materials is interrupted when the electrode contact is inactive to prevent current flow in the device. The electrode ... 09/01/05 - 20050189563 - Strained-semiconductor-on-insulator device structures The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. ... 09/01/05 - 20050189562 - Integrated iii-nitride power devices A III-nitride based integrated semiconductor device which includes at least two III-nitride based semiconductor devices formed in a common die. ... 09/01/05 - 20050189561 - Iii-nitride bidirectional switch A III-nitride bidirectional switch which includes an AlGaN/GaN interface that obtains a high current currying channel. The bidirectional switch operates with at least one gate that prevents or permits the establishment of a two dimensional electron gas to form the current carrying channel for the bidirectional switch. ... 09/01/05 - 20050189560 - Integrated circuit with enhancement mode pseudomorphic high electron mobility transistors having on-chip electrostatic discharge protection An integrated circuit (IC) with high electron mobility transistors, such as enhancement mode pseudomorphic high electron mobility transistors (E-pHEMTs) and method for fabricating the IC utilizes an increased gate-to-drain etch recess spacing in some of the high electron mobility transistors to provide on-chip electrostatic discharge protection. The use of the ... 08/25/05 - 20050184309 - Process for fabricating ultra-low contact resistances in gan-based devices A process for fabricating ohmic contacts in a field-effect transistor includes the steps of: thinning a semiconductor layer forming recessed portions in the semiconductor layer; depositing ohmic contact over the recessed portions; and heating the deposited ohmic contacts. The field-effect transistor comprises a layered semiconductor structure which includes a first ... 08/18/05 - 20050179054 - Semiconductor device and process for production thereof A semiconductor device which is capable of operating with a single positive power supply and has a low gate resistance, and a process for production thereof. The semiconductor device includes a channel layer (which constitutes a current channel), a first semiconductor layer formed on said channel layer, a second semiconductor ... 08/11/05 - 20050173728 - Nitride heterojunction transistors having charge-transfer induced energy barriers and methods of fabricating the same A nitride-based field effect transistor includes a substrate, a channel layer comprising InAlGaN formed on the substrate, source and drain ohmic contacts in electrical communication with the channel layer, and a gate contact formed on the channel layer. At least one energy barrier opposes movement of carriers away from the ... 07/28/05 - 20050161704 - Semiconductor device and its manufacturing method The semiconductor device (10) comprises a semiinsulating substrate (12), a layered structure (20) of compound semiconductor which is a mesa structure (18) and contains an active channel layer (14), a first and a second metal main electrodes (22a, 22b) which are provided on the layered structure (20), a first and ... 07/14/05 - 20050151164 - Enhancement of p-type metal-oxide-semiconductor field effect transistors A structure includes a tensile strained layer disposed over a substrate, the tensile strained layer having a first thickness. A compressed layer is disposed between the tensile strained layer and the substrate, the compressed layer having a second thickness. The first and second thicknesses are selected to define a first ... 07/07/05 - 20050145882 - Semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation A semiconductor device includes a series of layers formed on a substrate, the layers including a first plurality of layers including an n-type ohmic contact layer, a p-type modulation doped quantum well structure, an n-type modulation doped quantum well structure, and a fourth plurality of layers including a p-type ohmic ... 07/07/05 - 20050145881 - Depletion-merged fet design in bulk silicon Field effect transistors having reduced reverse body effects and reduced parasitic junction capacitance and a method of manufacture. The FET's comprise source/drain region pairs formed in said bulk silicon, each pair separated by a channel region. The depletion region associated with each of the source/drain regions of a pair are ... 06/23/05 - 20050133818 - Gallium nitride material devices including an electrode-defining layer and methods of forming the same Gallium nitride material devices and methods of forming the same are provided. The devices include an electrode-defining layer. The electrode-defining layer typically has a via formed therein in which an electrode is formed (at least in part). Thus, the via defines (at least in part) dimensions of the electrode. In ... 06/23/05 - 20050133817 - Improved cobalt silicidation process for substrates with a silicon germanium layer A method comprises providing a semiconductor alloy layer on a semiconductor substrate, forming a gate structure on the semiconductor alloy layer, forming source and drain regions in the semiconductor substrate on both sides of the gate structure, removing at least a portion of the semiconductor alloy layer overlying the source ... 06/16/05 - 20050127398 - Field-effect semiconductor device and method for making the same A method for making a filed-effect semiconductor device includes the steps of forming a gate electrode on a semiconductor layer composed of a gallium nitride-based compound semiconductor represented by the formula AlxInyGa1−x−yN, wherein x+y=1, 0≦x≦1, and 0≦y≦1; and forming a source electrode and a drain electrode by self-alignment using the ... 06/09/05 - 20050121695 - Semiconductor device with schottky electrode including lanthanum and boron, and manufacturing method thereof A semiconductor device and its manufacturing method. The semiconductor device has a semi-insulating GaAs substrate 310, a GaAs buffer layer 321 that is formed on the semi-insulating GaAs substrate 310, AlGaAs buffer layer 322, a channel layer 323, a spacer layer 324, a carrier supply layer 325, a spacer layer ... 06/09/05 - 20050121694 - Compound semiconductor high frequency switch device A high frequency switch device includes an epitaxy substrate that is formed by sequentially stacking an AlGaAs/GaAs superlattic buffer layer, a first Si planar doping layer, an undoped first AlGaAs spacer, an undoped InGaAs layer, an undoped second AlGaAs spacer, a second Si planar doping layer having a doping density ... ### FreshPatents.com Support |