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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Thin Active Physical Layer Which Is (1) An Active Potential Well Layer Thin Enough To Establish Discrete Quantum Energy Levels Or (2) An Active Barrier Layer Thin Enough To Permit Quantum Mechanical Tunneling Or (3) An Active Layer Thin Enough To Permit Carrier Transmission With Substantially No Scattering (e.g., Superlattice Quantum Well, Or Ballistic Transport Device) > Heterojunction > Quantum Well > Superlattice SuperlatticeSuperlattice patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/25/07 - 20070246701 - Generating multiple bandgaps using multiple epitaxial layers A quantum well intermixing (QWI) technique for modifying an energy bandgap during the formation of optical semi-conductor devices enables spatial control of the QWI process so as to achieve differing bandgap shifts across a wafer, device or substrate surface. The method includes: forming a substrate comprising one or more core ... 08/23/07 - 20070194298 - Semiconductor device comprising a lattice matching layer A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first ... 08/16/07 - 20070187667 - Electronic device including a selectively polable superlattice An electronic device may include a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable superlattice may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one ... 01/18/07 - 20070012911 - Semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance A semiconductor device may include a substrate and spaced apart source and drain regions defining a channel region therebetween in the substrate. The substrate may have a plurality of spaced apart superlattices in the channel and/or drain regions. Each superlattice may include a plurality of stacked groups of layers, with ... 01/18/07 - 20070012910 - Semiconductor device including a channel with a non-semiconductor layer monolayer A semiconductor device may include a semiconductor substrate, and at least one metal oxide semiconductor field-effect transistor (MOSFET) thereon. The MOSFET may include spaced-apart source and drain regions, a channel between the source and drain regions, and a gate overlying the channel defining an interface therewith. The gate may include ... 01/18/07 - 20070012909 - Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions A semiconductor device may include at least one pair of spaced apart stress regions, and a strained superlattice layer between the at least one pair of spaced apart stress regions and including a plurality of stacked groups of layers. Each group of layers of the strained superlattice layer may include ... 12/07/06 - 20060273300 - Iii-v group gan-based compound semiconductor device A III-V Group GaN-based compound semiconductor device with an improved structure having low current comsumption, high optical output, and a long lifetime is provided. The III-V Group GaN-based compound semiconductor device includes an active layer and a first clad layer and a second clad layer, wherein at least one of ... 12/07/06 - 20060273299 - Method for making a semiconductor device including a dopant blocking superlattice A method for making a semiconductor device may include forming at least one metal oxide field-effect transistor (MOSFET) by forming a body, forming a dopant blocking superlattice adjacent the body, and forming a channel layer adjacent the dopant blocking superlattice and opposite the body. The dopant blocking superlattice may include ... 06/29/06 - 20060138397 - Manipulation of conductive and magnetic phases in an electron trapping semiconducting A semiconductor strip array that can be configured to exhibit distinct electrical and/or magnetic phase characteristics according to the many-body effects phenomenon in electron gases is disclosed. The strip array can be incorporated into a MOSFET architecture and utilized in amplifier and memory cell applications. Significantly, the strip array can ... 08/04/05 - 20050167649 - Semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction A semiconductor device may include a superlattice comprising a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least ... ### FreshPatents.com Support |