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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes) > Bulk Effect Device Bulk Effect DeviceBulk Effect Device patent applications listed are from June 2005 to current and include Date, Patent Application Number, Patent Title, Patent Abstract summary and are linked to the corresponding patent application page.10/04/07 - 20070228353 - Electronic crossbar system for accessing arrays of nanobatteries for mass memory storage and system power A sequence or array of electrochemical cells storing both digital and analog data. Both binary code and codes having base may be stored in the memory device to increase information density. Such battery arrays could also provide power for the micro or nanodevice. Devices are microscale and nanoscale in size ... 07/19/07 - 20070164264 - Storage system using an array of electro-magnetic sensors A record carrier (40) of a removable type has an information plane that is provided with a pattern of an electro-magnetic material constituting an array of bit locations (11). The presence or absence of said material at the information plane represent the value of a bit location. The device has ... 05/31/07 - 20070120103 - Switch circuit and method of switching radio frequency signals An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by ... 04/19/07 - 20070085068 - Spin transfer based magnetic storage cells utilizing granular free layers and magnetic memories using such cells A method and system for providing a magnetic element and a memory incorporating the magnetic element is described. The method and system for providing the magnetic element include providing a pinned layer, a spacer layer, and a free layer. The free layer includes granular free layer having a plurality of ... 03/08/07 - 20070051935 - Phase change random access memory and method of operating the same A phase change random access memory (PRAM), and a method of operating the PRAM are provided. In the PRAM comprising a switching element and a storage node connected to the switching element, the storage node comprises a first electrode, a second electrode, a phase change layer between the first electrode ... 12/21/06 - 20060284155 - Switching device A switching device in which an organic bistable material layer containing an organic bistable compound having two types of stable resistance against an applied voltage is provided between at least two electrodes. In the switching device, a first electrode layer, an electric charge injection suppressing layer, an organic bistable material ... 11/23/06 - 20060261321 - Low power phase change memory cell with large read signal A memory cell includes a first electrode, a second electrode, and phase-change material including a first portion contacting the first electrode, a second portion contacting the second electrode, and a third portion between the first portion and the second portion. A width of the third portion is less than a ... 11/09/06 - 20060249723 - Planarization process for semiconductor substrates A method of manufacturing semiconductor devices using an improved chemical mechanical planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved chemical mechanical planarization process includes the formation of a flat planar surface from a deformable coating on the surface ... 11/02/06 - 20060243956 - Cross point memory array with fast access time Cross point array with fast access time. A cross point array is driven by drivers on a semiconductor substrate. The drivers for either a single-layer cross point array or for the bottom layer of a stacked cross point array can be positioned to improve access time. Specifically, if the x-direction ... 11/02/06 - 20060243955 - Semiconductor integrated circuit device LSI device 100 is provided with standard cell regions 10, a plurality of standard cells 20, memory blocks 11 and a plurality of memory cells 21. Standard cells 20 are equal in height “Hs” and disposed in standard cell regions 10 in a vertical direction. Memory blocks 11 are provided ... 10/26/06 - 20060237706 - Non-volatile semiconductor memory and method for controlling a non-volatile semiconductor memory A non-volatile semiconductor memory including a plurality of memory cell transistors, each of the plurality of memory cell transistors includes: a source region having a first conductivity type and in contact with a buried insulating layer on a supporting substrate; a drain-region having the first conductivity type and in contact ... 10/26/06 - 20060237705 - Method and related apparatus for calibrating signal driving parameters between chips A calibrating method for adjusting related parameters when a first chip and a second chip switch signals is disclosed. The calibrating method includes: utilizing the first chip to output a test signal through using a first driving force in order to represent a test value; utilizing the second chip to ... 10/19/06 - 20060231822 - Flash memory devices and methods of fabricating the same A flash memory device includes a common source region that is disposed in an active region at a side of a ground-selection gate line, being apart from the ground-selection gate line. A pair of source spacers crosses over both top edges of the common source region. A source line fills ... 09/21/06 - 20060208247 - Method and system for an integrated circuit supporting auto-sense of voltage for drive strength adjustment Certain embodiments of the invention may be found in a method for integrated circuit supporting auto-sense of voltage for drive strength adjustment. The method may comprise detecting an input voltage received at an auto-sense pad integrated on a mobile multimedia processing (MMP) chip. The input voltage may be a power ... 07/06/06 - 20060145133 - Recovery of computer systems Techniques for enabling remote recovery of computer system is disclosed. OOB communication with a provisioning server is established using a wireless communication device on a computer system that fails. The computer system includes an OOB controller. The OOB communication is authenticated. A disk image is downloaded from a server. Operations ... 06/29/06 - 20060138392 - Mild methods for generating patterned silicon surfaces The invention provides methods for making self-assembling monolayers on silicon surfaces using mild conditions. ... 06/22/06 - 20060131553 - Silicon semiconductor substrate and its manufacturing method The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a main surface, and provides a silicon semiconductor ... 04/13/06 - 20060076547 - Three-dimensional viewing and editing of microcircuit design An editing tool that provides a user interface for displaying and editing a representation of a microcircuit design. More particularly, the user interface displays a three dimensional representation of a second portion of the circuit design. A user can then select and edit a structure employing the three-dimensional representation of ... 01/12/06 - 20060006373 - Method for manufacturing pattern formed structure In order to achieve the object, the present invention provides a method for manufacturing a pattern formed structure, comprising: a patterning substrate preparing process of preparing a patterning substrate having a base material and a photocatalyst-containing property variable layer which is formed on the base material, comprises at least a ... 12/29/05 - 20050285093 - Magnetic storage device using ferromagnetic tunnel junction element It is a task to provide a magnetic storage device of complementary type, of which reliability is improved by precisely performing writing storage data. In the present invention, therefore, in a magnetic storage device of complementary type for storing storage data contrary to each other in a first ferromagnetic tunnel ... 12/22/05 - 20050279985 - Three dimensional flash cell A floating gate memory cell includes isolation regions between adjacent cells, and a staggered pattern of columns of cells. Word lines are formed parallel to control gate structures. ... 12/22/05 - 20050279984 - Three dimensional flash cell A floating gate memory cell includes isolation regions between adjacent cells, and a staggered pattern of columns of cells. Word lines are formed parallel to control gate structures. ... 12/22/05 - 20050279983 - Source lines for nand memory devices A NAND memory device has a source line connected to two or more columns of serially-connected floating-gate transistors. The source line includes a first conductive layer formed on a substrate and coupled to source select gates associated with the two or more columns of serially-connected floating-gate transistors. The source line ... 09/15/05 - 20050199869 - Orientated group iv-vi semiconductor structure, and method for making and using the same A method of growing and fabricating a group IV-VI semiconductor structure, for use in fabricating devices. In one embodiment, the group IV-VI semiconductor structure produced by the method of the present invention includes a group IV-VI material grown on a selected orientation of [110]. The devices fabricated can be a ... 08/18/05 - 20050179023 - Method and apparatus for removing thin metal films A system for removing a thin metal film is disclosed. The system comprises an inclined metal plate electrode for guiding a downward electrolyte flow, an auxiliary electrode placed on either the upstream or downstream side of the metal plate electrode such that a part of the auxiliary electrode is immersed ... 07/07/05 - 20050145834 - Methods of forming switchable circuit devices The invention includes a switchable circuit device. The device comprises a first conductive layer and a porous silicon matrix over the first conductive layer. A material is dispersed within pores of the porous silicon matrix, and the material has two stable states. A second conductive layer is formed over the ... ### FreshPatents.com Support |