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Zagorin O'brien Graham LLP patentsThe following is a sampling of recent Zagorin O'brien Graham LLP patent applications (USPTO Patent Application #, Patent Title) sorted by month.
April 2008 - Zagorin O'brien Graham LLP patents
20080091992 - Tri-level test mode terminal in limited terminal environment
20080079501 - Technique for switching between input clocks in a phase-locked loop
20080079502 - Direct digital interpolative synthesis
20080079510 - Programmable phase-locked loop responsive to a selected bandwidth and a selected reference clock signal frequency to adjust circuit characteristics
March 2008 - Zagorin O'brien Graham LLP patents
20080073725 - Buried guard ring structures and fabrication methods
20080057900 - Decision feedback restore
February 2008 - Zagorin O'brien Graham LLP patents
20080042757 - Robust false locking prevention in referenceless frequency acquisition
20080034378 - Hybrid output driver for high-speed communications interfaces
December 2007 - Zagorin O'brien Graham LLP patents
20070285128 - Differential line termination technique
20070283176 - Method and apparatus for improving responsiveness of a power management system in a computing device
November 2007 - Zagorin O'brien Graham LLP patents
20070267026 - Protective covering for medical instruments
October 2007 - Zagorin O'brien Graham LLP patents
20070246805 - Multi-die inductor
20070245416 - E-mail firewall with stored key encryption/decryption
20070239639 - Dynamic message filtering
20070230513 - Transmitter voltage and receiver time margining
20070230553 - In-band method to configure equalization levels
20070230646 - Phase recovery from forward clock
20070230687 - Method and apparatus to reduce the effect of crosstalk in a communications interface
20070232254 - In-band power management in a communication link
20070234080 - Power management in a communication link
September 2007 - Zagorin O'brien Graham LLP patents
20070214353 - E-mail firewall
20070205832 - Reference-less clock circuit
August 2007 - Zagorin O'brien Graham LLP patents
20070176691 - Expanded pull range for a voltage controlled clock synthesizer
June 2007 - Zagorin O'brien Graham LLP patents
20070146083 - Calibration of oscillator devices
20070139032 - Integrated current sensor
20070139066 - Integrated current sensor package
20070139088 - High-speed divider with pulse-width control
20070139835 - Current sensor with reset circuit
May 2007 - Zagorin O'brien Graham LLP patents
20070118305 - Contact sensitive device
20070101418 - Log-on service providing credential level change without loss of session continuity
April 2007 - Zagorin O'brien Graham LLP patents
20070084643 - Contact sensitive device
20070084643 - Contact sensitive device
20070075776 - Output driver with common mode feedback
20070075813 - Self-shielding inductor
January 2007 - Zagorin O'brien Graham LLP patents
20070008776 - Three-dimensional non-volatile sram incorporating thin-film device layer
20070008785 - Apparatus and method for programming an array of nonvolatile memory cells including switchable resistor memory elements
20070008786 - Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements
20070001718 - Phase adjustment for a divider circuit
20070001719 - Tunable high-speed frequency divider
20070001743 - Utilization of device types having different threshold voltages
20070001746 - Selectably boosted control signal based on supply voltage
December 2006 - Zagorin O'brien Graham LLP patents
20060294409 - Frequency margin testing
20060284746 - Digital expander for generating multiple analog control signals particularly useful for controlling an oscillator
November 2006 - Zagorin O'brien Graham LLP patents
20060270462 - High density information presentation using space-constrained display device
20060251232 - Enhanced alerting system
October 2006 - Zagorin O'brien Graham LLP patents
20060238267 - Zoned thermal monitoring
20060221728 - Method and apparatus for incorporating block redundancy in a memory array
20060221752 - Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers
20060221758 - Transistor layout configuration for tight-pitched memory array lines
July 2006 - Zagorin O'brien Graham LLP patents
20060145193 - Dual-mode decoder circuit, integrated circuit memory array incorporating same, and related methods of operation
20060146608 - Integrated circuit including memory array incorporating multiple types of nand string structures
20060146639 - Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders
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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Zagorin O'brien Graham LLP in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Zagorin O'brien Graham LLP with additional patents listed. Browse our Agent directory for other possible listings.
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