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Warpage-reducing packaging designRelated Patent Categories: Electricity: Conductors And Insulators, Boxes And Housings, With Electrical Device, Encapsulated (potted, Molded, Plastic Filled)Warpage-reducing packaging design description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070175660, Warpage-reducing packaging design. Brief Patent Description - Full Patent Description - Patent Application Claims
TECHNICAL FIELD [0001] The present invention relates generally to semiconductor device fabrication. More particularly, the present invention relates to semiconductor packaging for reduction of thermal-mechanical deformation of the flange known as "warpage." BACKGROUND [0002] It is well known that after semiconductor dies are fabricated on a semiconductor wafer, such as but not limited to, silicon or gallium arsenide, the wafer is sawn (also referred to as "diced") to separate the individual semiconductor die (also known as "dice" or "chips" or "device") on the wafer. These separated die are then each packaged to facilitate safe die handling, and attachment to circuit boards, heat sinks, and the like. During this process, the die is attached or mounted to a packaging substrate (also known as a "flange"). In the case of some devices, such as power amplifiers, where heat generation is expected during operation of the device, the die with packaging substrate backing is then mounted or attached to a heat sink that acts to remove generated heat by conduction away from the device in use. [0003] In a typical packaging process, the die is attached to the flange by any suitable method, for example by soldering or using an adhesive. This process is carried out at elevated temperature, and the die-flange combination is subsequently cooled to room temperature. [0004] For conventional materials used in packaging, such as those described in U.S. patent publication 20050016750 A1, there is a tendency for the flange to deform from planarity or "warp," upon cooling after the die attachment process. The deformation leads to further manufacturing problems in subsequent processes when the window frame, leads and lid are attached. It also to leads to inefficient transfer of heat generated by the die, while it is in use, to the flange and heat sink. Consequently, the warpage prevents the maximum potential heat transfer from die to flange and from flange to heat sink. This leads to temperature increase at the die, with undesirable consequences. [0005] In another configuration, U.S. patent publication 20050012118 describes a package that can withstand high die-attach temperatures and that can provide a hermetically sealed air cavity for a die, without the use of adhesives. It discusses a circuit package for housing semiconductor that has a metallic flange, one or more high-copper leads and a liquid crystal polymer frame molded to the flange and the leads. The flange includes a dovetail-shaped groove that mechanically interlocks with the molded frame. During molding, a portion of the frame forms a key that freezes in or around the frame retention feature. There is no discussion of heat-induced flange deformation. [0006] The art recognizes that heat transfer from die to flange poses a challenge in operations where the die is attached at high temperature, and the combination is subsequently cooled to room temperature and thermal-mechanical deformation is induced. [0007] Accordingly, it is desirable to minimize the warpage of the flange in the die attachment process. In addition, it is desirable to develop a solution that retains the highest possible heat transfer from die to flange, and from flange to heat sink. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background. BRIEF DESCRIPTION OF THE DRAWINGS [0008] A more complete understanding of the present invention may be derived by referring to the detailed description and claims when considered in conjunction with the following figures, which are not represented as being to scale, wherein like reference numbers refer to similar elements throughout the figures. [0009] FIG. 1 is a schematic depiction of half of a prior art air cavity package; [0010] FIG. 2 is a schematic depiction of half of another prior art air cavity package with a bonded ceramic insulator frame; [0011] FIG. 3 is a schematic depiction of the half of the prior art assembly product of FIG. 2 with attached leads; [0012] FIG. 4 is a schematic perspective view of half of an embodiment of the invention showing a flange with stiffening lip and die on a die pedestal; [0013] FIG. 5 is a schematic perspective view of half of an embodiment of the invention showing a raised stiffening lip and multiple die, each disposed on its own pedestal; [0014] FIG. 6 is a schematic perspective view of half of an embodiment of the invention with embedded leads extending through a molded, stiffening lip; [0015] FIG. 7 is a perspective view of half of an embodiment of the invention with embedded leads configured to maintain a standard seating plane and die on multiple pedestals; [0016] FIG. 8 is a top view of the embodiment of the invention showing a thicker flange with embedded leads, extending through a lip in a peripheral region of the frame, while seating plane s is maintained; [0017] FIG. 8 is a schematic cross sectional view of the embodiment of FIG. 8 with a single pedestal; [0018] FIG. 10 is an alternative embodiment to FIG. 9 with multiple pedestals; and [0019] FIG. 11 is a graphical representation of the improvement in flange stiffness over a control achieved in accordance with the invention, for particular lip and pedestal configurations and under specified conditions. DETAILED DESCRIPTION [0020] The following detailed description is merely illustrative in nature and is not intended to limit the invention or the application and uses of the invention. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, or the following detailed description. In addition, for the sake of brevity, conventional techniques related to finite element analysis, finite difference analysis, and thermal modeling may not be described in detail herein Continue reading about Warpage-reducing packaging design... Full patent description for Warpage-reducing packaging design Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Warpage-reducing packaging design patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Warpage-reducing packaging design or other areas of interest. ### Previous Patent Application: High performance chip carrier substrate Next Patent Application: Non-metallic elbow conduit transition fitting Industry Class: Electricity: conductors and insulators ### FreshPatents.com Support Thank you for viewing the Warpage-reducing packaging design patent info. IP-related news and info Results in 0.13183 seconds Other interesting Feshpatents.com categories: Tyco , Unilever , Warner-lambert , 3m 174 |
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