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07/26/07 - USPTO Class 257 | 113 views | #20070170531 | Prev - Next | About this Page

Wafer encapsulated microelectromechanical structure and method of manufacturing same

Title: Wafer encapsulated microelectromechanical structure and method of manufacturing same

Brief Patent Description - Full Patent Description - Patent Claims

The Patent Description & Claims data below is from USPTO Patent Application 20070170531, Wafer encapsulated microelectromechanical structure and method of manufacturing same.

1-30. (canceled)

31. A system comprising:a first substrate including carbon, polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, and/or gallium arsenide;a chamber;a microelectromechanical structure, wherein the microelectromechanical structure is (i) formed from a portion of the first substrate and (ii) at least partially disposed in the chamber;a second substrate, bonded to the first substrate, wherein a surface of the second substrate forms a wall of the chamber and the second substrate includes carbon, polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, and/or gallium arsenide; andcircuitry disposed in or on the second substrate.

32. The system of claim 31 wherein the circuitry is formed in the second substrate after the second substrate is bonded to the first substrate.

33. The system of claim 31 wherein the circuitry is formed in the second substrate before the second substrate is bonded to the first substrate.

34. The system of claim 31 wherein the first and second substrates are bonded using fusion bonding, anodic-like bonding, silicon direct bonding, soldering, thermo compression, thermo-sonic, laser bonding and/or glass reflow.

35. The system of claim 31 further including a contact having:a first portion of the contact (i) formed from a portion of the first substrate and (ii) at least a portion thereof being disposed outside the chamber; anda second portion of the contact formed from a portion of the second substrate; wherein the contact is electrically coupled to the circuitry.

36. The system of claim 31 wherein the circuitry generates clock signals from an output signal of the microelectromechanical structure.

37. The system of claim 36 wherein the circuitry adjusts, compensates, corrects and/or controls the frequency and/or phase compensation of the output signal of the microelectromechanical structure.

38. The system of claim 37 wherein the circuitry includes one or more phase locked loops, delay locked loops, digital synthesizer, frequency synthesizer, fractional synthesizer, numerically controlled oscillator, and/or frequency locked loops.

39. The system of claim 31 wherein the microelectromechanical device is a portion of an accelerometer, gyroscope, transducer, filter and/or resonator.

40. The system of claim 31 wherein the microelectromechanical structure includes more than one mechanical structure.

41. The system of claim 40 wherein at least one of the mechanical structures is a filter, resonator, accelerometer, gyroscope, pressure sensor, strain sensor, tactile sensor, magnetic sensor or temperature sensor.

42. A system comprising:a first substrate;a second substrate, wherein the second substrate is bonded to the first substrate and includes carbon, polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, and/or gallium arsenide;a chamber;a microelectromechanical structure, wherein the microelectromechanical structure is (i) formed from a portion of the second substrate and (ii) at least partially disposed in the chamber;a third substrate, bonded to the second substrate, wherein a surface of the third substrate forms a wall of the chamber and the third substrate includes carbon, polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, and/or gallium arsenide; andcircuitry disposed in or on the third substrate.

43. The system of claim 42 wherein the circuitry is formed in the second substrate after the second substrate is bonded to the first substrate.

44. The system of claim 42 wherein the circuitry is formed in the second substrate before the second substrate is bonded to the first substrate.

45. The system of claim 42 further including a contact having:a first portion of the contact (i) formed from a portion of the second substrate and (ii) at least a portion thereof being disposed outside the chamber; anda second portion of the contact formed from a portion of the third substrate;wherein:the first portion of the contact is a semiconductor material having a first conductivity;the third substrate is a semiconductor material having a second conductivity; andthe second portion of the contact is a semiconductor material having the first conductivity.

46. The system of claim 42 further including:a contact having:a first portion of the contact (i) formed from a portion of the second substrate and (ii) at least a portion thereof being disposed outside the chamber; anda second portion of the contact formed from a portion of the third substrate; anda trench disposed in the third substrate and around at least a portion of the second portion of the contact.

47. The system of claim 46 wherein the trench includes an insulation material disposed therein to electrically isolate the second portion of the contact from the third substrate.

48. The system of claim 46 further including an isolation region disposed in the second substrate such that the trench is aligned with and juxtaposed to the isolation region.

49. The system of claim 48 wherein:the first portion of the contact is a semiconductor material having a first conductivity;the isolation region is a semiconductor material having a second conductivity; andthe second portion of the contact is a semiconductor material having the first conductivity.

50. The system of claim 42 further includinga contact having:a first portion of the contact (i) formed from a portion of the second substrate and (ii) at least a portion thereof being disposed outside the chamber; anda second portion of the contact formed from a portion of the third substrate; andan isolation region, disposed in the first substrate such that a first portion of the contact is aligned with and juxtaposed to the isolation region.

51. The system of claim 42 further including:a contact having:a first portion of the contact (i) formed from a portion of the second substrate and (ii) at least a portion thereof being disposed outside the chamber; anda second portion of the contact formed from a portion of the third substrate;a first isolation region, disposed in the first substrate such that the first portion of the contact is aligned with and juxtaposed to the first isolation region; anda second isolation region, disposed in the second substrate such that the second portion of the contact is aligned with and juxtaposed to the second isolation region.

52. The system of claim 51 wherein:the first and second portions of the contact are semiconductor materials having a first conductivity; andthe first and second isolation regions are semiconductor materials having the second conductivity.

53. The system of claim 52 further including a trench, disposed in the third substrate and around at least a portion of the second portion of the contact.

54. The system of claim 53 wherein the trench includes an insulation material disposed therein to electrically isolate the second portion of the contact from the third substrate.

55. The system of claim 54 wherein the trench is aligned with and juxtaposed to the second isolation region.

56. The system of claim 42 wherein the second and third substrates are bonded using fusion bonding, anodic-like bonding, silicon direct bonding, soldering, thermo compression, thermo-sonic, laser bonding and/or glass reflow.

57. The system of claim 42 wherein the circuitry generates clock signals from an output signal of the microelectromechanical structure.

58. The system of claim 57 wherein the circuitry adjusts, compensates, corrects and/or controls the frequency and/or phase compensation of the output signal of the microelectromechanical structure.

59. The system of claim 58 wherein the circuitry includes one or more phase locked loops, delay locked loops, digital synthesizer, frequency synthesizer, fractional synthesizer, numerically controlled oscillator, and/or frequency locked loops.

60. The system of claim 59 wherein the microelectromechanical device is a portion of an accelerometer, gyroscope, transducer, filter and/or resonator.

61. The system of claim 42 wherein the microelectromechanical structure includes more than one mechanical structure.

62. The system of claim 61 wherein at least one of the mechanical structures is a filter, resonator, accelerometer, gyroscope, pressure sensor, strain sensor, tactile sensor, magnetic sensor or temperature sensor.

Brief Patent Description - Full Patent Description - Patent Claims

Click on the above for other options relating to this Wafer encapsulated microelectromechanical structure and method of manufacturing same patent application.

Patent Applications in related categories:

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20090278215 - Electronic device, system, and method comprising differential sensor mems devices and drilled substrates - Electronic device which comprises a substrate provided with at least one passing opening, a MEMS device with function of differential sensor provided with a first and a second surface and of the type comprising at least one portion sensitive to chemical and/or physical variations of fluids present in correspondence with ...

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20090278214 - Microelectromechanical systems encapsulation process - An encapsulated MEMS process including a high-temperature anti-stiction coating that is stable under processing steps at temperatures over 450 C is described. The coating is applied after device release but before sealing vents in the encapsulation layer. Alternatively, an anti-stiction coating may be applied to released devices directly before encapsulation. ...

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