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07/26/07 - USPTO Class 257 |  1 views | #20070170439 | Prev - Next | About this Page  257 rss/xml feed  monitor keywords

Wafer encapsulated microelectromechanical structure and method of manufacturing same

Title: Wafer encapsulated microelectromechanical structure and method of manufacturing same




Brief Patent Description - Full Patent Description - Patent Claims

The Patent Description & Claims data below is from USPTO Patent Application 20070170439, Wafer encapsulated microelectromechanical structure and method of manufacturing same.


1-30. (canceled)

31. A method comprising:forming a microelectromechanical structure in a portion of a first substrate;securing a second substrate to the first substrate; andproviding circuitry in or on the second substrate after securing the second substrate to the first substrate.

32. The method of claim 31 wherein the first substrate comprises carbon, polycrystalline silicon, monocrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide.

33. The method of claim 31 wherein the first substrate comprises a semiconductor on insulator substrate.

34. The method of claim 33 wherein the semiconductor on insulator substrate comprises an insulation layer and a semiconductor layer disposed on the insulation layer and wherein forming a microelectromechanical structure in the portion of the first substrate comprises:etching the semiconductor layer of the semiconductor on insulator substrate; andetching the insulation layer of the semiconductor on insulator substrate.

35. The method of claim 31 wherein the second substrate comprises carbon, polycrystalline silicon, monocrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide.

36. The method of claim 31 wherein securing a second substrate to the first substrate comprises bonding the second substrate to the first substrate.

37. The method of claim 36 wherein bonding the second substrate to the first substrate comprises fusion bonding, anodic-like bonding, silicon direct bonding, soldering, thermo compression bonding, thermo-sonic bonding, laser bonding and/or glass reflow bonding the second substrate to the first substrate.

38. The method of claim 31 further comprising:forming a first portion of a contact from a portion of the first substrate; andforming a second portion of the contract from a portion of the second substrate.

39. The method of claim 38 wherein:the first portion of the contact is a semiconductor material having a first conductivity;the second substrate is a semiconductor material having a second conductivity; andthe second portion of the contact is a semiconductor material having the first conductivity.

40. The method of claim 38 further comprising forming a trench around at least a portion of the second portion of the contact.

41. The method of claim 40 wherein the trench includes a first material disposed therein to electrically isolate the second portion of the contact from the second substrate.

42. The method of claim 40 wherein the second substrate is a semiconductor material having a first conductivity and the trench is (i) a semiconductor material having a second conductivity or (ii) an insulation material.

43. The method of claim 38 further comprising electrically connecting the contact to the circuitry.

44. The method of claim 43 wherein electrically connecting the contact to the circuitry comprises providing a low resistance electrical path to connect the second portion of the contact and the circuitry.

45. The method of claim 31 further comprising providing, in the first substrate, a cavity that forms a portion of a chamber in which the microelectromechanical structure is at least partially disposed.

46. The method of claim 31 further comprising:forming a first cavity in the first substrate; andforming a second cavity in the first substrate;wherein after the second substrate is secured to the first substrate, the first cavity and the second cavity form a chamber in which the microelectromechanical structure is at least partially disposed.

47. A method comprising:providing a first substrate;securing a second substrate to the first substrate;forming a microelectromechanical structure in a portion of the second substrate;securing a third substrate to the second substrate; andproviding circuitry in or on the third substrate after securing the third substrate to the second substrate.

48. The method of claim 47 wherein the second substrate includes polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide.

49. The method of claim 47 wherein the third substrate includes polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide.

50. The method of claim 47 wherein securing a second substrate to the first substrate comprises bonding the second substrate to the first substrate.

51. The method of claim 50 wherein bonding the second substrate to the first substrate comprises fusion bonding, anodic-like bonding, silicon direct bonding, soldering, thermo compression bonding, thermo-sonic bonding, laser bonding and/or glass reflow bonding the second substrate to the first substrate.

52. The method of claim 47 wherein forming a microelectromechanical structure in a portion of the second substrate comprises forming the microelectromechanical structure in the portion of the second substrate after securing the second substrate to the first substrate.

53. The method of claim 47 wherein securing a third substrate to the second substrate comprises bonding the third substrate to the second substrate.

54. The method of claim 53 wherein bonding the third substrate to the second substrate comprises fusion bonding, anodic-like bonding, silicon direct bonding, soldering, thermo compression bonding, thermo-sonic bonding, laser bonding and/or glass reflow bonding the third substrate to the second substrate.

55. The method of claim 47 further comprising:forming a first portion of a contact from a portion of the second substrate; andforming a second portion of the contact from a portion of the third substrate.

56. The method of claim 55 wherein:the first portion of the contact is a semiconductor material having a first conductivity;the third substrate is a semiconductor material having a second conductivity; andthe second portion of the contact is a semiconductor material having the first conductivity.

57. The method of claim 55 further comprising forming a trench around at least a portion of the second portion of the contact.

58. The method of claim 57 wherein the third substrate is a semiconductor material having a first conductivity and the trench is (i) a semiconductor material having a second conductivity or (ii) an insulation material.

59. The method of claim 55 further comprising electrically connecting the contact to the circuitry.

60. The method of claim 59 wherein electrically connecting the contact to the circuitry comprises providing a low resistance electrical path to connect the second portion of the contact and the circuitry.

61. The method of claim 47 further comprising providing, in the first substrate, a cavity that forms a portion of a chamber in which the microelectromechanical structure is at least partially disposed.

62. The method of claim 47 further comprising providing, in the second substrate, a cavity that forms a portion of a chamber in which the microelectromechanical structure is at least partially disposed.

63. The method of claim 47 further comprising providing, in the third substrate, a cavity that forms a portion of a chamber in which the microelectromechanical structure is at least partially disposed.

64. The method of claim 47 further comprising:forming a first cavity in the first substrate; andforming a second cavity in the third substrate;wherein after the second substrate is secured to the first substrate and the third substrate is secured to the second substrate, the first cavity and the second cavity form a chamber in which the microelectromechanical structure is at least partially disposed.

65. The method of claim 47 further comprising:forming a first cavity in the second substrate; andforming a second cavity in the third substrate;wherein after the second substrate is secured to the first substrate and the third substrate is secured to the second substrate, the first cavity and the second cavity form a chamber in which the microelectromechanical structure is at least partially disposed.

66. The method of claim 47 further comprising:forming a first cavity in the second substrate; andforming a second cavity in the second substrate;wherein after the second substrate is secured to the first substrate and the third substrate is secured to the second substrate, the first cavity and the second cavity form a chamber in which the microelectromechanical structure is at least partially disposed.

67. The method of claim 47 further comprising:forming a first cavity in the first substrate; andforming a second cavity in the second substrate;wherein after the second substrate is secured to the first substrate and the third substrate is secured to the second substrate, the first cavity and the second cavity form a chamber in which the microelectromechanical structure is at least partially disposed.

Brief Patent Description - Full Patent Description - Patent Claims

Click on the above for other options relating to this Wafer encapsulated microelectromechanical structure and method of manufacturing same patent application.

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