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  Wafer-edge polishing systemUSPTO Application #: 20070066192Title: Wafer-edge polishing system Abstract: A wafer-edge polishing device includes a buff member for polishing a semiconductor wafer, and a dresser for dressing the buff member, wherein the dresser opposes the buff member with an intervention of the semiconductor wafer. A wafer mount mounting thereon the semiconductor wafer and the dresser are respectively movable toward and from the buff member. The contact pressure between the wafer and the buff member as well as between the buff member and the dresser is fixed. The dresser performs in-situ dressing concurrently with polishing of the wafer by the buff member. (end of abstract)
Agent: Young & Thompson - Arlington, VA, US Inventor: Kenji Kumahara USPTO Applicaton #: 20070066192 - Class: 451178000 (USPTO) Related Patent Categories: Abrading, Machine, Rotary Tool, Rotary Cylinder The Patent Description & Claims data below is from USPTO Patent Application 20070066192. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF THE INVENTION [0001] (a) Field of the Invention [0002] The present invention relates to a wafer-edge polishing system and, more particularly, to the improvement of a wafer-edge polishing system for polishing the edge portion of a wafer. [0003] (b) Description of the Related Art [0004] Semiconductor devices are manufactured by using a wafer such as a single-crystal silicon wafer or compound semiconductor wafer, on which oxide films, nitride films, carbide films, polycrystalline films, metallic films etc. are formed by sputtering technique, CVD technique and the like. The materials configuring those films may be deposited on the edge of the semiconductor wafer and the vicinity thereof. The materials or films deposited on the edge portion of the wafer are unnecessary and often peeled off from the edge portion of the wafer during transportation of the wafer between different systems, such as between a cleaning system and a deposition system. If the deposited materials are peeled off from the wafer, the deposited materials may be a crucial contamination source against the product semiconductor devices. Thus, deposited materials should be removed using a wafer-edge polishing system at any time if desired. [0005] The wafer-edge polishing system includes a cylindrical buff unit onto which a buff member such as made of polyurethane foam or rigid polyurethane resin is attached. Patent Publication JP-1995-40214A describes a wafer-edge polishing system, which is shown in FIG. 5. The wafer-edge polishing system may be referred to merely as "polishing system" hereinafter. [0006] In FIG. 5, the polishing system includes a cylindrical buff member 31 which is rotatable with respect to the central axis 31a thereof. A slurry supply nozzle not shown is provided in the vicinity of the buff member 31. A semiconductor wafer 40 is pressed against the cylindrical surface of the buff member 31 at the edge of the semiconductor wafer 40. The semiconductor wafer 40 is slanted upward and downward, with the edge of the semiconductor wafer 40 being fixed at the contact point of the cylindrical surface of the buff member 31, for polishing the entire edge portion of the semiconductor wafer 40. [0007] Patent publication as described above also shows another buff member, which is shown in FIG. 6. FIG. 7 shows the enlarged sectional view of the vicinity of the contact portion of the buff member 32 shown in FIG. 6. The buff member 32 is rotated with respect to the central axis 32a thereof, and a slurry supply nozzle 34 supplies a slurry or polishing agent onto the vicinity of a groove 32b configuring the contact portion of the buff member 32. The groove 32b has a shape fitted to the edge portion of the semiconductor wafer 40, thereby allowing the semiconductor wafer 40 not to be slanted during the polishing. [0008] The slurry or polishing agent generally includes minute silica particles dispersed in an alkali or acidic liquid. The buff member configured by polyurethane foam or polyurethane resin has a large number of minute cells (blowholes) on and inside the buff member. The minute cells assist the buff unit to retain thereon the slurry, thereby improving the polishing efficiency of the buff member. [0009] It is noted that polished particles peeled off from the wafer or contaminated slurry including the polished particles may enter the minute cells on the buff unit after an iterated polishing treatment, thereby clogging the minute cells. The clogging of the minute cells prevents new slurry from entering the minute cells to lower the polishing efficiency of the buff member. Thus, the buff unit should be replaced by a new buff unit having minute cells not clogged by the polished particles or contaminated slurry, to thereby improve the polishing efficiency. The replacement of the buff unit reduces the through-put of the polishing treatment however. SUMMARY OF THE INVENTION [0010] In view of the above problems in the conventional techniques, it is an object of the present invention to provide a wafer-edge polishing system which is capable of improving the polishing efficiency, by reducing the frequency of replacement of the buff unit in the polishing device to improve the through-put of manufacturing semiconductor devices and reduce the cost for the buff unit. [0011] The present invention provides a wafer-edge polishing system including: a wafer mount for mounting thereon a wafer; a polishing device movable toward and from the wafer mount and having a buff member for polishing an edge portion of the wafer mounted on the wafer mount; a dresser movable toward and from the polishing device for dressing the buff member of the polishing device. [0012] In accordance with the wafer-edge polishing system of the present invention, the buff member having thereon polished particles or contaminated slurry can be dressed by the dresser without replacement of the buff unit within the polishing system, thereby reducing the frequency of the replacement of the buff unit, improving the polishing efficiency of the polishing system and improving the through-put of manufacturing the semiconductor devices. [0013] The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS [0014] FIG. 1 is a top plan view of a polishing system according to an embodiment of the present invention. [0015] FIG. 2 is a side view of the polishing system of FIG. 1. [0016] FIG. 3 is a side view of the buff unit in the polishing system shown in FIG. 1. [0017] FIG. 4 is a perspective view showing the buff unit of FIG. 3 before being fixed onto the base pole. [0018] FIG. 5 is a perspective view of a conventional polishing system. [0019] FIG. 6 is a perspective view of another conventional polishing system. [0020] FIG. 7 is an enlarged sectional view of a portion of the another conventional polishing system. PREFERRED EMBODIMENT OF THE INVENTION Continue reading... Full patent description for Wafer-edge polishing system Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Wafer-edge polishing system patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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