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Vierra Magen/sandisk Corporation patentsThe following is a sampling of recent Vierra Magen/sandisk Corporation patent applications (USPTO Patent Application #, Patent Title) sorted by month.
June 2009 - Vierra Magen/sandisk Corporation patents
20090162951 - Enhanced endpoint detection in non-volatile memory fabrication processes
20090162977 - Non-volatile memory fabrication and isolation for composite charge storage structures
20090163008 - Lithographically space-defined charge storage regions in non-volatile memory
20090163009 - Composite charge storage structure formation in non-volatile memory using etch stop technologies
20090164779 - File system filter authentication
20090152544 - Disguising test pads in a semiconductor package
20090155967 - Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer
20090147573 - Faster programming of multi-level non-volatile storage through reduced verify operations
20090147576 - Floating gate with universal etch stop layer
20090150596 - Device identifiers for nonvolatile memory modules
May 2009 - Vierra Magen/sandisk Corporation patents
20090134502 - Leadframe based flash memory cards
20090135646 - Operation sequence and commands for measuring threshold voltage distribution in memory
20090129159 - Read operation for non-volatile storage with compensation for coupling
20090129160 - Read operation for non-volatile storage with compensation for coupling
April 2009 - Vierra Magen/sandisk Corporation patents
20090103356 - Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
20090103356 - Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
20090103356 - Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
20090097319 - Applying adaptive body bias to non-volatile storage based on number of programming cycles
20090085231 - Method of reducing memory card edge roughness by particle blasting
20090085231 - Method of reducing memory card edge roughness by particle blasting
20090085232 - Method of reducing memory card edge roughness by edge coating
20090085232 - Method of reducing memory card edge roughness by edge coating
20090086542 - High voltage generation and control in source-side injection programming of non-volatile memory
20090086542 - High voltage generation and control in source-side injection programming of non-volatile memory
20090086544 - Compensation of non-volatile memory chip non-idealities by program pulse adjustment
20090086544 - Compensation of non-volatile memory chip non-idealities by program pulse adjustment
20090087979 - Dual damascene with amorphous carbon for 3d deep via/trench application
20090087979 - Dual damascene with amorphous carbon for 3d deep via/trench application
March 2009 - Vierra Magen/sandisk Corporation patents
20090080229 - Single-layer metal conductors with multiple thicknesses
20090080245 - Offset non-volatile storage
20090080263 - Reducing programming voltage differential nonlinearity in non-volatile storage
20090080265 - Multiple bit line voltages based on distance
20090073767 - Control gate line architecture
20090065902 - Method of forming a semiconductor die having a sloped edge for receiving an electrical connector
20090059660 - Reducing the impact of interference during programming
January 2009 - Vierra Magen/sandisk Corporation patents
20090021983 - Word line compensation in non-volatile memory erase operations
20090010065 - Non-volatile memory using multiple boosting modes for reduced program disturb
20090010067 - Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
20090010068 - Systems for coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
20090001365 - Memory card fabricated using sip/smt hybrid technology
20090001529 - Package stacking using unbalanced molded tsop
20090001533 - Multi-chip packaging in a tsop package
20090001534 - Two-sided die in a four-sided leadframe based package
20090001552 - Semiconductor package having through holes for molding back side of package
20090001610 - Semiconductor die having a redistribution layer
20090002933 - Memory card for an expresscard slot
20090003025 - Dual bit line metal layers for non-volatile memory
20090003052 - System that compensates for coupling based on sensing a neighbor using coupling
20090003053 - System that compensates for coupling based on sensing a neighbor using coupling
20090003068 - Method for source bias all bit line sensing in non-volatile storage
20090003069 - Non-volatile storage with source bias all bit line sensing
20090004774 - Method of multi-chip packaging in a tsop package
20090004776 - Method of fabricating a memory card using sip/smt hybrid technology
20090004781 - Method of fabricating a semiconductor die having a redistribution layer
20090004782 - Method of fabricating a two-sided die in a four-sided leadframe based package
20090004783 - Method of package stacking using unbalanced molded tsop
20090004785 - Method of fabricating a semiconductor package having through holes for molding back side of package
20090004786 - Method for fabricating a 3-d integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon
20090004843 - Method for forming dual bit line metal layers for non-volatile memory
20090004844 - Forming complimentary metal features using conformal insulator layer
20090004920 - Method of adapting an expresscard slot for use with portable memory cards
20090004921 - Adapter system for use with an expresscard slot
20090006681 - Dual bus expresscard peripheral device
20090006682 - Method of adapting an expresscard slot for smaller form factor memory compatibility
20090006698 - Adapter for an expresscard slot
20090006707 - Method of using the dual bus interface in an expresscard slot
April 2008 - Vierra Magen/sandisk Corporation patents
20080094930 - Temperature compensation of select gates in non-volatile memory
20080089127 - Non-volatile memory with dual voltage select gate structure
20080089128 - Programming non-volatile memory with dual voltage select gate structure
20080089132 - Partitioned soft programming in non-volatile memory
20080089133 - Systems for partitioned soft programming in non-volatile memory
20080089134 - Partitioned erase and erase verification in non-volatile memory
20080089135 - Systems for partitioned erase and erase verification in non-volatile memory
20080090351 - Fabricating non-volatile memory with dual voltage select gate structure
20080084747 - Reducing program disturb in non-volatile storage
20080084748 - Apparatus with reduced program disturb in non-volatile storage
20080084751 - Variable program voltage increment values in non-volatile memory program operations
20080084752 - Systems utilizing variable program voltage increment values in non-volatile memory program operations
20080084754 - Reverse reading in non-volatile memory with compensation for coupling
20080084755 - Systems for reverse reading in non-volatile memory with compensation for coupling
20080079052 - Non-volatile memory with local boosting control implant
20080081419 - Providing local boosting control implant for non-volatile memory
20080081455 - Methods of forming a single layer substrate for high capacity memory cards
March 2008 - Vierra Magen/sandisk Corporation patents
20080068891 - Boosting to control programming of non-volatile memory
20080054445 - Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging
20080055994 - Concurrent programming of non-volatile memory
20080055995 - Programming non-volatile memory with improved boosting
20080056000 - System for performing data pattern sensitivity compensation using different voltage
20080056001 - System for performing data pattern sensitivity compensation using different voltage
20080056002 - Concurrent programming of non-volatile memory
20080056003 - Concurrent programming of non-volatile memory
February 2008 - Vierra Magen/sandisk Corporation patents
20080049392 - Peripheral card with hidden test pins
20080049506 - Alternate row-based reading and writing for non-volatile memory
20080050859 - Methods for a multiple die integrated circuit package
January 2008 - Vierra Magen/sandisk Corporation patents
20080025061 - High bandwidth one time field-programmable memory
20080025067 - Systems for high bandwidth one time field-programmable memory
20080025068 - Reverse bias trim operations in non-volatile memory
20080025076 - Controlled pulse operations in non-volatile memory
20080025077 - Systems for controlled pulse operations in non-volatile memory
20080025078 - Systems for reverse bias trim operations in non-volatile memory
20080019164 - Systems for erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage
20080019173 - System for configuring compensation
20080019174 - Method for configuring compensation
20080019180 - Selective program voltage ramp rates in non-volatile memory
20080019186 - System that compensates for coupling during programming
20080013355 - Selective oxidation of silicon in diode, tft and monolithic three dimensional memory arrays
20080013360 - Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage
20080013374 - Method for programming of multi-state non-volatile memory using smart verify
20080008000 - Reverse coupling effect with timing information
20080001266 - Method of stacking and interconnecting semiconductor packages
20080001303 - Stacked, interconnected semiconductor packages
December 2007 - Vierra Magen/sandisk Corporation patents
20070297226 - Method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
20070297245 - System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
20070297247 - Method for programming non-volatile memory using variable amplitude programming pulses
20070298568 - Scaled dielectric enabled by stack sidewall process
20070291543 - Method for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines
20070291545 - System for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines
20070291546 - Systems for programming differently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory
20070291556 - Programming differently sized margins and sensing with compensations at select states for improved read operations in non-volatile memory
20070291566 - Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates
20070291567 - System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates
20070284727 - Printed circuit board with coextensive electrical connectors and contact pad areas
20070277735 - Systems for atomic layer deposition of oxides using krypton as an ion generating feeding gas
20070279985 - System for verifying non-volatile storage using different voltages
20070279994 - Data pattern sensitivity compensation using different voltage
20070279995 - System for performing data pattern sensitivity compensation using different voltage
20070281082 - Flash heating in atomic layer deposition
20070281105 - Atomic layer deposition of oxides using krypton as an ion generating feeding gas
November 2007 - Vierra Magen/sandisk Corporation patents
20070272913 - Forming nonvolatile phase change memory cell having a reduced thermal contact area
20070267759 - Semiconductor device with a distributed plating pattern
20070269929 - Method of reducing stress on a semiconductor die with a distributed plating pattern
20070262434 - Interconnected ic packages with vertical smt pads
20070257352 - Test pads on flash memory cards
20070252254 - Molded sip package with reinforced solder columns
20070254407 - Method of reducing mechanical stress on a semiconductor die during fabrication
October 2007 - Vierra Magen/sandisk Corporation patents
20070247916 - Systems for variable reading in non-volatile memory
20070242509 - Apparatus for reducing the impact of program disturb during read
20070242510 - Reducing the impact of program disturb during read
20070242522 - Apparatus for reducing the impact of program disturb
20070242524 - Reducing the impact of program disturb
20070235848 - Substrate having conductive traces isolated by laser to allow electrical inspection
September 2007 - Vierra Magen/sandisk Corporation patents
20070226434 - Data recovery in a memory system using tracking cells
20070217259 - Tracking cells for a memory system
20070210444 - Methods of promoting adhesion between transfer molded ic packages and injection molded plastics for creating over-molded memory cards
20070206421 - Read operation for non-volatile storage with compensation for coupling
20070206426 - System for performing read operation on non-volatile storage with compensation for coupling
20070207568 - Sip module with a single sided lid
August 2007 - Vierra Magen/sandisk Corporation patents
20070195602 - Reducing floating gate to floating gate coupling effect
20070187805 - Col-tsop with nonconductive material for reducing package capacitance
20070190722 - Method to form upward pointing p-i-n diodes having large and uniform current
20070184360 - Photomask features with interior nonprinting window using alternating phase shifting
July 2007 - Vierra Magen/sandisk Corporation patents
20070171718 - Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages
20070171719 - Method for programming non-volatile memory with reduced program disturb using modified pass voltages
20070163109 - Strip for integrated circuit packages having a maximized usable area
20070158799 - Interconnected ic packages with vertical smt pads
20070152215 - Test pads on flash memory cards
20070152319 - Hidden plating traces
20070153573 - System for reducing read disturb for non-volatile storage
20070153577 - Systems for alternate row-based reading and writing for non-volatile memory
20070153583 - Alternate row-based reading and writing for non-volatile memory
20070153593 - Systems for continued verification in non-volatile memory write operations
20070153594 - Continued verification in non-volatile memory write operations
20070155046 - Leadframe based flash memory cards
20070155247 - Rounded contact fingers on substrate/pcb for crack prevention
June 2007 - Vierra Magen/sandisk Corporation patents
20070148973 - Fabrication of semiconductor device for flash memory with increased select gate width
20070140006 - Compensating for coupling in non-volatile storage
20070140011 - Reading non-volatile storage with efficient setup
20070140016 - System for reading non-volatile storage with efficient setup
20070141731 - Semiconductor memory with redundant replacement for elements posing future operability concern
20070132066 - Substrate having minimum kerf width
20070133295 - Reducing read disturb for non-volatile storage
20070133297 - Non-volatile memory read operations using compensation currents
20070133298 - Time-dependent compensation currents in non-volatile memory read operations
20070127291 - System for reducing read disturb for non-volatile storage
May 2007 - Vierra Magen/sandisk Corporation patents
20070121383 - Behavior based programming of non-volatile memory
20070108257 - Padless substrate for surface mounted components
20070109849 - Compensating for coupling during read operations of non-volatile memory
20070109850 - Read operation for non-volatile storage that includes compensation for coupling
20070109845 - Compensating for coupling during read operations of non-volatile memory
20070109846 - Read operation for non-volatile storage that includes compensation for coupling
20070103975 - Read operation for non-volatile storage that includes compensation for coupling
20070103979 - Reverse coupling effect with timing information for non-volatile memory
20070103981 - Reverse coupling effect with timing information
20070103982 - Read operation for non-volatile storage that includes compensation for coupling
20070103986 - Compensating for coupling during read operations of non-volatile memory
20070103987 - Read operation for non-volatile storage that includes compensation for coupling
20070105284 - Method for forming a memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
20070105305 - Method to form large grain size polysilicon films by nuclei-induced solid phase crystallization
20070105352 - Uniform seeding to control grain and defect density of crystallized silicon for use in sub-micron thin film transistors
20070096265 - Multiple die integrated circuit package
20070096266 - High density three dimensional semiconductor die package
20070096284 - Methods for a multiple die integrated circuit package
20070096285 - Semiconductor die package including construction for preventing delamination and/or cracking of the semiconductor die
20070097747 - Apparatus for programming of multi-state non-volatile memory using smart verify
20070097749 - Method for programming of multi-state non-volatile memory using smart verify
20070099340 - Method of manufacturing flash memory cards
April 2007 - Vierra Magen/sandisk Corporation patents
20070091685 - Efficient verification for coarse/fine programming of non-volatile memory
20070086247 - Method for controlled programming of non-volatile memory exhibiting bit line coupling
20070086251 - Apparatus for controlled programming of non-volatile memory exhibiting bit line coupling
20070087508 - Method for making a p-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse
February 2007 - Vierra Magen/sandisk Corporation patents
20070025145 - Non-volatile memory cell using high-k material and inter-gate programming
20070025156 - System for programming non-volatile memory with self-adjusting maximum program loop
20070025157 - Method for programming non-volatile memory with self-adjusting maximum program loop
January 2007 - Vierra Magen/sandisk Corporation patents
20070015332 - Non-volatile memory with asymmetrical doping profile
20070001272 - Die package with asymmetric leadframe connection
20070001285 - Apparatus having reduced warpage in an over-molded ic package
20070004094 - Method of reducing warpage in an over-molded ic package
20070004097 - Substrate warpage control and continuous electrical enhancement
December 2006 - Vierra Magen/sandisk Corporation patents
20060285391 - Compensation currents in non-volatile memory read operations
20060279990 - Selective application of program inhibit schemes in non-volatile memory
November 2006 - Vierra Magen/sandisk Corporation patents
20060270105 - Method of assembling semiconductor devices with leds
20060261454 - System-in-a-package based flash memory card
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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Vierra Magen/sandisk Corporation in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Vierra Magen/sandisk Corporation with additional patents listed. Browse our Agent directory for other possible listings.
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