Vertical type nanotube semiconductor device

Title: Vertical type nanotube semiconductor device

Brief Patent Description - Full Patent Description - Patent Claims

The Patent Description & Claims data below is from USPTO Patent Application 20080277646, Vertical type nanotube semiconductor device.

1.-

40. (canceled)

41. An integrated circuit device, comprising: a substrate; and a field effect transistor having a nanotube channel region and a gate electrode surrounding the nanotube channel region, on said substrate.

42. The device of claim 41, wherein the nanotube channel region comprises a material selected from a group consisting of C, ZnO, CdO, In2O3, MgO, Al2O3, AlN, InN, GaN, Si, AlP, InP, GaP, InAs, GaAs, AlAs, InSb, GaSb, ZnSe, ZnS, CdS, CdSe and BiSb.

43. The device of claim 42, wherein the nanotube channel region is doped with a dopant selected from a group consisting of Mg, Zn, Cd, Ti, Li, Cu, Al, Ni, Y, Ag, Mn, V, Fe, La, Ta, Nb, Ga, In, S, Se, P, As, Co, Cr, B, N, Sb and H.

44. The device of claim 41, wherein said field effect transistor further comprises a gate insulating layer extending between the gate electrode and the nanotube channel region.

45. The device of claim 44, wherein the gate insulating layer is an oxide/nitride/oxide (ONO) layer.

46. The device of claim 41, further comprising a capacitor having a nanotube electrode electrically connected to a current carrying terminal of said field effect transistor.

47. The device of claim 46, wherein said capacitor comprises a capacitor dielectric layer covering the nanotube electrode.

48. The device of claim 41, wherein the nanotube channel region has a longitudinal axis that extends orthogonal to a surface of said substrate.

49. The device of claim 41, wherein said field effect transistor comprises a plurality of spaced-apart gate electrodes surrounding the nanotube channel region.

Brief Patent Description - Full Patent Description - Patent Claims

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