All USA states > Minnesota > Rochester patent applications
Rochester, Minnesota, USAPatent applications with an agent or inventor associated with Rochester, Minnesota, USA.
20070188249 - Programmable capacitors and methods of using the same
20070189076 - Memory elements and methods of using the same
20070189108 - Auxiliary water tank and pump assembly for a vehicle
20070189313 - Multi-node architecture with daisy chain communication link configurable to operate in unidirectional and bidirectional modes
20070190740 - Enhanced silicon-on-insulator (soi) transistors and methods of making enhanced soi transistors
20070190920 - Server cooling and exhaust appendage system
20070191746 - Shoulder distraction splint
20070192281 - Methods and apparatus for displaying real-time search trends in graphical search specification and result interfaces
20070192372 - Method and apparatus for projecting the effect of maintaining an auxiliary database structure for use in executing database queries
20070192704 - Method, apparatus and computer program product for port configuration of resources in a virtual topology
20070181128 - Altitude simulation module ii
20070182030 - High-voltage silicon-on-insulator transistors and methods of manufacturing the same
20070182342 - Lcd backlight driver
20070183192 - Memory controller operating in a system with a variable system clock
20070183327 - Method and apparatus for scaling input bandwidth for bandwidth allocation technology
20070184647 - Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes
20070185853 - Security model using security domains in a security model applied to abstract database
20070185997 - Selecting servers based on load-balancing metric instances
20070186012 - Apparatus for reissuing commands requiring access to a bus and methods of using the same
20070186027 - Method and apparatus for implementing control of a multiple ring hybrid crossbar partially non-blocking data switch
20070186046 - Pseudo lru algorithm for hint-locking during software and hardware address translation cache miss handling modes
20070186049 - Self prefetching l2 cache mechanism for instruction lines
20070186050 - Self prefetching l2 cache mechanism for data lines
20070186052 - Methods and apparatus for reducing command processing latency while maintaining coherence
20070186071 - Optimizing data bandwidth across a variable asynchronous clock domain
20070186073 - D-cache miss prediction and scheduling
20070186074 - Multiple page size address translation incorporating page size prediction
20070186080 - Mechanism to minimize unscheduled d-cache miss pipeline stalls
20070186199 - Heuristic clustering of circuit elements in a circuit design
20070186204 - Automatic back annotation of a functional definition of an integrated circuit design based upon physical layout
20070175114 - Wall system
20070175115 - Wall system
20070175150 - Wall system
20070176696 - Programmable oscillators for high frequency clock generation for simulation environments
20070177498 - Method and apparatus for implementing speculative credit flow control
20070177611 - Method, apparatus and computer program product for cell phone security
20070178493 - Alterations in the copy number of the sult1a1 gene
20070178639 - Triple-well cmos devices with increased latch-up immunity and methods of fabricating same
20070179110 - Expression of immunogenic substances
20070179635 - Method and article of manufacure to persistently deconfigure connected elements
20070179733 - Methods and apparatus for testing a link between chips
20070180114 - Methods and apparatus for allocating an object in computer system
20070180155 - Method and apparatus for implementing transfer ordering using hardware linked list
20070180156 - Method for completing io commands after an io translation miss
20070180157 - Method for cache hit under miss collision handling
20070180158 - Method for command list ordering after multiple cache misses
20070180195 - Method and apparatus for allowing uninterrupted address translations while performing address translation cache invalidates and other cache operations
20070180221 - Apparatus and method for handling data cache misses out-of-order for asynchronous pipelines
20070180269 - I/o address translation blocking in a secure system during power-on-reset
20070180288 - Method, system and program for securing redundancy in parallel computing sytem
20070180422 - Generating rules for nets that cross package boundaries
20070170516 - Triple-well cmos devices with increased latch-up immunity and methods of fabricating same
20070170517 - Cmos devices adapted to reduce latchup and methods of manufacturing the same
20070171483 - Method for synchronizing an image data source and a resonant mirror system to generate images
20070172029 - Motion monitor system for use with imaging systems
20070172353 - Amd packaging apparatus for minimal external space, hot plug, and redundant installation
20070173029 - Method for fabricating high performance metal-insulator-metal capacitor (mimcap)
20070173458 - Neo-tryptophan
20070174023 - Methods and apparatus for considering a project environment during defect analysis
20070174212 - Method, system, and computer program product for providing location-specific transaction services
20070174329 - Presenting a reason why a secondary data structure associated with a database needs rebuilding
20070174361 - Automated failover system for logical partitions
20070174493 - Method and apparatus for tracking command order dependencies
20070174556 - Methods and apparatus for reducing command reissue latency
20070174741 - Method and apparatus for implementing persistence and refreshing of validation error messages based upon hierarchical refresh levels
20070174783 - System and method of intelligent window placement for digital video
20070174798 - Method and system for enhanced verification by closely coupling a structural overapproximation algorithm and a structural satisfiability solver
20070174799 - Method and system for performing utilization of traces for incremental refinement in coupling a structural overapproximation algorithm and a satisfiability solver
20070163108 - Apparatus for tool-less removal of pcb assembly
20070163187 - Wall system
20070163188 - Wall system
20070163203 - Wall system
20070164774 - Method and apparatus for detection and prevention of bulk cmos latchup
20070165447 - Asymmetrical random access memory cell, a memory comprising asymmetrical memory cells and a method to operate such a memory
20070165623 - Methods and apparatus for providing communications from a plurality of network devices to a user
20070166890 - Pfets and methods of manufacturing the same
20070168021 - Porous three dimensional nest scaffolding
20070168147 - Acquiring test data from an electronic circuit
20070168373 - Gui component feedback for functional tasks that are qualified by performance or quality
20070168448 - Identifying and displaying relevant shared entities in an instant messaging system
20070168617 - Patrol snooping for higher level cache eviction candidate identification
20070168635 - Apparatus and method for dynamically improving memory affinity of logical partitions
20070168640 - Method for searching a data page for inserting a data record
20070168695 - Method and apparatus for re-utilizing partially failed resources as network resources
20070168741 - Method, system and program product for facilitating debugging of simulation results obtained for an optimized simulation model of a device design having hierarchically-connected components
20070168762 - Method and apparatus for implementing directory organization to selectively optimize performance or reliability
20070168797 - Method, apparatus and computer program product for designing logic scan chains for matching gated portions of a clock tree
20070168809 - Systems and methods for lbist testing using commonly controlled lbist satellites
20070168960 - On demand software contract modification and termination in running component assemblies
20070168968 - Debugger apparatus and method for indicating time-correlated position of threads in a multi-threaded computer program
20070168972 - Debugging a computer program
20070168992 - Method of tracing back the execution path in a debugger
20070168994 - Debugging a computer program in a distributed debugger
20070169002 - Profile-driven lock handling
20070169003 - Selective profiling of program code executing in a runtime environment
20070169050 - Apparatus and method for using database knowledge to optimize a computer program
20070169071 - Dynamic granting of permissions in an object-oriented code base
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The listing of Patent Applications for Rochester, Minnesota, USA is of recent patent applications only. Freshpatents.com tracks patent applications. The applications are submitted to the USPTO for approval, published and eventually approved or denied. This process is completed in anywhere between 1-3 years time by the USPTO, a US goverment agency not affiliated with Freshpatents.com. Notifiy us with any corrections or comments about Rochester, Minnesota, USA patents or the website in general.
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