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  Tracing thermal data via performance monitoringUSPTO Application #: 20070124105Title: Tracing thermal data via performance monitoring Abstract: A computer implemented method, data processing system, and processor are provided for tracing thermal data via performance monitoring. A performance monitor is set into a tracing mode. Temperatures are sensed by a digital thermal sensor over a time period. The sensed temperatures are stored in a data structure and a trace of the sensed temperatures is graphically displayed. (end of abstract) Agent: Ibm Corp (ya) C/o Yee & Associates PC - Dallas, TX, US Inventors: Charles Ray Johns, Michael Fan Wang USPTO Applicaton #: 20070124105 - Class: 702130000 (USPTO) Related Patent Categories: Data Processing: Measuring, Calibrating, Or Testing, Measurement System, Temperature Measuring System The Patent Description & Claims data below is from USPTO Patent Application 20070124105. Brief Patent Description - Full Patent Description - Patent Application Claims
[0001] This application is a continuation-in-part application of U.S. application Ser. No. 11/289,088 filed Nov. 29, 2005. BACKGROUND [0002] 1. Field of the Invention [0003] The present application relates generally to use of thermal management. Still more particularly, the present application relates to a computer implemented method, data processing system, and processor for tracing thermal data via performance monitoring. [0004] 2. Description of the Related Art [0005] The first-generation heterogeneous Cell Broadband Engine.TM. (BE) processor is a multi-core chip comprised of a 64-bit Power PC.RTM. processor core and eight single instruction multiple data (SIMD) synergistic processor cores, capable of massive floating point processing, optimized for compute-intensive workloads and broadband rich media applications. A high-speed memory controller and high-bandwidth bus interface are also integrated on-chip. Cell BE's breakthrough multi-core architecture and ultra high-speed communications capabilities deliver vastly improved, real-time response, in many cases ten times the performance of the latest PC processors. Cell BE is operating system neutral and supports multiple operating systems simultaneously. Applications for this type of processor range from a next generation of game systems with dramatically enhanced realism, to systems that form the hub for digital media and streaming content in the home, to systems used to develop and distribute digital content, and to systems to accelerate visualization and supercomputing applications. [0006] Today's multi-core processors are frequently limited by thermal considerations. Typical solutions include cooling and power management. Cooling may be expensive and/or difficult to package. Power management is generally a coarse action, "throttling" much if not all of the processor in reaction to a thermal limit being reached. Other techniques such as thermal management help address these coarse actions by only throttling the units exceeding a given temperature. However, most thermal management techniques impact the real-time guarantees of an application. Therefore, it would be beneficial to provide a thermal management solution which provides a processor with a method to guarantee the real-time nature of an application even in the event of a thermal condition which requires throttling of the processor. In the cases where the real-time guarantees can not be met, the application administrator is notified so that a corrective action can be implemented. SUMMARY [0007] The different aspects of the illustrative embodiments provide a computer implemented method, data processing system, and processor for tracing thermal data via performance monitoring. The illustrative embodiments set a performance monitor into a tracing mode. The illustrative embodiments sensing, using a digital thermal sensor, temperatures over a time period. The illustrative embodiments store the sensed temperatures in a data structure and graphically display a trace of the sensed temperatures. BRIEF DESCRIPTION OF THE DRAWINGS [0008] The novel features believed characteristic of the illustrative embodiments are set forth in the appended claims. The illustrative embodiments themselves, however, as well as a preferred mode of use, further objectives and advantages thereof, will best be understood by reference to the following detailed description of the illustrative embodiments when read in conjunction with the accompanying drawings, wherein: [0009] FIG. 1 depicts a pictorial representation of a network of data processing systems in which aspects of the illustrative embodiments may be implemented; [0010] FIG. 2 depicts a block diagram of a data processing system is shown in which aspects of the illustrative embodiments may be implemented; [0011] FIG. 3 depicts an exemplary diagram of a Cell BE chip in which aspects of the illustrative embodiments may be implemented; [0012] FIG. 4 illustrates an exemplary thermal management system in accordance with an illustrative embodiment; [0013] FIG. 5 depicts a graph of temperature and the various points at which interrupts and dynamic throttling may occur in accordance with an illustrative embodiment; [0014] FIG. 6 depicts a flow diagram of the operation for logging maximal temperature in accordance with an illustrative embodiment; [0015] FIG. 7 depicts a flow diagram of the operation for tracing thermal data via performance monitoring in accordance with another illustrative embodiment; [0016] FIGS. 8A and 8B depict flow diagrams of the operation for advanced thermal interrupt generation in accordance with an additional illustrative embodiment; [0017] FIG. 9 depicts a flow diagram of the operation for support of deep power savings mode and partial good in a thermal management system in accordance with an additional illustrative embodiment; [0018] FIG. 10 depicts a flow diagram of the operation for a thermal throttle control feature which enables real-time testing of thermal aware software applications independent of temperature in accordance with an additional illustrative embodiment; [0019] FIG. 11 depicts a flow diagram of the operation for an implementation of thermal throttle control with minimal impact to interrupt latency in accordance with an additional illustrative embodiment; [0020] FIG. 12 depicts a flow diagram of the operation for hysteresis in thermal throttling in accordance with an additional illustrative embodiment; and [0021] FIG. 13 depicts a flow diagram of the operation of an implementation of thermal throttling logic in accordance with an additional illustrative embodiment. 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