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  Topography compensating land grid array interposerUSPTO Application #: 20070054512Title: Topography compensating land grid array interposer Abstract: LGA connectors are fabricated with buttons or spring contacts preformed to different heights to accommodate the initial topography of a typical module or PCB of a particular product type. This is accomplished during fabrication by measuring topographies of mating surfaces of a first electronic device and of a second electronic device; fabricating interposer contacts to form opposing non-planar sides having respective inverse topographies for contacting the mating surfaces; and sandwiching the interposer between the first and second electronic devices with the opposing sides in contact with respective mating serfaces. For those LGA types made by molding techniques such as the metal-in-polymer type (eg. Tyco Electronics MPI, or Shin Etsu RP) or the Metal-on-Elastomer type (IBM), using molds with the desired topography provides the desired LGA topography. For those LGAs made of metal springs, cantilevers, armatures and the like, the desired topography is imposed by shaping of the buttons during or after fabrication using a sizing die with the desired topography. (end of abstract) Agent: Shelley M. Beckstrand, Esq. P.c. Patent Attorney - Woodlawn, VA, US Inventors: Gareth G. Hougham, Brian S. Beaman, John S. Corbin, Paul Coteus, Shawn A. Hall, Kathleen C. Hinge, Theron L. Lewis, Frank R. Libsch, Amanda E. E. Mikhail USPTO Applicaton #: 20070054512 - Class: 439066000 (USPTO) Related Patent Categories: Electrical Connectors, Preformed Panel Circuit Arrangement, E.g., Pcb, Icm, Dip, Chip, Wafer, Etc., With Provision To Conduct Electricity From Panel Circuit To Another Panel Circuit, Conductor Is Compressible And To Be Sandwiched Between Panel Circuits The Patent Description & Claims data below is from USPTO Patent Application 20070054512. Brief Patent Description - Full Patent Description - Patent Application Claims
RELATED APPLICATIONS [0001] This application claims priority under 35 U.S.C. .sctn.119(e) as a non-provisional application of related provisional U.S. patent application Ser. No. 60/715,236, filed 8 Sep. 2005, entitled "Topography Compensating LGA". [0002] U.S. patent application Ser. No. 10/______, entitled "Performance Optimized Heterogeneous Contact Array", assignee docket number ROC920040246US1, filed concurrently herewith is assigned to the same assignee hereof and contains subject matter related, in certain respect, to the subject matter of the present application. [0003] The above-identified patent applications are incorporated herein by reference. TECHNICAL FIELD OF THE INVENTION [0005] This invention relates to circuit interconnections. More particularly, it relates to Land Grid Array interposers (LGA) for connecting modules to substrates in electronic packages. BACKGROUND ART [0006] Land Grid Array interposers (LGA) are an important class of area-array socket connectors used to reversibly connect a chip module to a printed circuit board (PCB, PWB). They consist of a two-dimensional array of contacts, each of which spans from one side of an insulating carrier plane to the other, is compliant and conducts electricity from one extreme end point on the contact to the other extreme. LGAs are typically held under force sandwiched between a chip module and a printed wiring board. The force is typically provided by an external spring and hardware system. [0007] While offering many advantages, LGAs do suffer from some problems, notably, a wide distribution of forces across the array resulting from non-planar mating surfaces of the module bottom and/or the PCB top. This can lead to unreliable electrical performance. This mating surface nonuniformity may stem from inherent warp in the PCB or chip module, dynamic bending under the applied load, non-uniformity in the applied load, or any combination of these factors. [0008] LGA contacts are made to be compliant in order to accommodate some mating surface nonuniformity. Nonetheless, an unfavorable distribution of button forces is found in practice. This becomes worse as the size of the array becomes larger, with smaller applied forces, and with decreased rigidity and planarity of the module and PCB materials. This is particularly problematic in organic packaging modules of the SLC type which suffer from poor initial planarity, low rigidity, and is limited to the use of low applied force to minimize internal damage to module circuitry. SUMMARY OF THE INVENTION [0009] In accordance with a first aspect of the invention, an array of electrical contacts for connecting to an electronic device includes a contact having a height substantially equal to a z-dimension at a corresponding xy position on the electronic device to which it will be mating, the z-dimension being substantially equal to a deviation from planarity at that position determined with respect to a plurality of electronic electronic devices. [0010] In accordance with a further aspect of the invention, a land grid array interposer (LGA) for interconnecting mating parts of two electronic devices includes a first side of the interposer having an array of contacts of varying heights substantially equal to a dimensions corresponding to deviations from planarity of a first mating part of one type; and a second, opposing side of the interposer having has an array of contacts of varying heights substantially equal to a dimension corresponding to deviations from planarity of a second mating part of a second type. [0011] In accordance with a further aspect of the invention, a method for making an LGA interposer includes steps for measuring topographies of mating surfaces of a first electronic device and of a second electronic device; fabricating interposer contacts to form opposing non-planar sides having respective inverse topographies for contacting the mating surfaces; and sandwiching the interposer between the first and second electronic devices with the opposing sides in contact with respective mating serfaces. [0012] In accordance with a further aspect of the invention a method for manufacturing a topographically sculptured LGA interposer for use with multichip modules comprises measuring an average topography of a module I/O surface; building and applying to the module an LGA interposer having a topography that is the inverse of the average topography; actuating to mate the module I/O surface and the LGA interposer. BRIEF DESCRIPTION OF THE FIGURES [0013] FIG. 1 is an isometric topographic view of the bottom surface of a lidded organic (SLC) single chip module showing the characteristic shape of the mating surface for LGA connection to this array of I/O, with the z-scale exaggerated for illustration. [0014] FIG. 2 is an isometric view of the same assembly as FIG. 1 but at different z-scale. The z-dimension is still exaggerated for illustration. [0015] FIG. 3 is an isometric topographic view of the top surface of a printed circuit board (PCB). This shows a characteristic shape of the mating surface for LGA connection to this array of input/output pads (I/O). [0016] FIG. 4 is an exploded isometric view showing a standard planar land grid array interposer (LGA) between a lidded organic module and a printed circuit board before to this array of input/output pads (I/O). [0017] FIG. 5 is an isometric view of the same components as FIG. 4 but after actuation where parts are brought into contact. This illustrates that upon first contact the high points of the module above and the PCB below (points of greatest positive relief) will touch the LGA first, leaving gaps where the LGA is not touching the module and board. To force all I/O to make electrical contact with the associated LGA button, the stack must be compressed to an extent exceeding the gap dimension. This leads at best to an uneven distribution of forces among the LGA contacts and at worst poor contact among those least compressed. It could also lead to those that are most compressed being over stressed resulting in reliability concerns. [0018] FIG. 6 is an exploded isometric view of one embodiment of the invention, and showing an LGA array with an initial topography that mimics that of the module mating surface and separately the PCB mating surface. [0019] FIG. 7 is an isometric view showing the same components as FIG. 6, but after actuation where parts are brought into contact. Upon first contact, all LGA buttons touch the module and PCB I/O connections leaving no, or only minimal gaps. Slight compression beyond this first contact will ensure good electrical contact and will result in an even distribution of forces across LGA. [0020] FIG. 8 shows the topography of a typical lidded organic (SLC) module above a topography representing an idealized upper half of an LGA that has been made to have an initial topography that is the inverse of the modules' mating surface topography. This is to insure that when brought together they will mate with minimal gaps and minimal force non-uniformities. Continue reading... Full patent description for Topography compensating land grid array interposer Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Topography compensating land grid array interposer patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Topography compensating land grid array interposer or other areas of interest. ### Previous Patent Application: Methods of fabricating and using shaped springs Next Patent Application: Socket measurement apparatus and method Industry Class: Electrical connectors ### FreshPatents.com Support Thank you for viewing the Topography compensating land grid array interposer patent info. IP-related news and info Results in 4.48508 seconds Other interesting Feshpatents.com categories: Qualcomm , Schering-Plough , Schlumberger , Seagate , Siemens , Texas Instruments , |
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