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Tomohito Tsushima patents

Recent bibliographic sampling of Tomohito Tsushima patents listed/published in the public domain by the USPTO (USPTO Patent Application #,Title):



09/18/14 - 20140268975 - Integrated circuit system with non-volatile memory stress suppression and method of manufacture thereof
An integrated circuit system, and a method of manufacture thereof, including: an integrated circuit die; a non-volatile memory cell in the integrated circuit die and having a bit line for reading a data condition state of the non-volatile memory cell; and a voltage clamp in the integrated circuit die, the...
Inventors: Makoto Kitagawa, Tomohito Tsushima, Wataru Otsuka, Takafumi Kunihiro (Sony Corporation)

08/14/14 - 20140226390 - Non-volatile memory system with reset control mechanism and method of operation thereof
A method of operation of a non-volatile memory system includes: providing a control field effect transistor having a source electrode and a body-tie electrode; coupling a resistive storage element to the source electrode; and opening a well switch coupled to the body-tie electrode for increasing a well voltage and resetting...
Inventors: Makoto Kitagawa, Wataru Otsuka, Jun Sumino, Takafumi Kunihiro, Tomohito Tsushima (Sony Corporation)

06/26/14 - 20140177317 - Non-volatile memory system with power reduction mechanism and method of operation thereof
A method of operation of a non-volatile memory system including: providing a resistive storage element having a transformation layer; activating a write driver, coupled to the resistive storage element, for applying a bias voltage to the transformation layer; monitoring a resistance of the resistive storage element by a sense amplifier;...
Inventors: Makoto Kitagawa, Tomohito Tsushima, Takafumi Kunihiro, Jun Sumino, Wataru Otsuka (Kabushiki Kaisha Toshiba)

06/26/14 - 20140177316 - Non-volatile memory system with reset verification mechanism and method of operation thereof
A method of operation of a non-volatile memory system includes: providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through...
Inventors: Wataru Otsuka, Jun Sumino, Tomohito Tsushima, Makoto Kitagawa, Takafumi Kunihiro (Kabushiki Kaisha Toshiba)

01/23/14 - 20140022833 - Storage apparatus and operation method for operating the same
A storage apparatus includes: a plurality of storage elements configured to have the resistance state thereof changed in accordance with an applied voltage; and a drive portion configured to perform a resistance change operation and a read operation, the resistance change operation involving writing or erasing information to or from...
Inventors: Makoto Kitagawa, Tsunenori Shiimoto, Tomohito Tsushima (Sony Corporation)

08/30/12 - 20120218809 - Storage apparatus and operation method for operating the same
A storage apparatus includes: a plurality of storage elements configured to have the resistance state thereof changed in accordance with an applied voltage; and a drive portion configured to perform a resistance change operation and a read operation, the resistance change operation involving writing or erasing information to or from...
Inventors: Makoto Kitagawa, Tsunenori Shiimoto, Tomohito Tsushima (Sony Corporation)

08/23/12 - 20120212994 - Memory apparatus
A memory apparatus includes: a plurality of memory cells which includes a first resistance change element; and a read-out circuit which determines the size of a resistance value of the first resistance change element by comparing the resistance state of a memory cell selected among the plurality of memory cells...
Inventors: Tomohito Tsushima, Makoto Kitagawa, Tsunenori Shiimoto, Chieko Nakashima, Hiroshi Yoshihara, Kentaro Ogata (Sony Corporation)

03/22/12 - 20120069631 - Memory element and memory device
A memory device of a resistance variation type, in which data retaining characteristic at the time of writing is improved, is provided. The memory device includes: a plurality of memory elements in which a memory layer is provided between a first electrode and a second electrode so that data is...
Inventors: Shuichiro Yasuda, Tomohito Tsushima, Satoshi Sasaki, Katsuhisa Aratani (Sony Corporation)

08/18/11 - 20110199812 - Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes: a memory element in which a rate of charge discharge between two electrodes of the memory element differs according to a logical value of stored information; cell wiring connected to one electrode of the memory element; a sense amplifier having a sense node connected...
Inventors: Makoto Kitagawa, Tsunenori Shiimoto, Tomohito Tsushima (Sony Corporation)

06/23/11 - 20110149635 - Storage device and information rerecording method
A storage device capable of decreasing the number of voltages necessitating control and decreasing peripheral circuit size is provided. A first pulse voltage (VBLR) is supplied from a first power source through a bit line BLR to an electrode of a variable resistive element. A second pulse voltage (VWL) for...
Inventors: Tsunenori Shiimoto, Tomohito Tsushima, Shuichiro Yasuda (Sony Corporation)

02/03/11 - 20110026298 - Method of driving storage device
Provided is a method of driving a storage device capable of improving reliability of data write in the storage device including a variable resistance element. At the time of data write operation, a plurality of write pulses having shapes different from each other are applied between electrodes 21 and 24...
Inventors: Tsunenori Shiimoto, Nobumichi Okazaki, Tomohito Tsushima (Sony Corporation)

08/05/10 - 20100195370 - Nonvolatile semiconductor memory device and method for performing verify write operation on the same
Disclosed herein is a nonvolatile semiconductor memory device including a plurality of memory cells; and a driver circuit configured to perform a verify write operation in a cycle including selecting from an array of the plurality of memory cells a predetermined number of memory cells constituting a write cell unit,...
Inventors: Inventors: Tomohito Tsushima, Tsunenori Shiimoto, Shuichiro YasudaTomohito Tsushima, Tsunenori Shiimoto, Shuichiro Yasuda, Tsunenori Shiimoto, Makoto Kitagawa, Tomohito Tsushima (Sony Corporation)

07/09/09 - 20090173930 - Memory element and memory device
A memory device of a resistance variation type, in which data retaining characteristic at the time of writing is improved, is provided. The memory device includes: a plurality of memory elements in which a memory layer is provided between a first electrode and a second electrode so that data is...
Inventors: Shuichiro Yasuda, Tomohito Tsushima, Satoshi Sasaki, Katsuhisa Aratani (Sony Corporation)

Sony Corporation, Kabushiki Kaisha Toshiba

Archived*
(*May have duplicates - we are upgrading our archive.)

20120218809 - Storage apparatus and operation method for operating the same


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The bibliographic references displayed about Tomohito Tsushima's patents are for a recent sample of Tomohito Tsushima's publicly published patent applications. The inventor/author may have additional bibliographic citations listed at the USPTO.gov. FreshPatents.com is not associated or affiliated in any way with the author/inventor or the United States Patent/Trademark Office but is providing this non-comprehensive sample listing for educational and research purposes using public bibliographic data published and disseminated from the United States Patent/Trademark Office public datafeed. This information is also available for free on the USPTO.gov website. If Tomohito Tsushima filed recent patent applications under another name, spelling or location then those applications could be listed on an alternate page. If no bibliographic references are listed here, it is possible there are no recent filings or there is a technical issue with the listing--in that case, we recommend doing a search on the USPTO.gov website.

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