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  Terahertz interconnect system and applicationsUSPTO Application #: 20060038168Title: Terahertz interconnect system and applications Abstract: An assembly includes a first electrical circuitry for providing a first electrical signal containing data and a transmitting arrangement, connected with the first electrical circuitry, for receiving the first electrical signal and for converting the first electrical signal into an electromagnetic signal containing at least a portion of the data. The electromagnetic signal has a carrier frequency greater than 300 GHz. The assembly also includes a receiving arrangement for receiving the electromagnetic signal and for converting the electromagnetic signal into a second electrical signal containing at least some of the portion of the data, and a second electrical circuitry connected with the receiving arrangement and configured for receiving the second electrical signal. (end of abstract) Agent: Pritzkau Patent Group, LLC - Boulder, CO, US Inventors: Michael J. Estes, Garret Moddel USPTO Applicaton #: 20060038168 - Class: 257025000 (USPTO) Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Thin Active Physical Layer Which Is (1) An Active Potential Well Layer Thin Enough To Establish Discrete Quantum Energy Levels Or (2) An Active Barrier Layer Thin Enough To Permit Quantum Mechanical Tunneling Or (3) An Active Layer Thin Enough To Permit Carrier Transmission With Substantially No Scattering (e.g., Superlattice Quantum Well, Or Ballistic Transport Device), Heterojunction, Quantum Well, Employing Resonant Tunneling The Patent Description & Claims data below is from USPTO Patent Application 20060038168. Brief Patent Description - Full Patent Description - Patent Application Claims
RELATED APPLICATION [0001] The present application is a continuation of copending application Ser. No. 10/462,491, filed on Jun. 14, 2001; which is a continuation-in-part application Ser. No. 10/337,427, filed on Jan. 6, 2003; which is a continuation-in-part of applications 1) Ser. No. 09/860,988, filed May 21, 2001 and issued as U.S. Pat. No. 6,534,784, 2) Ser. No. 09/860,972, filed May 21, 2001 and issued as U.S. Pat. No. 6,564,185, 3) Ser. No. 10/103,054, filed on Mar. 20, 2002, and 4) Ser. No. 10/140,535, filed May 6, 2002. All of the aforementioned patent applications and patents are incorporated herein by reference in their entirety. BACKGROUND OF THE INVENTION [0002] The present invention relates generally to electronic devices. More particularly, the present invention relates to interconnection of electronic devices at carrier frequencies in a range from a few gigahertz to several hundreds of terahertz, and more specifically to terahertz interconnection of electronic devices. [0003] Increased amounts and speed of data transfer in communication and computing systems pose a challenge to the current state of device technology. Large quantities of information must be transferred quickly across distances ranging from very short distances, from between chips as well as between boards containing chips, to longer distances between racks of devices, very short reach (VSR)/optical Ethernet and beyond. Even with the development of high-speed communications switches and routers, the data must be taken in and out of such high-speed devices at compatibly high rates in order for the entire system to function efficiently. [0004] Radio frequency (RF) inter-chip and intra-chip connections have been developed as a possible way of transferring data within and between chips. However, RF interconnects use large antennae and/or waveguides on or connected to chips, thus requiring valuable on-chip and device "real estate." RF interconnects are limited in data transfer speed due to the use of radio frequencies. Furthermore, It is submitted that the design and manufacture of such RF lines for high signal frequencies is an expensive part of prior art RF interconnection design. [0005] Other researchers have suggested the use of optical signals as an alternative to electrical signals in providing inter- and intra-chip connections..sup.1 For instance, parallel fiber-optic interconnects which are edge-connected to semiconductor devices have been developed for use within systems with a large number of electronic components (e.g., computers)..sup.2 Although optical interconnect technology promises the possibility of higher rate data transfer than electrical interconnects, optical interconnect technology, as heretofore suggested, is still cost prohibitive in comparison. There is potentially a huge market for high speed interconnect arrangements because all desktop computers and local area networks would benefit from the use of high speed interconnects between components on chips, between chips, etc. [0006] Currently, electrical interconnects are generally used in communication and computing systems for power and data signal distribution, such as in bus lines, etc. Electrical interconnects, however, require hardwired connections such as, for example, lithographed lead lines on a chip, wire bonds from the chip to a chip package, pins leading from inside the package to a circuit board, printed circuit board wiring, edge connectors from circuit board to other boards, input/output (I/O) devices, data storage devices, and others. Such hardwired connections add parasitic capacitance, inductance, and resistance, which seriously degrade data transmission at high data bandwidths. Thus, the cost and performance limitations of electrical interconnects are compounded as circuits are made to operate at increasingly high frequencies. At high frequencies, electrical interconnects are limited in connection distance and require large amounts of power as well as signal reconditioning. Applicants submit that there are at least two issues contributing to this problem. First issue is the relative change in material properties, such as refractive index and electromagnetic radiation propagation speed, over the bandwidth of the signal. A second, and perhaps more significant, issue is the relative difference in wavelength over the bandwidth of the signal. For example, if the signal bandwidth is centered at zero frequency (i.e., DC), then the wavelength of different signal components may range from infinity (for the DC components) to, for instance, centimeters for components at tens of gigahertz. This enormous range in wavelength makes it difficult to design electrical transmission paths which will work efficiently over the entire bandwidth range. [0007] In addition to the aforementioned RF inter- and intra-chip interconnects, other wireless interconnects at other frequencies have also been suggested. For example, wireless data communications link between circuit components using GaAs-based MIMIC transmit/receive integrated circuit devices, operating at high-bandwidth millimeter-wave frequencies, coupled to corresponding circuit components, such as digital processing units (or CPUs) have been disclosed by Metze in U.S. Pat. No. 5,754,948 (hereinafter, Metze). It is submitted, however, that GaAs-based MIMICs are complex devices which require expensive epitaxial growth techniques in the fabrication. Applicants submit that epitaxial growth techniques are expensive and severely limit the integration of devices with different epitaxial layer structures. Also, the disclosure of Metze is confined to millimeter-wave frequencies; specifically, the transmit/receive circuit of Metze is described as preferably operating: [0008] at frequency ranges above 35 GHz, and most preferably at frequencies between 60 GHz and 94 GHz . . . other frequencies may be utilized and still fall within the standard I.E.E.E. definition of "millimeter-wave" for purposes of this invention. (Metze, column 5 lines 25-32) [0009] Regarding the "standard I.E.E.E. definition of `millimeter-wave"` as referred to by Metze, according to the IEEE Virtual Museum website, the millimeter wave region is generally considered to correspond to 30 GHz to 300 GHz..sup.3 [0010] As another example of wireless interconnects, in U.S. Pat. No. 5,056,111, Duling, III, et al. (hereinafter Duling) discloses a communication system for transmitting and receiving terahertz signals, which involves the generation of sub-picosecond (i.e., terahertz) pulses for transmission of data. However, Applicants submit that ultrashort pulse generation, such as that disclosed in Duling, require complex systems such as femtosecond lasers that are impractical to use as a replacement for local electrical interconnects. As will be described at appropriate points below, the present invention recognizes certain problems with both the electrical interconnects and wireless interconnection schemes which are thought to be unresolved by the prior art. [0011] As will be seen hereinafter, the present invention provides a significant improvement over the prior art as discussed above by virtue of its ability to provide the increased performance while, at the same time, having significant advantages in its manufacturability. This assertion is true for electromagnetic devices generally, which take advantage of the present invention, as well as data communication and computing devices in particular. SUMMARY OF THE INVENTION [0012] As will be described in more detail hereinafter, there is disclosed herein an integrated circuit chip including a formation of integrated layers. The integrated layers are configured so as to define at least one integrated electronic component as well as an integrated electron tunneling device. The integrated electron tunneling device includes first and second non-insulating layers spaced apart from one another such that a given voltage can be provided across the first and second non-insulating layers. The integrated electron tunneling device further includes an arrangement disposed between the first and second non-insulating layers and configured to serve as a transport of electrons between and to the first and second non-insulating layers. The arrangement includes at least a first layer configured such that the transport of electrons includes, at least in part, transport by means of tunneling. The integrated electron tunneling device further includes an antenna structure connected with the first and second non-insulating layers, and the integrated electron tunneling device is electrically connected with the integrated electronic component. [0013] In one aspect of the invention, a method for fabricating an integrated circuit chip is disclosed. The method includes forming a plurality of integrated layers, where the forming step includes the steps of defining at least one integrated electronic component and defining an integrated electron tunneling device. The integrated electron tunneling device includes first and second non-insulating layers spaced apart from one another such that a given voltage can be provided across the first and second non-insulating layers. The integrated electron tunneling device further includes an arrangement disposed between the first and second non-insulating layers and configured to serve as a transport of electrons between and to the first and second non-insulating layers. The arrangement includes at least a first layer configured such that the transport of electrons includes, at least in part, transport by means of tunneling. The integrated electron tunneling device further includes an antenna structure connected with the first and second non-insulating layers. The method further includes electrically connecting the integrated electron tunneling device with the integrated electronic component. [0014] In another aspect of the invention, an integrated circuit chip includes a formation of integrated layers, which integrated layers are configured so as to define at least one integrated electronic component. The integrated circuit chip also includes an electron tunneling device including first and second non-insulating layers spaced apart from one another such that a given voltage can be provided across the first and second non-insulating layers. The electron tunneling device further includes an arrangement disposed between the first and second non-insulating layers and configured to serve as a transport of electrons between and to the first and second non-insulating layers. The arrangement includes at least a first layer configured such that the transport of electrons includes, at least in part, transport by means of tunneling. The electron tunneling device further includes an antenna structure connected with the first and second non-insulating layers, and the electron tunneling device is formed on top of and separately from the formation of integrated layers without interference with an intended function of the integrated electronic component and its spatial location while being electrically connected with the integrated electronic component. [0015] In still another aspect of the invention, an integrated circuit chip includes a formation of integrated layers, which formation of integrated layers is configured to define at least one integrated electronic component and is further configured to define an integrated optoelectronic device having an antenna. The antenna is configured to receive an optical signal. The integrated optoelectronic device is electrically connected with the integrated electronic component. [0016] In yet another aspect of the invention, an integrated circuit chip includes a formation of integrated layers defining at least one integrated electronic component. The integrated circuit chip also includes an optoelectronic device having an antenna, which antenna is configured to receive an optical signal incident thereon. The optoelectronic device is formed on top of and separately from the formation of integrated layers without interference with an intended function of the integrated electronic component and its spatial location while being electrically connected with the integrated electronic component. In an alternative embodiment, the optoelectronic device is configured to provide an optical signal while the antenna is configured instead to transmit the optical signal. [0017] In a further aspect of the invention, an integrated circuit chip includes at least one substrate and circuitry formed on the substrate, which circuitry includes at least first and second integrated electronic components. The integrated circuit chip also includes a first optoelectronic device for providing an optical signal. The first optoelectronic device includes a first antenna, which first antenna is configured to emit the optical signal, and the first optoelectronic device is supported on the substrate while being electrically connected with the first integrated electronic component. The integrated circuit chip further includes a second optoelectronic device. The second optoelectronic device includes a second antenna, which second antenna is configured to receive the optical signal from the first antenna such that first and second optoelectronic devices are in optical communication with one another, while the second optoelectronic device is also supported on the substrate and is electrically connected with the second integrated electronic component. [0018] In a still further aspect of the invention, an integrated circuit assembly includes first and second substrates. First circuitry, including at least a first integrated electronic component, is formed on the first substrate, and second circuitry, including at least a second integrated electronic component, is formed on the second substrate. The integrated circuit assembly also includes a first optoelectronic device for providing an optical signal. The first optoelectronic device includes a first antenna, which is configured to emit the optical signal, and is supported on the first substrate while being electrically connected with the first integrated electronic component. The integrated circuit assembly further includes a second optoelectronic device including a second antenna. The second optoelectronic device is supported on the second substrate and is electrically connected with the second integrated electronic component. The second antenna is configured to receive the optical signal from the first antenna such that the first and second optoelectronic devices are in optical communication with one another. [0019] In another aspect of the invention, an assembly includes an optoelectronic system, in which an optical signal is present and which includes at least one optoelectronic device configured to act on the optical signal. The assembly also includes an electron tunneling device also configured to act on the optical signal. The electron tunneling device includes first and second non-insulating layers, which are spaced apart from one another such that a given voltage can be provided across the first and second non-insulating layers, and an arrangement disposed between the first and second non-insulating layers, which arrangement is configured serve as a transport of electrons between and to the first and second non-insulating layers. The arrangement includes a first amorphous layer configured such that using only the first amorphous layer in the arrangement would result in a given value of nonlinearity in the transport of electrons, with respect to the given voltage. The arrangement also includes a different, second layer disposed directly adjacent to and configured to cooperate with the first amorphous layer such that the transport of electrons includes, at least in part, transport by means of tunneling through the first amorphous layer and the second layer, and such that the nonlinearity, with respect to the given voltage, is increased over and above the given value of nonlinearity by the inclusion of the second layer without the necessity for any additional layer. The assembly further includes an optical configuration cooperating with the electron tunneling device and with the optoelectronic device such that the optical signal is transmitted therebetween. [0020] In a still another aspect of the invention, a device includes a waveguide, which waveguide in turn includes an optical input port. The optical input port is configured for receiving an input light. The waveguide also includes an optical output port and is configured for directing the input light from the optical input port toward the optical output port. The device also includes an optoelectronic assembly, which includes an electron tunneling device. The electron tunneling device includes first and second non-insulating layers, which are spaced apart from one another such that a given voltage can be provided thereacross, and an arrangement disposed between the first and second non-insulating layers and configured to serve as a transport of electrons between and to the first and second non-insulating layers. The arrangement includes at least a first layer configured such that the transport of electrons includes, at least in part, transport by means of tunneling. The optoelectronic assembly also includes a coupling arrangement configured to cooperate with the electron tunneling device and the waveguide for coupling at least a portion of the input light from the waveguide into the electron tunneling device. [0021] In yet another aspect of the invention, an arrangement includes an optical waveguide with an optical input port, which optical input port is configured for receiving an input light, and an optical output port. The optical waveguide is configured for directing the input light from the optical input port toward the optical output port. The arrangement further includes an optoelectronic assembly with a surface plasmon device, which is configured to act on an input signal. The surface plasmon device includes a device input port, which is configured to receive the input signal, a device output port and a structure including a tunneling junction connected with the device input port and the device output port. The tunneling junction is configured in a way (i) which provides electrons in a particular energy state within the structure, (ii) which produces surface plasmons in response to the input signal, (iii) which causes the structure to act as a surface plasmon waveguide for directing at least a portion of the surface plasmons along a predetermined path toward the device output port such that the surface plasmons so directed interact with the electrons in a particular way, and (iv) which produces at the device output port an output signal resulting from the particular interaction between the electrons and the surface plasmons. The optoelectronic assembly further includes a coupling arrangement, which is configured to cooperate with the surface plasmon device and the optical waveguide for coupling at least a portion of the input light from the waveguide into the surface plasmon device as the input signal. [0022] In a further aspect of the invention, an integrated circuit chip includes a substrate and a formation of integrated layers supported on the substrate, which integrated layers are configured so as to define at least one integrated electronic component. The integrated circuit chip also includes an optical waveguide, which is also supported on the substrate and includes an optical input port configured for receiving an input light including a clock signal encoded thereon. The integrated circuit chip further includes at least one optoelectronic assembly electrically connected with the integrated electronic component and including an electron tunneling device. The electron tunneling device includes first and second non-insulating layers spaced apart from one another such that a given voltage can be provided thereacross. The electron tunneling device also includes an arrangement disposed between the first and second non-insulating layers and configured to serve as a transport of electrons between and to the first and second non-insulting layers. The arrangement includes at least a first layer configured such that the transport of electrons includes, at least in part, transport by means of tunneling. The optoelectronic assembly also includes a coupling arrangement configured to cooperate with the electron tunneling device and the optical waveguide for coupling at least a portion of the input light including the clock signal from the waveguide into the electron tunneling device. The electron tunneling device is configured to (i) receive the portion of the input light, (ii) produce an electric signal and (iii) transmit the electric signal toward the integrated electronic component electrically connected with the optoelectronic assembly for use by the integrated electronic component. Continue reading... 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