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  Technique for manufacturing silicon structuresUSPTO Application #: 20060240583Title: Technique for manufacturing silicon structures Abstract: A technique for manufacturing silicon structures includes etching a cavity into a first side of an epitaxial wafer. A thickness of an epitaxial layer is selected, based on a desired depth of the etched cavity and a desired membrane thickness. The first side of the epitaxial wafer is then bonded to a first side of a handle wafer. After thinning the epitaxial wafer until only the epitaxial layer remains, desired circuitry is formed on a second side of the remaining epitaxial layer, which is opposite the first side of the epitaxial wafer. (end of abstract) Agent: Delphi Technologies, Inc. - Troy, MI, US Inventors: William J. Baney, Dan W. Chilcott USPTO Applicaton #: 20060240583 - Class: 438022000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, Making Device Or Circuit Emissive Of Nonelectrical Signal The Patent Description & Claims data below is from USPTO Patent Application 20060240583. Brief Patent Description - Full Patent Description - Patent Application Claims
TECHNICAL FIELD [0001] The present invention is generally directed to silicon structures and, more specifically, to a technique for manufacturing silicon structures. BACKGROUND OF THE INVENTION [0002] A variety of techniques have been utilized to manufacture silicon micro-electro mechanical (MEM) structures, which are now utilized in a variety of applications to perform a number of functions. For example, MEM structures have been utilized in pressure sensors that are currently employed in many automotive and consumer products. A common technique for manufacturing silicon pressure sensors has involved forming sense elements on top of a silicon wafer and wet etching through a back side of the wafer (to an etch stop layer) to create a thin silicon membrane, under the sense elements. The sense elements, e.g., piezoresistive or capacitive implants, are implemented to sense a deflection of the membrane. In a typical process, the wet etch leaves a 125.3 degree angled sidewall at the edge of the membrane. [0003] The wafer is then bonded to a second substrate, e.g., a glass plate, to isolate the membrane from stresses, e.g., packaging stresses. The second substrate is either solid (for absolute pressure sensing) or has been pre-drilled with a hole placed under the membrane (for differential pressure sensing). While this technique has proven relatively successful, the area of the sensor has been larger than electrically necessary, due to the constraints imposed by the wet etch, which follows the crystalline planes of the silicon and typically provides a membrane having a diameter of about 500-1500 microns. While a dry backside etch could be utilized to etch all of the crystalline planes equally and, thereby, reduce sensor area, there are currently no reliable etch stops that adequately maintain membrane thickness for current dry etch processes. [0004] Another technique that has been implemented, to get around size limitations of the backside cavity process for forming pressure sensors, has first formed a cavity in the top side of a first wafer, i.e., used a cavity-on-top process, to form the sensor. In this process, a second wafer (with an epitaxial layer having the thickness of the desired membrane) is then bonded to the first wafer. After bonding the wafers, the second wafer is thinned leaving the epitaxial silicon layer, which forms the membrane over the cavity in the first wafer. While this process reduces the size of the membrane, an angle at the membrane interface is only approximately 54.7 degrees. As such, sensors made with this process have a less robust membrane, as the membrane is not as well supported as a sensor made with the backside cavity process. Furthermore, while the cavity-on-top version of the sensor has been successfully used to create absolute pressure sensors, the lack of an etch stop on the underside of the membrane makes it difficult to create differential pressure sensors using the cavity-on-top process. [0005] Yet another technique for manufacturing sensors has used surface micromachining of semiconductor thin films and undercutting of a sacrificial layer to free the membrane of the sensor. Unfortunately, stress control of thin film membranes is generally inferior to stress control of single-crystal silicon membranes. [0006] What is needed is a technique for manufacturing silicon micro-electro mechanical structures that can provide a relatively small, robust and multiple-use sensor. SUMMARY OF THE INVENTION [0007] The present invention is generally directed to a technique for manufacturing silicon structures. According to one embodiment, a cavity is etched into a first side of an epitaxial wafer. The thickness of an epitaxial layer is selected, based on a desired depth of the etched cavity and a desired membrane thickness. The first side of the epitaxial wafer is bonded to a first side of a handle wafer. After bonding the wafers, the epitaxial wafer is thinned, leaving only the epitaxial layer attached to the handle wafer. Desired circuitry is then formed on the epitaxial layer. [0008] According to this aspect of the present invention, the handle wafer is at least one of a P++ type silicon wafer and a silicon wafer having a (111) Miller Indices. The technique may also include the additional step of forming a hole through the handle wafer from a second side of the handle wafer to the first side of the handle wafer approximate the cavity in the epitaxial wafer. In this embodiment, an oxide layer on the underside of the epitaxial layer functions as an etch stop layer and, thus, allows a differential type silicon structure to be manufactured. The hole may be formed using a deep reactive ion etch (DRIE). [0009] These and other features, advantages and objects of the present invention will be further understood and appreciated by those skilled in the art by reference to the following specification, claims and appended drawings. BRIEF DESCRIPTION OF THE DRAWINGS [0010] The present invention will now be described, by way of example, with reference to the accompanying drawings, in which: [0011] FIG. 1 is a cross-sectional view of a relevant portion of an exemplary prior art pressure sensor manufactured through a backside cavity process; [0012] FIG. 2 is a cross-sectional view of a relevant portion of an exemplary prior art pressure sensor manufactured via a cavity-on-top process; [0013] FIGS. 3A-3F are exemplary views of the components of a pressure sensor, manufactured according to one embodiment of the present invention, during manufacturing; [0014] FIG. 4 is a cross-sectional view of a differential pressure sensor formed according to another embodiment of the present invention; and [0015] FIG. 5 is a flow chart of a process for producing pressure sensors according to various embodiments of the present invention. DESCRIPTION OF PREFERRED EMBODIMENTS [0016] According to the present invention, a sensor is manufactured by forming a cavity in an epitaxial wafer that is then bonded to a handle wafer. Forming the cavity in this manner allows an angle of sidewall of the cavity at a membrane (diaphragm) edge to be about 125.3 degrees. In general, the epitaxial layer thickness is selected to be substantially equal to the sum of the desired membrane thickness and the etched cavity depth. During the process, the presence of an oxide on the underside of the cavity etched into the epitaxial layer creates an etch stop for either wet or dry through-wafer etching, after bonding of the handle wafer and epitaxial wafer, thus, allowing a manufacturer to readily produce a differential pressure sensor, if desired. [0017] With reference to FIG. 1, a prior art pressure sensor 100, produced using a backside cavity process, is depicted. As is shown, a stress-relief substrate, e.g., a glass wafer, 102 is bonded to a silicon wafer 110, which includes an N-type epitaxial layer, which forms a membrane 110B having a thickness T. Prior to bonding of the wafers 102 and 110, a cavity having a sidewall 105 is formed into a backside of a portion 110A of the wafer 110. In a typical application, the width W of the cavity at the point of the membrane 110B is approximately 500-1500 microns. As is shown, the sidewall 105 forms an angle of approximately 125.3 degrees, with respect to the membrane 110B. For differential sensing, a hole 109 may be located through a backside of the stress-relief wafer 102 approximate the cavity. [0018] Implanted or diffused into the membrane 110B are a plurality of impurity regions 111, which may be, for example, piezoresistive elements. Dielectric layers 115 and 117 and a metal layer, e.g., an aluminum silicon layer, 121 are formed over the silicon surface to provide insulation and contacts for the impurity regions 111. Other dielectric layers 119 and 123 are formed over the metal layer 121 to provide protection for the metal. While the sensor 100 provides an angle of about 125.3 degrees at the interface between the sidewall 105 and the membrane 110B, a width W of the cavity opening consumes a larger silicon area than the membrane, increasing the size and, therefore, the cost of the sensor. [0019] With reference to FIG. 2, a relevant portion of a pressure sensor 200, fabricated using the cavity-on-top process, is depicted. As is shown in FIG. 2, the sensor 200 includes a first wafer 202, which has a cavity formed therein, and a bonded N-type silicon layer 210, which is formed as previously described. The layer 210 provides a membrane for the sensor 200. The construction of the sensor 200 is similar to that of the sensor 100 of FIG. 1, with the exception that a sidewall 205 of the cavity meets the membrane 210 at an angle of approximately 54.7 degrees. As is shown in FIG. 2, the width W of the cavity is the same size as the membrane, which allows the dimensions of the pressure sensor 200 to be reduced, as compared to the sensor 100. Thus, the sensor 200 utilizes less silicon area and, as such, provides a sensor having a lower cost. However, due to the angle at which the sidewall 205 meets the membrane 210, the membrane of the sensor 200 is less robust than the membrane 110B of the sensor 100. The circuitry formed in/on the membrane 110B of the sensor 100 is similar to the circuitry formed in/on the membrane (i.e., epitaxial layer) 210 of the sensor 200. Continue reading... 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