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Systems and methods for transmitting signals across integrated circuit chipsSystems and methods for transmitting signals across integrated circuit chips description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070103199, Systems and methods for transmitting signals across integrated circuit chips. Brief Patent Description - Full Patent Description - Patent Application Claims CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application claims priority to U.S. Provisional Patent Application Ser. No. ______ (not yet assigned), filed on Oct. 28, 2005, express mail number EV 689440719 US, entitled "SYSTEMS AND METHODS FOR TRANSMITTING SIGNALS ACROSS INTEGRATED CIRCUIT CHIPS," Attorney Docket No. 02EK-120218, the entire disclosure of which is incorporated herein by reference. FIELD OF THE INVENTION [0002] The present invention relates to systems and methods for transmitting electrical signals across integrated-circuit chips and the like. BACKGROUND OF THE INVENTION [0003] Typically, integrated-circuit interconnects are categorized according to their length, generally falling within three categories: (1) local interconnects that connect gates within a block, (2) semi-global interconnects that connect blocks (e.g., datapath blocks to a register file), and (3) global interconnects that connect functional units together such as a processor core with the L2 cache, the bus interface, or another processor core in a chip multiprocessor. As CMOS processes scale, local interconnect length, and to a lesser extent semi-global interconnect length, scales as well. However, global interconnects tend to become longer because maximum die sizes are increasing. Global interconnect capacitance increases since capacitance per unit length remains constant or only slightly decreases as processes scale. When coupled with resistance increases per unit length, the result is slower absolute global data transfer, and much slower transfer relative to increasing system clock frequencies. Thus scaling results in both more fCV.sup.2 power and increased latency in the global interconnects. A solution that addresses both of these problems is needed. SUMMARY OF THE INVENTION [0004] We describe new current-mode transmission systems and methods for global and semi-global interconnects that reduces both delay and energy dissipation compared to the standard inverter repeater approach. For exemplary methods and systems according to the present invention, a first interconnect wire and a second interconnect wire are disposed on an integrated-circuit chip, with each interconnect wire having a first end in a first area of the chip and a second end in a second area of the chip. In exemplary systems according to the present invention, a transmission circuit generates a differential current, or current difference, at the first ends that is sensed at the second ends by a reception circuit, which preferably comprises a current-mode sense amplifier. In preferred system embodiments, control signals may be used to enable both the transmission circuit and the reception circuit to reduce static power. [0005] In exemplary method embodiments, at least one current is coupled at one of the first ends of the interconnect wires during a first period of time to generate a current difference in the interconnect wires that propagates from the first ends of the interconnect wires to the second ends of the interconnect wires. The current difference has a first sign to represent a first value of data transmitted and a second sign to represent a second value of data transmitted. The exemplary methods further comprise sensing the sign of the current difference at the second ends of the interconnect wires, and discharging the currents in the first and second interconnect wires in a second period of time that follows after the first period of time, so that substantially no current flows in the interconnect wires just prior to the next transmission of data. [0006] In further preferred embodiments, N-to-1 interconnections can be implemented, e.g., multiple transmission circuits and a single reception circuit. [0007] It is an object of the present invention to provide for faster transmission of electrical signals across integrated-circuit chips and the like. [0008] It is another object of the present invention to reduce the power required to convey electrical signals across integrated-circuit chips and the like. [0009] These and other objects of the present invention will become apparent to those skilled in the art from the following detailed description of the invention, the accompanying drawings, and the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS [0010] FIG. 1 shows a first exemplary signal-transmission system according to the present invention. [0011] FIG. 2 shows a timing diagram for the exemplary signal-transmission system shown in FIG. 1 according to the present invention. [0012] FIG. 3 illustrates a second exemplary system according to the present invention. [0013] FIG. 4 illustrates a first exemplary transmission circuit according to the present invention. [0014] FIG. 5 illustrates a second exemplary transmission circuit according to the present invention. [0015] FIG. 6 illustrates an exemplary reception circuit according to the present invention. [0016] FIG. 7 shows a two-cycle timing diagram of an exemplary signal-transmission system according to the present invention. [0017] FIG. 8A illustrates a third exemplary signal-transmission system according to the present invention. [0018] FIG. 8B shows a timing diagram for the exemplary system shown in FIG. 8A according to the present invention. [0019] FIG. 9 shows a digitized photomicrograph of a test chip having embodiments of systems according to the present invention. Continue reading about Systems and methods for transmitting signals across integrated circuit chips... Full patent description for Systems and methods for transmitting signals across integrated circuit chips Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Systems and methods for transmitting signals across integrated circuit chips patent application. ### 1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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