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01/11/07 | 37 views | #20070010037 | Prev - Next | USPTO Class 438 | About this Page  438 rss/xml feed  monitor keywords

Superlattice nanocrystal si-sio2 electroluminescence device

USPTO Application #: 20070010037
Title: Superlattice nanocrystal si-sio2 electroluminescence device
Abstract: A superlattice nanocrystal Si—SiO2 electroluminescence (EL) device and fabrication method have been provided. The method comprises: providing a Si substrate; forming an initial SiO2 layer overlying the Si substrate; forming an initial polysilicon layer overlying the initial SiO2 layer; forming SiO2 layer overlying the initial polysilicon layer; repeating the polysilicon and SiO2 layer formation, forming a superlattice; doping the superlattice with a rare earth element; depositing an electrode overlying the doped superlattice; and, forming an EL device. In one aspect, the polysilicon layers are formed by using a chemical vapor deposition (CVD) process to deposit an amorphous silicon layer, and annealing. Alternately, a DC-sputtering process deposits each amorphous silicon layer, and following the forming of the superlattice, polysilicon is formed by annealing the amorphous silicon layers. Silicon dioxide can be formed by either thermal annealing or by deposition using a DC-sputtering process.
(end of abstract)
Agent: Sharp Laboratories Of America, Inc - Camas, WA, US
Inventors: Tingkai Li, Sheng Teng Hsu, Wei-Wei Zhuang
USPTO Applicaton #: 20070010037 - Class: 438029000 (USPTO)
Related Patent Categories: Semiconductor Device Manufacturing: Process, Making Device Or Circuit Emissive Of Nonelectrical Signal, Including Integrally Formed Optical Element (e.g., Reflective Layer, Luminescent Material, Contoured Surface, Etc.)
The Patent Description & Claims data below is from USPTO Patent Application 20070010037.
Brief Patent Description - Full Patent Description - Patent Application Claims  monitor keywords

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] This invention generally relates to integrated circuit (IC) fabrication and, more particularly, to a nanocrystalline superlattice silicon (Si)-silicon dioxide SiO.sub.2 electroluminescence (EL) device and light-emitting diode (LED) device.

[0003] 2. Description of the Related Art

[0004] An early paper in the field, published in Nature (440-444, 2000) by L. Pavesi, deals with silicon quantum dots. Since 2000, there have been numerous reports of optical gain in waveguide structures, EL, and light-emitting diode (LED) applications containing silicon quantum dots in the 2 to 4 nanometer (nm) range, prepared by different techniques. However, there are inconsistencies between the various experimental reports, and theoretical studies have not conclusively identified the mechanisms for optical gain.

[0005] Many researchers have recently reported on the EL properties of Si rich silicon oxides. Keisuke Sato, from Tokyo Denki University, presented an interesting paper dealing with electroluminescence from Si-rich silicon oxide. To make the Si-rich silicon oxide thin films, he bonded small (5.times.5 mm) silicon pieces on a silicon dioxide target. Using radio frequency (RF) sputtering, a Si-rich silicon oxide, with silicon nano-particles of a size around 2.5 nm, was formed. The surface of Si rich silicon oxide was etched by HF and then post-annealed. Both the HF surface etching and the temperature of the post-annealing were reported to be key factors associated with the color of light emission. Red emission color was obtained from the HF treatment sample. Green emission color was observed from the sample post-annealed at 600.degree. C., and blue for the sample post-annealed at a temperature of 900.degree. C. From I-V measurements, Sato gave the light emission threshold voltages: 4.0V for red emission, 9.0V for green and 9.5V for blue emission. This data suggests very promising Si quantum dots EL and LED applications.

[0006] Another interesting work comes from STMicroelectronics, Italy. Dr. Maria E. Castagna et al. presented a paper entitled "High efficiency light emission devices in silicon." at the 2003 MRS spring meeting. The reported device consists of MOS structures with erbium (Er) implanted in the gate oxide. The device exhibited strong 1.54 .mu.m (micrometer) electroluminescence at 300.degree. k (room temperature) with a 10% external quantum efficiency, comparable to that of standard light emitting diodes using group III-V semiconductors. Emissions at different wavelengths have been achieved incorporating different rare earths (Ce, Tb, Yb, Pr) in the gate dielectric. The external quantum efficiency depends on the rare earth ions incorporated, and ranges from 10% (for a Tb doped MOS) to 0.1% (for an Yb doped MOS). Much more stable light emitting MOS devices have been fabricated using Er-doped SRO (Si-rich silicon oxide) films as the gate dielectric, but the external quantum efficiency is reduced to 0.2%. With respect to the light emission mechanism, it is thought that Er pumping occurs partly due to the impact of hot electrons, and partly by energy transfer from the Si nanostructures to the rare earth ions, depending on the Si excess in the film.

[0007] Dr. Pasquarello has proposed a theory for the photoemission associated with a Si--SiO2 interface. According to the theory, Si 2p core-level shifts occur at the Si(001)-SiO2, and depend linearly on nearest-neighbor oxygen atoms. Second nearest-neighbor effects turn out to be negligibly small. Therefore, an efficient photoemission spectra requires that all Si oxidation states be present at the interface. Based on this theory, the making of a high density Si--SiO2 interface is a critical issue for EL device applications.

[0008] It would be advantageous if a more efficient, easy to fabricate, EL device could be made based upon a high density Si--SiO2 interface.

[0009] It would be advantageous the density of a Si--SiO2 interface could be increased by using a multi-layer Si--SiO2 superlattice.

SUMMARY OF THE INVENTION

[0010] The present invention describes processes for the fabrication of a superlattice nanocrystalline Si and SiO2 structures for EL and LED device applications. Technologies are presented for making a multi-layer Si--SiO2 superlattice structure using CVD polysilicon deposition, thermal oxidation, and rare earth element implantation processes.

[0011] Accordingly, a method is provided for forming a superlattice nanocrystal Si--SiO.sub.2 EL device. The method comprises: providing a Si substrate; forming an initial SiO.sub.2 layer overlying the Si substrate; forming an initial polysilicon layer overlying the initial SiO.sub.2 layer; forming SiO.sub.2 layer overlying the initial polysilicon layer; repeating the polysilicon and SiO.sub.2 layer formation, forming a superlattice; doping the superlattice with a rare earth element; depositing an electrode overlying the doped superlattice; and, forming an EL device.

[0012] In one aspect, a p-doped/insulator/n-doped EL device is formed. The method then comprises: providing an n-type Si substrate; forming an initial p-type polysilicon layer overlying the initial SiO.sub.2 layer; forming a superlattice of alternating layers of n and p-type polysilicon, with a final set of layers being n-type polysilicon overlaid by SiO.sub.2; and, depositing a p-type electrode to form a p-i-n EL device.

[0013] In one aspect, the polysilicon layers are formed using a chemical vapor deposition (CVD) process to deposit an amorphous silicon layer, and annealing. Alternately, a DC-sputtering process deposits each amorphous silicon and SiO.sub.2 layer, and following the formation of the superlattice, polysilicon is formed by annealing the amorphous silicon layers. As an alternative to the DC-sputtering process, the silicon dioxide layers can be formed by thermal annealing.

[0014] Additional details of the above-described method, and a superlattice nanocrystal Si--SiO.sub.2 EL device are provided below.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG. 1 is a partial cross-sectional view of a superlattice nanocrystal silicon (Si)-silicon dioxide (SiO.sub.2) electroluminescence (EL) device.

[0016] FIG. 2 is a partial cross-sectional view of a PIN variation of the Si--SiO.sub.2 EL device of FIG. 1.

[0017] FIG. 3 is a partial cross-sectional view of an NIP variation of the Si--SiO.sub.2 EL device of FIG. 1.

[0018] FIG. 4 is another partial cross-sectional view of the present invention EL device.

[0019] FIG. 5 shows the x-ray patterns of polysilicon thin films as deposited, and after post-annealing.

[0020] FIG. 6 is a graph depicting the formation of nanocrystalline polysilicon after thermal oxidation.

[0021] FIG. 7 is a graph depicting the film thickness of polysilicon as a function of deposition time.

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