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  Storage devices formed on partially isolated semiconductor substrate islandsUSPTO Application #: 20060292767Title: Storage devices formed on partially isolated semiconductor substrate islands Abstract: A process of making a partial silicon-on-insulator ledge is disclosed. A deep implantation region is created in a substrate. During a lateral cavity etch, the deep implantation region resists etching. The lateral cavity etch acts to partially isolate an active area above the deep implantation region. The deep implantation region is formed at various process stages according to embodiments. An active device is also disclosed that is achieved by the process. A system is also disclosed that uses the active device. (end of abstract) Agent: Schwegman, Lundberg, Woessner & Kluth, P.A. - Minneapolis, MN, US Inventors: Fernando Gonzalez, Chandra Mouli, Lyle Jones USPTO Applicaton #: 20060292767 - Class: 438158000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions, On Insulating Substrate Or Layer (e.g., Tft, Etc.), Having Insulated Gate, Inverted Transistor Structure The Patent Description & Claims data below is from USPTO Patent Application 20060292767. Brief Patent Description - Full Patent Description - Patent Application Claims
RELATED APPLICATIONS [0001] This application is a Divisional of U.S. application Ser. No. 11/215,404 filed Aug. 30, 2005, which is a Divisional of U.S. application Ser. No. 10/880,896 filed Jun. 30, 2004, which is a Continuation of U.S. application Ser. No. 10/118,569 filed Apr. 8, 2002 and issued as U.S. Pat. No. 6,784,076 on Aug. 31, 2004, which applications are incorporated herein by reference. FIELD OF THE INVENTION [0002] An embodiment relates to semiconductor processing. One embodiment in particular relates to a process for making a silicon-on-insulator ledge structure that includes a partially isolated active area in a semiconductive substrate. BACKGROUND [0003] Semiconductor processing is an intensive activity during which several processes are integrated to achieve a working device. Miniaturization is the process of crowding more semiconductive devices onto a smaller substrate area in order to achieve better device speed, lower energy usage, and better device portability, among others. New processing methods must often be developed to enable miniaturization to be realized. Preferably, the processing methods needed to fabricate such devices are developed in a manner that existing processing equipment can be used. [0004] The pressure to continue the miniaturization process also leads to new semiconductor device structures. As individual active devices become smaller and are fabricated closer together, leakage and second order effects become more significant. In the field of metal oxide semiconductor field-effect transistors (MOSFET), device leakage and miniaturization appear to be antagonistic challenges. Often, oxidation is carried out for the purpose of isolation, but oxidation often imparts stresses in the workpieces that lead to device failure. Deposition processes, although necessary, are time-consuming and costly. Further, deposition processes require masking and careful application. Further, deposition processes are preferentially applied when an integrated process can take advantage of a given deposition simultaneously in unrelated areas of a device. BRIEF DESCRIPTION OF THE DRAWINGS [0005] In order that the manner in which embodiments of the present invention are obtained, a more particular description of the invention briefly described above will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. Understanding that these drawings depict only typical embodiments of the invention that are not necessarily drawn to scale and are not therefore to be considered to be limiting of its scope, the invention will be described and explained with additional specificity and detail through the use of the accompanying drawings in which: [0006] FIG. 1 is a cross section of a structure during processing according to an embodiment. [0007] FIG. 2 is a cross section of the structure depicted in FIG. 1 after further processing. [0008] FIG. 3 is a cross section of the structure depicted in FIG. 2 after further processing in which a nitride film has been grown on exposed silicon. [0009] FIG. 4 is a cross section of the structure depicted in FIG. 3 after further processing. [0010] FIG. 5 is a cross section of the structure depicted in FIG. 4 after further processing in which a lateral recess has been etched. [0011] FIG. 6 is a cross section of the structure depicted in FIG. 5 after further processing. [0012] FIG. 7 is a cross section of the structure depicted in FIG. 6 after further processing in which oxidation and oxide fill processes have been done. [0013] FIG. 8 is a cross section of the structure depicted in FIG. 6 after alternative further processing in which minimal oxidation or no oxidation, and oxide fill processes have been done. [0014] FIG. 9 is a cross section of the structure depicted in FIG. 6 after alternative further processing in which minimal oxidation or no oxidation, and oxide fill processes have been done. [0015] FIG. 10 is a cross section that includes the structure depicted in FIG. 9 after further processing. [0016] FIG. 11 is a cross section that includes a portion of the structure depicted in FIG. 10 after further processing. [0017] FIG. 12 is a cross section of a structure during processing according to an embodiment. [0018] FIG. 13 is a cross section of the structure depicted in FIG. 12 after an anisotropic etch. [0019] FIG. 14 is a cross section of the structure depicted in FIG. 13 after further processing in which a nitride film has been grown on exposed silicon. [0020] FIG. 15 is a cross section of the structure depicted in FIG. 14 after further processing. Continue reading... Full patent description for Storage devices formed on partially isolated semiconductor substrate islands Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Storage devices formed on partially isolated semiconductor substrate islands patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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