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Srinivasan Chakravarthi patentsRecent bibliographic sampling of Srinivasan Chakravarthi patents listed/published in the public domain by the USPTO (USPTO Patent Application #,Title):
20050118792 - Forming a retrograde well in a transistor to enhance performance of the transistor
20050224874 - Forming a retrograde well in a transistor to enhance performance of the transistor
20050245021 - Semiconductor device having optimized shallow junction geometries and method for fabrication thereof
20060001105 - Semiconductor device having optimized shallow junction geometries and method for fabrication thereof
20060068541 - Integration scheme to improve nmos with poly cap while mitigating pmos degradation
20060099744 - System and method for improved dopant profiles in cmos transistors
The bibliographic references displayed about Srinivasan Chakravarthi's patents are for a recent sample of Srinivasan Chakravarthi's publicly published patent applications. The inventor/author may have additional bibliographic citations listed at the USPTO.gov. FreshPatents.com is not associated or affiliated in any way with the author/inventor or the United States Patent/Trademark Office but is providing this non-comprehensive sample listing for educational and research purposes using public bibliographic data published and disseminated from the United States Patent/Trademark Office public datafeed. This information is also available for free on the USPTO.gov website. If Srinivasan Chakravarthi filed recent patent applications under another name, spelling or location then those applications could be listed on an alternate page. If no bibliographic references are listed here, it is possible there are no recent filings or there is a technical issue with the listing--in that case, we recommend doing a search on the USPTO.gov website.
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