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05/18/06 - USPTO Class 438 |  123 views | #20060105575 | Prev - Next | About this Page  438 rss/xml feed  monitor keywords

Small volume process chamber with hot inner surfaces

USPTO Application #: 20060105575
Title: Small volume process chamber with hot inner surfaces
Abstract: A system and method of processing a substrate including loading a substrate into a plasma chamber and setting a pressure of the plasma chamber to a pre-determined pressure set point. Several inner surfaces that define a plasma zone are heated to a processing temperature of greater than about 200 degrees C. A process gas is injected into the plasma zone to form a plasma and the substrate is processed. (end of abstract)



Agent: Martine Penilla & Gencarella, LLP - Sunnyvale, CA, US
Inventors: Andrew D. Bailey, Tuqiang Ni
USPTO Applicaton #: 20060105575 - Class: 438706000 (USPTO)

Related Patent Categories: Semiconductor Device Manufacturing: Process, Chemical Etching, Vapor Phase Etching (i.e., Dry Etching)

Small volume process chamber with hot inner surfaces description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20060105575, Small volume process chamber with hot inner surfaces.

Brief Patent Description - Full Patent Description - Patent Application Claims
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CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application is a divisional of and claims priority from U.S. patent application Ser. No. 10/744,355 filed on Dec. 22, 2003, and entitled "Small Volume Process Chamber with Hot Inner Surfaces." U.S. patent application Ser. No. 10/744,355 is a continuation-in-part and claims priority from U.S. patent application Ser. No. 10/390,520 filed on Mar. 14, 2003 and entitled "System, Method and Apparatus for Improved Local Dual-Damascene Planarization," which is incorporated herein by reference in its entirety. U.S. patent application Ser. No. 10/744,355 is also a continuation-in-part and claims priority from U.S. patent application Ser. No. 10/390,117 filed on Mar. 14, 2003, and entitled "System, Method and Apparatus for Improved Global Dual-Damascene Planarization," which is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates generally to etching semiconductor substrates, and more particularly, to systems and methods for plasma etching semiconductor substrates.

[0004] 2. Description of the Related Art

[0005] In general, the manufacturing of the integrated circuit devices (in the form of semiconductor substrates and wafers) includes the use of plasma etching chambers. The plasma etch chambers are capable of etching selected layers on the substrate as defined by a photoresist mask. The plasma etch chambers are configured to receive processing gases (i.e., etch chemistries) while a radio frequency (RF) power is applied to one or more electrodes of the plasma etch chamber. The pressure inside the plasma etch chamber is also controlled for the particular process. Upon applying the desired RF power to the electrode(s), the process gases in the chamber are activated such that a plasma is created. The plasma is thus configured to perform the desired etching of the selected layers of the semiconductor wafer.

[0006] Low volatility byproducts are produced in some prior art plasma etch processes. By way of example, in a copper etch process using chlorine containing gases (e.g., C12 and HCl), the byproduct is CuClx. CuClx is non-volatile at room temperature. The low-volatility byproducts typically condense on the chamber walls. During each plasma etch cycle, the byproducts build-up on the chamber walls. Eventually the byproducts build-up to a certain thickness. The byproduct build-up then begins to "flake" off of the chamber walls and is therefore becomes a significant particle source. The particles can contaminate the substrates being etched in the chamber.

[0007] Recognizing that the internal surfaces of the plasma etch chamber are exposed to the plasma, the chambers are often designed to permit the use of simple lining parts, such as, disks, rings, and cylinders. Because these lining parts are configured to confine the plasma over the substrate being processed, these parts are continuously exposed and attacked by the processing plasma energies. Due to this exposure, these parts ultimately erode or accumulate polymer buildup, requiring replacement or thorough cleaning. However, the cleaning and/or replacement costs of these lining parts can become very expensive both in actual cost and in lost production time required for the cleaning and replacement.

[0008] In view of the foregoing, there is a need for a system and method of substantially eliminating particle contamination from byproduct build-up on the walls of the plasma etch chamber.

SUMMARY OF THE INVENTION

[0009] Broadly speaking, the present invention fills these needs by providing an improved system for processing a substrate. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, computer readable media, or a device. Several inventive embodiments of the present invention are described below.

[0010] One embodiment includes a method of processing a substrate. The method including loading a substrate into a plasma chamber and setting a pressure of the plasma chamber to a pre-determined pressure set point. Multiple inner surfaces that define a plasma zone are heated to a processing temperature. A process gas is injected into the plasma zone to form a plasma and the substrate is processed. The processing temperature can be greater than about 200 degrees (e.g., between about 200 degrees C. and about 400 degrees C. or a higher temperature).

[0011] The method further includes drawing a byproduct vapor from the plasma zone through a cold trap to condense the byproduct vapor in the cold trap. The cold trap has a temperature of at least about 50 degrees C. cooler than the processing temperature.

[0012] Processing the substrate can include etching the substrate. Processing the substrate can also include etching a copper film on the substrate. Heating the inner surfaces defining the plasma zone to the processing temperature can include maintaining a surface of the substrate at a second temperature sufficient to cause a byproduct vapor to condense on the surface of the substrate to deposit a film on the substrate. The second temperature is about 50 degrees C cooler than the processing temperature.

[0013] The pre-determined pressure set point is less than atmospheric pressure. The predetermined pressure set point is within a range of about 1 mTorr and about 500 mTorr.

[0014] The plasma chamber is a small volume plasma chamber. The small volume plasma chamber includes a first electrode. The first electrode forming a chuck for supporting the substrate. A second electrode is also included. The second electrode being deposed substantially parallel to the first electrode. The second electrode being one of the inner surfaces. The first electrode and second electrode being separated by a predetermined distance. The predetermined distance is equal to a range of between about 0.5 cm and about 5 cm. The small volume plasma chamber includes a hot liner, wherein the hot liner forms a portion of the plurality of inner surfaces.

[0015] Processing the substrate includes a stress free planarization wherein the substrate is patterned, having a conductive interconnect material filling multiple features in the pattern. The conductive interconnect material having an overburden portion having at least one non-uniformity. The stress free planarization includes planarizing the overburden portion that includes depositing an additional layer on the overburden portion and planarizing the additional layer and the overburden portion. The additional layer being substantially entirely removed in the planarizing process.

[0016] Another embodiment provides a small volume plasma chamber that includes a first electrode, the first electrode forming a chuck for supporting the substrate. A second electrode is also included. The second electrode being deposed substantially parallel to the first electrode. The first electrode and second electrode being separated by a predetermined distance. A hot liner is also included. The hot liner and the second electrode form a portion of several inner surfaces that define a plasma zone. The predetermined distance is equal to a range of between about 0.5 cm and about 5 cm.

[0017] The small volume plasma chamber can also include a cold trap. The cold trap being sufficiently cooler than the inner surfaces that define the plasma zone to substantially cause a plasma byproduct vapor to condense in the cold trap. The cold trap is coupled to the plasma zone by a passage.

[0018] Another embodiment provides a method of forming a semiconductor device including loading a patterned substrate into a plasma chamber. The substrate having a conductive interconnect material filling several features in the pattern. The conductive interconnect material having an overburden portion having at least one non-uniformity. A pressure of the plasma chamber is set to a pre-determined pressure set point. Multiple inner surfaces that define a plasma zone, are heated to a processing temperature of greater than about 200 degree C. A process gas is injected into the plasma zone to form a plasma. The substrate is processed which includes forming an additional layer on the overburden portion and planarizing the additional layer and the overburden portion. The additional layer being substantially entirely removed in the planarizing process. A byproduct vapor from the plasma zone is drawn through a cold trap to cause the byproduct vapor to condense in the cold trap. The conductive interconnect material can include copper.

[0019] The present invention provides a small volume plasma chamber having multiple inner surfaces capable of being substantially uniformly heated to a processing temperature to ensure that byproduct vapors, especially byproduct vapors having a low volatility, will not condense on the inner surfaces so as to form particle contamination sources.

[0020] Further, the byproduct vapors are drawn away from the plasma zone and through a cold trap where the byproduct vapors can condense. The cold trap is sufficiently physically isolated that particles formed by the condensed byproduct vapors are substantially prevented from migrating to the substrate being processed.

[0021] The present invention provides an advantage of substantially minimizing the particle generation and resulting substrate contamination. This is achieved by substantially eliminating condensation of plasma chemistries on the inner surfaces of the plasma chamber. Condensation is directed in a cold trap that is at least partially physically isolated from the plasma zone.

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Process for defining integrated circuits in semiconductor electronic devices
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Via reactive ion etching process
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Semiconductor device manufacturing: process

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