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Silicon wafer and method for production of silicon waferRelated Patent Categories: Material Or Article Handling, Associated With Semiconductor Wafer HandlingThe Patent Description & Claims data below is from USPTO Patent Application 20070140828. Brief Patent Description - Full Patent Description - Patent Application Claims TECHNOLOGICAL FIELD [0001] The present invention relates to a silicon wafer and a method for manufacturing a silicon wafer. More particularly, the present invention relates to a silicon wafer, which is capable of preventing a contamination of heavy metal ions therein, and a manufacturing method thereof. Background Art [0002] Semiconductor devices are typically manufactured via a device manufacturing process for forming device layers on the surface of the silicon wafer by a thin film, diffusion or the like. [0003] FIG. 3 is a cross sectional view of a silicon wafer 1' in which an epitaxial growth layer 2 is formed on a silicon wafer substrate 1, assuming that the wafer is a silicon (Si) wafer. [0004] The silicon wafer 1' is doped with boron B as an impurity (dopant). The silicon wafer 1' is a p/p- silicon wafer doped with the impurity B of relatively low concentration. Inside the furnace of an epitaxial growth apparatus, feed gases for a thin film such as trichlorosilane (SiHCl.sub.3) is supplied onto the surface la of the silicon substrate 1 together with a small amount of boron B. Chemical reaction of trichlorosilane is then induced on the surface of the silicon substrate 1 to form a thin film 2 of the same silicon thereon by epitaxial growth. [0005] By the above operations, a crystal having the same atomic arrangement as in the silicon substrate 1 is formed on the substrate 1. [0006] In general the silicon wafer 1' is contaminated with heavy metals such as iron, copper, nickel or the like in the device manufacturing process conducted thereafter. When heavy metal ions such as iron ions or the like are migrated into the device layer of the silicon wafer 1' during the device manufacturing process, the resultant devices may possibly perform false operations, and as a result may have a short life. [0007] Therefore, a gettering treatment is conventionally conducted so as to avoid the migration of heavy metal ions into the device layer of the silicon wafer 1'. [0008] The gettering treatment includes an intrinsic gettering (hereinafter abbreviated as "IG") and an extrinsic gettering (hereinafter abbreviated as "EG"). [0009] The IG is a gettering technique, in which a heat treatment is conducted on the silicon wafer to precipitate a defect, which is referred to as a bulk micro defect (BMD), in the bulk of the silicon wafer, and in turn, a heavy metal impurity is captured with the BMD as a strong point for the capture. [0010] FIG. 4 illustrates the IG. [0011] The silicon wafer 1', which is grown by the Czochralski method (CZ method), contains oxygen that is eluted from a quartz crucible during the manufacturing process of a silicon ingot. Then, heat treatment is conducted over the silicon wafer 1' in the device manufacturing process, so that silicon oxide (SiOx) is precipitated in the bulk thereof. Silicon oxide (SiOx) acquires a gettering ability when a precipitated nucleus thereof is grown to have a predetermined size, that is approximately several tens nm in diameter. Such precipitated nucleus of silicon oxide (SiOx) having the gettering ability is referred to as BMD. Since silicon oxide (SiOx) has a larger volume than single crystalline silicon of the same atomic weight concentration, the precipitated BMD generates a local distortion in the bulk. When the same heat treatment is performed, the higher the concentration of the BMD is, the greater the gettering effect becomes. Also, the higher the concentration of boron as a dopant is, the higher the concentration of the BMD becomes. [0012] On the other hand, the EG is a gettering technique, in which a strain layer is formed by intentionally applying a mechanical strain to the backside of the silicon wafer or forming the polysilicon layer thereon, and heavy metal impurities are captured using the strain layer as a strong point for the capture. [0013] FIG. 5 is a cross sectional view of a layer structure, illustrating the EG, in which a strain layer is provided by forming the polysilicon layer. [0014] The steps for forming the polysilicon layer are as follows. [0015] a) Placing the silicon substrate 1 within a furnace. [0016] b) Performing the Chemical Vapor Deposition (CVD) or the like on the silicon substrate 1 to form a polysilicon layer 3 so as to cover the entire body of the substrate. [0017] c) Polishing off the polysilicon layer 3 on the surface 1b of the silicon substrate 1 and then cleaning the entire body thereof to obtain the silicon substrate in which the polysilicon layer 3 is formed only on the back surface 1a thereof. [0018] Alternatively, polysilicon layer 3 may be formed only on the back surface 1a of the silicon substrate 1 by introducing silane gas only onto the back surface 1a. [0019] When an epitaxial growth film 2 is grown on the silicon substrate 1, the BMD precipitation nucleus is disappeared, so that the concentration of BMD is decreased even if the heat treatment is performed thereafter, thereby reducing the gettering ability thereof. In addition, since higher concentration of boron as dopant results in higher concentration of BMD, the concentration of the BMD in the p/p- silicon wafer 1' doped with boron of a low concentration is decreased, thereby reducing the gettering ability thereof. [0020] As such, the silicon wafer 1' doped with boron of a low concentration and having an epitaxial growth film 2 formed thereon has a problem of lower gettering ability. [0021] An attempt of facilitating the precipitation of the BMD has been made, in which a heat treatment is performed before the epitaxial growth film 2 is formed so as to grow large precipitation nucleus of silicon oxide SiOx, thereby facilitating the BMD precipitation. However, this attempt has a problem that the heat treatment requires a long time, and thus the manufacturing cost of silicon wafer is increased. [0022] Thus, researches and developments have been made to increase the BMD concentration by doping nitrogen into the silicon substrate 1. [0023] On the other hand, since the above-mentioned steps (a) to (c) should be carried out for performing the EG treatment on the silicon wafer 1', the steps for manufacturing the wafers become complicated, thereby requiring longer time, and thus the manufacturing cost is increased. Nevertheless, the EG provides higher gettering ability for the p/p- silicon wafer 1' doped with boron of a low concentration, compared with the IG. Therefore, the EG has been the common treatment for the silicon wafer formed with the epitaxial growth film. [0024] However, the situation of insufficient gettering ability has arisen in both the IG that additionally includes the nitrogen doping process and the EG treatment. This problem has not been solved in the existing circumstances. DISCLOSURE OF THE INVENTION Continue reading... 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