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  Semiconductor substrate and process for producing itUSPTO Application #: 20070281441Title: Semiconductor substrate and process for producing it Abstract: A semiconductor substrate useful as a donor wafer is a single-crystal silicon wafer having a relaxed, single-crystal layer containing silicon and germanium on its surface, the germanium content at the surface of the layer being in the range from 10% by weight to 100% by weight, and a layer of periodically arranged cavities below the surface. The invention also relates to a process for producing this semiconductor substrate and to an sSOI wafer produced from this semiconductor substrate. (end of abstract)
Agent: Brooks Kushman P.C. - Southfield, MI, US Inventors: Dirk Dantz, Andreas Huber, Reinhold Wahlich, Brian Murphy USPTO Applicaton #: 20070281441 - Class: 438458000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, Bonding Of Plural Semiconductor Substrates, Subsequent Separation Into Plural Bodies (e.g., Delaminating, Dicing, Etc.) The Patent Description & Claims data below is from USPTO Patent Application 20070281441. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The invention relates to a semiconductor substrate, comprising a relaxed, single-crystal layer containing silicon and germanium which lies at the surface, as well as a process for producing this semiconductor substrate. [0003] 2. Background Art [0004] Prior art has disclosed sSOI and SGOI substrates (strained silicon on insulator and silicon-germanium on insulator, respectively). sSOI substrates and SGOI substrates are distinguished by an electrically insulating layer or an electrically insulating support material. In the case of an sSOI substrate, a thin, single-crystal, strained silicon layer is in direct contact with the insulator. By contrast, an SGOI substrate has one or more layers containing silicon and germanium in a predetermined composition (Si.sub.xGe.sub.1-x with 0<x<1) on the insulator. This layer or combination of layers is also referred to below as a "silicon-germanium layer". A thin, single-crystal, strained silicon layer can in turn be applied to the surface of the silicon-germanium layer. [0005] In all the known processes for producing sSOI or SGOI substrates, a thin layer consisting of silicon-germanium is separated from a donor wafer by means of mechanical forces, with the free surface of the layer which is to be transferred usually being bonded to a handle wafer before the separation operation. In the case of the sSOI substrate, in addition to the silicon-germanium layer a strained silicon layer is also transferred from the donor wafer to the handle wafer. [0006] The first step of producing an sSOI or SGOI substrate is to prepare a donor wafer. In both cases, a relaxed silicon-germanium layer must first of all be produced on a silicon wafer, and this silicon-germanium layer is in a further step transferred to the handle wafer. Two fundamentally different processes are known for this purpose: [0007] In the first process, a plurality of silicon-germanium layers with an increasing germanium content (graded buffer layer) are deposited epitaxially on the silicon wafer, thereby producing lattice matching between silicon and silicon-germanium. A silicon-germanium layer with a constant germanium content deposited thereon serves for mechanical stress relief, so that silicon-germanium with its natural lattice constant (i.e. relaxed silicon-germanium with a composition of Si.sub.xGe.sub.1-x with 0<x<1) is present at the surface. The surface roughness which is produced during this process can optionally be reduced by subsequent and/or intervening polishing steps. This process requires the epitaxial deposition of layers with a total thickness of approximately 5 .mu.m and is very expensive on account of the long process time associated therewith. Moreover, the process requires a repeated change between epitaxial deposition and polishing, and therefore a large number of individual process steps. The process leads to dislocation densities in the region of 10.sup.5/cm.sup.2. [0008] In the second known process, the layer sequence with a gradually increasing germanium content is dispensed with, and instead a thin silicon-germanium layer of the desired composition is deposited immediately. In this case, the layer thickness is kept below the limit beyond which misfit dislocations are formed. This initially still strained silicon-germanium layer is then relaxed by the silicon-crystal bond which is present directly below the silicon-germanium layer being weakened. This is achieved by implantation of gas ions (for example hydrogen or helium ions) and a subsequent heat treatment. During heat treatment, the implanted ions form gas bubbles which break open the silicon-crystal bond and thus mechanically decouple the silicon-germanium layer and a silicon layer beneath it, which is only very thin, from the remainder of the silicon wafer, which ultimately leads to the relaxation of the silicon-germanium layer. One drawback is the complex implantation step and the formation of microcracks during the formation of gas bubbles, which leads to the destruction of the layer. This process also produces a high dislocation density. Only if an sSOI substrate is to be produced a thin, strained silicon layer is additionally deposited epitaxially on the relaxed silicon-germanium layer. [0009] In the second step of this second process, a superficial layer of the donor wafer (a silicon-germanium layer in the case of SGOI and additionally a strained silicon layer in the case of sSOI) is transferred to a handle wafer. The handle wafer either consists entirely of an electrically insulating material or bears an electrically insulating layer at least at its surface. A number of processes are also known for this second step. The most customary is the process known under the name Smart Cut.RTM. (EP533551A1). In this process, first of all hydrogen ions are implanted into the surface of the donor wafer. After bonding to a handle wafer, a layer with hydrogen-filled cavities is produced by a heat treatment at approximately 500.degree. C. The separation of this layer is effected by an increasing gas pressure. [0010] In all the known processes for producing sSOI or SGOI substrates, the surface roughness produced during separation of the donor wafer along the prepared separating layer is so high that the substrate cannot be used to fabricate electronic components without any further treatment, for example a polishing or a smoothing heat treatment. SUMMARY OF THE INVENTION [0011] Therefore, an object of the present invention is to provide an efficient method of producing sSOI or SGOI substrates which, on the one hand, does not require the expensive deposition of very thick silicon-germanium layers on the donor wafer, and on the other hand, leads to a low surface roughness after the thin layer has been transferred to the handle wafer. These and other objects are achieved by providing a semiconductor substrate, comprising a single-crystal silicon wafer, a relaxed, single-crystal layer containing silicon and germanium which lies on the surface, the germanium content at the surface of the layer being in the range from 10% by weight to 100% by weight, and a layer of periodically arranged cavities below said surface. [0012] The thickness of the single-crystal layer is preferably in the range from 5 nm to 3 .mu.m. It is preferable for the germanium content at the surface of the layer to be in the range from 10% by weight to 60% by weight. [0013] The objects are also achieved by a first process for producing a semiconductor substrate, comprising the following steps, in the order given: [0014] production of a layer containing periodically arranged recesses at the surface of a single-crystal silicon wafer, and [0015] heat treatment of the single-crystal silicon wafer until a continuous layer consisting of single-crystal silicon has formed at the surface, with a layer of periodically arranged cavities beneath it, wherein after the heat treatment, a single-crystal, relaxed layer with a thickness of from 5 nm to 3 .mu.m, which contains silicon and germanium, is deposited on the continuous layer at the surface, the germanium content at the surface of the relaxed layer being in the range from 10% by weight to 100% by weight. [0016] The objects are also achieved by a second process for producing a semiconductor substrate, comprising the following steps, in the order given: [0017] deposition of a layer containing silicon and germanium on the surface of a single-crystal silicon wafer, the layer being from 5 nm to 3 .mu.m thick and having a germanium content at the surface of the layer in the range from 10% by weight to 100% by weight, [0018] production of a layer containing periodically arranged recesses at that surface of the single-crystal silicon wafer which is covered by the layer containing silicon and germanium, and [0019] heat treatment of the single-crystal silicon wafer until a continuous, single-crystal, relaxed layer containing silicon and germanium has formed at the surface, with a layer of periodically arranged cavities beneath it. [0020] In this second process, unlike in the first process, the deposition of the layer containing silicon and germanium takes place prior to the production of the recesses and the heat treatment during which the recesses are closed up at the surface. Both processes lead to the semiconductor substrate described. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT(S) [0021] This semiconductor substrate according to the invention can be used as a donor wafer for the production of SGOI substrates. For this purpose, the semiconductor substrate is bonded at the surface which bears the silicon-germanium layer, to a suitable handle wafer, which consists of an electrically insulating material or at least bears an electrically insulating layer at its surface. After the bonding operation, the donor wafer is split along the layer containing the cavities, so that the silicon-germanium layer remains on the handle wafer. [0022] The semiconductor substrate according to the invention can also be used as a donor wafer for the production of sSOI substrates. In this case, a strained silicon layer is deposited on the surface of the layer containing silicon and germanium, beneath which the layer comprising the cavities is located. Then, the semiconductor substrate, at the surface which bears the strained silicon layer, is bonded to a suitable handle wafer, which consists of an electrically insulating material or at least bears an electrically insulating layer at its surface. After the bonding operation, the donor wafer is split along the layer containing the cavities, so that the strained silicon layer and the silicon-germanium layer above it remain on the handle wafer. The silicon-germanium layer can then be removed, so as to produce an sSOI substrate in which a strained silicon layer located at the surface is in direct contact with an electrical insulator. [0023] Therefore, the invention also relates to an sSOI wafer, comprising a handle wafer and a strained silicon layer lying at the surface, the silicon phonon line of the strained silicon layer at room temperature in the Raman spectrum differing by at least 2 cm.sup.-1, preferably by at least 4 cm.sup.-1, from the phonon line of unstrained silicon, and the strained silicon layer being 50 nm or less thick, having a layer thickness uniformity (6.sigma.) of 5% or less and having an HF defect density of 1/cm.sup.2 or less. [0024] The position of the silicon phonon line in the Raman spectrum at room temperature is a direct measure of the degree of straining of the silicon layer. The silicon phonon line of an unstrained silicon layer is 520 cm.sup.-1 at room temperature. The position of the silicon phonon line is shifted by about 8 cm.sup.-1 in a strained silicon layer with 1% lattice mismatch (strain). [0025] The semiconductor substrate according to the invention bears a very thin, single-crystal, relaxed layer containing silicon and germanium at its surface. On account of the lattice mismatch between substantially pure silicon and silicon-germanium, stresses are formed in the crystal lattice which are compensated for by plastic deformation, i.e. by the formation of dislocations. The layer comprising cavities located directly beneath the silicon-germanium layer is less mechanically stable than the silicon-germanium layer itself. Therefore, the stresses in the crystal lattice are primarily reduced by the formation of dislocations in the webs of material which are present between the cavities and bond the layer to the remainder of the substrate. This in turn means that the silicon-germanium layer on the one hand relaxes even at a low thickness through the formation of dislocations. On the other hand, however, these dislocations are predominantly formed in the webs of material between the cavities and in an optional thin silicon layer which may be present between the layer comprising the cavities and the silicon-germanium layer. Consequently, the dislocation density in the silicon-germanium layer itself is considerably lower than in the case of silicon-germanium layers of the prior art which are of the same thickness. Consequently, the silicon-germanium layer of the donor wafer according to the invention can be considerably thinner than in accordance with the prior art, so that the layer can be produced considerably more quickly and therefore at lower cost without having to accept an increase in the dislocation density. [0026] The semiconductor substrate according to the invention is produced without ion implantation. Microcracks caused by the formation of gas bubbles and an associated destruction of the layer containing silicon and germanium can therefore be avoided. Continue reading... Full patent description for Semiconductor substrate and process for producing it Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Semiconductor substrate and process for producing it patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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