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05/04/06 - USPTO Class 438 |  15 views | #20060094253 | Prev - Next | About this Page  438 rss/xml feed  monitor keywords

Semiconductor memory devices and methods for making the same

USPTO Application #: 20060094253
Title: Semiconductor memory devices and methods for making the same
Abstract: Methods for making memory devices are disclosed for forming germanium nanocrystals in an oxynitride layer. The method includes: forming a first dielectric layer over a substrate; forming an oxynitride layer containing germanium nanocrystals over the first dielectric layer; forming a second dielectric layer over the oxynitride layer; forming a gate over the second dielectric layer; and providing source, drain, and channel regions in the substrate. In one example, the channel region is positioned to correspond to at least a portion of the gate. (end of abstract)



Agent: Yitai Hu Shaw Pittman LLP - Mclean, VA, US
Inventor: Yung-Hsien Wu
USPTO Applicaton #: 20060094253 - Class: 438765000 (USPTO)

Related Patent Categories: Semiconductor Device Manufacturing: Process, Coating Of Substrate Containing Semiconductor Region Or Of Semiconductor Substrate, By Reaction With Substrate

Semiconductor memory devices and methods for making the same description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20060094253, Semiconductor memory devices and methods for making the same.

Brief Patent Description - Full Patent Description - Patent Application Claims
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FIELD

[0001] The present invention relates generally to semiconductor memory devices and methods for making the same. Specifically, the present invention relates to memory devices containing semiconductor nanocrystals and methods of making such memory devices.

BACKGROUND

[0002] Memory devices are widely used in various electronics and computing devices. For example, computing devices and consumer-electronics store data, e.g., texts, e-mails, images, music, and videos, in one or more memory devices. The need for additional memory capacity is increasing with the expanded capabilities of today's consumer electronics and portable devices. To accommodate the need, memory devices need to provide reliability, low-power-consumption, light weight portability, small size, or a combination of these characteristics.

[0003] Non-volatile memories, such as flash memories, also known as flash electrically-erasable-programmable read-only-memories (flash EEPROMs), are among the most popular memory devices. These memory devices offer reprogramablility without requiring continuous power consumption to maintain the stored data. In the past decade, the need for non-volatile memories, including low-power or high-density memory devices, in consumer electronics and portable devices has increased dramatically. Consequently, memory design and manufacturing need to improve to satisfy such demands.

SUMMARY

[0004] An example of the present invention provides a method of forming a memory device. The method includes: forming a first oxide layer over a substrate; performing a nitridation of at least an upper portion of the first oxide layer; forming a semiconductor layer comprising germanium over the first oxide layer; oxidizing the semiconductor layer to provide a germanium oxide layer over the first oxide layer and a second oxide layer over the germanium oxide layer; and forming, from the germanium oxide layer, an oxynitride layer containing germanium nanocrystals.

[0005] Another example of the present invention provides a method of forming a memory device. The method includes: forming a first oxide layer over a substrate; forming a semiconductor layer comprising germanium over the first oxide layer; and forming, from the semiconductor layer, an oxynitride layer containing germanium nanocrystals over the first oxide layer and a second oxide layer over the oxynitride layer. In one embodiment, the first oxide layer has a higher nitrogen element concentration at an upper portion of the first oxide layer.

[0006] Another example of the present invention provides a method of forming a memory device. The method includes: forming a first dielectric layer over a substrate; forming an oxynitride layer containing germanium nanocrystals over the first dielectric layer; forming a second dielectric layer over the oxynitride layer; forming a gate over the second dielectric layer; and providing source, drain, and channel regions in the substrate. In one example, the channel region is positioned to correspond to at least a portion of the gate.

[0007] An example of the present invention provides a semiconductor device. The semiconductor device includes a substrate and a memory device formed on the substrate. In particular, the memory device includes an oxynitiride layer having germanium nanocrystals embedded in the oxynitride layer.

[0008] Another example of the present invention provides a semiconductor device. The device includes: a first dielectric layer over a substrate; an oxynitride layer containing germanium nanocrystals over the first dielectric layer; a second dielectric layer over the oxynitride layer; a gate structure over the second dielectric layer; and a source region, a drain region, and a channel region in the substrate. In one example, the channel region is positioned to correspond to at least a portion of the gate.

[0009] Another example of the present invention provides a semiconductor device. The device includes: a first dielectric layer over a substrate; an oxynitride layer containing germanium nanocrystals over the first dielectric layer; and a second dielectric layer over the oxynitride layer. In one example, the formation of the germanium nanocrystals includes: forming a semiconductor layer comprising germanium over the first dielectric layer; oxidizing the semiconductor layer to form a germanium oxide layer over the first dielectric layer and a second dielectric layer over the germanium oxide layer; and annealing the germanium oxide layer to form the oxynitride layer.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010] FIG. 1 is a schematic diagram illustrating an exemplary stacked-gate memory design.

[0011] FIG. 2 is a schematic diagram of a memory device using silicon nitride as a storage medium according to our example.

[0012] FIG. 3 is a schematic diagram of a memory device using silicon nanocrystals as a storage medium according to our example.

[0013] FIG. 4 is a schematic diagram of a memory device using both silicon nitride and silicon nanocrystals as a storage medium according to our example.

[0014] FIG. 5 is a schematic diagram of a memory device having germanium nanocrystals in a dielectric layer according to our example.

[0015] FIG. 6 is a schematic diagram illustrating the formation of a dielectric layer over a substrate according to our example.

[0016] FIG. 7 is a schematic diagram illustrating the formation of a semiconductor layer over a dielectric layer according to our example

[0017] FIG. 8 is a schematic diagram illustrating the formation of a dielectric layer containing germanium nanocrystals and another dielectric layer over the germanium-containing dielectric layer according to our example.

DETAILED DESCRIPTION OF THE INVENTION

[0018] The following examples illustrate improvements to memory devices and memory fabrication methods. According to one example, an improved non-volatile memory device includes semiconductor nanocrystals, such as germanium nanocrystals. In one example, a silicon oxynitride layer may be formed to provide germanium nanocrystals in the oxynitride layer. Other examples may have the silicon oxynitride formed by the oxidation of a germanium-containing layer. Another example of a memory device on a semiconductor substrate may include an oxynitiride layer having germanium nanocrystals embedded in the oxynitride layer. As discussed below, these examples of memory devices are exemplary only and other variations may exist.

[0019] In the field of memory devices, non-volatile memory devices may employ different structural designs and materials. For example, a stacked-gate design is one of the prevailing non-volatile memory implementations for standalone memories, embedded memories, or both. This design can be used for code storage, data storage, or both. FIG. 1 shows a schematic diagram illustrating an exemplary stacked-gate memory design.

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