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08/16/07 - USPTO Class 257 |  30 views | #20070187704 | Prev - Next | About this Page  257 rss/xml feed  monitor keywords

Semiconductor light emitting element, manufacturing method thereof, integrated semiconductor light emitting device, manufacturing method thereof, image display device, manufacturing method thereof, illuminating device and manufacturing method thereof

USPTO Application #: 20070187704
Title: Semiconductor light emitting element, manufacturing method thereof, integrated semiconductor light emitting device, manufacturing method thereof, image display device, manufacturing method thereof, illuminating device and manufacturing method thereof
Abstract: A semiconductor light emitting element, manufacturing method. thereof, integrated semiconductor light emitting device, manufacturing method thereof, illuminating device, and manufacturing method thereof are provided. An n-type GaN layer is grown on a sapphire substrate, and a growth mask of SiN, for example, is formed thereon. On the n-type GaN layer exposed through an opening in the growth mask, a six-sided steeple-shaped n-type GaN layer is selectively grown, which has inclined crystal planes each composed of a plurality of crystal planes inclined from the major surface of the sapphire substrate by different angles of inclination to exhibit a convex plane as a whole. On the n-type GaN layer, an active layer and a p-type GaN layer are grown to make a light emitting element structure. Thereafter, a p-side electrode and an n-side electrode are formed. (end of abstract)



Agent: Bell, Boyd & Lloyd, LLP - Chicago, IL, US
Inventors: Hiroyuki Okuyama, Masato Doi, Goshi Biwa, Jun Suzuki, Toyoharu Oohata
USPTO Applicaton #: 20070187704 - Class: 257095000 (USPTO)

Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Incoherent Light Emitter Structure, With Heterojunction, With Contoured External Surface (e.g., Dome Shape To Facilitate Light Emission)

Semiconductor light emitting element, manufacturing method thereof, integrated semiconductor light emitting device, manufacturing method thereof, image display device, manufacturing method thereof, illuminating device and manufacturing method thereof description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20070187704, Semiconductor light emitting element, manufacturing method thereof, integrated semiconductor light emitting device, manufacturing method thereof, image display device, manufacturing method thereof, illuminating device and manufacturing method thereof.

Brief Patent Description - Full Patent Description - Patent Application Claims
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CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This patent application is a divisional of U.S. application Ser. No. 10/512,131 filed on Oct. 21, 2004, which was a National Stage of International Application No. PCT/JP04/001952 filed on Feb. 19, 2004, and which claims priority to Japanese Patent Document No. P2003-077703 filed on Mar. 20, 2003.

BACKGROUND

[0002] This invention relates to a semiconductor light emitting element, manufacturing thereof, integrated semiconductor light emitting device, manufacturing method thereof, image display device, manufacturing method thereof, illuminating device and manufacturing method thereof, which are especially suitable for application to light emitting diodes using nitride Ill-V compound semiconductors.

[0003] A light emitting diode as a semiconductor light emitting element has been proposed. This semiconductor light emitting element was made by growing an n-type GaN layer on a sapphire substrate; next forming thereon a growth mask having a predetermined opening; selectively growing an n-type GaN layer in form of a six-sided pyramid having an inclined crystal plane inclined from the major surface of the substrate, i.e. having an S-oriented plane; and growing an active layer, p-type GaN layer and other layers on the inclined crystal plane (see, for example, brochure of International Publication No. 02/07231 (pages 47-50 and FIGS. 3-9)). This light emitting diode can prevent propagation of penetrating dislocations from the substrate side to layers composing the element structure, and can improve the crystalline property of these layers, high emission efficiency can be obtained.

[0004] FIGS. 1A and 1B show a typical semiconductor light emitting element disclosed in the above-mentioned literature. This semiconductor light emitting element is manufactured by the following method. An n-type GaN layer 102 is first grown on a sapphire substrate 101 having a C+ oriented major surface. After that, a SiO2 film is formed on the entire surface of the n-type GaN layer 102, and it is patterned by lithography and etching to make a growth mask 104 having an opening of a predetermined geometry in a position for forming the element. The geometry of the opening 103 is a circle or a hexagon having one side parallel to the <11-20> direction. Size of the opening 103 is about 10 .mu.m. In the next step, under the existence of the growth mask 104, an n-type GaN layer 105 is selectively grown on a part of the n-type GaN layer 102 exposed through the opening 103. As a result of the selective growth, the n-type GaN layer 105 is in form of a six-sided pyramid. Six planes of the six-sided pyramidal n-type GaN layer 106 are S-oriented planes inclined from the major surface of the sapphire substrate 101. After that, an active layer 106 composed of InGaN compounds, for example, and a p-type GaN layer 107 are sequentially grown on the n-type GaN layer 105. Through these steps, here is obtained a double-hetero-structured light emitting diode structure including the six-sided pyramidal n-type GaN layer 105, active layer 106 and p-type GaN layer 107, the last two being grown sequentially on the inclined crystal planes of the six-sided pyramidal n-type GaN layer 105. In the next step, which is not explained here in detail, a p-side electrode is formed on the p-type GaN layer 107 and an n-side electrode is formed on the n-type GaN layer.

[0005] Existing semiconductor light emitting elements, having a light emitting element structure made by selectively growing the six-sided pyramidal n-type GaN layer 105 having an S-oriented inclined crystalline plane and next growing the active layer 106 and the p-type GaN layer 107 on the S-oriented plane, were unsatisfactory in light emitting efficiency, and inevitably required a large occupied area per each element.

SUMMARY

[0006] The present invention in an embodiment provides a semiconductor light emitting element sufficiently high in light emitting efficiency and small in occupied area per each element, as well as a manufacturing method of the semiconductor light emitting element.

[0007] The present invention in another embodiment provides an integrated semiconductor light emitting device sufficiently high in light emitting efficiency and small in occupied area per each element, a manufacturing method thereof, an image display device, a manufacturing method thereof, an illuminating device and a manufacturing method thereof.

[0008] In an embodiment of the invention is a semiconductor light emitting element comprising:

[0009] a semiconductor layer of a first conduction type which is formed on a major surface and includes a convex crystal portion having an inclined crystal plane composed of a plurality of crystal planes inclined from the major surface by different angles of inclination to exhibit a convex plane as a whole;

[0010] at least an active layer and a semiconductor layer of a second conduction type which are sequentially layered at least on the inclined crystal plane of the crystal portion;

[0011] a first electrode electrically connected to the semiconductor layer of the first conduction type; and

[0012] a second electrode formed on the semiconductor layer of the second conduction type on the crystal portion and electrically connected to the semiconductor layer of the second conduction type.

[0013] Materials of the semiconductor layer of the first conduction type, active layer and semiconductor layer of the second conduction type can include any suitable material. However, materials having a wurtzite crystalline structure are typically used. Examples of semiconductors having a wurtzite crystalline structure are nitride III-V compound semiconductors. In addition, II-VI compound semiconductors such as BeMgZnCdS compound semiconductors and BeMgZnCdO compound semiconductors can be given as such examples. Most widely, nitride III-V compound semiconductors are composed of AlxByGal-x-y-zInzAsuNl-u-vPv (where 0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, 0.ltoreq.z.ltoreq.1, 0.ltoreq.u.ltoreq.1, 0.ltoreq.v.ltoreq.1, 0.ltoreq.x+y+1<1 and 0.ltoreq.u+v<1). More specific examples are composed of AlxByGal-x-y-zInzN (where 0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, 0.ltoreq.z.ltoreq.1 and 0.ltoreq.x+y+1<1). Typical examples are composed of AlxGal-x-zInzN (where 0.ltoreq.x.ltoreq.1 and 0.ltoreq.z.ltoreq.1). Examples of nitride Ill-V compound semiconductors include GaN, InN, AlN, AlGaN, InGaN, AlGaInN, and the like.

[0014] In case the semiconductor layer of the first conduction type has a wurtzite crystalline structure, the plurality of crystal planes as constituents of the inclined crystal plane of the convex crystal portion of the semiconductor layer are typically S-oriented planes (including planes that can be regarded S-oriented planes substantially). Angles of inclination of the crystal planes as constituents of the inclined crystal planes become smaller from the bottom of the crystal portion toward the apex. This crystal portion typically has a steeple-shaped configuration, which is six-sided most typically. In this case, angles of inclination of the uppermost crystal planes of the crystal portion, i.e. the upper parts of the crystal planes involving the apex of the crystal portion, which compose the inclined crystal planes, are preferably in the range from about 3 .mu.m to about 20 .mu.m, or typically in the range from about 10 .mu.m to about 15 .mu.m.

[0015] In another embodiment, the present invention includes a method of manufacturing a semiconductor light emitting element having: a semiconductor layer of a first conduction type which is formed on a major surface and includes a convex crystal portion having an inclined crystal plane composed of a plurality of crystal planes inclined from the major surface by different angles of inclination to exhibit a convex plane as a whole; at least an active layer and a semiconductor layer of a second conduction type which are sequentially layered at least on the inclined crystal plane of the crystal portion; a first electrode electrically connected to the semiconductor layer of the first conduction type; and a second electrode formed on the semiconductor layer of the second conduction type on the crystal portion and electrically connected to the semiconductor layer of the second conduction type, comprising:

[0016] growing a first semiconductor layer of the first conduction type on a substrate;

[0017] forming a growth mask having an opening at a predetermined position on the first semiconductor layer;

[0018] selectively growing a second semiconductor layer of the first conduction type on the first semiconductor layer exposed through the opening in the growth mask; and

[0019] sequentially growing at least the active layer and the semiconductor layer of the second conduction type to cover the second semiconductor layer.

[0020] In an embodiment, the entirety of the first semiconductor layer of the first conduction type and the second semiconductor layer of the first conduction type corresponds to the semiconductor layer of the first conduction type.

[0021] In general, any material may be used as the substrate provided it assures a good crystallographic property when the first semiconductor layer of the first conduction type, second semiconductor layer of the first conduction type, active layer, semiconductor layer of the second conduction type, and so forth, are grown thereon. More specifically, here is usable a substrate made of sapphire (Al2O3) (including C-oriented plane, A-oriented plane and R-oriented plane), SiC (including 6H, 4H and 3C), nitride III-V compound semiconductors (such as GaN, InAlGaN, AlN, and the like), Si, ZnS, ZnO, LiMgO, GaAs, MgAl2O4 or the like. Preferably, a hexagonal crystalline substrate or a cubic crystalline substrate of one of those materials is used, but a hexagonal crystalline substrate is more preferable. In case the first semiconductor layer of the first conduction type, second semiconductor layer of the first conduction type, active layer and semiconductor layer of the second conduction type are made of nitride III-V compound semiconductors, a sapphire substrate having a C-oriented plane as its major surface may be used. The term "C-oriented plane" or the like herein includes any crystalline plane that slightly inclines therefrom up to about 5 to about 6.degree. and can be regarded as the C-oriented plane substantially.

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