Semiconductor device manufacturing: process inventions

20090280578 - Ferroelectric memory device and fabrication process thereof, fabrication process of a semiconductor device: A ferroelectric memory device includes a field effect transistor formed on a semiconductor substrate, an interlayer insulation film formed on the semiconductor substrate so as to cover the field effect transistor, a conductive plug formed in the interlayer insulation film in contact with the first diffusion region, and a ferroelectric... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090280577 - Manufacturing method of a semiconductor device: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090280579 - Method of controlling embedded material/gate proximity: A method that includes forming a gate of a semiconductor device on a substrate and forming a recess for an embedded silicon-straining material in source and drain regions for the gate. In this method, a proximity value, which is defined as a distance between the gate and a closest edge... Agent: Ditthavong Mori & Steiner, P.C.

20090280580 - Cmp pad thickness and profile monitoring system: In one embodiment a method is provided for maintaining a substrate processing surface. The method generally includes performing a set of measurements on the substrate processing surface, wherein the set of measurements are taken using a displacement sensor coupled to a processing surface conditioning arm, determining a processing surface profile... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090280581 - Detection of arcing events in wafer plasma processing through monitoring of trace gas concentrations: A method of detecting substrate arcing in a semiconductor plasma processing apparatus is provided. A substrate is placed on a substrate support in a reaction chamber of a plasma processing apparatus. Process gas is introduced into the reaction chamber. A plasma is generated from the process gas and the substrate... Agent: Buchanan, Ingersoll & Rooney PC

20090280582 - Design methodology for mugfet esd protection devices: A method for manufacturing a MuGFET ESD protection device having a given layout by means of a given manufacturing process, the method comprising selecting multiple interdependent layout and process parameters of which a first set are fixed by said manufacturing process and a second set are variable, selecting multiple combinations... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20090280583 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device according to one embodiment includes: forming a plurality of Si-based pattern portions above a semiconductor substrate, the plurality of Si-based pattern portions being adjacent in a direction substantially parallel to a surface of the semiconductor substrate via insulating films; forming a metal film... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090280584 - Wafer processing: Methods for processing semiconductor wafers are described herein. One embodiment includes removing portions of a first side of the semiconductor wafer to form a number of trenches of a particular depth in rows and columns. The method further includes forming a passivation layer on side walls of the number of... Agent: Brooks, Cameron & Huebsch , PLLC

20090280585 - High-density field emission elements and a method for forming said emission elements: A method for forming high density emission elements and field emission displays formed according to the method. Oxygen and a silicon etchant are introduced into a plasma etching chamber containing a silicon substrate. The oxygen reacts with the silicon surface to form regions of silicon dioxide, while the silicon etchant... Agent: Hitt Gaines, PC Lsi Corporation

20090280588 - Method of forming an electronic device including removing a differential etch layer: A method of forming an electronic device can include forming a metallic layer over a side of a workpiece including a substrate, a differential etch layer, and a semiconductor layer. The differential etch layer may lie between the substrate and the semiconductor layer, and the semiconductor layer may lie along... Agent: Larson Newman & Abel, LLP

20090280587 - Method of treating soda-lime glass substrate and method of manufacturing a display substrate using the same: A method of treating a soda-lime glass (SLG) substrate includes cleaning the SLG substrate using an alkali cleaning solution and cleaning the cleaned SLG substrate using a plasma process. The SLG substrate is cleaned using the alkali cleaning solution to remove particles adhered to the SLG substrate. Thus, defects due... Agent: F. Chau & Associates, LLC

20090280586 - Methods for depositing nanomaterial, methods for fabricating a device, and methods for fabricating an array of devices: A method comprising depositing an ink comprising a nanomaterial and a liquid vehicle from a micro-dispenser onto a layer of a device is disclosed. A method comprising depositing an ink comprising a nanomaterial and a liquid vehicle from a micro-dispenser onto a material capable of transporting charge in a predetermined... Agent: Qd Vision, Inc.

20090280589 - Method for manufacturing light-emitting device: An object is to provide a method for manufacturing a light-emitting device with high definition, high light-emitting characteristics, and the long lifetime by employing a method in which a desired evaporation pattern can be formed and an excess evaporation of a material layer which is to be the transfer layer... Agent: Cook Alex Ltd

20090280590 - Organic light emitting device and method of fabricating the same: An organic light emitting device (OLED) and a method of fabricating the same are provided, wherein the OLED includes a thin film transistor having a gate electrode, and source and drain electrodes on a substrate; a triple-layered pixel electrode connected to one of the source and drain electrodes through a... Agent: H.c. Park & Associates, PLC

20090280591 - Method of manufacturing a display substrate and method of manufacturing a display apparatus using the same: Provided is a method of manufacturing a display substrate. In the method, a gate line, a data line crossing the gate line, and a switching device are formed on a base substrate. A passivation layer, a first resist layer and a second resist layer are formed on the base substrate.... Agent: Haynes And Boone, LLPIPSection

20090280592 - Nanoparticle structure and manufacturing process of multi-wavelength light emitting devices: A structure of multi-wavelength light emitting device comprises multi-stacked active layer structure. Each stacked layer comprises lower energy bandgap well 4 and higher energy bandgap barrier layer 3 wherein at least one stacked layer in the device contains nanoparticles. As a result, the emitting wavelengths of the multi-stacked active layer... Agent: Bucknam And Archer

20090280593 - Matrix nanocomposite sensing film for saw/baw based hydrogen sulphide sensor and method for making same: A method can be adapted for design and preparation of a matrix nanocomposite sensing film for hydrogen sulphide SAW/BAW detection at room temperature. A matrix nanocomposite can be synthesized by incorporating both single-wall and multi-wall thiolated carbon nanotubes into conductive organic polymers or ceramic nanocrystalline in a properly functionalized manner.... Agent: Honeywell International Inc. Patent Services

20090280594 - Three-axis accelerometers and fabrication methods: Disclosed are MEMS accelerometers and methods for fabricating same. An exemplary accelerometer comprises a substrate, and a proof mass that is a portion of the substrate and which is separated from the substrate surrounding it by a gap. An electrically-conductive anchor is coupled to the proof mass, and a plurality... Agent: Wolf Greenfield & Sacks, P.C.

20090280595 - Process for assembling wafers by means of molecular adhesion: The invention relates to a process of bonding by molecular adhesion of two layers, such as wafers of semiconductor material, wherein propagation of a first bonding wave is initiated from a pressure point applied to at least one of the two layers, and wherein the first bonding wave step is... Agent: Edwards Angell Palmer & Dodge LLP

20090280596 - Method of manufacturing solid-state imaging device and method of manufacturing electronic apparatus: A method of manufacturing a solid-state imaging device, where a signal circuit is formed on an insulating interlayer on a first side of a semiconductor substrate in which a photoelectric conversion part is formed and light is incident on the photoelectric conversion part from a second side thereof. The method... Agent: Sonnenschein Nath & Rosenthal LLP

20090280597 - Surface cleaning and texturing process for crystalline solar cells: Methods for surface texturing a crystalline silicon substrate are provided. In one embodiment, the method includes providing a crystalline silicon substrate, wetting the substrate with an alkaline solution comprising a wetting agent, and forming a textured surface with a structure having a depth about 1 μm to about 10 μm... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090280598 - Formation of copper-indium-selenide and/or copper-indium-gallium-selenide films from indium selenide and copper selenide precursors: Liquid-based indium selenide and copper selenide precursors, including copper-organoselenides, particulate copper selenide suspensions, copper selenide ethylene diamine in liquid solvent, nanoparticlulate indium selenide suspensions, and indium selenide ethylene diamine coordination compounds in solvent, are used to form crystalline copper-indium-selenide, and/or copper indium galium selenide films (66) on substrates (52).... Agent: Paul J White, Patent Counsel National Renewable Energy Laboratory (nrel)

20090280599 - Phase change memory device and method of fabrication: A phase change memory device includes a bottom electrode on a substrate, a phase change material pattern on the bottom electrode, and a top electrode on the phase change material pattern. The phase change material pattern includes at least 50 percent antimony (Sb).... Agent: Volentine & Whitt PLLC

20090280600 - Amorphous oxide and thin film transistor: The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 1018/cm3, and a thin film transistor using such an amorphous oxide. In a thin film transistor having... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090280601 - Method and apparatus for facilitating proximity communication and power delivery: The described embodiments provide a system that facilitates inter-chip alignment for proximity communication and power delivery. The system includes a first integrated circuit chip and a second integrated circuit chip, both of which whose surfaces have corresponding etch pit wells configured to align with each other. A shaped structure is... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20090280602 - Double wafer carrier process for creating integrated circuit die with through-silicon vias and micro-electro-mechanical systems protected by a hermetic cavity created at the wafer level: A TSV-MEMS packaging process is provided. The process includes forming TSVs in the front side of the product wafer, and attaching a first carrier to the front side of the product wafer, subsequent to forming TSVs. The process further includes thinning the back side of the product wafer to expose... Agent: Texas Instruments Incorporated

20090280603 - Method of fabricating chip package: A method of fabricating a chip package is provided. A thin metal plate having a first protrusion part, a second protrusion part and a plurality of third protrusion parts are provided. A chip is disposed on the thin metal plate, and a plurality of bonding wires for electrically connecting the... Agent: Jianq Chyun Intellectual Property Office

20090280604 - Heat radiation structure of semiconductor device, and manufacturing method thereof: The invention of the present application provides a heat radiation structure of a semiconductor device, comprising a substrate having, on a surface thereof, a first area on which the semiconductor device is mounted, and a second area which surrounds the first area, and the semiconductor device which has a first... Agent: Rabin & Berdo, PC

20090280605 - Method of forming semiconductor device having stacked transistors: There is provided a method of forming a semiconductor device having stacked transistors. When farming a contact hole for connecting the stacked transistors to each other, ohmic layers on the bottom and the sidewall of the common contact hole are separately formed. As a result, the respective ohmic layers are... Agent: Myers Bigel Sibley & Sajovec

20090280606 - Method for fabricating photo sensor: A method for fabricating a photo sensor on an amorphous silicon thin film transistor panel includes forming a photo sensor with a bottom electrode, a silicon-rich dielectric layer, and a top electrode, such that the light sensor has a high reliability. The fabrication method is compatible with the fabrication process... Agent: North America Intellectual Property Corporation

20090280607 - Methods of fabricating a device structure for use as a memory cell in a non-volatile random access memory: Methods for fabricating a device structure for use as a memory cell in a non-volatile random access memory. The method includes forming first and second semiconductor bodies on the insulating layer that have a separated, juxtaposed relationship, doping the first semiconductor body to form a source and a drain, and... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20090280608 - Cmos device with metal and silicide gate electrodes and a method for making it: A semiconductor device and a method for forming it are described. The semoiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090280609 - Method of making silicon carbide semiconductor device: In a method of making a silicon carbide semiconductor device having a MOSFET, after a mask is placed on a surface of a first conductivity type drift layer of silicon carbide, ion implantation is performed by using the mask to form a lower layer of a deep layer extending in... Agent: Posz Law Group, PLC

20090280610 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device including a buried insulating film formed in a bottom part of a trench and a buried-type gate electrode formed in the trench, the method including selectively forming an insulating film in the bottom part of the trench, forming a resist having an opening... Agent: Foley And Lardner LLP Suite 500

20090280611 - Non-volatile memory semiconductor device having an oxide-nitride-oxide (ono) top dielectric layer: A non-volatile memory (NVM) cell includes a silicon substrate having a main surface, a source region in a portion of the silicon substrate, a drain region in a portion of the silicon substrate, and a well region disposed in a portion of the silicon substrate between the source and drain... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20090280612 - Semiconductor device and production method thereof: A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially growing p-type semiconductor mixed crystal layers to... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090280613 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device includes forming a first semiconductor pattern which is covered with a first insulating film over a first active region, forming a second semiconductor pattern over a second active region, forming a second insulating film over the first insulating film and the first and... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090280614 - Method of making a p-type metal-oxide semiconductor transistor and method of making a complementary metal-oxide semiconductor transistor: A method is disclosed to make a strained-silicon PMOS or CMOS transistor, in which, a compressive stress film is formed by reacting a silane having at least one substituent selected from the group consisting of hydrocarbyl, hydrocarboxy, carbonyl, formyl, carboxylic group, ester group, and halo group and ammonia, or a... Agent: North America Intellectual Property Corporation

20090280615 - Method of making a p-type metal-oxide semiconductor transistor and method of making a complementary metal-oxide semiconductor transistor: A method of forming a conductive structure in a semiconductor device includes forming a conductive layer on a substrate, forming a conductive layer pattern on the substrate by patterning the conductive layer, forming an oxide layer on the substrate and a portion of the conductive layer, and forming a capping... Agent: Lee & Morse, P.C.

20090280616 - Integrated transistor, particularly for voltages and method for the production thereof: Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20090280617 - Fabricating process for substrate with embedded passive component: A fabricating process for a substrate with an embedded passive component is provided. The fabricating process includes the following steps. First, a substrate including a top conductive layer, a bottom conductive layer, and at least a dielectric layer is provided. The top conductive layer and the bottom conductive layer are... Agent: J C Patents

20090280618 - Method of planarizing a semiconductor device: A process of forming a semiconductor process fabricated device which contains a trench, hole or gap filled with a conformally deposited material is disclosed. A sacrificial planarizing layer is formed on the fill material, and the device is planarized using a selective RIE process which etches the fill material faster... Agent: Texas Instruments Incorporated

20090280619 - Method for fabricating semiconductor device having conductive liner for rad hard total dose immunity: The invention relates to a method includes etching at least one shallow trench in at least an SIO layer; forming a dielectric liner at an interface of the SIO layer and the SIO layer; forming a metal or metal alloy layer in the shallow trench on the dielectric liner; and... Agent: Greenblum & Bernstein, P.L.C

20090280620 - Method for producing soi wafer: The present invention is a method for producing an SOI wafer comprising at least a step of forming an ion-implanted damaged layer by ion-implanting a neutral element electrically inactive in silicon from one surface of the base wafer or the bond wafer, in which ion-implanting in the step of forming... Agent: Oliff & Berridge, PLC

20090280621 - Method of producing bonded wafer: In a method of producing a bonded wafer, a volume fraction of SiO2 particles dispersed into silicon in an oxygen ion implanted layer formed at a step of implanting oxygen ions into a wafer for active layer and a subsequent heat treatment step is set to not less than 30%... Agent: Townsend And Townsend And Crew, LLP

20090280622 - Fabrication method for device having die attach film on the back side thereof: A device fabrication method for fabricating individual devices from a wafer, wherein the back side of each device is covered with an adhesive film for die bonding. The device fabrication method includes a wafer dividing step of dividing the wafer into the individual devices along a plurality of kerfs by... Agent: Greer, Burns & Crain

20090280623 - Method of producing semiconductor wafer: A semiconductor wafer is produced by irradiating a laser beam to either face of a semiconductor wafer so as to fit a focusing position into a given depth position of the semiconductor wafer to generate a multiphoton absorption process only in a specific portion of the semiconductor wafer at the... Agent: Townsend And Townsend And Crew, LLP

20090280625 - Method for separating semiconductor layer from substrate: A method for separating a semiconductor from a substrate is disclosed. The method comprises the following steps: forming a plurality of columns on a substrate; epitaxially growing a semiconductor on the plurality of columns; and injecting etching liquid into the void among the plurality of columns so as to separate... Agent: Wpat, PC Intellectual Property Attorneys

20090280624 - Precursors for formation of copper selenide, indium selenide, copper indium diselenide, and/or copper indium gallium diselenide films: Liquid-based precursors for formation of Copper Selenide, Indium Selenide, Copper Indium Diselenide, and/or copper Indium Galium Diselenide include copper-organoselenides, particulate copper selenide suspensions, copper selenide ethylene diamine in liquid solvent, nanoparticulate indium selenide suspensions, and indium selenide ethylene diamine coordination compounds in solvent. These liquid-based precursors can be deposited in... Agent: Paul J White, Patent Counsel National Renewable Energy Laboratory (nrel)

20090280626 - Finfet structure with multiply stressed gate electrode: A semiconductor structure and its method of fabrication include a semiconductor fin located over a substrate. A gate electrode is located over the semiconductor fin. The gate electrode has a first stress in a first region located closer to the semiconductor fin and a second stress which is different than... Agent: Scully, Scott, Murphy & Presser, P.C.

20090280627 - Method of forming stepped recesses for embedded strain elements in a semiconductor device: A method of fabricating a semiconductor transistor device is provided. The fabrication method begins by forming a gate structure overlying a layer of semiconductor material, such as silicon. Then, spacers are formed about the sidewalls of the gate structure. Next, ions of an amorphizing species are implanted into the semiconductor... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20090280628 - Plasma immersion ion implantation process with chamber seasoning and seasoning layer plasma discharging for wafer dechucking: In a plasma immersion ion implantation process, the thickness of a pre-implant chamber seasoning layer is increased (to permit implantation of a succession of wafers without replacing the seasoning layer) without loss of wafer clamping electrostatic force due to increased seasoning layer thickness. This is accomplished by first plasma-discharging residual... Agent: Law Office Of Robert M. Wallace

20090280629 - Integrated circuit system employing grain size enlargement: An integrated circuit system that includes: providing a substrate including an active device with a gate top surface exposed; implanting a dopant within the gate to alter the grain size of the gate material; forming a dielectric layer over the active device and the substrate; and annealing the integrated circuit... Agent: Law Offices Of Mikio Ishimaru

20090280630 - Method for making very low vt metal-gate/high-k cmosfets using self-aligned low temperature shallow junctions: This invention proposes a method for making very low threshold voltage (Vt) metal-gate/high-κ CMOSFETs using novel self-aligned low-temperature ultra shallow junctions with gate-first process compatible with VLSI. At 1.2 nm equivalent-oxide thickness (EOT), good effective work-function of 5.3 and 4.1 eV, low Vt of +0.05 and 0.03 V, high mobility... Agent: Bacon & Thomas, PLLC

20090280631 - Electroless metal deposition for dual work function: The present invention, in one embodiment provides a method of forming a semiconducting device including providing a substrate including a semiconducting surface, the substrate comprising a first device region and a second device region; forming a high-k dielectric layer atop the semiconducting surface of the substrate; forming a block mask... Agent: Scully, Scott, Murphy & Presser, P.C.

20090280632 - Mosfets having stacked metal gate electrodes and method: MOSFETs having stacked metal gate electrodes and methods of making the same are provided. The MOSFET gate electrode includes a gate metal layer formed atop a high-k gate dielectric layer. The metal gate electrode is formed through a low oxygen content deposition process without charged-ion bombardment to the wafer substrate.... Agent: Slater & Matsil, L.L.P.

20090280633 - Method of forming self-aligned contacts and local interconnects: A method for simultaneous formation of a self-aligned contact of a core region and a local interconnect of a peripheral region of an integrated circuit includes etching a cap dielectric layer to simultaneously form a hole in the core region and a trench in the peripheral region of the cap... Agent: Baker & Mckenzie LLP Patent Department

20090280634 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device is provided. The semiconductor device in which a field effect transistor utilizing a heterojunction is formed in a device formation region sectioned by a device separation region of a substrate comprising a semiconductor layer laminated while including a semiconductor layer having a heterojunction on a semiconductor substrate.... Agent: K&l Gates LLP

20090280635 - Method of forming an electronic device using a separation-enhancing species: A method of forming an electronic device can include forming a metallic layer by an electrochemical process over a side of a substrate that includes a semiconductor material. The method can also include introducing a separation-enhancing species into the substrate at a distance from the side, and separating a semiconductor... Agent: Larson Newman & Abel, LLP

20090280637 - Method of manufacturing semiconductor device including ultra low dielectric constant layer: Provided is a method of manufacturing a semiconductor device. The method employs multi-step removal on a plurality of different porogens included in a low dielectric layer both before and after metal lines are formed, thereby facilitating formation of an ultra low dielectric constant layer which is used as an insulation... Agent: Harness, Dickey & Pierce, P.L.C

20090280636 - Methods of fabricating interconnect structures containing various capping materials for electrical fuse and other related applications: Methods are provided for fabricating interconnect structures containing various capping materials for electrical fuses and other related applications. The method includes forming a first interconnect structure having a first interfacial structure and forming a second interconnect structure adjacent to the first structure. The second interconnect structure is formed with a... Agent: Greenblum & Bernstein, P.L.C

20090280638 - Process for producing air gaps in microstructures, especially of the air gap interconnect structure type for integrated circuits: t

20090280639 - Atomic layer deposition methods: An atomic layer deposition method includes providing a semiconductor substrate within a deposition chamber. A first metal halide-comprising precursor gas is flowed to the substrate within the chamber effective to form a first monolayer on the substrate. The first monolayer comprises metal and halogen of the metal halide. While flowing... Agent: Wells St. John P.s.

20090280640 - Deposition and densification process for titanium nitride barrier layers: In one embodiment, a method for forming a titanium nitride barrier material on a substrate is provided which includes depositing a titanium nitride layer on the substrate by a metal-organic chemical vapor deposition (MOCVD) process, and thereafter, densifying the titanium nitride layer by exposing the substrate to a plasma process.... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090280641 - Method of forming a contact structure: An insulation layer may be formed on an object having a contact region. The insulation layer may be partially etched to form an opening exposing the contact region. A material layer including silicon and oxygen may be formed on the exposed contact region. A metal layer may be formed on... Agent: Myers Bigel Sibley & Sajovec

20090280642 - Semiconductor device having multiple wiring layers and method of producing the same: A method of producing a semiconductor device having a plurality of wiring layers forms a first interlayer-insulating film, forms a plurality of grooves for wiring in the first interlayer-insulating film, fills metallic films in the grooves to form wirings, etches the first interlayer-insulating film with the wirings as a mask... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090275146 - Method and apparatus for manufacturing device: A method for manufacturing a device, includes: (A) forming a first electrode layer on a substrate; (B) forming a ferroelectric layer on the first electrode layer; (C) forming a second electrode layer on the ferroelectric layer; (D) forming a mask having a predetermined pattern on the second electrode layer; (E)... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC

20090275147 - Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean: A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are... Agent: Texas Instruments Incorporated

20090275148 - Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean: A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are... Agent: Texas Instruments Incorporated

20090275150 - Film formation apparatus and method for semiconductor process: A film formation apparatus for a semiconductor process includes a source gas supply circuit to supply into a process container a source gas for depositing a thin film on target substrates, and a mixture gas supply circuit to supply into the process container a mixture gas containing a doping gas... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090275149 - Methods and systems for controlling critical dimensions in track lithography tools: A method of controlling wafer critical dimension (CD) uniformity on a track lithography tool includes obtaining a CD map for a wafer. The CD map includes a plurality of CD data points correlated with a multi-zone heater geometry map. The multi-zone heater includes a plurality of heater zones. The method... Agent: Townsend And Townsend And Crew, LLP

20090275151 - Method of forming printhead by removing sacrificial material through nozzle apertures: A method of fabricating an inkjet printhead by forming a plurality of actuators on a monolithic substrate, covering the actuators with a sacrificial material, covering the sacrificial material with a printhead surface layer, defining a plurality of nozzle apertures in the printhead surface layer such that each of the actuators... Agent: Silverbrook Research Pty Ltd

20090275152 - Process for the collective fabrication of microstructures consisting of superposed elements: The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for... Agent: Lowe Hauptman Ham & Berner, LLP

20090275153 - Method of production of semiconductor light emission device and method of production of light emission apparatus: A method of production of semiconductor light emission devices for forming stripes of two multilayers having different emission wavelengths on a substrate, including the steps of: depositing a first multilayer including an active layer on the substrate; selectively etching the first multilayer to form a plurality of adjoining pairs of... Agent: Sonnenschein Nath & Rosenthal LLP

20090275156 - Light-emitting gallium nitride-based iii-v group compound semiconductor device and manufacturing method thereof: A light-emitting gallium nitride-based III-V group compound semiconductor device and a manufacturing method thereof are disclosed. The light emitting device includes a substrate, a n-type semiconductor layer over the substrate, an active layer over the n-type semiconductor layer, a p-type semiconductor layer over the active layer, a conductive layer over... Agent: Rosenberg, Klein & Lee

20090275154 - Method of fabricating light emitting device: A light emitting device wafer is fabricated, having a light emitting layer section, composed of AlGaInP, based on a double heterostructure and a GaP light extraction layer disposed on the light emitting layer portion, having a first main surface thereof appearing on the first main surface of the wafer, so... Agent: Oliff & Berridge, PLC

20090275155 - Method of fabrication a liquid crystal display device: The present invention relates to a transflective thin film transistor substrate and method of fabricating the same that is adaptive for simplifying its process. The liquid crystal display device includes: first and second substrates; a gate line on the first substrate; a gate insulating film on the first substrate; a... Agent: Mckenna Long & Aldridge LLP

20090275157 - Optical device shaping: Embodiments described herein provide methods for manufacturing an optical device having shaped sidewalls. A desired substrate shape corresponding to an LED or other optical device can be determined. The optical device can have a substrate comprising an exit face and sidewalls positioned and shaped to reflect light to the exit... Agent: SprinkleIPLaw Group

20090275158 - Manufacturing method of display device: A liquid crystal display device having high quality and high reliability is manufactured by preventing the occurrence of damages on a terminal portion due to the radiation of laser beams in cutting a substrate of the display device which is formed using a plastic substrate by the radiation of laser... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090275159 - Method for manufacturing nitride semiconductor laser element: A method for manufacturing a nitride semiconductor laser element having a nitride semiconductor layer including at least an active layer provided on a substrate, a pair of cavity planes formed on the nitride semiconductor layer, and a protruding part where part of the substrate protrudes from said cavity plane, said... Agent: GlobalIPCounselors, LLP

20090275160 - Semiconductor device manufacturing method: After a p-type cladding layer, an etching rate reducing layer and a p-type contact layer are formed in order on an n-type substrate, an etching mask is formed. Then, by using the etching mask, the p-type contact layer, the etching rate reducing layer and the p-type cladding layer are partially... Agent: Birch Stewart Kolasch & Birch

20090275161 - Light-emitting element and light emitting device using the same: The present invention provides a light-emitting element having less increase in driving voltage with the accumulation of light-emission time, and provides a light-emitting element having less increase in resistance value with the increase in film thickness. A light-emitting element includes a first layer, a second layer and a third layer... Agent: Eric Robinson

20090275162 - Cmos-compatible bulk-micromachining process for single-crystal mems/nems devices: A process producing a single-crystalline device fabricated on a single-sided polished wafer employing processing from only the front-side and having a significant separation between the device and substrate is provided. In one embodiment, a method comprises an upper layer and a lower substrate. A device is formed in the upper... Agent: Vern Maine & Associates

20090275163 - System and method of encapsulation: Embodiments discussed herein generally include methods of fabricating MEMS devices within a structure. The MEMS device may be formed in a cavity above the structure, and additional metallization may occur above the MEMS device. The cavity may be formed by depositing an encapsulating layer over the sacrificial layers that enclose... Agent: Patterson & Sheridan, L.L.P.

20090275164 - Bicyclic guanidinates and bridging diamides as cvd/ald precursors: Precursors for use in depositing metal-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for depositing Ge2Sb2Te5 chalcogenide thin films in the manufacture of nonvolatile Phase... Agent: Intellectual Property / Technology Law

20090275165 - Process for fabricating a high-integration-density image sensor: The invention relates to the fabrication of an electronic component having a very high integration density, notably an image sensor. The component comprises two, superposed integrated circuits, one of which one (the image sensor) is formed on the front side of a thinned first silicon substrate (12) and the other... Agent: Lowe Hauptman Ham & Berner, LLP

20090275166 - Method for manufacturing infrared detecting device: A semiconductor layer is prepared in which a silicon substrate, a BOX layer and an SOI layer are laminated in this order. A silicon diode section used as an infrared detection portion is formed in the SOI layer. Further, an isolation portion is formed so as to extend from the... Agent: Rabin & Berdo, PC

20090275167 - Method making an electrical device: Conventionally, organic semiconductor devices are usually formed by either laser ablation, photolithography or by conductive inkjet printing. All these methods have short coming such as either being unsuitable for high volume production, slow, expensive or as is particularly the case in inject printing, the choice of metals used is restricted... Agent: Fleit Gibbons Gutman Bongini & Bianco Pl

20090275168 - Phase change material with filament electrode: The present invention, in one embodiment, provides a memory device that includes a phase change memory cell; a first electrode; and a layer of filamentary resistor material positioned between the phase change memory cell and the first electrode, wherein at least one bistable conductive filamentary pathway is present in at... Agent: Scully, Scott, Murphy & Presser, P.C.

20090275169 - Semiconductor devices and methods of forming the same: A semiconductor device which includes a reaction prevention layer between a resistive memory element and an insulating layer and a method of forming the same.... Agent: F. Chau & Associates, LLC

20090275170 - Low temperature hermetic bonding at water level and method of bonding for micro display application: A spatial light modulator is fabricated by bonding a capping layer over a wafer bearing active reflecting surfaces utilizing a low temperature bonding agent capable of providing a hermetic seal, such as a glass frit. The low temperature bonding agent may be B-stage cured after application to the capping layer,... Agent: Townsend And Townsend And Crew, LLP

20090275171 - Methods for assembling thin semiconductor die: The invention is based on the discovery that certain self-filleting die attach adhesives are useful in semiconductor die assemblies containing thin die. As used herein, the term “self-filleting” refers to any adhesive that when dispensed and then subjected to suitable cure conditions, will flow and fill up the area between... Agent: Henkel Corporation

20090275172 - Stacking semiconductor device and production method thereof: In a stacking semiconductor device in which a first-layer and a second-layer semiconductor devices are stacked and bonded with a solder, warpage occurs due to a difference in thermal expansion coefficient of constituent members or a difference in elastic modulus of individual members. Therefore, between the first-layer and the second-layer... Agent: Fitzpatrick Cella Harper & Scinto

20090275173 - Methods for reducing stress in microelectronic devices and microelectronic devices formed using such methods: Methods for reducing stress in microelectronic devices and microelectronic devices formed using such methods are disclosed herein. One such device can include a first support member, a second support member, and a microelectronic die positioned between the first support member and the second support member such that the second support... Agent: Perkins Coie LLP Patent-sea

20090275174 - Soldering container and production method of semiconductor device: A soldering container configured to be conveyed by a conveyance mechanism during soldering in a state accommodating a soldering subject. The container includes a sealable container body for accommodating the soldering subject. The container body includes at least one communication passage enabling communication between the inside and outside of the... Agent: Morgan & Finnegan Transition Team C/o Locke Lord Bissell & Liddell

20090275175 - Modified chip attach process: A process for assembling a package for a semiconductor device comprising reducing the stress in an inner dielectric layer during packaging by heating the die and the substrate to a temperature where a solder reflows, dropping to a temperature where a selected epoxy will cure, liquefying the epoxy, adding the... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20090275176 - Semiconductor device and method of fabricating the same: A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate... Agent: H.c. Park & Associates, PLC

20090275177 - Semiconductor device with multiple channels and method of fabricating the same: A semiconductor device with multiple channels includes a semiconductor substrate and a pair of conductive regions spaced apart from each other on the semiconductor substrate and having sidewalls that face to each other. A partial insulation layer is disposed on the semiconductor substrate between the conductive regions. A channel layer... Agent: Mills & Onello LLP

20090275178 - Method of manufacturing polysilicon thin film and method of manufacturing thin film transistor having the same: In a method of manufacturing a polysilicon thin film and a method of manufacturing a TFT having the thin film, a laser beam is irradiated on a portion of an amorphous silicon thin film to liquefy the portion of the amorphous silicon thin film. The amorphous silicon thin film is... Agent: Haynes And Boone, LLPIPSection

20090275179 - Complementary metal oxide semiconductor device with an electroplated metal replacement gate: Disclosed herein are embodiments of a method of forming a complementary metal oxide semiconductor (CMOS) device that has at least one high aspect ratio gate structure with a void-free and seam-free metal gate conductor layer positioned on top of a relatively thin high-k gate dielectric layer. These method embodiments incorporate... Agent: International Business Machines Corporation Dept. 18g

20090275180 - Method for manufacturing a semiconductor device: A conventional power MOSFET structure is difficult to improve a breakdown voltage of an element even using a super-junction structure. A power MOSFET according to an embodiment of the invention is a semiconductor device of a super-junction structure, including: a gate electrode filled in a trench formed on a semiconductor... Agent: Young & Thompson

20090275181 - Semiconductor device and method of manufacturing the same: A semiconductor device according to an example of the present invention includes a first semiconductor region of a first conductivity type, a first MIS transistor of a second conductivity type formed in the first semiconductor region, a second semiconductor region of a second conductivity type, and a second MIS transistor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090275182 - Method for fabricating a metal high dielectric constant transistor with reverse-t gate: A method is provided for fabricating a transistor. A silicon layer is provided, and a first layer comprising a high dielectric constant material is formed on the silicon layer. A second layer including a metal or metal alloy is formed on the first layer, and a third layer including silicon... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20090275183 - Method of manufacturing semiconductor device: A thermal oxidation method capable of obtaining a high oxidation rate by generating a sufficient enhanced-rate oxidation phenomenon even in a low temperature region is provided. In addition, a thermal oxidation method capable of forming a silicon oxide film having a high reliability even when formed at a low temperature... Agent: Mattingly & Malur, P.C.

20090275184 - Fabricating method of semiconductor device: Disclosed is a method of fabricating a semiconductor device. The method of fabricating a semiconductor device includes removing a part of an isolation layer from a semiconductor substrate such that an active area of the semiconductor substrate protrudes from the isolation layer; rounding edge portions of the active area; forming... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090275185 - Methods of forming capacitors: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the... Agent: Wells St. John P.s.

20090275186 - Method for forming capacitor of semiconductor device: Forming a capacitor of a semiconductor device includes forming an interlayer dielectric having holes over a semiconductor substrate. A conductive layer is then formed on surfaces of the holes and on the upper surface of the interlayer dielectric. A silicon-containing conductive layer is formed by flowing a silicon source gas... Agent: Ladas & Parry LLP

20090275187 - Methods of forming capacitors: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the... Agent: Wells St. John P.s.

20090275188 - Slurry for polishing phase change material and method for patterning polishing phase change material using the same: Disclosed is a slurry for polishing a phase change material. The slurry includes an abrasive, an alkaline polishing promoter and deionized water. Due to the use of the abrasive and the alkaline polishing promoter, the pH of the slurry is adjusted, the polishing rate of the phase change material is... Agent: Christie, Parker & Hale, LLP

20090275189 - Method for manufacturing silicon on sapphire wafer: The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon layer, and a stress relaxing film which cancels stress produced in the silicon nitride layer, wherein the silicon nitride layer and... Agent: Rabin & Berdo, PC

20090275190 - Method for forming buffer layer for gan single crystal: The nanoporous buffer layer interposed on the interface between the sapphire substrate and galluim nitride reduces tensile stress generated by the difference in thermal expansion coefficient between gallium nitride and the sapphire substrate, enables growth of the gallium nitride layer to a thickness of 1 micrometer (m) to several millimeters... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090275191 - Method and apparatus for electrostatic discharge protection using a temporary conductive coating: A method and apparatus for providing ESD protection of an integrated circuit using a temporary conductive coating. The method deposits a temporary conductive coating upon a chip die between contacts to be protected such that a conductive path is created between contacts, provides a carrier substrate that is then bonded... Agent: Ibm Corporation, T.j. Watson Research Center

20090275192 - Molded dielectric layer in print-patterned electronic circuits: A method forms a first active electronic layer, prints an array of pillars on the first active electronic layer, dispenses a curable polymer over the array of pillars, molds the curable polymer by contacting the curable polymer with a mold structure to displace the curable polymer from upper surfaces of... Agent: Marger Johnson & Mccollom/parc

20090275193 - Method of manufacturing a semiconductor integrated circuit device: In forming five trenches buried with an intermediate conductive layer for connecting transfer MISFETs and driving MISFETs with vertical MISFETs formed thereover, in which the second and third trenches, and the first, fourth, and fifth trenches are formed separately by twice etching using first and second photoresist films as a... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090275194 - Semiconductor device having multiple wiring layers and method of producing the same: A method of producing a semiconductor device having a plurality of wiring layers forms a first interlayer-insulating film, forms a plurality of grooves for wiring in the first interlayer-insulating film, fills metallic films in the grooves to form wirings, etches the first interlayer-insulating film with the wirings as a mask... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090275195 - Interconnect structure having a silicide/germanide cap layer: An interconnect structure of an integrated circuit and a method for forming the same are provided. The interconnect structure includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, a conductor in the low-k dielectric layer, and a cap layer on the conductor. The cap layer has at... Agent: Slater & Matsil, L.L.P.

20090275196 - Semiconductor device and manufacturing method thereof: When a metal layer 11 is provided over a substrate, an oxide layer 12 is provided in contact with the metal layer 11, a layer to be peeled 13 is formed, and the metal layer 11 is irradiated with a laser beam to perform oxidization and form a metal oxide... Agent: Eric Robinson

20090275197 - Method for manufacturing semiconductor device: A hole is formed in an insulating layer. A semiconductor substrate is heated at a temperature of equal to or more than 330° C. and equal to or less than 400° C. Tungsten-containing gas and at least one of B2H6 gas and SiH4 gas are introduced into a reaction chamber... Agent: Young & Thompson

20090275198 - Vapor phase methods for forming electrodes in phase change memory devices: A method for forming electrode materials uniformly and conformally within openings having small dimensions, including sublithographic dimensions, or high aspect ratios. The method includes the steps of providing an insulator layer having an opening formed therein, and forming a conformal conductive or semiresistive material over and within the opening. The... Agent: Kevin L. Bray Ovonyx, Inc.

20090275199 - Unsymmetrical ligand sources, reduced symmetry metal-containing compounds, and systems and methods including same: The present invention provides metal-containing compounds that include at least one β-diketiminate ligand, and methods of making and using the same. In some embodiments, the metal-containing compounds are homoleptic complexes that include unsymmetrical β-diketiminate ligands. In other embodiments, the metal-containing compounds are heteroleptic complexes including at least one β-diketiminate ligand.... Agent: Mueting, Raasch & Gebhardt, P.A.

20090275201 - Substrate processing system: A substrate processing method implemented in a substrate processing system that includes an etching apparatus that carries out plasma etching processing on a substrate and a vacuum-type substrate transferring apparatus to which the etching apparatus is connected is provided. A first step includes forming a protective film on a rear... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090275200 - Technique for reducing topography-related irregularities during the patterning of a dielectric material in a contact level of closely spaced transistors: In a dual stress liner approach, the surface conditions after the patterning of a first stress-inducing layer may be enhanced by appropriately designing an etch sequence for substantially completely removing an etch stop material, which may be used for the patterning of the second stress-inducing dielectric material, while, in other... Agent: Williams, Morgan & Amerson

20090275202 - Silicon structure having an opening which has a high aspect ratio, method for manufacturing the same, system for manufacturing the same, and program for manufacturing the same, and method for manufacturing etching mask for the silicon structure: Provided are a silicon structure having an opening which has a high aspect ratio and an etching mask for forming the silicon structure. A step of performing hole etching or trench etching of silicon so as to substantially expose a portion of at least a bottom surface of etched silicon... Agent: Dorsey & Whitney LLP Intellectual Property Department

20090275203 - Method for processing a thin film micro device on a substrate: A method for processing a thin film micro device on a substrate includes: 1) depositing a carbon film on the substrate as a sacrificial layer; 2) photolithographically defining a first predetermined pattern in the carbon film; 3) etching an unwanted portion of the carbon film outside the first predetermined pattern;... Agent: J C Patents

20090275204 - Method for abating effluent from an etching process: A method for abating effluent from an etching process in one embodiment includes advancing etch gas product into a passageway of a gas connector in direct fluid communication with a first chamber of an interior void of an apparatus, advancing a gas from a gas source into said passageway of... Agent: Lsi Corporation

20090275205 - Methods of removing silicon oxide and gaseous mixtures for achieving same: A method of removing at least a portion of a silicon oxide material is disclosed. The silicon oxide is removed by exposing a semiconductor structure comprising a substrate and the silicon oxide to an ammonium fluoride chemical treatment and a subsequent plasma treatment, both of which may be effected in... Agent: Trask Britt, P.C./ Micron Technology

20090275206 - Plasma process employing multiple zone gas distribution for improved uniformity of critical dimension bias: A passivation species precursor gas is furnished to an inner zone at a first flow rate, while flowing an etchant species precursor gas an annular intermediate zone at a second flow rate. Radial distribution of etch rate is controlled by the ratio of the first and second flow rates. The... Agent: Law Office Of Robert M. Wallace

20090275207 - Plasma processing method and computer readable storage medium: A plasma etching method includes disposing first electrode and second electrodes; preparing a part in a processing chamber; supporting a substrate by the second electrode to face the first electrode; vacuum-evacuating the processing chamber; supplying a first processing gas containing an etchant gas into a processing space between the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090275208 - Compositions of matter, and methods of removing silicon dioxide: Some embodiments include methods of removing silicon dioxide in which the silicon dioxide is exposed to a mixture that includes activated hydrogen and at least one primary, secondary, tertiary or quaternary ammonium halide. The mixture may also include one or more of thallium, BX3 and PQ3, where X and Q... Agent: Wells St. John P.s.

20090275209 - Plasma processing apparatus and method: Disclosed is a plasma processing apparatus and a plasma processing method, by which ions of plasma can be injected uniformly over the whole surface of a substrate to be processed, in a short time. Specifically, when the substrate is processed in a reaction container, the gas pressure inside the reaction... Agent: Cowan Liebowitz & Latman P.C. John J Torrente

20090275210 - Combinatorial plasma enhanced deposition techniques: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein... Agent: Legal Department

20090275211 - Fabrication method of porous low-k dielectric film: A method for fabricating a porous low-k dielectric film includes providing a substrate, performing a first CVD process by providing a back-bone precursor to form an interface dielectric layer, performing a second CVD process by providing a porogen precursor to form a back-bone layer, and removing the porogen material in... Agent: North America Intellectual Property Corporation

20090275212 - Method and apparatus for processing semiconductor wafer after impurity implantation: A semiconductor wafer implanted with impurities is loaded into a chamber. After oxygen gas is introduced around the semiconductor wafer, the semiconductor wafer is irradiated with a flash of light from flash lamps for an irradiation time not shorter than 0.1 milliseconds and not longer than 100 milliseconds, to thereby... Agent: Ostrolenk Faber Gerb & Soffen

20090275213 - Semiconductor wafer processing method and apparatus: A processing method of a semiconductor wafer is provided. The method comprising the steps of: removing at least part of oxide film from a surface of the semiconductor wafer; removing liquid from the surface; and providing at least partial oxide film on the surface by applying an oxidizing gas wherein... Agent: Alston & Bird LLP

20090275214 - Methods of reducing defect formation on silicon dioxide formed by atomic layer deposition (ald) processes and methods of fabricating semiconductor structures: Methods for reducing and inhibiting defect formation on silicon dioxide formed by atomic layer deposition (ALD) are disclosed. Defect reduction is accomplished by performing processing on the silicon dioxide subsequent to deposition by ALD. The post-deposition processing may include at least one of a pump/purge cycle and a water exposure... Agent: Trask Britt, P.C./ Micron Technology

20090275215 - Suitably short wavelength light for laser annealing of silicon in dsa type systems: The present invention generally relates to a thermal processing apparatus and method that permits a user to index one or more preselected light sources capable of emitting one or more wavelengths to a collimator. Multiple light sources may permit a single apparatus to have the capability of emitting multiple, preselected... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090263918 - Methods and apparatuses for determining thickness of a conductive layer: Methods and apparatuses are provided for calibrating eddy current sensors. A calibration curve is formed relating thickness of a conductive layer in a magnetic field to a value measured by the eddy current sensors or a value derived from such measurement, such as argument of impedance. The calibration curve may... Agent: Knobbe, Martens, Olson & Bear, LLP

20090263919 - Plasma oxidation processing method: A plasma oxidation process is performed to form a silicon oxide film on the surface of a target object by use of plasma with an O(1D2) radical density of 1×1012 [cm−3] or more generated from a process gas containing oxygen inside a process chamber of a plasma processing apparatus. During... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263920 - Protection of cavities opening onto a face of a microstructured element: p

20090263922 - Reflective positive electrode and gallium nitride-based compound semiconductor light-emitting device using the same: A gallium nitride-based compound semiconductor light-emitting device which has a highly reflective positive electrode that has high reverse voltage and excellent reliability with low contact resistance to the p-type gallium nitride-based compound semiconductor layer. The reflective positive electrode for a semiconductor light-emitting device comprises a contact metal layer adjoining a... Agent: Sughrue Mion, PLLC

20090263921 - Thin film transistor substrate with color filter and method for fabricting the same: A color filter-on-thin film transistor substrate includes gate data lines crossing each other and defining pixel areas, thin film transistors is located at crossings of gate and data lines, pixel electrodes connected to the thin film transistors and formed within the pixel areas, and stripe-shaped color filters overlapping a plurality... Agent: Mckenna Long & Aldridge LLP

20090263923 - Semiconductor device using buried oxide layer as optical wave guides: A semiconductor optical wave guide device is described in which a buried oxide layer (BOX) is capable of guiding light. Optical signals may be transmitted from one part of the semiconductor device to another, or with a point external to the semiconductor device, via the wave guide. In one example,... Agent: Banner & Witcoff, Ltd.

20090263924 - Organic light-emitting display device and method of manufacturing the same: Provided is an organic light-emitting display device that can display a full color image by forming a simple structure of light-emitting layers and a method of manufacturing the same. The organic light-emitting display device includes a substrate; a first electrode layer formed on the substrate; a second electrode layer which... Agent: Knobbe Martens Olson & Bear LLP

20090263925 - Nitride-based light-emitting device and method of manufacturing the same: A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear... Agent: Mcdermott Will & Emery LLP

20090263926 - Optical semiconductor device having active layer of p-type quantum dot structure and its manufacture method: An active layer having a p-type quantum dot structure is disposed over a lower cladding layer made of semiconductor material of a first conductivity type. An upper cladding layer is disposed over the active layer. The upper cladding layer is made of semiconductor material, and includes a ridge portion and... Agent: Kratz, Quintos & Hanson, LLP

20090263927 - Isolation structures for cmos image sensor chip scale packages: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090263928 - Method for making a selective emitter of a solar cell: A method for manufacturing a selective emitter of a solar cell is provided. The method includes steps of providing a substrate; forming an emitter layer on the substrate, wherein the emitter layer has a heavily doped portion located on a top thereof and a relatively lightly doped portion located at... Agent: Volpe And Koenig, P.C.

20090263929 - Methods for producing solid-state imaging device and electronic device: A method for producing a solid-state imaging device includes steps of: forming transfer electrodes on a substrate having a plurality of light-sensing portions through a gate insulating layer so that the light-sensing portions are exposed; forming a planarized insulating layer on the substrate to cover the transfer electrodes formed on... Agent: Rader Fishman & Grauer PLLC

20090263930 - Microcrystalline silicon deposition for thin film solar applications: Embodiments of the invention as recited in the claims relate to thin film multi-junction solar cells and methods and apparatuses for forming the same. In one embodiment a method of forming a thin film multi-junction solar cell over a substrate is provided. The method comprises positioning a substrate in a... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090263931 - Thinned image sensor with trench-insulated contact terminals: The invention relates to the fabrication of thinned substrate image sensors, and notably color image sensors. After the fabrication steps carried out from the front face of a silicon substrate the front face is transferred onto a substrate. The silicon is thinned, and the connection terminals are produced by the... Agent: Lowe Hauptman Ham & Berner, LLP

20090263933 - Field effect transistor and method of producing same: wherein R1 and R2 are independently selected from the group consisting of a hydrogen atom, a halogen atom, a hydroxyl group, and alkyl, alkenyl, oxyalkyl, thioalkyl, alkyl ester and aryl groups each having 1 to 12 carbon atoms with the proviso that adjacent R1 may be the same or different... Agent: Fitzpatrick Cella Harper & Scinto

20090263932 - Organic semiconductor thin films using aromatic enediyne derivatives and manufacturing methods thereof, and electronic devices incorporating such films: Disclosed are organic semiconductor thin films using aromatic enediyne derivatives, manufacturing methods thereof, and methods of fabricating electronic devices incorporating such organic semiconductor thin films. Aromatic enediyne derivatives according to example embodiments provide improved chemical and/or electrical stability which may improve the reliability of the resulting semiconductor devices. Aromatic enediyne... Agent: Harness, Dickey & Pierce, P.L.C

20090263934 - Methods of forming chalcogenide films and methods of manufacturing memory devices using the same: A method of forming a chalcogenide film is provided which includes forming a germanium film on a substrate by exposing the substrate to a germanium source and a first antimony source, and growing a polynary film from the germanium film by exposing the germanium film to at least one of... Agent: Volentine & Whitt PLLC

20090263935 - Recycling faulty multi-die packages: The present invention teaches the recycling of a faulty multi-die memory package by isolating the functional part of the package and using it as a smaller memory package.... Agent: Vierra Magen/sandisk Corporation

20090263936 - Insulating liquid die-bonding agent and semiconductor device: An insulating liquid die-bonding agent for bonding a semiconductor-chip-mounting member to an active surface of a semiconductor chip, said agent comprising: (A) a mixture of (a-1) an organopolysiloxane resin having alkenyl groups and (a-2) a linear-chain organopolysiloxane having in one molecule at least two alkenyl groups; (B) an organopolysiloxane having... Agent: Howard & Howard Attorneys PLLC

20090263937 - Leadframe package for mems microphone assembly: A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have... Agent: Robert D. Atkins

20090263938 - Method for manufacturing semiconductor device: In a double-sided electrode package, a sealing resin layer is formed so as to fill peripheries of surface-side terminals formed on a package substrate. Since the side surfaces of the surface-side terminals have plural protruded rims, adhesion with the sealing resin layer is improved by an anchor effect. At a... Agent: Rabin & Berdo, PC

20090263939 - Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263940 - Molding cleaning sheet and method of producing semiconductor devices using the same: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half... Agent: Mattingly & Malur, P.C.

20090263941 - Multi-channel type thin film transistor and method of fabricating the same: A multi-channel type thin film transistor includes a gate electrode over a substrate extending along a first direction, a plurality of active layers parallel to and spaced apart from each other extending along a second direction crossing the first direction, and source and drain electrodes spaced apart from each other... Agent: Morgan Lewis & Bockius LLP

20090263942 - Semiconductor device and method for manufacturing the same: A single crystal semiconductor substrate including an embrittlement layer is attached to a base substrate with an insulating layer interposed therebetween, and the single crystal semiconductor layer is separated at the embrittlement layer by heat treatment; accordingly, a single crystal semiconductor layer is fixed over the base substrate. The single... Agent: Eric Robinson

20090263943 - Method of fabricating semiconductor integrated circuit device: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETS by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090263944 - Method for making low vt gate-first light-reflective-layer covered dual metal-gates on high-k cmosfets: This invention proposes a method for making low Vt light-reflective-layer/dual-metal-gates/high-κ CMOSFETs with simple light-irradiation anneal and light-reflective-layer covered dual metal-gates with self-aligned and gate-first process compatible with current VLSI process. At 1.05 nm EOT, good φm-eff of 5.04 and 4.24 eV, low Vt of −0.16 and 0.13 V, high mobility... Agent: Bacon & Thomas, PLLC

20090263946 - Device having pocketless regions and methods of making the device: An example of the present application is directed to an integrated circuit having a first plurality of transistors and a second plurality of transistors. Each of the first plurality of transistors comprises a first gate structure oriented in a first direction and each of the second plurality of transistors comprises... Agent: Texas Instruments Incorporated

20090263945 - Manufacturing method of cmos type semiconductor device, and cmos type semiconductor device: The manufacturing method of the CMOS type semiconductor device which can suppress the boron penetration from the gate electrode of the pMOS transistors to the semiconductor substrate in the case that boron is contained in the gate electrodes, while enabling the improvement in the NBTI lifetime of the pMOS transistors,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263947 - Bottom source ldmosfet structure and method: This invention discloses a method to form a bottom-source lateral diffusion MOS (BS-LDMOS) device with a source region disposed laterally opposite a drain region near a top surface of a semiconductor substrate supporting a gate thereon between the source region and a drain region. The method includes a step of... Agent: Bo-in Lin

20090263948 - Metal oxide semiconductor field-effect transistor (mosfet) and method of fabricating the same: A Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) is provided. The MOSFET includes a semiconductor substrate, a device isolating region disposed on a predetermined portion of the semiconductor substrate to define an active region, a source region and a drain region spaced apart from each other about a channel region within... Agent: F. Chau & Associates, LLC

20090263949 - Transistors having asymmetric strained source/drain portions: A structure formation method. First, a structure is provided including (a) a fin region comprising (i) a first source/drain portion having a first surface and a third surface parallel to each other, not coplanar, and both exposed to a surrounding ambient, (ii) a second source/drain portion having a second surface... Agent: Schmeiser, Olsen & Watts

20090263950 - Semiconductor device: A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263951 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes the steps of forming an insulating film on a semiconductor substrate, forming a plurality of wiring trenches in the insulating film, forming a plurality of wirings in the plurality of wiring trenches, forming a resist mask having an opening for selectively exposing... Agent: Mcdermott Will & Emery LLP

20090263952 - Semiconductor device fabrication using spacers: A process for fabrication of a semiconductor device that includes forming a first trench in a semiconductor body, forming spaced spacers in the first trench, and forming a narrower second trench at the bottom of the first trench using the spacers as a mask.... Agent: Farjami & Farjami LLP

20090263953 - Method for low temperature bonding and bonded structure: A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263954 - Semiconductor wafer sawing system and method: Semiconductor wafer sawing systems and methods are described in which a wafer may be secured in a sawing position having a surface exposed to incur sawing with at least a portion of the exposed wafer surface positioned below the center of gravity of the wafer such that prevailing force of... Agent: Texas Instruments Incorporated

20090263955 - Gan single crystal substrate and method of making the same: The method of making a GaN single crystal substrate comprises a mask layer forming step of forming on a GaAs substrate 2 a mask layer 8 having a plurality of opening windows 10 disposed separate from each other; and an epitaxial layer growing step of growing on the mask layer... Agent: Smith, Gambrell & Russell

20090263958 - Clathrate compounds and methods of manufacturing: The present invention comprises new materials, material structures, and processes of fabrication of such that may be used in technologies involving the conversion of light to electricity and/or heat to electricity, and in optoelectronics technologies. The present invention provide for the fabrication of a clathrate compound comprising a type II... Agent: Smith Hopen, Pa

20090263957 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.

20090263956 - Spray method for producing semiconductor nano-particles: A method is provided for producing semiconductor nanoparticles comprising: (i) dissolving a semiconductor compound or mixture of semiconductor compounds in a solution; (ii) generating spray droplets of the resulting solution of semiconductor compound(s); (iii) vaporizing the solvent of said spray droplets, consequently producing a stream of unsupported semiconductor nanoparticles; and... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20090263959 - Method of manufacturing semiconductor wafer: A device layer is formed on at least the upper surface of a prime wafer by an epitaxial growth method. Then, a protective film is formed to cover at least the device layer. The lower surface of the prime wafer is ground to have a flat lower surface.... Agent: Rabin & Berdo, PC

20090263960 - Semiconductor device with recess gate and method of fabricating the same: A semiconductor device with a recess gate includes a substrate, a semiconductive layer having an opening corresponding to a gate region, a gate electrode filled in the opening, and a gate insulating layer interposed between the gate electrode and the substrate, and between the gate electrode and the semiconductive layer.... Agent: Lowe Hauptman Ham & Berner, LLP

20090263961 - Hardware set for growth of high k & capping material films: The present invention generally includes a method and an apparatus for depositing both a high k layer and a capping layer within the same processing chamber by coupling gas precursors, liquid precursors, and solid precursors to the same processing chamber. By coupling gas precursors, liquid precursors, and solid precursors to... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090263962 - Non-volatile memory cell device and methods: A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming a second dielectric layer over the nanodots, where the second dielectric layer encases the nanodots. In addition, an intergate dielectric layer is formed over the second dielectric layer. To form sidewalls of the... Agent: Brooks, Cameron & Huebsch , PLLC

20090263963 - Semiconductor device and manufacturing method therefor: In a semiconductor having a multilayer wiring structure device on a semiconductor substrate, the multilayer wiring structure includes an interlayer insulating film having at least an organic siloxane insulating film. The organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263964 - Interconnections for integrated circuits: An interconnect connection structure having first and second interconnects and multiple connection elements that electrically connect the first interconnect to the second interconnect is described. The multiple connection elements are formed laterally in a lateral region of the first and second interconnects relative to an overlay orientation of the interconnects.... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20090263965 - Self-aligned barrier layers for interconnects: An interconnect structure for integrated circuits incorporates manganese silicate and manganese silicon nitride layers that completely surrounds copper wires in integrated circuits and methods for making the same are provided. The manganese silicate forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown,... Agent: Wilmerhale/boston

20090263966 - Apparatus for sputtering and a method of fabricating a metallization structure: A method of depositing a metallization structure (1) comprises depositing a TaN layer (4) by applying a power supply between an anode and a target in a plurality of pulses to reactively sputter Ta from the target onto the substrate (2) to form a TaN seed layer (4). A Ta... Agent: Pearne & Gordon LLP

20090263969 - Hidden plating traces: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate... Agent: Vierra Magen/sandisk Corporation

20090263968 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes: forming a conductive film over a semiconductor wafer; forming a mask film over the conductive film; removing a portion of the mask film covering at least a peripheral portion of the semiconductor wafer such that a portion of the mask film covering... Agent: Sughrue Mion, PLLC

20090263967 - Method of forming noble metal layer using ozone reaction gas: A noble metal layer is formed using ozone (O3) as a reaction gas.... Agent: Lowe Hauptman Ham & Berner, LLP

20090263970 - Method of forming fine pattern of semiconductor device using sige layer as sacrificial layer, and method of forming self-aligned contacts using the same: There are provided a method of forming a fine pattern of a semiconductor device using a silicon germanium sacrificial layer, and a method of forming a self-aligned contact using the same. The method of forming a self-aligned contact of a semiconductor device includes forming a conductive line structure having a... Agent: F. Chau & Associates, LLC

20090263971 - Method of manufacturing semiconductor device and substrate processing apparatus: A method of manufacturing a semiconductor device comprises: (a) loading a substrate into a process chamber, wherein the substrate has at least a silicon exposure surface and an exposure surface of silicon oxide film or silicon nitride film on a substrate surface; (b) simultaneously supplying at least a first process... Agent: Brundidge & Stanger, P.C.

20090263972 - Boron nitride and boron-nitride derived materials deposition method: A method and apparatus are provided to form spacer materials adjacent substrate structures. In one embodiment, a method is provided for processing a substrate including placing a substrate having a substrate structure adjacent a substrate surface in a deposition chamber, depositing a spacer layer on the substrate structure and substrate... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090263973 - Fin mask and method for fabricating saddle type fin using the same: A fin mask for forming saddle type fins in each of active regions formed in an island shape having a certain size with a major axis and a minor axis includes a first fin mask of a line type, and a second fin mask of an island type, wherein the... Agent: Townsend And Townsend And Crew, LLP

20090263974 - Substrate processing system for performing exposure process in gas atmosphere: A substrate processing system which sprays exposure process gas onto a substrate disposed within a chamber. The substrate processing system is used, for example, for performing an exposure process of an organic film formed on a substrate in a gas atmosphere obtained by vaporizing an organic solvent solution for dissolving... Agent: Muirhead And Saturnelli, LLC

20090263976 - Apparatus for manufacturing semiconductor device and method for manufacturing semiconductor device: Variation in the thickness of the deposited films depending on number of the processed product wafers in the deposition process employing a batch type CVD apparatus is inhibited to provide a manufacture of the film having a predetermined thickness with an improved reproducibility. The deposition apparatus 100 comprises a deposition... Agent: Young & Thompson

20090263975 - Film formation method and apparatus for forming silicon-containing insulating film doped with metal: A film formation method for a semiconductor process performs a film formation process to form a silicon-containing insulating film doped with a metal on a target substrate, in a process field inside a process container configured to be selectively supplied with a silicon source gas and a metal source gas.... Agent: Smith, Gambrell & Russell

20090263977 - Selective functionalization of doped group iv surfaces using lewis acid/lewis base interaction: A method of selectively attaching a capping agent to a Group IV semiconductor surface is disclosed. The method includes providing the Group IV semiconductor surface, the Group IV semiconductor surface including a set of covalently bonded Group IV semiconductor atoms and a set of surface boron atoms. The method also... Agent: Foley & Lardner LLP

20090263978 - Laser mask and crystallization method using the same: An embodiment of a laser crystallization method includes providing a substrate on which an amorphous silicon thin film is deposited, positioning a laser mask over the substrate, the laser mask including a mask pattern that contains transmitting regions and a blocking region, irradiating a first laser beam onto a surface... Agent: Birch Stewart Kolasch & Birch