|Semiconductor device manufacturing: process patents - Monitor Patents|
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Semiconductor device manufacturing: processBelow are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 06/11/2015 > patent applications in patent subcategories.
06/04/2015 > patent applications in patent subcategories.
05/28/2015 > 71 patent applications in 58 patent subcategories.
20150147825 - Mram device and fabrication method thereof: According to an embodiment, a magnetoresistive random access memory (MRAM) device comprises a bottom electrode, a stack, a dielectric material, a dielectric layer, and a conductive material. The bottom electrode is over a substrate, and the stack is over the bottom electrode. The stack comprises a magnetic tunnel junction (MTJ)... Agent:
20150147824 - Silicon precursors for low temperature ald of silicon-based thin-films: A silicon precursor composition is described, including a silylene compound selected from among: silylene compounds of the formula: wherein each of R and R1 is independently selected from organo substituents; amidinate silylenes; and bis(amidinate) silylenes. The silylene compounds are usefully employed to form high purity, conformal silicon-containing films of Si02,... Agent: Advanced Technology Materials, Inc.
20150147826 - Integrated system, integrated system operation method and film treatment method: An integrated system operation method is disclosed that includes the following steps: the film of a substrate is measured by a metrology apparatus to obtain a film information. The substrate is moved from the metrology apparatus to a process apparatus adjacent to the transfer apparatus. The film information is sent... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20150147828 - Semiconductor light emitting device and method for manufacturing the same: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a fluorescent material layer and a scattering layer. The semiconductor layer has a first surface and a second surface on an opposite side to the first surface and includes a light... Agent: Kabushiki Kaisha Toshiba
20150147827 - Substrate tuning system and method using optical projection: Techniques herein include systems and methods that provide a spatially-controlled or pixel-based projection of light onto a substrate to tune various substrate properties. A given pixel-based image projected on to a substrate surface can be based on a substrate signature. The substrate signature can spatially represent non-uniformities across the surface... Agent:
20150147829 - Limiting adjustment of polishing rates during substrate polishing: A method of controlling polishing includes polishing a region of a substrate at a first polishing rate, measuring a sequence characterizing values for the region of the substrate during polishing with an in-situ monitoring system, determining a polishing rate adjustment for each of a plurality of adjustment times prior to... Agent: Applied Materials, Inc.
20150147830 - Detection of substrate defects by tracking processing parameters: A method comprising processing a substrate exposed to a plasma in a processing chamber, obtaining a metric indicative of a parameter of the plasma during the processing of the substrate, and determining a defect in the substrate by comparing the metric to a predefined criteria.... Agent:
20150147831 - Method of manufacturing organic light emitting display device: Provided is a method of manufacturing an organic light emitting display device. The method includes: providing a first substrate including: a display portion, and a non-display portion, forming a thin film transistor (TFT) and an organic light emitting diode (OLED) in the display portion of the first substrate, providing a... Agent: Lg Display Co., Ltd.
20150147833 - Method for manufacturing organic light emitting diode display device: A method of manufacturing an OLED device is discussed. The method can include forming a gate electrode on a substrate; forming a gate insulation film on the substrate provided with the gate electrode; forming a channel layer, a source electrode and a drain electrode on the substrate provided with the... Agent: Lg Display Co., Ltd.
20150147832 - Method for producing light-emitting diode: A method for producing a light-emitting diode is provided, including the following steps. First, a carrier is provided, wherein the carrier comprises a die bonding surface. Then, a die bonding adhesive layer is formed on the die bonding surface, wherein the die bonding adhesive layer has a photoresist property. Next,... Agent: Lextar Electronics Corporation
20150147834 - Novel semiconductor package with through silicon vias: The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance... Agent:
20150147835 - Semiconductor light emitting device: There is provided a semiconductor light emitting device including a conductive substrate, a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked. The contact area between the first electrode layer and the first... Agent:
20150147836 - Composition for cleaning flat panel display and method for manufacturing display device using the same: The disclosure provides a cleaning agent composition for a flat panel display device, including: polyaminocarboxylic acid; alkali base; a nonionic surfactant; and a fluoride component. The cleaning agent composition for the flat panel display device can effectively remove metal oxides and organic contaminants on the substrate without impairing a transparent... Agent:
20150147838 - Manufacturing method of display device: A manufacturing method of a display device of the invention includes a step of forming an organic layer in correspondence with respective pixels on a substrate having a display area and a non-display area, the step of forming the organic layer includes a step of depositing a material of the... Agent:
20150147837 - Method of manufacturing display apparatus: A method of manufacturing a display device including providing a substrate, forming a semiconductor layer on the substrate, forming a first insulating layer on the semiconductor layer, forming a metal layer on the first insulating layer, forming a second insulating layer on the metal layer, forming an etching buffer layer... Agent:
20150147839 - Method for manufacturing a semiconductor device: A method for manufacturing a semiconductor device may include: forming a metal layer structure over a semiconductor workpiece; forming a first layer over the metal layer structure, the first layer including a first material; forming at least one opening in the first layer and the metal layer structure; depositing a... Agent: Infineon Technologies Dresden Gmbh
20150147840 - Synthesis method of organometallic complex, synthesis method of pyrazine derivative, 5,6-diaryl-2-pyrazyl triflate, light-emitting element, light-emitting device, electronic device, and lighting device: Provided is a 5,6-diaryl-2-pyrazyl triflate, its synthetic method, and a method for synthesizing an organometallic complex having a triarylpyrazine ligand from the 5,6-diaryl-2-pyrazyl triflate. The triflate is readily obtained from the corresponding 5,6-diarylpyrazin-2-ol, and the palladium-catalyzed coupling of the 5,6-diaryl-2-pyrazyl triflate with an arylboronic acid derivative leads to a high... Agent: Semiconductor Energy Laboratory Co., Ltd.
20150147841 - Method to release diaphragm in mems device: A method for releasing a diaphragm of a micro-electro-mechanical systems (MEMS) device at a stage of semi-finished product. The method includes pre-wetting the MEMS device in a pre-wetting solution to at least pre-wet a sidewall surface of a cavity of the MEMS device. Then, a wetting process after the step... Agent: Solid State System Co., Ltd.
20150147842 - Arrays of filled nanostructures with protruding segments and methods thereof: A structure and method for at least one array of nanowires partially embedded in a matrix includes nanowires and one or more fill materials located between the nanowires. Each of the nanowires including a first segment associated with a first end, a second segment associated with a second end, and... Agent:
20150147843 - Method of manufacturing photoelectric conversion apparatus: A method of manufacturing a photoelectric conversion apparatus which includes a pixel circuit section having a well where a photoelectric conversion element and an amplification element configured to generate a signal based on an amount of charge generated in the photoelectric conversion element are arranged, and a peripheral circuit section... Agent:
20150147844 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes supplying a first source gas including a germanium (Ge) precursor onto a semiconductor substrate for a first time period, and periodically interrupting the supplying of the first source gas for the first time period to form Ge elements on the semiconductor substrate.... Agent: Sk Hynix Inc.
20150147845 - Dual sided embedded die and fabrication of same background: Embodiments of the invention provide a method for forming a dual sided embedded die system. The method begins with starting material including a top surface and a bottom surface, a plurality of vias, a plurality of plated metal posts, die pads, and stiffeners. The surface are planarized to expose the... Agent:
20150147846 - No flow underfill or wafer level underfill and solder columns: A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are... Agent: International Business Machines Corporation
20150147847 - Packages with molding material forming steps: A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and... Agent:
20150147848 - Resin-encapsulated semiconductor device and method of manufacturing the same: A resin-encapsulated semiconductor device is manufactured by mounting semiconductor elements on respective die pad portions of a frame. Electrodes on the surface of the semiconductor elements are wire bonded to lead portions of the frame. The die pad portions, semiconductor elements and lead portions are encapsulated with resin, leaving a... Agent:
20150147849 - Method for manufacturing semiconductor package: Disclosed herein is a method for manufacturing a semiconductor package. According to a preferred embodiment of the present invention, a method for manufacturing a semiconductor package includes: preparing a rectangular frame having a plurality of quadrangular holes; attaching a plurality of semiconductor chips and the frame on one surface of... Agent: Samsung Electro-mechanics Co., Ltd.
20150147850 - Methods for processing a semiconductor workpiece: Methods for processing a semiconductor workpiece can include providing a semiconductor workpiece that includes one or more kerf regions; forming one or more trenches in the workpiece by removing material from the one or more kerf regions from a first side of the workpiece; mounting the workpiece with the first... Agent: Infineon Technologies Ag
20150147851 - No flow underfill or wafer level underfill and solder columns: A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are... Agent: International Business Machines Corporation
20150147852 - Vacuum carrier module, method of using and process of making the same: A vacuum carrier module includes a substrate having at least one hole and an edge region. There is at least one support on a top surface of the substrate. Further, a gel film is adhered to the edge region of the substrate. The at least one hole fluidly connects a... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20150147853 - Cmos with dual raised source and drain for nmos and pmos: An apparatus and a method for creating a CMOS with a dual raised source and drain for NMOS and PMOS. The spacers on both stack gates are of equal thickness. In this method, a first insulating layer is formed on the surface. The first region is then masked while the... Agent:
20150147854 - Method of fabricating electronic circuit: Provided is a method of fabricating an electronic circuit. The method includes preparing a substrate, forming a polymer film on the substrate, patterning the polymer film to form a polymer pattern, and forming an electronic device on the polymer pattern.... Agent: Electronics And Telecommunications Research Institute
20150147855 - Semiconductor device with high breakdown voltage and manufacture thereof: A semiconductor device includes: first and second n-type wells formed in p-type semiconductor substrate, the second n-type well being deeper than the first n-type well; first and second p-type backgate regions formed in the first and second n-type wells; first and second n-type source regions formed in the first and... Agent:
20150147856 - Semiconductor device and method of manufacturing a semiconductor device: A method of manufacturing a semiconductor device includes forming a trench in a semiconductor body. The method further includes doping a part of the semiconductor body via sidewalls of the trench by plasma doping.... Agent:
20150147857 - Memory cell: Memory cells are described with cross-coupled inverters including unidirectional gate conductors. Gate conductors for access transistors may also be aligned with a long axis of the inverter gate conductor. Contacts of one inverter in a cross-coupled pair may be aligned with a long axis of the other inverter's gate conductor.... Agent:
20150147858 - Methods of manufacturing non-volatile memory devices: A non-volatile memory device includes a substrate including an active region and a field region, selection transistors and cell transistors on the active region, bit line contacts on the bridge portions, and shared bit lines electrically connected to the bit line contacts. The active region includes string portions and bridge... Agent:
20150147859 - Antifuse of semiconductor device and method of fabricating the same: An antifuse of a semiconductor device and a method of fabricating the same capable of causing an antifuse to stably operate by rupturing the antifuse at a specific point and stabilizing a current level when rupturing the antifuse are provided. The antifuse may include: a device isolation layer defining a... Agent:
20150147862 - Method for manufacturing a semiconductor device: A semiconductor device includes a semiconductor substrate including a fin. The fin includes first and second fin portions. The first fin portion extends substantially in a horizontal direction to a surface of the semiconductor substrate. The second fin portion extends substantially in a vertical direction to the surface of the... Agent:
20150147861 - Method of manufacturing semiconductor device using surface treatment and semiconductor device manufactured by the method: A method of manufacturing a semiconductor device includes forming a first plurality of recessed regions in a substrate, the substrate having a protruded active region between the first plurality of recessed regions and the protruded active region having an upper surface and a sidewall, forming a device isolation film in... Agent:
20150147860 - Methods of fabricating semiconductor devices: Semiconductor devices may include first and second fins that protrude from a substrate, extend in a first direction, and are separated from each other in the first direction. Semiconductor devices may also include a field insulating layer that is disposed between the first and second fins to extend in a... Agent:
20150147863 - Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width: Semiconductor devices having necked semiconductor bodies and methods of forming semiconductor bodies of varying width are described. For example, a semiconductor device includes a semiconductor body disposed above a substrate. A gate electrode stack is disposed over a portion of the semiconductor body to define a channel region in the... Agent:
20150147864 - One transistor and one resistive (1t1r) random access memory (ram) structure with dual spacers: The present disclosure provides methods of making resistive random access memory (RRAM) cells. The RRAM cell includes a transistor and an RRAM structure. The RRAM structure includes a bottom electrode having a via portion and a top portion, a resistive material layer on the bottom electrode having a width that... Agent:
20150147866 - Resistive-switching memory element: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to... Agent:
20150147865 - Resistive-switching memory elements having improved switching characteristics: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode, the switching layer comprising a first metal oxide having a first bandgap greater than 4 electron volts (eV),... Agent:
20150147868 - Locally isolated protected bulk finfet semiconductor device: A semiconductor device includes a bulk substrate having a plurality of trenches formed therein. The trenches define a plurality of semiconductor fins that are integral with the bulk semiconductor substrate. A local dielectric material is disposed in each trench and between each pair of semiconductor fins among the plurality of... Agent:
20150147867 - Method of making a finfet device: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. A plurality of mandrel features are formed on a substrate. First spacers are formed along sidewalls of the mandrel feature and second spacers are along sidewalls of the first spacers. Two back-to-back adjacent second spacers separate by a... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20150147869 - Three-dimensional integrated circuit device fabrication including wafer scale membrane: Method and Apparatus so configured for the fabrication of three-dimensional integrated devices. A crystalline substrate within an area of a donor semiconductor wafer is etched. The substrate side is located opposite a device layer and has a buried insulating layer and a substrate thickness. The etching removes at least a... Agent: International Business Machines Corporation
20150147870 - Wafer processing method: A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines includes preparing a frame having a plurality of crossing partitions corresponding to the division lines of the wafer, spreading a liquid resin on the front side or back side of the wafer... Agent:
20150147871 - Aza-polysilane precursors and methods for depositing films comprising same: wherein R1 and R2 are independently selected from a linear or branched C1 to C10 alkyl group, a linear or branched C3 to C10 alkenyl group, a linear or branched C3 to C10 alkynyl group, C3 to C10 cyclic alkyl group, C3 to C10 hetero-cyclic alkyl group, a C5 to... Agent: Air Products And Chemicals, Inc.
20150147872 - Methods for fabricating integrated circuits using chemical mechanical polishing: Methods for fabricating integrated circuits are disclosed. In an exemplary embodiment, a method for fabricating an integrated circuit includes forming a silicon material layer over a semiconductor substrate. The semiconductor substrate includes a logic device region and a memory array region. The memory array region has a memory device formed... Agent: Globalfoundries Singapore Pte. Ltd.
20150147873 - Method of manufacturing semiconductor device, substrate processing apparatus, and non-transitory computer-readable storage medium: Provided is a method of manufacturing a semiconductor device. The method includes: carrying a substrate, which has a Ge-containing film on at least a portion of a surface thereof, into a process chamber; heating an inside of the process chamber, into which the substrate is carried, to a first process... Agent: Hitachi Kokusai Electric Inc
20150147874 - Method for forming a semiconductor structure: The present invention provides a manufacturing method for forming a semiconductor structure, in which first, a substrate is provided, a hard mask is disposed on the substrate, the hard mask is then patterned to form a plurality of fin hard masks and a plurality of dummy fin hard masks, afterwards,... Agent: United Microelectronics Corp.
20150147875 - Methods for forming doped silicon oxide thin films: The present disclosure relates to the deposition of dopant films, such as doped silicon oxide films, by atomic layer deposition processes. In some embodiments, a substrate in a reaction space is contacted with pulses of a silicon precursor and a dopant precursor, such that the silicon precursor and dopant precursor... Agent:
20150147876 - Low threshold voltage cmos device: A replacement metal gate process in which a high-k dielectric is applied. The high-k dielectric may be doped with lanthanum in an NMOS region or aluminum in a PMOS region. Alternatively, after a dummy gate is removed in the NMOS and PMOS regions to leave openings in the NMOS and... Agent:
20150147877 - Metal oxide protective layer for a semiconductor device: Embodiments related to metal oxide protective layers formed on a surface of a halogen-sensitive metal-including layer present on a substrate processed in a semiconductor processing reactor are provided. In one example, a method for forming a metal oxide protective layer is provided. The example method includes forming a metal-including active... Agent:
20150147878 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor substrate having two surfaces. First side faces second side and includes recesses, and a plurality of through silicon vias (TSV), which penetrate through the semiconductor substrate, are exposed by the recesses. Even when the TSVs have different heights from each other or the degree... Agent:
20150147879 - Ultra-thin structure to protect copper and method of preparation: Methods of depositing thin, low dielectric constant layers that are effective diffusion barriers on metal interconnects of semiconductor circuits are described. A self-assembled monolayer (SAM) of molecules each having a head moiety and a tail moiety are deposited on the metal. The SAM molecules self-align, wherein the head moiety is... Agent:
20150147880 - Contact structure and formation thereof: A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure. The annealed cobalt plug is formed by annealing a cobalt plug at... Agent: Taiwan Semiconductor Manufacturing Company Limited
20150147881 - Passivation ash/oxidation of bare copper: A semiconductor wafer has a clean, high quality Cu oxide formed at the surface of exposed Cu when an extended non-fabrication process time (such as shipping to an assembly/test site or prolonged storage) is expected.... Agent:
20150147882 - Integrated circuits with reduced pitch and line spacing and methods of forming the same: A method includes performing a double patterning process to form a first mandrel, a second mandrel, and a third mandrel, with the second mandrel being between the first mandrel and the second mandrel, and etching the second mandrel to cut the second mandrel into a fourth mandrel and a fifth... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20150147883 - Post-cmp cleaning and apparatus for performing the same: A method of performing a post Chemical Mechanical Polish (CMP) cleaning includes picking up the wafer, spinning a cleaning solution contained in a cleaning tank, and submerging the wafer into the cleaning solution, with the cleaning solution being spun when the wafer is in the cleaning solution. After the submerging... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20150147884 - Slurry for chemical mechanical polishing and chemical mechanical polishing method: The present invention provides a slurry for chemical mechanical polishing, containing abrasive grain (a), compound (b) having an amino group having a pKa of more than 9, and not less than 3 hydroxyl groups, and water.... Agent: Kuraray Co., Ltd.
20150147885 - Article and process for selective etching: A process for etching includes disposing an activating catalyst on a substrate; providing a vapor composition that includes an etchant oxidizer, an activatable etchant, or a combination thereof; contacting the activating catalyst with the etchant oxidizer; contacting the substrate with the activatable etchant; performing an oxidation-reduction reaction between the substrate,... Agent:
20150147886 - Method for integrated circuit patterning: A method of forming a target pattern includes forming a plurality of lines over a substrate with a first mask and forming a spacer layer over the substrate, over the plurality of lines, and onto sidewalls of the plurality of lines. The method further includes removing at least a portion... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20150147887 - Mechanisms for forming patterns: The present disclosure provides a method for forming patterns in a semiconductor device. In accordance with some embodiments, the method includes providing a substrate and a patterning-target layer over the substrate; forming one or more mandrel patterns over the patterning-target layer; forming an opening in a resist layer by removing... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20150147888 - Liquid processing apparatus, liquid processing method, and storage medium: A liquid processing apparatus of the present disclosure holds and rotate a substrate in a substrate holding unit, ejects an etching liquid while moving a main nozzle of a main nozzle unit between a first position where the etching liquid reaches a center of the substrate and a second position... Agent:
20150147889 - Tilted plate for batch processing and methods of use: A substrate processing chamber and methods for processing multiple substrates is provided and generally includes a gas distribution assembly, a susceptor assembly to rotate substrates along a path adjacent each of the gas distribution assembly and a gas diverter to change the angle of gas flow in the processing chamber.... Agent:
20150147890 - Multi-mode thin film deposition apparatus and method of depositing a thin film: A multi-mode thin film deposition apparatus including a reaction chamber, a carrying seat, a showerhead, an inert gas supplying source, a first gas inflow system and a second gas inflow system is provided. The carrying seat is disposed in the reaction chamber. The showerhead has a gas mixing room and... Agent: Industrial Technology Research Institute
20150147891 - Method of manufacturing semiconductor device, substrate processing apparatus and non-transitory computer-readable recording medium: A thin film having a high resistance to HF and a low dielectric constant is formed with high productivity. A method of manufacturing a semiconductor device, includes performing a cycle a predetermined number of times, the cycle including: (a) supplying a source gas containing a predetermined element, carbon and a... Agent:
20150147892 - Method for fabricating semiconductor structure, and solid precursor delivery system: A method for fabricating a semiconductor structure is provided, including: providing a solid precursor having a first average particle size; solving the solid precursor in an organic solvent into an intermediate; recrystallizing the intermediate to form solid granules, wherein the solid granules has a second average particle size larger than... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20150147893 - Precursors for cvd silicon carbo-nitride films: m
20150147894 - Substrate processing apparatus, method of manufacturing semiconductor device and non-transitory computer-readable recording medium: Heating within a plane of a substrate may be uniform while a thermal budget is decreased. A substrate processing apparatus includes a process chamber configured to accommodate a substrate; a substrate mounting unit installed in the process chamber and configured to have the substrate placed thereon; an electromagnetic wave supply... Agent:05/21/2015 > 155 patent applications in 99 patent subcategories.
20150140686 - Forming magnetic microelectromechanical inductive components: A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is... Agent:
20150140687 - Forming magnetic microelectromechanical inductive components: A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is... Agent:
20150140685 - Manufacturing method for pattern multilayer body and mask set: A method for manufacturing a pattern multilayer body that has a plurality of pattern layers, and where a pattern is formed in each pattern layer, includes a step of forming an overlay pattern within an overlay pattern formation region, and in the step of forming the overlay pattern, a photoresist... Agent: Tdk Corporation
20150140690 - Etching method for semiconductor product: There is provided an etching method for a semiconductor product. The semiconductor product having, on a substrate, an SiO2 layer, and an Si layer with a free surface and directly stacked on the SiO2 layer is prepared. The Si layer is etched. Etching is performed while supplying an etching solution... Agent: Tohoku University
20150140688 - Setup for multiple cross-section sample preparation: A multiple-sample-holder polishing setup for cross-section sample preparation and a method of making a device using the same are presented. The multiple-sample-holder polishing setup includes a frame. The frame has a hollow center, one or more long and short rods and a recess for accommodating a polishing head. The setup... Agent: Globalfoundries Singapore Pte. Ltd.
20150140689 - Substrate bonding method and substrate bonding apparatus: According to one embodiment, there is provided a substrate bonding method. The substrate bonding method includes disposing a first substrate and a second substrate to face each other. The substrate bonding method includes controlling the first substrate and the second substrate to have a temperature difference. The substrate bonding method... Agent:
20150140691 - Systems and methods for chemical mechanical planarization with fluorescence detection: Systems and methods are provided for performing chemical-mechanical planarization on an article. An example system for performing chemical-mechanical planarization on an article includes a polishing head configured to perform a chemical-mechanical planarization (CMP) on an article, a polishing pad configured to support the article, a light source configured to emit... Agent: Taiwan Semiconductor Manufacturing Company Limited
20150140692 - Advanced process control method for controlling width of spacer and dummy sidewall in semiconductor device: An advanced process control (APC) method for controlling a width of a spacer in a semiconductor device includes: providing a semiconductor substrate; providing a target width of a gate; forming the gate on the semiconductor substrate, in which the gate has a measured width; depositing a dielectric layer covering the... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20150140694 - Gas supply device, film forming apparatus, gas supply method, and storage medium: A gas supply device for intermittently supplying raw material gas into a film forming process unit that includes a raw material container for accommodating a raw material, a carrier gas supply unit for supplying carrier gas to evaporate the raw material, a raw material gas supply path for supplying the... Agent:
20150140695 - Method and system for determining overlap process windows in semiconductors by inspection techniques: The formation of overlap areas in sophisticated semiconductor devices is a critical aspect which may not be efficiently evaluated on the basis of conventional measurement and design strategies. For this reason, the present disclosure provides measurement techniques and systems in which overlying device patterns are transformed into the same material... Agent:
20150140693 - Misalignment/alignment compensation method, semiconductor lithography system, and method of semiconductor patterning: A misalignment/alignment compensation method for a lithography process includes the steps of: obtaining misalignment data associated with an alignment mark disposed on a substrate; and obtaining a compensation parameter by performing asymmetry compensation calculation on at least one of a first directional component of the misalignment data, which is associated... Agent:
20150140696 - Combinatorial method for solid source doping process development: One or more small spot showerhead apparatus are used to provide dopant exposure and/or to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to... Agent: Intermolecular, Inc.
20150140697 - Test macro for use with a multi-patterning lithography process: A method for forming an integrated circuit having a test macro using a multiple patterning lithography process (MPLP) is provided. The method includes forming an active area of the test macro having a first and second gate region during a first step of MPLP, and forming a first and second... Agent:
20150140698 - Test macro for use with a multi-patterning lithography process: A method for forming an integrated circuit having a test macro using a multiple patterning lithography process (MPLP) is provided. The method includes forming an active area of the test macro having a first and second gate region during a first step of MPLP, and forming a first and second... Agent:
20150140699 - Methods of forming oxide semiconductor devices and methods of manufacturing display devices having oxide semiconductor devices: A method of forming an oxide semiconductor device may be provided. In the method, a substrate comprising a first major surface and a second major surface that faces away from the first major surface may be provided. An oxide semiconductor device may be formed over the first major surface to... Agent:
20150140703 - Led device with improved thermal performance: An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening.... Agent:
20150140701 - Method for manufacturing light emitting diode package: A method for manufacturing an LED (light emitting diodes) package includes providing a substrate having electrodes; providing an LED chip, the LED chip arranged on the substrate and electrically contacting the electrodes; providing an UV-curing adhesive layer, the UV-curing adhesive layer arranged on the substrate and entirely packaging the LED... Agent:
20150140702 - Method for manufacturing semiconductor light emitting device: The method for manufacturing the semiconductor light emitting device includes steps of forming a plurality of semiconductor light emitting element regions on a substrate, forming a recess portion between the plurality of semiconductor light emitting element regions on a surface of the substrate, disposing a light reflective sealing resin on... Agent:
20150140700 - Method for producing phosphor dispersion liquid and method for manufacturing led device: The present invention addresses the problem of providing a method for producing a phosphor dispersion liquid, which is not susceptible to settling of phosphor particles, without deteriorating the phosphor particles. In order to solve the above-mentioned problem, the present invention provides a method for producing a phosphor dispersion liquid that... Agent:
20150140704 - Cleaning solution and method for manufacturing display device using the same: A cleaning solution and a method for manufacturing a display device, the cleaning solution including about 2 wt % to about 12 wt % of nitric acid; about 0.5 wt % to about 15 wt % of an organic acid; about 0.1 wt % to about 10 wt % of... Agent:
20150140705 - Method for manufacturing display panel: A method for manufacturing a display panel, including defining a desorbing area of a support substrate by forming one of a release layer or a recess portion in the desorbing area, cleaning a surface of the support substrate, disposing a thin film substrate on the support substrate, directly bonding, in... Agent:
20150140708 - Light emitting device with light path changing structure: The inventive concept provides light emitting devices and methods of manufacturing a light emitting device. The light emitting device may include a transparent substrate including a first region and a second region, a first transparent electrode disposed on a first surface of the transparent substrate, a second transparent electrode facing... Agent: Electronics And Telecommunications Research Institute
20150140706 - Screen printing method of led module with phosphor: A screen printing method of LED module with phosphor includes: board preparation providing an LED module board with a substrate and a plurality of LED sources fixed on the substrate. The LED sources are flip chip structural and the metal electrodes thereof are fixed to the bonding pads of the... Agent: Xiamen Friendly Lighting Technology Co., Ltd.
20150140707 - Semiconductor light emitting device and manufacturing method thereof: A semiconductor light emitting device includes: a light emission structure in which a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer are sequentially stacked; a first electrode formed on the first conductive semiconductor layer; an insulating layer formed on the second conductive semiconductor layer and... Agent:
20150140709 - Liquid crystal display device: A method for fabricating a liquid crystal display device including a TFT substrate having an alignment film formed thereon, an opposing substrate, and a liquid crystal layer sandwiched therebetween. The alignment film on the TFT substrate includes a photolytic polymer made from a first precursor including cyclobutane, and a non-photolytic... Agent:
20150140710 - Manufacturable laser diode formed on c-plane gallium and nitrogen material: A method for manufacturing a laser diode device includes providing a substrate having a surface region and forming epitaxial material overlying the surface region, the epitaxial material comprising an n-type cladding region, an active region comprising at least one active layer overlying the n-type cladding region, and a p-type cladding... Agent:
20150140711 - Method of separating a wafer of semiconductor devices: A method according to embodiments of the invention includes providing a wafer comprising a semiconductor structure grown on a growth substrate. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region. The wafer includes trenches defining individual semiconductor devices. The trenches extend through... Agent:
20150140712 - Etchant and method for manufacturing display device using the same: An etchant includes, based on a total amount of the etchant, from about 0.5 to about 20 wt % of a persulfate, from about 0.01 to about 2 wt % of a fluorine compound, from about 1 to about 10 wt % of an inorganic acid, from about 0.5 to... Agent:
20150140713 - Peeling apparatus and manufacturing apparatus of semiconductor device: To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization... Agent:
20150140715 - Ink for forming functional layer, method of manufacturing ink for forming functional layer, and method of manufacturing organic electro-luminescence element: An ink for forming a functional layer, which is used when any thin film layer among functional layers consisting of a plurality of thin film layers is formed, includes a functional layer forming material and a solvent for dissolving the functional layer forming material, and in which the number of... Agent:
20150140714 - Method for preventing short circuit between metal wires in organic light emitting diode display device: Disclosed is a method for preventing a short circuit between metal wires in an organic light emitting diode display device. The method includes: forming an inorganic layer on a substrate; forming a metal layer including two metal wires on the inorganic layer; forming an organic layer on the two metal... Agent:
20150140716 - Manufacturable sub-3 nanometer palladium gap devices for fixed electrode tunneling recognition: A technique is provided for manufacturing a nanogap in a nanodevice. An oxide is disposed on a wafer. A nanowire is disposed on the oxide. A helium ion beam is applied to cut the nanowire into a first nanowire part and a second nanowire part which forms the nanogap in... Agent:
20150140717 - Method for manufacturing a structured surface: A method is described for manufacturing a micromechanical structure, in which a structured surface is created in a substrate by an etching method in a first method step, and residues are at least partially removed from the structured surface in a second method step. In the second method step, an... Agent:
20150140718 - Diffusing agent composition, and method for forming an impurity diffusion layer: A diffusing agent composition including a condensation product and an impurity diffusion component. The condensation product is a reaction product resulting from hydrolysis of an alkoxysilane. The impurity diffusion component is a monoester or diester of phosphoric acid, or a mixture thereof.... Agent:
20150140719 - Vertical conductive connections in semiconductor substrates: An embodiment of a die comprising: a semiconductor body including a front side, a back side, and a lateral surface; an electronic device, formed in said semiconductor body and including an active area facing the front side; a vertical conductive connection, extending through the semiconductor body and defining a conductive... Agent:
20150140720 - Process for manufacturing a photonic circuit with active and passive structures: A process for manufacturing a photonic circuit comprises: manufacturing on a first wafer a first layer stack comprising an underclad oxide layer and a high refractive index waveguide layer; patterning the high refractive index waveguide layer to generate a passive photonic structures; planarizing the first layer stack with a planarizing... Agent:
20150140721 - Patterning of silicon oxide layers using pulsed laser ablation: Various laser processing schemes are disclosed for producing various types of hetero junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are... Agent: Solexel, Inc.
20150140722 - Backside structure and method for bsi image sensors: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region... Agent:
20150140723 - Microwave curing of multi-layer coatings: A method for providing a coated strip, which includes the steps of providing a metal or metal alloy strip, applying one or more coating layers on the metal or metal alloy strip and irradiating one or more of the applied coating layers with electromagnetic radiation, wherein one or more of... Agent:
20150140724 - Deposition of photovoltaic thin films by plasma spray deposition: In particular embodiments, a method is described for depositing thin films, such as those used in forming a photovoltaic cell or device. In a particular embodiment, the method includes providing a substrate suitable for use in a photovoltaic device and plasma spraying one or more layers over the substrate, the... Agent:
20150140727 - Method for forming conductive electrode patterns and method for manufacturing solar cells comprising the same: A method for forming conductive electrode patterns of a solar cell is provided. The method includes preparing a glass substrate and forming a transparent conductive oxide film (TCO) on the glass substrate. Then, a titanium oxide (TiO2) layer and a silver (Ag) electrode are formed on the glass substrate. A... Agent:
20150140725 - Method for manufacturing an interdigitated back contact solar cell: A method for manufacturing an interdigitated back contact solar cell, comprising steps of: (a) providing a doped silicon substrate; (b) forming a first silicon dioxide layer on the front surface and the rear surface; (c) depositing a boron-containing doping paste on the first silicon dioxide layer of the rear surface... Agent: E I Du Pont De Nemours And Company
20150140726 - Method for manufacturing semiconductor device: A transparent conductive substrate (1) in which a transparent conductive film (12) is placed on a light-transmissive base plate (11) is brought into a reaction chamber of a plasma apparatus without being rinsed (Step (a)) and the transparent conductive film (12) is treated with plasma using a CH4 gas and... Agent:
20150140728 - Method for avoiding short circuit of metal circuits in oled display device: The present invention relates to a method for avoiding short circuit of metal circuit lines in an OLED display device, including the steps of: forming an inorganic layer on a substrate; forming a patterned metal layer on the inorganic layer, wherein the patterned metal layer includes more than two metal... Agent: Shenzhen China Star Optoelectronics Technology Co., Ltd.
20150140729 - Method of patterning a base layer: A method of making a structure having a patterned a base layer and useful in the fabrication of optical and electronic devices including bioelectronic devices includes, in one embodiment, the steps of: a) providing a layer of a radiation-sensitive resin; b) exposing the layer of radiation-sensitive resin to patterned radiation... Agent:
20150140731 - Method for manufacturing semiconductor device: To improve productivity of a transistor that includes an oxide semiconductor and has good electrical characteristics. In a top-gate transistor including a gate insulating film and a gate electrode over an oxide semiconductor film, a metal film is formed over the oxide semiconductor film, oxygen is added to the metal... Agent:
20150140732 - Method for manufacturing semiconductor device: It is an object to drive a semiconductor device at high speed or to improve the reliability of the semiconductor device. In a method for manufacturing the semiconductor device, in which a gate electrode is formed over a substrate with an insulating property, a gate insulating film is formed over... Agent:
20150140733 - Method for manufacturing semiconductor device: To provide a semiconductor device including an oxide semiconductor which is capable of having stable electric characteristics and achieving high reliability, by a dehydration or dehydrogenation treatment performed on a base insulating layer provided in contact with an oxide semiconductor layer, the water and hydrogen contents of the base insulating... Agent:
20150140730 - Oxide semiconductor film, semiconductor device, and manufacturing method of semiconductor device: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a... Agent:
20150140734 - Semiconductor device: To provide a highly reliable semiconductor device which includes a transistor including an oxide semiconductor, in a semiconductor device including a staggered transistor having a bottom-gate structure provided over a glass substrate, a gate insulating film in which a first gate insulating film and a second gate insulating film, whose... Agent:
20150140735 - Electro/mechanical microchips and method of making with burst ultrafast laser pulses: A method for making an electromechanical chip using a plurality of transparent substrates, comprising the steps of: machining, using photoacoustic compression, full or partial voids in at least one of the plurality of substrates. The plurality of transparent substrates are stacked and arranged in a specific order. The transparent substrates... Agent: Rofin-sinar Technologies Inc.
20150140736 - Semiconductor device and method of forming wire bondable fan-out ewlb package: A semiconductor device has a first semiconductor die and a first encapsulant deposited over the first semiconductor die. An interconnect structure is formed over the first semiconductor die and first encapsulant. A modular interconnect structure including a conductive via is disposed adjacent to the first semiconductor die. The first encapsulant... Agent: Stats Chippac, Ltd.
20150140737 - Wafer level semiconductor package and manufacturing methods thereof: A semiconductor package includes at least one semiconductor die having an active surface, an interposer element having an upper surface and a lower surface, a package body, and a lower redistribution layer. The interposer element has at least one conductive via extending between the upper surface and the lower surface.... Agent:
20150140738 - Circuit connecting material and semiconductor device manufacturing method using same: Provided are a circuit connecting material able to provide good bonding with an opposing electrode, and a semiconductor device manufacturing method using the same. The present invention uses a circuit connecting material, in which a first adhesive layer to be adhered to the semiconductor chip side, and a second adhesive... Agent:
20150140739 - Discrete semiconductor device package and manufacturing method: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140,... Agent:
20150140740 - Method of fabrication, device structure and submount comprising diamond on metal substrate for thermal dissipation: A method of fabrication, a device structure and a submount comprising high thermal conductivity (HTC) diamond on a HTC metal substrate, for thermal dissipation, are disclosed. The surface roughness of the diamond layer is controlled by depositing diamond on a sacrificial substrate, such as a polished silicon wafer, having a... Agent: Advanced Diamond Technologies, Inc.
20150140741 - Fully isolated ligbt and methods for forming the same: A device includes a dielectric layer, and a heavily doped semiconductor layer over the dielectric layer. The heavily doped semiconductor layer is of a first conductivity type. A semiconductor region is over the heavily doped semiconductor layer, wherein the semiconductor region is of a second conductivity type opposite the first... Agent:
20150140742 - Methods of forming gated devices: Some embodiments include methods of forming gated devices. An upper region of a semiconductor material is patterned into a plurality of walls that extend primarily along a first direction. The walls are spaced from one another by trenches that extend primarily along the first direction. Steps are formed along bottoms... Agent:
20150140743 - Cmos with dual raised source and drain for nmos and pmos: An apparatus and a method for creating a CMOS with a dual raised source and drain for NMOS and PMOS. The spacers on both stack gates are of equal thickness. In this method, a first insulating layer is formed on the surface. The first region is then masked while the... Agent:
20150140744 - Cmos with dual raised source and drain for nmos and pmos: An apparatus and a method for creating a CMOS with a dual raised source and drain for NMOS and PMOS. The spacers on both stack gates are of equal thickness. In this method, a first insulating layer is formed on the surface. The first region is then masked while the... Agent:
20150140745 - Method of forming a high electron mobility transistor: A method of forming a high electron mobility transistor (HEMT) includes forming a second III-V compound layer on a first III-V compound layer, forming a source feature and a drain feature on the second III-V compound layer, depositing a p-type layer on a portion of the second III-V compound layer... Agent:
20150140746 - Monolithically integrated vertical jfet and schottky diode: An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride... Agent:
20150140747 - Semiconductor device including transistor and method of manufacturing the same: A semiconductor device includes a gate pattern disposed on a semiconductor substrate, a bulk epitaxial pattern disposed in a recess region formed in the semiconductor substrate at a side of the gate pattern, an insert epitaxial pattern disposed on the bulk epitaxial pattern, and a capping epitaxial pattern disposed on... Agent:
20150140748 - Integrated circuit structure to resolve deep-well plasma charging problem and method of forming the same: A method for forming an integrated circuit includes forming a deep n-well (DNW) in a substrate, and forming a PMOS transistor in the DNW. The method also includes forming an NMOS transistor in the substrate and outside the DNW, and forming a reverse-biased diode. The method further includes forming an... Agent:
20150140749 - Semiconductor device having reduced-damage active region and method of manufacturing the same: A semiconductor device according to example embodiments may include a substrate having an NMOS area and a PMOS area, isolation regions and well regions formed in the substrate, gate patterns formed on the substrate between the isolation regions, source/drain regions formed in the substrate between the gate patterns and the... Agent:
20150140750 - Process for manufacturing integrated device incorporating low-voltage components and power components: An integrated device includes: a semiconductor body having a first, depressed, portion and second portions which project from the first portion; a STI structure, extending on the first portion of the semiconductor body, which delimits laterally the second portions and has a face adjacent to a surface of the first... Agent: Stmicroelectronics S.r.l.
20150140751 - Modified, etch-resistant gate structure(s) facilitating circuit fabrication: Circuit fabrication methods are provided which include, for example: providing the circuit structure with at least one gate structure extending over a first region and a second region of a substrate structure, the at least one gate structure including a capping layer; and modifying an etch property of at least... Agent: Globalfoundries Inc.
20150140752 - Multiple-time programming memory cells and methods for forming the same: A method includes forming Shallow Trench Isolation (STI) regions to separate a first active region and a second active region of a semiconductor substrate from each other, etching a portion of the STI regions that contacts a sidewall of the second active region to form a recess, and implanting a... Agent:
20150140755 - Method for producing a semiconductor device with surrounding gate transistor: A method for producing a semiconductor device includes a first step of forming a fin-shaped silicon layer on a silicon substrate using a first resist and forming a first insulating film therearound; and a second step of forming a second insulating film around the fin-shaped silicon layer and etching the... Agent:
20150140753 - Methods of fabricating integrated structures, and methods of forming vertically-stacked memory cells: Some embodiments include a method of fabricating integrated structures. A metal-containing material is formed over a stack of alternating first and second levels. An opening is formed through the metal-containing material and the stack. Repeating vertically-stacked electrical components are formed along the stack at sidewalls of the opening. Some embodiments... Agent: Micron Technology, Inc.
20150140754 - Semiconductor device, method of manufacturing the same, and power module: A semiconductor device includes an n-type drain layer, an n-type base layer provided on the n-type drain layer, a p-type base layer and an n-type source layer partially formed in surface layer portions of the n-type base layer and the p-type base layer, respectively, a gate insulation film formed on... Agent:
20150140756 - Fabrication methods facilitating integration of different device architectures: Circuit fabrication methods are provided which include, for example: providing one or more gate structures disposed over a substrate structure, the substrate structure including a first region and a second region; forming a plurality of U-shaped cavities extending into the substrate structure in the first region and the second region... Agent: Globalfoundries Inc.
20150140763 - Contact structure of semiconductor device: The invention relates to a contact structure of a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material... Agent:
20150140761 - Device isolation in finfet cmos: Embodiments herein provide approaches for device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of replacement fins is formed over the retrograde doped layer, each... Agent: Renesas Electronics Corporation
20150140762 - Finfet with merge-free fins: A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins formed on the insulation layer. The fins are formed in the gate and spacer regions between a first source/drain region and second source/drain region, without... Agent:
20150140759 - Integrated circuit devices including finfets and methods of forming the same: Integrated circuit devices including Fin field effect transistors (finFETs) and methods of forming those devices are provided. The methods may include forming a fin on a substrate and forming a gate line on the fin. The method may also include forming a first recess in the fin having a first... Agent:
20150140758 - Method for fabricating finfet on germanium or group iii-v semiconductor substrate: The present invention provides a method for fabricating a FinFET on a germanium or group III-V semiconductor substrate. The process flow of the method mainly includes: forming a pattern structure for a source, a drain and a fine bar connecting the source and the drain; forming an oxide isolation layer;... Agent:
20150140760 - Method to induce strain in 3-d microfabricated structures: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic... Agent:
20150140757 - Methods of forming semiconductor devices including an embedded stressor, and related apparatuses: Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming preliminary trenches adjacent opposing sides of an active region. The method includes forming etching selection regions in portions of the active region that are exposed after forming the preliminary trenches. The method includes forming... Agent:
20150140764 - Single poly plate low on resistance extended drain metal oxide semiconductor device: A semiconductor device, in particular, an extended drain metal oxide semiconductor (ED-MOS) device, defined by a doped shallow drain implant in a drift region. For example, an extend drain n-channel metal oxide semiconductor (ED-NMOS) device is defined by an n doped shallow drain (NDD) implant in the drift region. The... Agent:
20150140765 - Method of fabricating a gate dielectric layer: A method of making a semiconductor device, the method includes forming an active region in a substrate. The method further includes forming a first gate structure over the active region, where the forming the first gate structure includes forming a first interfacial layer. An entirety of a top surface of... Agent:
20150140766 - Method of forming and structure of a non-volatile memory cell: A structure of a memory cell includes a substrate, a well, three source/drain doped regions, two bottom dielectric layers, two charge trapping layers, a blocking layer and two gates to form a storage transistor and a select transistor of the memory cell. A bottom dielectric layer and a charge trapping... Agent:
20150140767 - Process for manufacturing devices for power applications in integrated circuits: A MOS transistor for power applications is formed in a substrate of semiconductor material by a method integrated in a process for manufacturing integrated circuits which uses an STI technique for forming insulating regions. The method includes the phases of forming an insulating element on a top surface of the... Agent: Stmicroelectronics S.r.l.
20150140768 - Method of manufacturing semiconductor device: A performance of a semiconductor device is improved. A gate electrode is formed on an SOI substrate via a gate insulating film, and a laminated film including an insulating film IL2 and an insulating film IL3 on the insulating film IL2 is formed on the SOI substrate so as to... Agent:
20150140769 - Raised source/drain mos transistor and method of forming the transistor with an implant spacer and an epitaxial spacer: A raised source/drain MOS transistor is formed in a process that utilizes a first sidewall spacer when implanting a semiconductor region to form the heavily-doped source region and the heavily-doped drain region of the transistor, and a second different sidewall spacer when epitaxially growing the raised source region and the... Agent:
20150140770 - Methods for producing a tunnel field-effect transistor: A method for producing a tunnel field-effect transistor is disclosed. Connection regions of different doping types are produced by means of self-aligning implantation methods.... Agent:
20150140771 - Method for fabricating a bipolar transistor having self-aligned emitter contact: A method of producing a semiconductor device, comprising a substrate layer made of a semiconductor material of a first conductivity type and having a first insulation region, and a vertical bipolar transistor having a first vertical portion of a collector made of monocrystalline semiconductor material of a second conductivity type... Agent:
20150140772 - Method for fabricating a bipolar transistor having self-aligned emitter contact: Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. The selector device can include a first electrode, a... Agent:
20150140774 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device comprises forming a first etch stop layer over a first dielectric layer. The method also comprises forming a first trench in the first etch stop layer and the first dielectric layer. The method further comprises filling the first trench with a conductive material.... Agent:
20150140773 - Methods of forming insulative elements: Methods of forming an insulative element are described, including forming a first metal oxide material having a first dielectric constant, forming a second metal oxide material having a second dielectric constant different from the first, and heating at least portions of the structure to crystallize at least a portion of... Agent:
20150140776 - Memory cells and methods of forming memory cells: Some embodiments include a method of forming a memory cell. A first portion of a switching region is formed over a first electrode. A second portion of the switching region is formed over the first portion using atomic layer deposition. The second portion is a different composition than the first... Agent:
20150140777 - Methods of selectively doping chalcogenide materials and methods of forming semiconductor devices: Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises... Agent:
20150140775 - Resistive memory device, method of fabricating the same, and memory apparatus and data processing system having the same: A resistive memory device capable of implementing a multi-level cell, a method of fabricating the same, and a memory apparatus and data processing system including the same are provided. The resistive memory device includes a lower electrode, a first phase-change material layer formed over the lower electrode, a second phase-change... Agent: Sk Hynix Inc.
20150140778 - Method for manufacturing metal-insulator-metal capacitor structure: A method for manufacturing the MIM capacitor structure is provided. A first damascene electrode layer is formed in the first opening formed in a first dielectric layer. An insulating barrier layer is formed to cover the first dielectric layer and the first damascene electrode layer. A second opening and a... Agent: United Microelectronics Corporation
20150140779 - Selector device using low leakage dielectric mimcap diode: MIMCAP diodes are provided that can be suitable for memory device applications, such as current selector devices for cross point memory array. The MIMCAP diodes can have lower thermal budget as compared to Schottky diodes and controllable lower barrier height and lower series resistance as compared to MIMCAP tunneling diodes.... Agent:
20150140780 - Method for fabricating shallow trench isolation structure: A method for fabricating shallow trench isolation structure is disclosed. The method includes the steps of: (a) providing a substrate; (b) forming a trench in the substrate; (c) forming a silicon layer in the trench; and (d) performing an oxidation process to partially transform a surface of the silicon layer... Agent: United Microelectronics Corp.
20150140781 - Semiconductor isolation structure and method of manufacture: A method of formation of an isolation structure for vertical semiconductor devices, the resulting isolation structure, and a memory device to prevent leakage among adjacent vertical semiconductor devices are described.... Agent:
20150140782 - Integrated circuit assembly and method of making: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface. A first active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the first active layer and formed on the second surface of the... Agent:
20150140783 - Wafer dicing press and method and semiconductor wafer dicing system including the same: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure,... Agent:
20150140784 - Wafer processing method: A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines, including a frame preparing step of preparing a frame having a plurality of crossing partitions corresponding to the division lines of the wafer, a resin covering step of spreading a resin powder... Agent:
20150140785 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device include preparing an initial substrate including an edge region and a central region in which circuit patterns are formed, forming a reforming region in the edge region of the initial substrate, grinding the initial substrate to form a substrate, and cutting the substrate... Agent:
20150140788 - Apparatus and method for producing group iii nitride semiconductor device and method for producing semiconductor wafer: The production apparatus includes a shower head electrode, a susceptor for supporting a growth substrate, a first gas supply pipe, and a second gas supply pipe. The first gas supply pipe has at least one first gas exhaust outlet and supplies an organometallic gas containing Group III metal as a... Agent:
20150140791 - Apparatus for producing metal chloride gas and method for producing metal chloride gas, and apparatus for hydride vapor phase epitaxy, nitride semiconductor wafer, nitride semiconductor device, wafer for nitride semiconductor light emitting diode, method: There is provided an apparatus for producing metal chloride gas, comprising: a source vessel configured to store a metal source; a gas supply port configured to supply chlorine-containing gas into the source vessel; a gas exhaust port configured to discharge metal chloride-containing gas containing metal chloride gas produced by a... Agent:
20150140789 - Epitaxial growth of cubic and hexagonal inn films and their alloys with aln and gan: Described herein is a method for growing InN, GaN, and AlN materials, the method comprising alternate growth of GaN and either InN or AlN to obtain a film of InxGa1−xN, AlxGa1−xN, AlxIn1−xN, or AlxInyGa1−(x+y)N... Agent: The Government Of The United States Of America, As Represented By The Secretary Of The Navy
20150140790 - Precursors for gst films in ald/cvd processes: The present invention is a process of making a germanium-antimony-tellurium alloy (GST) or germanium-bismuth-tellurium (GBT) film using a process selected from the group consisting of atomic layer deposition and chemical vapor deposition, wherein a silylantimony precursor is used as a source of antimony for the alloy film. The invention is... Agent: Air Products And Chemicals, Inc.
20150140786 - Substrate processing device and substrate processing method: Disclosed is an apparatus and method for processing substrate, which facilitates to prevent a substrate form being damaged, wherein the apparatus comprises a process chamber; a substrate supporter for supporting at least one of substrates, wherein the substrate supporter is provided in the bottom of the process chamber; a chamber... Agent: Jusung Engineering Co., Ltd.
20150140787 - Trimming silicon fin width through oxidation and etch: Embodiments described herein generally relate to methods of forming sub-10 nm node FinFETs. Various processing steps are performed on a substrate to provide a trench defining a mandrel structure. Sidewalls of the mandrel structure and a bottom surface of the trench are oxidized and subsequently etched to reduce a width... Agent:
20150140792 - Method for depositing a group iii nitride semiconductor film: conditioning a surface of the substrate by etching and providing a conditioned surface; holding the substrate away from a substrate facing surface of a heater by a predetermined distance; heating the substrate to a temperature by using the heater whilst the substrate is held away from the substrate facing surface... Agent:
20150140793 - Nanowire devices: A method of forming nanowire devices. The method includes forming a stressor layer circumferentially surrounding a semiconductor nanowire. The method is performed such that, due to the stressor layer, the nanowire is subjected to at least one of radial and longitudinal strain to enhance carrier mobility in the nanowire. Radial... Agent:
20150140794 - Polycrystallization method: According to one embodiment, provided is a polycrystallization method for polycrystallizing an amorphous semiconductor film that has a natural oxide film on the surface . The polycrystallization method includes a step of cleaning the natural oxide film while leaving the natural oxide film on the surface of the amorphous semiconductor... Agent: Japan Display Inc.
20150140795 - Method for producing semiconductor thin films on foreign substrates: The invention relates to a method by means of which the average single crystal size, in particular the diameter of the single crystals, in a semiconductor thin film applied to a foreign substrate can be increased by an order of magnitude with respect to prior methods. The method is characterized... Agent:
20150140796 - Formation of contact/via hole with self-alignment: In a method for manufacturing a semiconductor device, a substrate is provided, and a dielectric layer is formed to cover the substrate. A recess portion is formed in the dielectric layer. A spacer is formed on a side surface of the recess portion. The dielectric layer is etched through the... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20150140797 - 3d memory: Three-dimensional memory cells and methods of making and using the memory cells are discussed generally herein. In one or more embodiments, a three-dimensional vertical memory can include a memory stack. Such a memory stack can include memory cells and a dielectric between adjacent memory cells, each memory cell including a... Agent:
20150140798 - Semiconductor manufacturing method and equipment thereof: A semiconductor manufacturing equipment includes a buffer chamber, a load port, a first chamber, and a second chamber respectively connected with the buffer chamber at a different side. The semiconductor manufacturing equipment also has a third chamber in the buffer chamber, the third chamber configured for cooling a wafer, and... Agent: Taiwan Semiconductor Manufacturing Company Ltd.
20150140799 - Asymmetric spacers: A semiconductor device having asymmetric spacers and steps for forming the same are disclosed. The spacers have difference capacitances, with the spacer having a higher capacitance formed over a source region of the device and the spacer having a lower capacitance formed over a drain region of the device. Embodiments... Agent:
20150140800 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes the following steps. At least a first gate stack layer and at least a second gate stack layer protruding from a conductive layer on a substrate are provided. Subsequently, two spacers and a protective layer are formed on the conductive layer, and... Agent: United Microelectronics Corp.
20150140801 - Patterned photoresist to attach a carrier wafer to a silicon device wafer: Patterned photoresist is used to attach a carrier wafer to a silicon device wafer. In one example, a silicon wafer is patterned for contact bumps by applying a photoresist over a surface of the wafer and removing the photoresist in locations at which the contact bumps are to be formed.... Agent:
20150140802 - Semiconductor device and process for producing semiconductor device: A semiconductor device includes: a substrate in which a product region and scribe regions are defined; a 1st insulation film formed above the substrate; a metal film in the 1st insulation film, disposed within the scribe regions in such a manner as to surround the product region; a 2nd insulation... Agent:
20150140803 - Methods of forming semiconductor structures: Methods of forming semiconductor structures that include bodies of a semiconductor material disposed between rails of a dielectric material are disclosed. Such methods may include filling a plurality of trenches in a substrate with a dielectric material and removing portions of the substrate between the dielectric material to form a... Agent:
20150140804 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing the same are disclosed. The semiconductor device includes adjacent storage node contact plugs having different heights, and lower-electrode bowing profiles having different heights, such that a spatial margin between the lower electrodes is assured and a bridge fail is prevented, resulting in... Agent:
20150140805 - Methods for forming an interconnect pattern on a substrate: Embodiments of methods for forming interconnect patterns on a substrate are provided herein. In some embodiments, a method for forming an interconnect pattern atop a substrate includes depositing a porous dielectric layer atop a cap layer and a plurality of spacers disposed atop the cap layer, wherein the cap layer... Agent:
20150140806 - Wafer-level die attach metallization: Embodiments of a semiconductor wafer having wafer-level die attach metallization on a back-side of the semiconductor wafer, resulting semiconductor dies, and methods of manufacturing the same are disclosed. In one embodiment, a semiconductor wafer includes a semiconductor structure and a front-side metallization that includes front-side metallization elements for a number... Agent:
20150140807 - Vias in porous substrates: A microelectronic unit can include a substrate having front and rear surfaces and active semiconductor devices therein, the substrate having a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, first and second conductive vias connected to first and second pads exposed... Agent:
20150140808 - Semiconductor device having buried bit lines and method for fabricating the same: A semiconductor device includes body lines, formed substantially perpendicular to a substrate, and having recessed sidewalls, buried bit lines, buried in the recessed sidewalls, and including a metal silicide, and a barrier layer interposed between each of the buried bit lines and the body lines corresponding thereto, and containing germanium.... Agent: Sk Hynix Inc.
20150140809 - Integrated circuit and interconnect, and method of fabricating same: The disclosure relates generally to integrated circuits (IC), IC interconnects, and methods of fabricating the same, and more particularly, high performance inductors. The IC includes at least one trench within a dielectric layer disposed on a substrate. The trench is conformally coated with a liner and seed layer, and includes... Agent:
20150140810 - Method of forming wirings: A method of manufacturing a wiring includes sequentially forming a first insulation layer, a first layer, and a second layer on a substrate, etching an upper portion of the second layer a plurality of times to form a second layer pattern including a first recess having a shape of a... Agent:
20150140812 - Methods for dry etching cobalt metal using fluorine radicals: Embodiments of methods for etching cobalt metal using fluorine radicals are provided herein. In some embodiments, a method of etching a cobalt layer in a substrate processing chamber includes: forming a plasma from a process gas comprising a fluorine-containing gas; and exposing the cobalt layer to fluorine radicals from the... Agent:
20150140811 - Spacer-damage-free etching: A method of patterning a semiconductor device is disclosed. A tri-layer photoresist is formed over a plurality of patterned features. The tri-layer photoresist includes a bottom layer, a middle layer disposed over the bottom layer, and a top layer disposed over the middle layer, the top layer containing a photo-sensitive... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20150140813 - Methods of forming non-volatile memory devices including vertical nand strings: A NAND based non-volatile memory device can include a plurality of memory cells vertically arranged as a NAND string and a plurality of word line plates each electrically connected to a respective gate of the memory cells in the NAND string. A plurality of word line contacts can each be... Agent:
20150140814 - Alkaline pretreatment for electroplating: Prior to electrodeposition, a semiconductor wafer having one or more recessed features, such as through silicon vias (TSVs), is pretreated by contacting the wafer with a pre-wetting liquid comprising a buffer (such as a borate buffer) and having a pH of between about 7 and about 13. This pre-treatment is... Agent: Lam Research Corporation
20150140815 - Via in substrate with deposited layer: An opening such as a small-diameter via is formed in a semiconductor substrate such as a monocrystalline silicon chip or wafer by a high etch rate process which leaves the opening with a rough interior surface. A smoothing layer such as a polysilicon layer is applied over the interior surfaces... Agent: Invensas Corporation
20150140816 - Pre-treatment method for plating and storage medium: Catalytic metal nanoparticles can be attached on a base. A pre-treatment method for plating includes a catalytic particle-containing film forming process of forming a catalytic particle-containing film on a surface of a substrate by supplying, onto the substrate, a catalytic particle solution which is prepared by dispersing the catalytic metal... Agent:
20150140817 - Apparatuses facilitating fluid flow into via holes, vents, and other openings communicating with surfaces of substrates of semiconductor device components: A method for removing material from surfaces of at least a portion of at least one recess or at least one aperture extending into a surface of a substrate includes pressurizing fluid so as to cause the fluid to flow into the at least one recess or the at least... Agent:
20150140820 - Cleaning agent for semiconductor substrates and method for processing semiconductor substrate surface: A cleaning agent is provided for a semiconductor substrate superior in corrosion resistance of a tungsten wiring or a tungsten alloy wiring, and superior in removal property of polishing fines (particle) such as silica or alumina, remaining at surface of the semiconductor substrate, in particular, at surface of a silicon... Agent: Wako Pure Chemical Industries, Ltd.
20150140818 - Methods and systems for chemical mechanical polish cleaning: The present disclosure provides a cleaning unit for a chemical mechanical polishing (CMP) process. The cleaning unit comprises a cleaning solution; a brush configured to scrub a wafer during the CMP process; and a spray nozzle configured to apply the cleaning solution to the wafer when the brush scrubs the... Agent:
20150140819 - Semiconductor process: A semiconductor process includes the following steps. A substrate having trenches with different sizes is provided. A first oxide layer is formed to entirely cover the substrate. A prevention layer is formed on the first oxide layer. A first filling layer is formed on the prevention layer and fills the... Agent: United Microelectronics Corp.
20150140821 - Etching method and etching apparatus: An etching method is provided that includes the steps of supplying an etching gas containing a fluorocarbon (CF) based gas into a processing chamber, generating a plasma from the etching gas, and etching a silicon oxide film through a polysilicon mask using the plasma. The polysilicon film has a predetermined... Agent:
20150140822 - Multilayer film etching method and plasma processing apparatus: In one embodiment of the present invention, there is provided a method for etching a multilayer film formed by laminating a plurality of alternating layers of a first layer having a first dielectric constant and a second layer having a second dielectric constant. This method includes (a) a multilayer film... Agent: Tokyo Electron Limited
20150140823 - Silicon etching method: A silicon etching method of etching a silicon substrate to form silicon trenches having different width dimensions includes: S1, providing a silicon substrate; S2, depositing a mask layer on the silicon substrate; S3, corroding the mask layer to form windows having different width dimensions, wherein a mask layer having a... Agent:
20150140824 - Jig, manufacturing method thereof, and flip chip bonding method for chips of ultrasound probe using jig: A jig includes a wafer including an accommodation groove configured to accommodate a capacitive micromachined ultrasonic transducer (cMUT) when flip chip bonding is performed, and a separation groove formed in a bottom surface of the accommodation groove, the separation groove having a bottom surface that is spaced apart from thin... Agent: Kyungpook National University Industry-academic Cooperation Foundation
20150140825 - Method for chemical polishing and planarization: A chemical planarization process described herein can be used for planarizing a substrate without using mechanical abrasion. A developable planarization material can be applied to a substrate having a non-planar topography, such that a planar surface results. The resulting planarization layer can cover existing structures on the substrate. A top... Agent:
20150140826 - Method of forming fine patterns: A method of forming a fine pattern comprises depositing a modifying layer on a substrate. A photoresist layer is deposited on the modifying layer, the photoresist layer having a first pattern. The modifying layer is etched according to the first pattern of the photoresist layer. A treatment is performed to... Agent:
20150140827 - Methods for barrier layer removal: Implementations described herein generally relate to semiconductor manufacturing and more particularly to methods for etching a low-k dielectric barrier layer disposed on a substrate using a non-carbon based approach. In one implementation, a method for etching a barrier low-k layer is provided. The method comprises (a) exposing a surface of... Agent:
20150140828 - Etching method and plasma processing apparatus: A method of etching an etching target layer containing polycrystalline silicon includes preparing a target object including the etching target layer and a mask formed on the etching target layer; and etching the etching target layer with the mask. Further, the mask includes a first mask portion formed of polycrystalline... Agent:
20150140829 - Method for semiconductor manufacturing: A method includes followings operations. A semiconductor substrate is provided. A photoresist is formed on the semiconductor substrate. Dopants are inserted into the photoresist to carbonize a portion of the photoresist. An etch steam is sprayed on the semiconductor substrate and the photoresist. A hole is formed at a surface... Agent: Taiwan Semiconductor Manufacturing Company Ltd.
20150140831 - Crack control for substrate separation: A method for separating a layer for transfer includes forming a crack guiding layer on a substrate and forming a device layer on the crack-guiding layer. The crack guiding layer is weakened by exposing the crack-guiding layer to a gas which reduces adherence at interfaces adjacent to the crack guiding... Agent:
20150140830 - Method for improving quality of spalled material layers: Methods for removing a material layer from a base substrate utilizing spalling in which mode III stress, i.e., the stress that is perpendicular to the fracture front created in the base substrate, during spalling is reduced. The substantial reduction of the mode III stress during spalling results in a spalling... Agent:
20150140832 - High vacuum oled deposition source and system: Sources, devices, and techniques for deposition of organic layers, such as for use in an OLED, are provided. A vaporizer may vaporize a material between cooled side walls and toward a mask having an adjustable mask opening. The mask opening may be adjusted to control the pattern of deposition of... Agent: Universal Display Corporation
20150140833 - Method of depositing a low-temperature, no-damage hdp sic-like film with high wet etch resistance: Embodiments of the invention generally relate to methods of forming an etch resistant silicon-carbon-nitrogen layer. The methods generally include activating a silicon-containing precursor and a nitrogen-containing precursor in the processing region of a processing chamber in the presence of a plasma and depositing a thin flowable silicon-carbon-nitrogen material on a... Agent:
20150140834 - Al2o3 surface nucleation preparation with remote oxygen plasma: Methods and apparatus for processing using a plasma source for the treatment of semiconductor surfaces are disclosed. The apparatus includes an outer vacuum chamber enclosing a substrate support, a plasma source (either a direct plasma or a remote plasma), and an optional showerhead. Other gas distribution and gas dispersal hardware... Agent: Intermolecular Inc.
20150140835 - Substrate processing apparatus, method for manufacturing semiconductor device, and recording medium: A substrate processing apparatus is disclosed. The substrate processing apparatus includes a process chamber configured to accommodate a substrate; a gas supply unit configured to supply a process gas into the process chamber; a lid member configured to block an end portion opening of the process chamber; an end portion... Agent: Hitachi Kokusai Electric Inc.
20150140836 - Methods to control sio2 etching during fluorine doping of si/sio2 interface: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of... Agent: Intermolecular, Inc.
20150140837 - Method for texturing a substrate having a large surface area: t
20150140838 - Two step deposition of high-k gate dielectric materials: Methods and apparatus for forming a dielectric layer for use as a gate dielectric are provided. A high-k layer is formed with first ALD process using a halogen-based precursor. The metal in the halogen-based precursor may be at least one of hafnium, zirconium, or titanium. The halogen in the halogen-based... Agent: Intermolecular Inc.
20150140839 - Substrate processing apparatus: Provided is a substrate processing apparatus, which comprises a process chamber configured to process a substrate, a first plasma generation chamber in the process chamber, a first reactive gas supply unit configured to supply first reactive gas into the first plasma generation chamber, a pair of first discharge electrodes configured... Agent:Previous industry: Chemistry: analytical and immunological testing
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