|Semiconductor device manufacturing: process patents - Monitor Patents|
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Semiconductor device manufacturing: processBelow are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 12/04/2014 > 115 patent applications in 78 patent subcategories.
20140356979 - Thermally assisted mram with a multilayer encapsulant for low thermal conductivity: A technique is provided for a thermally assisted magnetoresistive random access memory device. A magnetic tunnel junction is formed. Contact wiring having a top contact electrode and a bottom contact electrode is formed. The contact wiring provides write bias to heat the magnetic tunnel junction. A multilayer dielectric encapsulant is... Agent: International Business Machines Corporation
20140356980 - Method and process to reduce stress based overlay error: Thermal processing and alignment methods and processes used during fabrication of semiconductor devices are provided. One method includes, for instance: obtaining a device after at least one laser annealing process is completed, the device including a substrate surface and at least one layer over the substrate surface; applying a mask... Agent:
20140356982 - Methods for overlay improvement through feed forward correction: Methods and processes for establishing a rework threshold for layers applied after thermal processing during fabrication of semiconductor devices are provided. One method includes, for instance: obtaining a device after at least one laser annealing process is completed, the device including a substrate surface and at least one layer over... Agent:
20140356981 - Wafer bonding misalignment reduction: A method for wafer bonding includes measuring grid distortion for a mated pairing of wafers to be bonded to determine if misalignment exists between the wafers. During processing of subsequent wafers, magnification of one or more lithographic patterns is adjusted to account for the misalignment. The subsequent wafers are bonded... Agent: International Business Machines Corporation
20140356983 - Distorting donor wafer to corresponding distortion of host wafer: A method generally for improving wafer-to-wafer bonding alignment. Planar distortions of the bonding surface of a host wafer are determined. The bonding surface of a donor wafer is distorted such that the distortions of the donor wafer bonding surface correspond to the determined planar distortions of the host wafer bonding... Agent:
20140356984 - Solid state source introduction of dopants and additives for a plasma doping process: A method of doping a non-planar surface or a surface of a substrate subject to poor view factors is provided. The processing chamber comprises a window, walls, and a bottom of the processing chamber with oxygen-containing material, the processing chamber configured to supply oxygen radicals as an additive to doping... Agent: Tokyo Electron Limited
20140356985 - Temperature controlled substrate support assembly: A temperature controlled substrate support assembly used for processing a substrate in a vacuum chamber of a semiconductor processing apparatus. The substrate support assembly comprises a top plate for supporting the substrate. A base plate is disposed below the top plate wherein the base plate comprises a cavity in an... Agent: Lam Research Corporation
20140356987 - Laser beam irradiation apparatus and method of manufacturing organic light-emitting display device by using the same: Provided is a laser beam irradiation apparatus. The laser beam irradiation apparatus includes a laser source configured to emit light; a collimator configured to collimate the emitted light; a scanner configured to adjust the collimated light to change an irradiation direction thereof; a first lens part configured to focus the... Agent: Fraunhofer Gesellschaft Zur Forderung Der Angewandten Forschung E. V.
20140356986 - Precision controlled collapse chip connection mapping: Systems and methods are provided for improved join structure connections between substrates. More specifically, a method is provided for manufacturing a semiconductor structure. The method includes obtaining a characteristic of an existing first join structure on a first substrate and a characteristic of an existing second join structure on a... Agent:
20140356988 - Mechanical debonding method and system: A mechanical debonding method and system are provided. A mechanical debonding method, used to debond temporary bonding wafers formed by bonding a device wafer and a carrier wafer by an adhesive, includes: obtaining the height position of the adhesive through a thickness measurement apparatus; moving a cutting apparatus to a... Agent:
20140356989 - Method of manufacturing mems devices with reliable hermetic seal: Manufactured capped MEMS device wafers are tested for hermeticity on a vacuum prober at differing pressures or on a wafer prober at differing temperatures. Resonant frequency testing is conducted. Leaking MEMS devices are distinguished from the remaining MEMS devices on the basis of quality factor (“Q”) measurements obtained from the... Agent: Analog Devices, Inc.
20140356991 - Methods of making an inkjet print head by sawing discontinuous slotted recesses: A method of making an inkjet print head may include forming, by sawing with a rotary saw blade, first discontinuous slotted recesses in a first surface of a wafer. The first discontinuous slotted recesses may be arranged in parallel, spaced apart relation. The method may further include forming, by sawing... Agent: Stmicroelectronics, Inc.
20140356990 - Methods of making inkjet print heads using a sacrificial substrate layer: A method of making inkjet print heads may include forming a first wafer including a sacrificial substrate layer, and a first dielectric layer thereon having first openings therein defining inkjet orifices. The method may also include forming a second wafer having inkjet chambers defined thereon, and joining the first and... Agent: Stmicroelectronics, Inc.
20140356992 - Manufacturing method of organic light emitting display device: A manufacturing method of an organic light emitting display device is disclosed which includes: forming a thin film transistor on each sub-pixel region which is defined in a substrate; forming a passivation layer on the substrate provided with the thin film transistor; forming a first electrode of an organic light... Agent: Lg Display Co., Ltd.
20140356993 - Light-emitting device and method for manufacturing the same: A method for manufacturing a light-emitting device, comprises the steps of: providing a carrier; performing a coating step comprises coating a film on the carrier; performing a baking step comprises baking the film at a first temperature; and forming a thick film by repeating the coating step and the baking... Agent: Epistar Corporation
20140356995 - Method for fabricating a lateral-epitaxial-overgrowth thin-film light-emitting diode with nanoscale-roughened structure: A method for fabricating a lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure is provided. The lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure has a substrate, a metal bonding layer formed on the substrate, a first electrode formed on the metal bonding layer, a semiconductor structure formed on the first electrode... Agent:
20140356994 - Method of manufacturing organic electroluminescence device: A method of manufacturing an organic electroluminescence device is disclosed. In one aspect, the method includes forming color patterns on a substrate, and forming a pixel defining layer between the color patterns.... Agent: Samsung Display Co., Ltd.
20140356998 - Donor substrate and method for forming transfer pattern using the same: A donor substrate includes a base layer, a light-to-heat conversion layer disposed on the base layer, a buffer layer disposed on the light-to-heat conversion layer and a transfer layer disposed on the buffer layer. The buffer layer includes a cross-linked polymer, a spacer polymer bonded to the cross-linked polymer, and... Agent: Samsung Display Co., Ltd.
20140357000 - Donor substrate and method of forming transfer pattern using the same: A donor substrate includes a base substrate; a light reflection layer on the base substrate and partially overlapping the base substrate; a light-to-heat conversion layer on the base substrate, and including a combination layer including an insulating material and a first metal material; and a transfer layer on the light-to-heat... Agent: Samsung Display Co., Ltd.
20140356996 - Donor substrate, method for fabricating the donor substrate, and method for forming transfer pattern using the donor substrate: A donor substrate may include a base layer, a light-to-heat conversion layer disposed on the base layer, a buffer layer disposed on the light-to-heat conversion layer and including a composite layer of titanium dioxide and polytetrafluoroethylene, and a transfer layer disposed on the buffer layer. The buffer layer may be... Agent: Samsung Display Co., Ltd.
20140356997 - Donor substrate, method of manufacturing the same, and method of forming transfer pattern using the same: A donor substrate includes a base layer, a light-to-heat conversion layer disposed on the base layer, a metal particle layer disposed on the base layer and which discharges static electricity, and a transfer layer disposed on the light-to-heat conversion layer.... Agent: Samsung Display Co., Ltd.
20140357004 - Method of fabricating a display device with step configuration in the insulating layer: A display device includes: a substrate; a plurality of light-emission elements arranged, on the substrate, in a first direction and a second direction intersecting each other, each of the light-emission elements having a first electrode layer, an organic layer including a luminous layer, and a second electrode layer which are... Agent: Sony Corporation
20140356999 - Method of manufacturing organic light emitting display apparatus: A method of manufacturing an organic light emitting display apparatus, the method includes loading a substrate on a moving unit, determining an angle formed between a side of the substrate and an opening in a patterning slit sheet, rotating the patterning slit sheet by two X motors so that the... Agent: Samsung Display Co., Ltd.
20140357003 - Method of manufacturing organic light emitting display apparatus: A method of manufacturing an organic light emitting display apparatus is presented. The method includes providing a device substrate on which a first electrode and a pixel definition layer covering a portion of the first electrode are formed, forming a master substrate on which a transfer mask is patterned to... Agent: Samsung Display Co., Ltd.
20140357001 - Organic layer deposition apparatus and method of manufacturing organic light-emitting display apparatus using the same: An organic layer deposition apparatus includes a conveyer unit and a deposition unit that has one or more organic layer deposition assemblies configured to deposit an organic layer on a moving substrate. The conveyer unit includes a moving unit configured to move a substrate fixed thereto, a first conveyer unit... Agent: Samsung Display Co., Ltd.
20140357002 - Thin film deposition apparatus and method of manufacturing organic light-emitting display apparatus using the same: A method of manufacturing an organic light-emitting display apparatus includes: forming light-emitting regions on a substrate; forming an organic light-emitting layer on the light-emitting regions; forming a counter electrode on the organic light-emitting layer; and forming an auxiliary electrode electrically connected to the counter electrode. A thickness of the auxiliary... Agent: Samsung Display Co., Ltd.
20140357005 - Light-emitting device and a method of manufacturing light-emitting device: To provide a highly reliable light-emitting device and especially a light-emitting device which can be formed without use of a metal mask and includes a plurality of light-emitting elements. A structural body at least an end of which has an acute-angled shape is provided so that the end can pass... Agent:
20140357007 - Method of forming a bond ring for a first and second substrate: One method includes providing a first substrate; the first substrate may include a first MEMS device and a second MEMS device. A second substrate is also provided. The first substrate is bonded to the second substrate. The bonding may include forming a first bond ring around the first MEMS device... Agent:
20140357008 - Method of manufacturing solar cell and method of forming doping region: A method of manufacturing a solar cell is disclosed. The method includes forming a doping region including first and second portions having different doping concentrations by ion-implanting a dopant into a semiconductor substrate and forming an electrode connected to the doping region. In the forming of the doping region, the... Agent: Lg Electronics Inc.
20140357010 - Process for enhancing image quality of backside illuminated image sensor: A method includes providing a substrate having a first surface and a second surface, the first surface being opposite the second surface, forming a light sensing region at the first surface of the substrate, forming a doped layer at the second surface of the substrate using a laser annealing process,... Agent:
20140357009 - Process for manufacturing a photovoltaic cell: A method of manufacturing a photovoltaic cell including forming a semiconductor substrate comprising opposite first and second surfaces; forming, on the first surface of the substrate, a first semiconductor area doped by implantation of first dopant elements across the substrate thickness and by thermal activation of the first implanted dopant... Agent:
20140357011 - Solid-state image pick-up device and manufacturing method thereof, image-pickup apparatus, semiconductor device and manufacturing method thereof, and semiconductor substrate: A solid-state image pick-up device is provided which includes a semiconductor substrate main body which has an element forming layer and a gettering layer provided on an upper layer thereof; photoelectric conversion elements, each of which includes a first conductive type region, provided in the element forming layer; and a... Agent:
20140357012 - Manufacturing method and manufacturing device for optical substrate having concavo-convex pattern using film-shaped mold, and manufacturing method for device provided with optical substrate: A method for manufacturing an optical substrate includes: a step for preparing a long film-shaped mold; a step for preparing a sol; a step for forming a coating film of the sol on a substrate; a step for drying the coating film; a step for pressing a pattern surface of... Agent:
20140357013 - Preparation method for organic solar cells having conductive nanorods: The present invention provides a preparation method for organic solar cells having conductive nanorods. In the process of solar cells, the present invention etches the indium-tin-oxide layer, which used as the anode, using etching fluid and forms the structure of the conductive nanorods thereon. Thereby, the distance of the holes... Agent:
20140357014 - High efficiency solar cell using iiib material transition layers: A solar cell including a base of single crystal silicon with a cubic crystal structure and a single crystal layer of a second material with a higher bandgap than the bandgap of silicon. First and second single crystal transition layers are positioned in overlying relationship with the layers graduated from... Agent:
20140357015 - Method and apparatus for manufacturing lead wire for solar cell: A method of manufacturing a lead wire for a solar cell includes heating a wire material by a direct resistance heating or by an induction heating to reduce a 0.2% proof stress of the wire material while conveying the wire material and plating the wire material that is in a... Agent:
20140357016 - Organic molecular film forming apparatus and organic molecular film forming method: An organic molecular film forming apparatus 100 of forming an organic molecular film on a processing target object includes a processing chamber 11 that accommodates therein the processing target object; an organic material gas supplying unit 2 that supplies an organic material gas into the processing chamber 11; and an... Agent: Tokyo Electron Limited
20140357019 - Driver circuit and semiconductor device: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over... Agent:
20140357017 - Method for fabricating thin-film transistor: A method for fabricating a thin-film transistor is disclosed. Firstly, a patterned dielectric mask structure with a bottom thereof having a gate dielectric layer is formed on a gate-stacked structure so that the gate dielectric layer covers a gate of the gate-stacked structure. Top surface of the patterned dielectric mask... Agent: National Chiao Tung University
20140357018 - Method for manufacturing semiconductor device: To provide a method for manufacturing a thin film transistor in which contact resistance between an oxide semiconductor layer and source and drain electrode layers is small, the surfaces of the source and drain electrode layers are subjected to sputtering treatment with plasma and an oxide semiconductor layer containing In,... Agent:
20140357020 - Methods for high precision microelectronic die integration: The subject matter of the present description relates to methods for the precise integration of microelectronic dice within a multichip package which substantially reduce or eliminate any misalign caused by the movement of the microelectronic dice during the integration process. These methods may include the use of a temporary adhesive... Agent:
20140357021 - Multi-chip module with stacked face-down connected dies: A microelectronic assembly can include a substrate having first and second surfaces, at least two logic chips overlying the first surface, and a memory chip having a front surface with contacts thereon, the front surface of the memory chip confronting a rear surface of each logic chip. The substrate can... Agent:
20140357022 - A qfn with wettable flank: Methods of fabricating a QFN with wettable flank are described. In an embodiment, a leadframe is used which comprises regions of reduced thickness dam bar which extend across an edge of a kerf width and the QFN are formed using film assisted molding with a shaped mold chase that comprises... Agent:
20140357023 - Semiconductor device package with cap element: A method of assembling a semiconductor device includes providing a substrate having an array of substrate elements linked by substrate corner elements and separated by slots extending between the corner elements. Semiconductor dies are positioned on the substrate elements. A cap, frame and contact structure is provided that has a... Agent: Freescale Semiconductor, Inc.
20140357024 - Recessed and embedded die coreless package: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in a plating material to hold a die, attaching the die in the cavity, forming a dielectric material adjacent the die, forming vias in the dielectric material adjacent the... Agent:
20140357025 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device including a semiconductor element; a pad electrode that is formed on the semiconductor element; an alignment mark that is formed on the semiconductor element; a connection electrode that is formed on the pad electrode; and an underfill resin that is formed to cover the connection electrode. The... Agent:
20140357026 - Production method for semiconductor device: A method for producing a semiconductor device includes an implantation step of performing proton implantation from a rear surface of a semiconductor substrate of a first conductivity type and a formation step of performing an annealing process for the semiconductor substrate in an annealing furnace to form a first semiconductor... Agent: Fuji Electric Co., Ltd.
20140357027 - Method for manufacturing semiconductor device: The present invention discloses a method for manufacturing a semiconductor device, comprising: forming a gate stacked structure on a substrate; forming a source/drain region and a gate sidewall spacer at both sides of the gate stacked structure; depositing a Nickel-based metal layer at least in the source/drain region; performing a... Agent:
20140357028 - Methods for fabricating integrated circuits with the implantation of fluorine: A method for fabricating an integrated circuit includes forming a first gate electrode structure above a first active region and a second gate electrode structure above a second active region, forming a sacrificial spacer on sidewalls of the first and second gate electrode structures, and forming deep drain and source... Agent:
20140357029 - Method of making a semiconductor device using sacrificial fins: A method of making a semiconductor device includes forming a sacrificial layer above a semiconductor layer. Portions of the sacrificial layer are selectively removed to define a first set of spaced apart sacrificial fins over a first region of the semiconductor layer, and a second set of spaced apart sacrificial... Agent:
20140357030 - Fabrication of mos device with schottky barrier controlling layer: Fabricating a semiconductor device includes: forming a gate trench in an epitaxial layer overlaying a semiconductor substrate; depositing gate material in the gate trench; forming a body; forming a source; forming an active region contact trench that extends through the source and the body into a drain; forming a Schottky... Agent:
20140357031 - Nonvolatile memory device and method for fabricating the same: A nonvolatile memory device may include a plurality of channel layers protruded substantially perpendicularly over a substrate having a well region, a structure configured to have a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked along each of the plurality of channel layers, a plurality... Agent: Sk Hynix Inc.
20140357032 - Nonvolatile semiconductor memory device and method for manufacturing the same: On a silicon substrate is formed a stacked body by alternately stacking a plurality of silicon oxide films and silicon films, a trench is formed in the stacked body, an alumina film, a silicon nitride film and a silicon oxide film are formed in this order on an inner surface... Agent: Kabushiki Kaisha Toshiba
20140357033 - Method for fabricating a metal high-k gate stack for a buried recessed access device: A method for fabricated a buried recessed access device comprising etching a plurality of gate trenches in a substrate, implanting and activating a source/drain region in the substrate, depositing a dummy gate in each of the plurality of gate trenches, filling the plurality of gate trenches with an oxide layer,... Agent:
20140357034 - Multi-height finfets with coplanar topography: A semiconductor structure is provided that has semiconductor fins having variable heights without any undue topography. The semiconductor structure includes a semiconductor substrate having a first semiconductor surface and a second semiconductor surface, wherein the first semiconductor surface is vertically offset and located above the second semiconductor surface. An oxide... Agent: International Business Machines Corporation
20140357035 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and... Agent:
20140357037 - Finfet with enhanced embedded stressor: A channel region of a finFET has fins having apexes in a first direction parallel to a surface of a substrate, each fin extending downwardly from the apex, with a gate overlying the apexes and between adjacent fins. A semiconductor stressor region extends in at least the first direction away... Agent:
20140357036 - Method of making a semiconductor device including an all around gate: A method of making a semiconductor device includes forming an intermediate structure including second semiconductor fin portions above a first semiconductor layer, and top first semiconductor fin portions extending from respective ones of the second semiconductor fin portions. The second semiconductor fin portions are selectively etchable with respect to the... Agent: Stmicroelectronics, Inc.
20140357038 - Through silicon via processing method for lateral double-diffused mosfets: The present invention features methods for forming a field effect transistor on a semiconductor substrate having gate, source and drain regions, with the gate region having a lateral gate channel. A plurality of spaced-apart trenches or through semiconductor vias (TSV) each having an electrically conductive plug formed therein in electrical... Agent: Alpha & Omega Semiconductor Incorporated
20140357039 - Method for the formation of a protective dual liner for a shallow trench isolation structure: On a substrate formed of a first semiconductor layer, an insulating layer and a second semiconductor layer, a silicon oxide pad layer and a silicon nitride pad layer are deposited and patterned to define a mask. The mask is used to open a trench through the first semiconductor layer and... Agent:
20140357041 - Method of forming strained source and drain regions in a p-type finfet structure: A method of forming strained source and drain regions in a P-type FinFET structure is disclose. The method comprises depositing an isolation layer on the FinFET structure; applying a lithography and etching process to expose the isolation layer in two areas on opposite sides of the gate over the source/drain... Agent: Shanghai Huali Microelectronics Corporation
20140357040 - Method of making a semiconductor device using spacers for source/drain confinement: A method of making a semiconductor device includes forming a first spacer for at least one gate stack on a first semiconductor material layer, and forming a respective second spacer for each of source and drain regions adjacent the at least one gate. Each second spacer has a pair of... Agent: Stmicroelectronics, Inc.
20140357042 - Spacer stress relaxation: A known problem when manufacturing transistors is the stress undesirably introduced by the spacers into the transistor channel region. In order to solve this problem, the present invention proposes an ion implantation aimed at relaxing the stress of the spacer materials. The relax implantation is performed after the spacer has... Agent:
20140357043 - Lateral bipolar transistors having partially-depleted intrinsic base: A bipolar junction transistor (BJT) and method for fabricating such. The transistor includes an emitter region, a collector region, and an intrinsic-base region. The intrinsic-base region is positioned between the emitter region and the collector region. Furthermore, the physical separation between the emitter region and the collector region is less... Agent:
20140357045 - Efuse and method of fabrication: An improved eFuse and method of fabrication is disclosed. A cavity is formed in a substrate, which results in a polysilicon line having an increased depth in the area of the fuse, while having a reduced depth in areas outside of the fuse. The increased depth reduces the chance of... Agent:
20140357044 - Metal-insualtor-metal (mim) device and method of formation thererof: In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer,... Agent:
20140357046 - Reram cells including taxsiyn embedded resistors: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A ReRAM cell includes an embedded resistor and a resistive switching layer connected in series with this resistor. The resistor is configured to prevent over-programming of the cell by limiting electrical currents through the resistive switching layer.... Agent:
20140357047 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a first insulating layer (interlayer insulating layer), a resistive element that is disposed over the first insulating layer (interlayer insulating layer) and at least a surface layer of which is a TaSiN layer, and an interlayer insulating layer disposed over the first insulating layer (interlayer insulating... Agent: Renesas Electronics Corporation
20140357048 - Method for producing a semiconductor component: Methods for producing a semiconductor component that includes a transistor having a cell structure with a number of transistor cells monolithically integrated in a semiconductor body and electrically connected in parallel. In an example method, first trenches extending from the top side into the semiconductor body are produced, as are... Agent:
20140357049 - Semiconductor structures and methods with high mobility and high energy bandgap materials: An embodiment is a structure comprising a substrate, a high energy bandgap material, and a high carrier mobility material. The substrate comprises a first isolation region and a second isolation region. Each of first and second isolation regions extends below a first surface of the substrate between the first and... Agent:
20140357050 - Method of forming isolating structure and through silicon via: A method of forming an isolation structure and a through silicon via includes the following steps. First, at least a first trench and at least a second trench are formed in the substrate by a single etch step. Then, an insulating layer is formed to simultaneously fill up the first... Agent:
20140357051 - Method for forming radio frequency device: A method for forming a radio frequency device is provided. The method may include: providing a semiconductor-on-insulator layer, which comprises a back substrate, a buried oxide layer and a top semiconductor layer, where a plurality of transistors and an interlayer dielectric layer covering the plurality of transistors are formed on... Agent: Shanghai Huahong Grace Semiconductor Manufacturing Corporation
20140357053 - Method for preparing composite substrate used for gan growth: A method for preparing a composite substrate for GaN growth includes: growing a GaN monocrystal epitaxial layer on a sapphire substrate, bonding the GaN epitaxial layer onto a temporary substrate, lifting off the sapphire substrate, bonding the GaN epitaxial layer on the temporary substrate with a thermally and electrically conducting... Agent: Sino Nitride Semiconductor Co., Ltd
20140357054 - Methods for fabricating semiconductor devices: A semiconductor device can include a first substrate and conductive patterns on the first substrate, where the conductive patterns are disposed in stacks vertically extending from the substrate. An active pillar can be on the first substrate vertically extend from the first substrate throughthe conductive patterns to provide vertical string... Agent:
20140357052 - Substrate detergent composition: The invention provides a substrate detergent composition used for cleaning a surface of a substrate, comprising: (A) A quaternary ammonium salt: 0.1 to 2.0% by mass; (B) Water: 0.1 to 0.4% by mass; and (C) An organic solvent: 94.0 to 99.8% by mass. There can be provided a substrate detergent... Agent: Shin-etsu Chemical Co., Ltd.
20140357055 - Method for processing a semiconductor workpiece: A method for processing a semiconductor workpiece is provided, which may include: providing a semiconductor workpiece including a metallization layer stack disposed at a side of the semiconductor workpiece, the metallization layer stack including at least a first layer and a second layer disposed over the first layer, wherein the... Agent: Infineon Technologies Ag
20140357056 - Method of forming sigma-shaped trench: A method of forming a Σ-shaped trench is disclosed. The method includes: providing a silicon substrate; and performing a plasma etching process to form a Σ-shaped trench in the silicon substrate. The plasma etching process includes: etching the silicon substrate using a first plasma etching gas including a sulphur-containing fluoride;... Agent: Shanghai Huali Microelectronics Corporation
20140357059 - Schottky rectifier: A semiconductor rectifier includes a semiconductor substrate having a first type of conductivity. A first layer, which is formed on the substrate, has the first type of conductivity and is more lightly doped than the substrate. A second layer having a second type of conductivity is formed on the substrate... Agent:
20140357057 - Structure for iii-v devices on silicon: Embodiments described herein relate to a structure for III-V devices on silicon. A Group IV substrate is provided and a III-V structure may be formed thereon. The III-V structure generally comprises one or more buffer layers and a channel layer disposed on the one or more buffer layers. The one... Agent: Applied Materials, Inc.
20140357058 - Substrate processing apparatus, method of manufacturing semiconductor device, and non-transitory computer-readable recording medium: There is provided a substrate processing apparatus including: a process chamber configured to accommodate and process a plurality of substrates arranged with intervals therebetween; a first nozzle extending along a stacking direction of the substrates and configured to supply a hydrogen-containing gas into the process chamber; and a second nozzle... Agent: Hitachi Kokusai Electric Inc.
20140357062 - Fabricating method of semiconductor device: A method of fabricating a semiconductor device, the method including forming a trench on a substrate; forming an insulating layer pattern within the trench; depositing an amorphous material on the substrate and the insulating layer pattern; planarizing the amorphous material; removing a portion of the amorphous material, the removed portion... Agent: Samsung Electronics Co., Ltd.
20140357060 - Method for the formation of fin structures for finfet devices: A SOI substrate layer formed of a silicon semiconductor material includes adjacent first and second regions. A portion of the silicon substrate layer in the second region is removed such that the second region retains a bottom portion made of the silicon semiconductor material. An epitaxial growth of a silicon-germanium... Agent: Stmicroelectronics, Inc.
20140357061 - Semiconductor device and method for fabricating the same: Provided are a semiconductor device and a method for fabricating the same. The method for fabricating a semiconductor device comprises, providing an active fin and a field insulating film including a first trench disposed on the active fin; forming a second trench through performing first etching of the field insulating... Agent:
20140357063 - Manufacturing methods of semiconductor substrates: The present invention discloses manufacturing methods of semiconductor substrates. The method includes following steps: providing a semiconductor substrate with a nucleation layer, forming a microparticle etching mask on the nucleation layer, etching the nucleation layer, filling sol-gel into etched notches of the semiconductor substrate, removing the microparticle etching mask, performing... Agent:
20140357064 - Tensile stressed doped amorphous silicon: The method and apparatus disclosed herein relate to preparing a stack structure for an electronic device on a semiconductor substrate. A particularly beneficial application of the method is in reduction of internal stress in a stack containing multiple layers of silicon. Typically, though not necessarily, the internal stress is a... Agent:
20140357065 - Amorphous silicon thickness uniformity improved by process diluted with hydrogen and argon gas mixture: The embodiments described herein generally relate to methods for forming an amorphous silicon structure that may be used in thin film transistor devices. In embodiments disclosed herein, the amorphous silicon layer is deposited using a silicon-based gas with an activation gas comprising a high concentration of inert gas and a... Agent: Applied Materials, Inc.
20140357066 - Methods of crystallising thin films: A method of crystallising a thin film (220) including the steps of: depositing a thin film (220) on a substrate (210; and exposing the thin film (220) as deposited on the substrate (210) and the substrate (210) to a plasma for a time period of greater than 5 minutes, wherein:... Agent: Panorama Synergy, Ltd.
20140357067 - Method of manufacturing nitride substrate, and nitride substrate: A method of manufacturing a nitride substrate includes the following steps. Firstly, a nitride crystal is grown. Then, the nitride substrate including a front surface is cut from the nitride crystal. In the step of cutting, the nitride substrate is cut such that an off angle formed between an axis... Agent: Sumitomo Electric Industries, Ltd.
20140357068 - Plasma doping apparatus, plasma doping method, semiconductor device manufacturing method and semiconductor device: A plasma doping apparatus which performs doping by injecting dopants into a substrate to be processed. The apparatus includes a processing container, a gas supplying unit configured to supply a doping gas and an inert gas for plasma excitation into the processing container, a holding table configured to hold the... Agent: Tokyo Electron Limited
20140357069 - Aluminum dopant compositions, delivery package and method of use: A novel method and system for using aluminum dopant compositions is provided. A composition of the aluminum dopant compositions is selected with sufficient vapor pressure and minimal carbon content, thereby enabling ease of delivery to an ion implant process and substantial reduction of carbon deposition during Al ion implantation. The... Agent:
20140357070 - Method of improving the yield of a semiconductor device: A method of improving the yield of semiconductor devices includes implanting ions into a NMOS gate. A layer of PEOX film is deposited upon the gate. A layer of LTO film is deposited upon the PEOX film. The method solves the problems of ions implanted on the NMOS gate diffusing... Agent: Shanghai Huali Microelectronics Corporation
20140357071 - Method of manufacturing semiconductor device having doped layer: A method of manufacturing a semiconductor device having a doped layer may be provided. The method includes providing a substrate having a first region and a second region, forming a gate dielectric layer on the substrate, forming a first gate electrode layer on the gate dielectric layer, forming a first... Agent: Samsung Electronics Co., Ltd.
20140357072 - Methods and structures for split gate memory: A method of making a non-volatile memory (NVM) cell using a substrate having a top surface of silicon includes forming a select gate stack over the substrate. An oxide layer is grown on the top surface of the substrate. Nanocrystals of silicon are formed on the thermal oxide layer adjacent... Agent:
20140357073 - Systems and methods for fabricating gate structures for semiconductor devices: A method includes providing a gate structure with at least one side wall and a bottom. At least one first spacer layer is formed over the at least one side wall. An offset spacer layer is formed over the at least one first spacer layer and the bottom. A bottom... Agent:
20140357074 - Semiconductor apparatus and method of fabricating the same: In a semiconductor apparatus, a plurality of semiconductor chips including through-silicon vias are stacked in a vertical direction, wherein the through-silicon via formed in each semiconductor chip protrudes beyond heights of each semiconductor chip.... Agent:
20140357075 - Semiconductor device: A semiconductor device includes a semiconductor chip and a metal layer electrically coupled to the semiconductor chip. The semiconductor device includes an array of solder balls coupled to the metal layer and a front side protect material directly contacting the metal layer and laterally surrounding a portion of at least... Agent:
20140357076 - Semiconductor device with air gaps and method for fabricating the same: A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers on sidewalls of the contact holes, forming first plugs recessed inside the contact holes, forming air gaps by removing the sacrificial... Agent:
20140357077 - Methods for fabricating semiconductor devices having through electrodes: Provided are methods for fabricating semiconductor devices having through electrodes. The method may comprise forming a polishing stop layer having a multi-layered structure on a substrate, forming a via hole partially penetrating the substrate, providing the substrate with a first cleaning solution to first clean the substrate, providing the substrate... Agent: Samsung Electronics Co., Ltd.
20140357079 - Methods of forming conductive structures using a sacrificial material during a metal hard mask removal process: One illustrative method disclosed herein includes forming at least one layer of insulating material above a conductive structure, forming a patterned hard mask comprised of metal above the layer of insulating material, performing at least one etching process to define a cavity in the layer of insulating material, forming a... Agent: Globalfoundries Inc.
20140357078 - Methods of forming conductive structures using a sacrificial material during an etching process that is performed to remove a metal hard mask: One illustrative method disclosed herein includes forming at least one layer of insulating material above a conductive structure, forming a patterned hard mask comprised of metal above the layer of insulating material, performing at least one etching process to define a cavity in the layer of insulating material that exposes... Agent:
20140357080 - Method for preferential shrink and bias control in contact shrink etch: A method for providing a shrink etch in which the features to be etched in a target layer have major and minor dimensions with the major dimension larger than the minor dimension. In the shrink etch of a mask, the dimensions are reduced from that of a patterned resist of... Agent: Tokyo Electron Limited
20140357081 - Method of forming a conductive image on a non-conductive surface: The present invention relates to a method for forming a raised conductive image on a non-conductive or dielectric surface, the method comprising placing a metal coordination complex on a surface of the substrate, exposing the surface to electromagnetic radiation, reducing the exposed complex, removing unexposed complex leaving an elemental metal... Agent:
20140357083 - Directed block copolymer self-assembly patterns for advanced photolithography applications: Embodiments of methods and an apparatus for utilizing a directed self-assembly (DSA) process on block copolymers (BCPs) to form a defect-free photoresist layer for feature transfer onto a substrate are provided. In one embodiment, a method for performing a dry development process includes transferring a substrate having a layer of... Agent: Applied Materials, Inc.
20140357082 - High-rate chemical vapor etch of silicon substrates: Methods of etching a silicon substrate at a high rate using a chemical vapor etching process are provided. A silicon substrate may be etched by heating the silicon substrate in a process chamber and then flowing hydrochloric acid and a germanium-carrying compound into the process chamber. The substrate may be... Agent:
20140357084 - Mitigation of asymmetrical profile in self aligned patterning etch: A method which is particularly advantageous for improving a Self-Aligned Pattern (SAP) etching process. In such a process, facets formed on a spacer layer can cause undesirable lateral etching in an underlying layer beneath the spacer layer when the underlying layer is to be etched. This detracts from the desired... Agent: Tokyo Electron Limited
20140357085 - Etching method and non-transitory storage medium: Provided is a method of selectively etching a portion of silicon existing on a surface of a substrate to be processed, which includes: loading the substrate to be processed into a chamber; and supplying an FNO gas and an F2 gas that are diluted with an inert gas into the... Agent: L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude
20140357086 - Methods of forming a substrate opening: A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side openings are formed in the substrate to different depths relative one another. Walls that are laterally between the side-by-side openings are removed to form a larger... Agent:
20140357087 - Apparatus and method for etching organic layer: Provided are an apparatus and method for etching an organic layer, in which an organic material deposited in a non-layer forming area of a substrate is etched. The apparatus includes an etching chamber; a plasma generator configured to supply plasma into the etching chamber; a stage disposed in the etching... Agent: Samsung Display Co., Ltd.
20140357088 - Precursor for planar deprocessing of semiconductor devices using a focused ion beam: A method and system for improved planar deprocessing of semiconductor devices using a focused ion beam system. The method comprises defining a target area to be removed, the target area including at least a portion of a mixed copper and dielectric layer of a semiconductor device; directing a precursor gas... Agent: Fei Company
20140357089 - Apparatus for advanced packaging applications: The embodiments disclosed herein pertain to novel methods and apparatus for removing material from a substrate. In certain embodiments, the method and apparatus are used to remove negative photoresist, though the disclosed techniques may be implemented to remove a variety of materials. In practicing the disclosed embodiments, a stripping solution... Agent: Novellus Systems, Inc.
20140357090 - Cyclic aluminum nitride deposition in a batch reactor: A process for depositing aluminum nitride is disclosed. The process comprises providing a plurality of semiconductor substrates in a batch process chamber and depositing an aluminum nitride layer on the substrates by performing a plurality of deposition cycles without exposing the substrates to plasma during the deposition cycles. Each deposition... Agent:
20140357091 - Semiconductor fabrication process: Semiconductor fabrication processes are described. An embodiment of the semiconductor fabrication process includes providing a layer formed by decomposition of dimethylsilane through chemical vapor deposition, the layer being applied by a fluid material, and then positioning the layer in a system for producing a semiconductor product. Additionally or alternatively, the... Agent:
20140357092 - Chamber wall of a plasma processing apparatus including a flowing protective liquid layer: A semiconductor plasma processing apparatus includes a vacuum chamber in which semiconductor substrates are processed, a process gas source in fluid communication with the vacuum chamber for supplying a process gas into the vacuum chamber, and an RF energy source adapted to energize the process gas into the plasma state... Agent:
20140357093 - Process for stabilizing a bonding interface, located within a structure which comprises an oxide layer and structure obtained: The invention relates to a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion. In... Agent:11/27/2014 > 81 patent applications in 63 patent subcategories.
20140349416 - Method for manufacturing a magnetic tunnel junction: The present invention relates to a magnetic tunnel junction device and a manufacturing method thereof. The magnetic tunnel junction device includes: i) a first magnetic layer including a compound having a chemical formula of (A100-xBx)100-yCy; ii) an insulating layer deposited on the first magnetic layer; and iii) a second magnetic... Agent:
20140349414 - Method to reduce magnetic film stress for better yield: A thin-film deposition, such as an MTJ (magnetic tunneling junction) layer, on a wafer-scale CMOS substrate, is segmented by walls or trenches and not affected by thin-film stresses due to wafer warpage or other subsequent annealing processes. An interface layer on the CMOS substrate is patterned by either undercut trenches... Agent:
20140349415 - Perpendicular mtj stacks with magnetic anisotropy enhancing layer and crystallization barrier layer: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the... Agent:
20140349413 - Semiconductor devices and methods of manufacturing the same: A method of manufacturing a semiconductor device may include forming a material layer on a substrate, performing a selective oxidation process to form a capping oxide layer on a first surface of the material layer, wherein a second surface of the material layer is not oxidized, and etching the material... Agent:
20140349418 - Plasma processing method: A plasma processing method in which a stable process region can be ensured in a wide range, from low microwave power to high microwave power. The plasma processing method includes making production of plasma easy in a region in which production of plasma by continuous discharge is difficult, and plasma-processing... Agent:
20140349417 - System, method and apparatus for rf power compensation in plasma etch chamber: A system and method of applying power to a target plasma chamber include, characterizing a no plasma performance slope of the target plasma chamber, applying a selected plasma recipe to a first wafer in the target chamber, the selected plasma recipe includes a selected power set point value and monitoring... Agent: Lam Research Corporation
20140349419 - Method of manufacturing light-emitting device: A method of manufacturing a light-emitting device includes forming a wave length conversion portion on a light-emitting element. The light emitting device includes a light-emitting element which emits light of a predetermined wavelength and a wavelength conversion portion which includes a fluorescent substance which is excited by the light emitted... Agent:
20140349420 - Printing apparatus and method of forming an organic light emitting layer: A printing apparatus includes a printing mask, which is disposed between a substrate having a display area and a non-display area surrounding the display area. The apparatus further includes a nozzle discharging an organic light emitting liquid onto the substrate. The printing mask includes a mask open part and a... Agent: Samsung Display Co., Ltd.
20140349421 - Semiconductor light emitting device and method for manufacturing the same: According to one embodiment, a semiconductor light emitting device includes a structure including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer. The device also... Agent: Kabushiki Kaisha Toshiba
20140349422 - Method for hybrid encapsulation of an organic light emitting diode: Methods and apparatus for encapsulating organic light emitting diode (OLED) structures disposed on a substrate using a hybrid layer of material are provided. The processing parameters used during deposition of the hybrid layer of material allow control of the characteristics of the deposited hybrid layer. The hybrid layer may be... Agent:
20140349424 - Lead frame for mounting led elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements: A lead frame for mounting LED elements includes a frame body region and a large number of package regions arranged in multiple rows and columns in the frame body region. The package regions each include a die pad on which an LED element is to be mounted and a lead... Agent:
20140349423 - Method for manufacturing a liquid crystal display equipment: The present invention discloses a method for manufacturing a liquid crystal display. The method includes: manufacturing a matrix substrate, having a glass layer and a metal layer; manufacturing a color filter substrate, having an active area and a black matrix region; utilizing a glue to fix the matrix substrate and... Agent: Shenzhen China Star Optoelectronics Technology Co., Ltd
20140349426 - Array substrate and method of manufacturing the same: An array substrate includes; a substrate, a gate line and a data line disposed on the substrate, a thin film transistor (“TFT”) electrically connected to the gate line and the data line, a light blocking member disposed on the substrate and a first color filter and a second color filter... Agent:
20140349425 - Photoresist composition, method of manufacturing a polarizer and method of manufacturing a display substrate using the same: A photoresist composition includes about 65% by weight to about 80% by weight of a mono-functional monomer, about 5% by weight to about 20% by weight of a di-functional monomer, about 1% by weight to about 10% by weight of a multi-functional monomer including three or more functional groups, about... Agent:
20140349427 - Enhanced performance active pixel array and epitaxial growth method for achieving the same: Methods are described to utilize relatively low cost substrates and processing methods to achieve enhanced emissive imager pixel performance via selective epitaxial growth. An emissive imaging array is coupled with one or more patterned compound semiconductor light emitting structures grown on a second patterned and selectively grown compound semiconductor template... Agent:
20140349429 - Method for manufacturing a display unit: A method for manufacturing a display unit is provided, and the method includes forming a first insulating film, forming a plurality of first electrodes on the first insulating film, forming a second insulating film on the first electrodes, forming a plurality of openings corresponding to the first electrodes, forming a... Agent:
20140349428 - Substrate moving unit for deposition, deposition apparatus including the same, method of manufacturing organic light-emitting display apparatus by using the deposition apparatus, and organic light-emitting display apparatus manufactured by using the metho: Provided are a substrate moving unit for use with a deposition apparatus that allows a deposition material to be precisely deposited on a target site of a substrate. The substrate moving unit includes an electrostatic chuck having a first surface on which a substrate is fixable and a magnetic force... Agent: Samsung Display Co., Ltd.
20140349430 - Deposition apparatus, method thereof and method for forming quantum-dot layer using the same: A deposition apparatus includes a first nozzle configured to spray a first deposition material toward a substrate and a second nozzle configured to spray a second deposition material, a first deposition source configured to supply the first deposition material to the first nozzle and a second deposition source configured to... Agent: Samsung Display Co., Ltd.
20140349433 - Device and method for depositing organic material: A device for depositing an organic material includes a substrate; a mask having an opening portion and a shield portion; a fixing member for fixing the substrate and the mask to each other; a deposition source comprising a plurality of nozzles arranged in a first direction and configured to spray... Agent:
20140349432 - Method for manufacturing organic electroluminescent element: Forming an upper electrode included in an organic electroluminescent element includes: forming a first film made of a material for the upper electrode on an organic functional layer by magnetron sputtering under a first condition; and forming a second film made of the material for the upper electrode on the... Agent:
20140349434 - Internal electrical contact for enclosed mems devices: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the... Agent:
20140349436 - Method for making a spacer in a photovoltaic substrate: A micron gap thermo-photo-voltaic device including a photovoltaic substrate, a heat source substrate, and a plurality of spacers separating the photovoltaic substrate from the heat source substrate by a submicron gap. Each spacer includes an elongated thin-walled structure disposed in a well formed in the heat source substrate and having... Agent:
20140349435 - Thermoelectric semiconductor: A thermoelectric semiconductor includes a matrix element that forms a matrix, and a dopant element having an atomic radius that is at least 1.09 times as large as the atomic radius of the matrix element.... Agent: Toyota Jidosha Kabushiki Kaisha
20140349437 - Image sensors and methods of manufacturing the same: In image sensors and methods of manufacturing the same, a substrate has a photoelectric conversion area, a floating diffusion area and a recess between the photoelectric conversion area and the floating diffusion area. A plurality of photodiodes is vertically arranged inside the substrate in the photoelectric conversion area. A transfer... Agent:
20140349438 - Diaphragm sheet, and method for manufacturing solar cell module using diaphragm sheet: The performances and durability of a diaphragm sheet of a solar cell laminator are enhanced, and a favorable lamination work is stably performed over a long period of time. In addition, by stably performing sufficient and uniform lamination over a long period of time, a high-quality module is stably manufactured... Agent:
20140349439 - Electronic device, method of manufacturing the same, and camera: A method of manufacturing an electronic device includes forming a structure including a member, and a first film arranged on at least a surface of the member, the member including an insulating film, a passivation film arranged on the insulating film and having an upper surface, and a trench positioned... Agent: Canon Kabushiki Kaisha
20140349440 - Planarization method: A method of planarizing a member is provided. The method includes forming the member and polishing a top face of the member. The forming the member includes forming a resist layer which varies in thickness and performing an etch-back process. The etch-back process removes the resist layer and adjusts amounts... Agent: Canon Kabushiki Kaisha
20140349441 - Solar cell with metal grid fabricated by electroplating: One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure, a transparent-conductive-oxide (TCO) layer situated above the photovoltaic structure, and a front-side metal grid situated above the TCO layer. The TCO layer is in contact with the front surface of the photovoltaic structure.... Agent:
20140349442 - Thin film type solar cell and method for manufacturing the same: A thin film type solar cell and a method for manufacturing the same is disclosed, the thin film type solar cell including a front electrode formed on a substrate; a semiconductor layer formed on the front electrode; a transparent conductive layer formed on the semiconductor layer; a rear electrode formed... Agent: Jusung Engineering Co., Ltd.
20140349445 - Display substrate, display device, and method of manufacturing the display substrate: Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode... Agent:
20140349444 - Method for manufacturing semiconductor device and semiconductor device: A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode... Agent:
20140349443 - Stacked oxide material, semiconductor device, and method for manufacturing the semiconductor device: One embodiment is a method for manufacturing a stacked oxide material, including the steps of forming an oxide component over a base component; forming a first oxide crystal component which grows from a surface toward an inside of the oxide component by heat treatment, and leaving an amorphous component just... Agent:
20140349446 - Methods and materials useful for chip stacking, chip and wafer bonding: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.... Agent: Promerus, LLC
20140349447 - Method of manufacturing semiconductor device: To stably remove a resin body formed in a supply route of a resin in a sealing step. A leadframe has, in a sub-runner portion thereof, a sub-through-hole. The sub-through-hole has, along a first direction along which the sub-runner portion extends, a first portion located on the side of a... Agent: Renesas Electronics Corporation
20140349448 - Silicon-based electronics with disabling feature: Silicon-based circuitry is dissolved or otherwise disabled in a controlled manner by reactive materials provided beneath the insulating layer on which the circuitry is formed. Heat and/or light induced acid generating materials are provided for corroding one or more circuitry components. Additionally and/or alternatively, gas-producing materials are deposited in compartments... Agent:
20140349449 - Elemental semiconductor material contact for high electron mobility transistor: Portions of a top compound semiconductor layer are recessed employing a gate electrode as an etch mask to form a source trench and a drain trench. A low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material in the source trench and... Agent: International Business Machines Corporation
20140349450 - Techniques for providing a semiconductor memory device: Techniques for providing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus including a first region and a second region. The apparatus may also include a body region disposed between the first region and the second region and capacitively coupled... Agent: Micron Technology, Inc.
20140349451 - Complementary metal oxide semiconductor (cmos) device having gate structures connected by a metal gate conductor: A complementary metal oxide semiconductor (CMOS) device including a substrate including a first active region and a second active region, wherein each of the first active region and second active region of the substrate are separated by from one another by an isolation region. A n-type semiconductor device is present... Agent: International Business Machines Corporation
20140349452 - Method for manufacturing semiconductor devices: A method for manufacturing a semiconductor device is provided. A first stack structure and a second stack structure are formed to respectively cover a portion of a first fin structure and a second fin structure. Subsequently, a spacer is respectively formed on the sidewalls of the fin structures through an... Agent: United Microelectronics Corp.
20140349453 - Methods of fabricating three-dimensional semiconductor memory devices using direct strapping line connections: Memory devices include a plurality of elongate gate stacks extending in parallel on a substrate and at least one insulation region disposed in a trench between adjacent ones of the gate stacks. The at least one insulation region has linear first portions having a first width and widened second portions... Agent:
20140349454 - Methods of forming charge storage structures including etching diffused regions to form recesses: Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.... Agent:
20140349455 - Semiconductor device and method of manufacturing the same: In a semiconductor memory device, a plurality of control gates is stacked in a first region and a second region of a substrate. A plurality of interlayer insulating layers is stacked in a portion of the second region of the substrate. Each interlayer insulating layer is formed at the same... Agent:
20140349456 - Trench power mosfet structure fabrication method: A trench power MOSFET structure and fabrication method thereof is provided. The fabrication method comprises following process. First, form an isolating trench. Then, form at least two doped regions around the isolating trench. The doped regions are adjacent and the doping concentrations of two doped regions are different. Form an... Agent: Super Group Semiconductor Co., Ltd.
20140349457 - Floating body memory cell apparatus and methods: Some embodiments include apparatus and methods having a base; a memory cell including a body, a source, and a drain; and an insulation material electrically isolating the body, the source, and the drain from the base, where the body is configured to store information. The base and the body include... Agent:
20140349458 - Source and drain dislocation fabrication in finfets: A device includes a semiconductor fin over a substrate, a gate dielectric on sidewalls of the semiconductor fin, and a gate electrode over the gate dielectric. A source/drain region is on a side of the gate electrode. A dislocation plane is in the source/drain region.... Agent:
20140349459 - Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same: A structure has at least one field effect transistor having a gate stack disposed between raised source drain structures that are adjacent to the gate stack. The gate stack and raised source drain structures are disposed on a surface of a semiconductor material. The structure further includes a layer of... Agent:
20140349460 - Method for producing a silicon-germanium film with variable germanium content: The substrate is provided with a first semiconducting area partially covered by a first masking pattern to define a protected surface and an open surface. A continuous layer of silicon-germanium is deposited in non-selective manner on the first semiconducting area and on the first gate pattern. The continuous silicon-germanium layer... Agent:
20140349461 - Method for using metal bilayer: A method for using a metal bilayer is disclosed. First, a bottom electrode is provided. Second, a dielectric layer which is disposed on and is in direct contact with the lower electrode is provided. Then, a metal bilayer which serves as a top electrode in a capacitor is provided. The... Agent:
20140349462 - Method for producing thin semiconductor components: A semiconductor substrate (1) is provided with a structure (3) on an upper side (2), and an additional substrate (4) provided for handling the semiconductor substrate is likewise structured on an upper side (5). The structuring of the additional substrate takes place in at least partial correspondence with the structure... Agent: Ams Ag
20140349463 - Semiconductor structure and method for manufacturing the same: The present invention provides a method for improving anti-radiation performance of SOI structure comprising following steps: implementing particle implantations of high-energy neutrons, protons and γ-rays to an SOI structure, and then performing annealing process. The present invention aims to improving anti-radiation performance of SOI devices by means of introducing displacement... Agent:
20140349464 - Method for forming dual sti structure: A method for forming dual shallow trench isolation (STI) structure, which includes a first etching process for forming a deep STI structure in a logic region using a hard mask layer as a mask and a second etching process for forming a shallow STI structure in a pixel region using... Agent: Shanghai Huali Microelectronics Corporation
20140349465 - Joining device, joining system and joining method: A joining device for joining substrates with an intermolecular force includes a first holding unit configured to hold a first substrate on a lower surface thereof, a second holding unit installed below the first holding unit and configured to hold a second substrate on an upper surface thereof, and a... Agent: Tokyo Electron Limited
20140349467 - Semiconductor process: A semiconductor process includes the following steps. Two gates are formed on a substrate. A recess is formed in the substrate beside the gates. A surface modification process is performed on a surface of the recess to modify the shape of the recess and change the contents of the surface.... Agent: United Microelectronics Corp.
20140349466 - Wafer supporting structure and method for forming the same: A method for forming a wafer supporting structure comprises growing a single crystal using a floating zone crystal growth process, forming a silicon ingot having an oxygen concentration equal to or less than 1 parts-per-million-atomic (ppma), slicing a wafer from the silicon ingot, cutting portions of the wafer to form... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140349468 - Trench filling method and processing apparatus: The present disclosure provides a method for filling a trench formed on an insulating film of a workpiece. The method includes forming a first impurity-containing amorphous silicon film on a wall surface which defines the trench, forming a second amorphous silicon film on the first amorphous silicon film, and annealing... Agent: Tokyo Electron Limited
20140349469 - Processing for electromechanical systems and equipment for same: This disclosure provides systems, methods and apparatus for processing multiple substrates in a processing tool. An apparatus for processing substrates can include a process chamber, a common reactant source, and a common exhaust pump. The process chamber can be configured to process multiple substrates. The process chamber can include a... Agent: Qualcomm Mems Technologies, Inc.
20140349470 - Schottky diode and method for fabricating the same: A Schottky diode includes a deep well formed in a substrate, an isolation layer formed in the substrate, a first conductive type guard ring formed in the deep well along an outer sidewall of the isolation layer and located at a left side of the isolation layer, a second conductive... Agent: Magnachip Semiconductor, Ltd.
20140349471 - Profile pre-shaping for replacement poly gate interlayer dielectric: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the... Agent:
20140349472 - Flash memory: A MONOS Charge-Trapping flash (CTF), with record thinnest 3.6 nm ENT trapping layer, has a large 3.1 V 10-year extrapolated retention window at 125° C. and excellent 106 endurance at a fast 100 μs and ±16 V program/erase. This is achieved using As+-implanted higher κ trapping layer with deep 5.1... Agent:
20140349473 - Dummy gate electrode of semiconductor device: The disclosure relates to a dummy gate electrode of a semiconductor device. An embodiment comprises a substrate comprising a first surface; an insulation region covering a portion of the first surface, wherein the top of the insulation region defines a second surface; and a dummy gate electrode over the second... Agent:
20140349474 - Semiconductor device and method for manufacturing the same: A semiconductor device according to an embodiment of the present invention includes fuse patterns spaced apart from each other by a predetermined distance over a first interlayer insulation film; a second interlayer insulation film disposed between the fuse patterns over the first interlayer insulation film; and a capping film pattern... Agent:
20140349475 - Moisture barrier for a wire bond: An electronic device comprising a bond pad on a substrate and a wire bonded to the bond pad. The device further comprises an intermetallic compound interface located between the bond pad and the wire and a silicon nitride or silicon carbonyl layer covering the intermetallic compound interface... Agent: Lsi Corporation
20140349476 - Manufacturing method for forming a semiconductor structure: The present invention provides a manufacturing method of a semiconductor device, at least containing the following steps: first, a substrate is provided, wherein a first dielectric layer is formed on the substrate, at least one metal gate is formed in the first dielectric layer and at least one source drain... Agent:
20140349477 - Methods and apparatuses for void-free tungsten fill in three-dimensional semiconductor features: Disclosed herein are methods of filling a 3-D structure of a semiconductor substrate with a tungsten-containing material. The 3-D structure may include sidewalls, a plurality of openings in the sidewalls leading to a plurality of features having a plurality of interior regions. The methods may include depositing a first layer... Agent:
20140349479 - Method including a removal of a hardmask from a semiconductor structure and rinsing the semiconductor structure with an alkaline rinse solution: A method includes providing a semiconductor structure. The semiconductor structure includes an electrically conductive feature including a first metal, a dielectric material provided over the electrically conductive feature and a hardmask. The hardmask includes a hardmask material and is provided over the dielectric material. An opening is provided in the... Agent:
20140349478 - Method including an etching of a portion of an interlayer dielectric in a semiconductor structure, a degas process and a preclean process: A method includes providing a semiconductor structure. The semiconductor structure includes a substrate having a frontside and a backside, an electrically conductive feature including copper provided at the frontside of the substrate and a low-k interlayer dielectric provided over the electrically conductive feature. A portion of the interlayer dielectric is... Agent: Globalfoundries Inc.
20140349480 - Cobalt selectivity improvement in selective cobalt process sequence: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition... Agent:
20140349481 - Air-gap formation in interconnect structures: A structure includes a substrate, and a first metal line and a second metal line over the substrate, with a space therebetween. A first air gap is on a sidewall of the first metal line and in the space, wherein an edge of the first metal line is exposed to... Agent:
20140349482 - Method of forming fin-shaped structure: A method of forming fin-shaped structures includes the following steps. A plurality of spacers is formed on a substrate. The substrate is etched by using the spacers as hard masks to form a plurality of fin-shaped structures in the substrate. A cutting process is then performed to remove parts of... Agent:
20140349483 - Cmp compositions selective for oxide over polysilicon and nitride with high removal rate and low defectivity: wherein X1 and X2, Y1 and Y2, Z1 and Z2, R1, R2, R3, and R4, and m are as defined herein, and water, wherein the polishing composition has a pH of about 1 to about 4.5. The invention further provides a method of chemically-mechanically polishing a substrate with the inventive... Agent:
20140349484 - Polishing composition: A polishing composition of the present invention is to be used for polishing an object including a metal portion or an interlayer insulation film. The polishing composition contains silica on which an organic acid, such as a sulfonic acid and a carboxylic acid, is immobilized and an oxidizing agent.... Agent:
20140349485 - Method for manufacturing silicon substrate having textured structure: The present invention provides a method for manufacturing a silicon substrate having texture structure, by which, in comparison with conventional methods, it is possible to reduce manufacturing step and form easily regular texture structure on silicon substrate surface. The method of the present invention comprises the steps of: (A) forming... Agent: Tokuyama Corporation A Corporation
20140349486 - Methods of utilizing block copolymer to form patterns: Some embodiments include methods of forming patterns utilizing copolymer. A main body of copolymer may be formed across a substrate, and self-assembly of the copolymer may be induced to form a pattern of structures across the substrate. A uniform thickness throughout the main body of the copolymer may be maintained... Agent:
20140349487 - Methods of etching trenches into silicon of a semiconductor substrate, methods of forming trench isolation in silicon of a semiconductor substrate, and methods of forming a plurality of diodes: A method of etching trenches into silicon of a semiconductor substrate includes forming a mask over silicon of a semiconductor substrate, with the mask comprising trenches formed there-through. Plasma etching is conducted to form trenches into the silicon of the semiconductor substrate using the mask. In one embodiment, the plasma... Agent:
20140349488 - Etching gas: Disclosed is an etching gas provided containing CHF2COF. The etching gas may contain, as an additive, at least one kind of gas selected from O2, O3, CO, CO2, F2, NF3, Cl2, Br2, I2, XFn (In this formula, X represents Cl, I or Br. n represents an integer satisfying 1≦n≦7.), CH4,... Agent:
20140349489 - Method and apparatus for liquid treatment of wafer-shaped articles: An apparatus for treating a wafer-shaped article, comprises a spin chuck for holding a wafer-shaped article in a predetermined orientation, a liquid dispenser for dispensing a treatment liquid onto a downwardly facing surface of a wafer-shaped article when positioned on the spin chuck, and a gas dispenser for dispensing a... Agent: Lam Research Ag
20140349490 - Conformal amorphous carbon for spacer and spacer protection applications: A method of forming a nitrogen-doped amorphous carbon layer on a substrate in a processing chamber is provided. The method generally includes depositing a predetermined thickness of a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose... Agent: Applied Materials, Inc.
20140349491 - Methods and apparatus for selective oxidation of a substrate: Methods for improving selective oxidation of polysilicon against silicon nitride in a process chamber are provided herein. In some embodiments, a method of selectively oxidizing a substrate disposed within a process chamber includes exposing a substrate having an exposed polysilicon layer and an exposed silicon nitride layer to a hydrogen-containing... Agent: Applied Materials, Inc.
20140349492 - Semiconductor device manufacturing method, substrate processing apparatus and recording medium: A semiconductor device manufacturing method includes forming a thin film containing silicon, oxygen, carbon and a specified Group III or Group V element on a substrate by performing a cycle a predetermined number of times. The cycle includes: supplying a precursor gas containing silicon, carbon and a halogen element and... Agent: C/o Hitachi Kokusai Electric Inc.
20140349493 - Methods and apparatuses for energetic neutral flux generation for processing a substrate: Apparatuses and methods for processing substrates are disclosed. A processing apparatus includes a chamber for generating a plasma therein, an electrode associated with the chamber, and a signal generator coupled to the electrode. The signal generator applies a DC pulse to the electrode with sufficient amplitude and sufficient duty cycle... Agent:11/20/2014 > 106 patent applications in 76 patent subcategories.
20140342471 - Variable doping of solar cells: A system and method for determining the edge or region where a saw first enters a silicon brick, and using this information to process this region differently is disclosed. This region, referred to as the saw entry region, may be thinner, or have a rougher texture than the rest of... Agent: Varian Semiconductor Equipment Associates, Inc.
20140342472 - Substrate processing based on resistivity measurements: The resistivity of a silicon boule may vary along its length, thereby making a uniform ion implantation process sub-optimal. A system and method for measuring a resistivity of a substrate, and processing the substrate based on that measured resistivity is disclosed. The system includes a resistivity measurement system, a controller... Agent:
20140342473 - Semiconductor processing method: A method for detecting metal contamination from a film-forming process causing interface traps is described. The film-forming process is performed to form a dielectric film on a wafer. An annealing treatment is performed to reduce the interface traps between the wafer and the dielectric film. Thereafter, the bulk recombination lifetime... Agent: United Microelectronics Corp.
20140342474 - Temperature detecting apparatus, substrate processing apparatus and method of manufacturing semiconductor device: A temperature detecting apparatus is provided which is capable of suppressing disconnection of a thermocouple wire or positional deviation of a thermocouple junction portion caused by change over time. The temperature detecting apparatus includes: an insulation rod installed to extend in a vertical direction and including a through-hole in vertical... Agent: Hitachi Kokusai Electric Inc.
20140342476 - Land grid array semiconductor device packages: A semiconductor device package includes a land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interposer substrate as the at least one semiconductor die. Terminal pads of... Agent:
20140342475 - Semiconductor test method and semiconductor test apparatus: A semiconductor test method includes attaching a sheet to a wafer on which a plurality of chips are formed, the sheet having a plurality of holes, each of which corresponds to a position of one of the chips, dicing the wafer to separate the plurality of chips into individual chips... Agent: Kabushiki Kaisha Toshiba
20140342477 - Method of monitoring semiconductor fabrication process using xps: A method of monitoring a semiconductor fabrication process including forming a barrier pattern on a substrate, forming a sacrificial pattern on the barrier pattern, removing the sacrificial pattern to expose a surface of the barrier pattern, generating photoelectrons by irradiating X-rays to a surface of the substrate, and inferring at... Agent: Samsung Electronics Co., Ltd.
20140342478 - Display apparatus and method of manufacturing the same: A display apparatus includes a base substrate, a data line, and a pixel. The data line is disposed on the base substrate to transmit a data signal and has a multi-layer structure including at least three conductive layers stacked one on another. The data line includes a lower conductive layer,... Agent: Samsung Display Co., Ltd.
20140342479 - Method and system for template assisted wafer bonding using pedestals: A method of fabricating a composite semiconductor structure includes providing a first substrate comprising a first material and having a first surface and forming a plurality of pedestals extending to a predetermined height in a direction normal to the first surface. The method also includes attaching a plurality of elements... Agent: Skorpios Technologies, Inc.
20140342480 - Method for manufacturing led, apparatus for manufacturing led, and led: Provided are a high-quality LED and LED member, and a method and a device with which it is possible to manufacture the same in large quantities and at minimal manufacturing cost. The present invention comprises a detachment/attachment unit for the LED or the LED member, a coating unit for performing... Agent: Mtek-smart Corporation
20140342483 - Fabrication method of a pixel structure of an electroluminescent display panel: A fabrication method of a pixel structure of an electroluminescent display panel includes the following steps. A substrate is provided. A first anode, a second anode and a third anode are formed in a first sub-pixel region, a second sub-pixel region and a third sub-pixel region respectively. A first organic... Agent:
20140342482 - Method of and apparatus for fabricating organic electroluminescence display device: A method of fabricating an organic electroluminescence display device includes providing a substrate including a plurality of pixel regions, first electrodes, and a partition wall, the pixel regions including two pixel columns, providing a mask including openings and first inclined surfaces, the openings being at positions corresponding to the two... Agent: Samsung Display Co., Ltd.
20140342481 - Organic layer deposition apparatus and method of manufacturing organic light-emitting display apparatus using the same: An organic layer deposition apparatus and a method of manufacturing an organic light-emitting display device by using the apparatus. In particular, an organic layer deposition apparatus that is more easily manufactured and is suitable for use in mass production of large substrates while performing high-definition patterning thereon, as well as... Agent: Samsung Display Co., Ltd.
20140342484 - Method for producing an optoelectronic semiconductor chip and corresponding optoelectronic semiconductor chip: A method of producing a semiconductor chip includes providing a silicon growth substrate, producing a III nitride buffer layer on the growth substrate by sputtering, and growing a III nitride semiconductor layer sequence having an active layer above the buffer layer.... Agent: Osram Opto Semiconductors Gmbh
20140342486 - Elemental semiconductor material contact for gan-based light emitting diodes: A vertical stack including a p-doped GaN portion, a multi-quantum-well, and an n-doped GaN portion is formed on an insulator substrate. The p-doped GaN portion may be formed above, or below, the multi-quantum-well. A dielectric material liner is formed around the vertical stack, and is patterned to physically expose a... Agent: International Business Machines Corporation
20140342485 - Elemental semiconductor material contact for high indium content ingan light emitting diodes: A vertical stack including a p-doped GaN portion, a multi-quantum-well including indium gallium nitride layers, and an n-doped transparent conductive material portion is formed on an insulator substrate. A dielectric material liner is formed around the vertical stack, and is patterned to physically expose a surface of the p-doped GaN... Agent: International Business Machines Corporation
20140342488 - Preparation method of manufacturing thermoelectric nanowires having core/shell structure: Disclosed is a preparation method of manufacturing a thermoelectric nanowire having a core/shell structure. The preparation method of thermoelectric nanowire includes preparing a substrate provided with an oxide layer formed thereon, and forming a Bi thin film on the oxide layer, heat treating a structure produced during forming the Bi... Agent: Industry-academic Cooperation Foundation, Younsei University
20140342489 - Method of manufacturing silicon-containing film and method of manufacturing photovoltaic device: A method of manufacturing a silicon-containing film includes a first step of drying cleaning a chamber with a fluorine-containing gas, a second step of loading a substrate into the chamber, a third step of purging the chamber with a silane-based gas, with the substrate being provided in the chamber, and... Agent:
20140342490 - Method for fabricating sensor: A method for fabricating a sensor, comprises: forming, on a base substrate, a pattern of a data line (31), a pattern of a drain electrode (34), a pattern of a source electrode (33), a pattern of a receive electrode (39), a pattern of a photodiode (40) and a pattern of... Agent:
20140342491 - Method for manufacturing waveguide-type semiconductor device: A method for manufacturing a waveguide-type semiconductor device includes the steps of forming an epitaxial structure including a waveguide mesa and a device mesa; forming a mask for selective growth on the epitaxial structure; growing a semiconductor region on an end surface of the device mesa by using the mask... Agent: Sumitomo Electric Industries, Ltd.
20140342492 - Methods for dual-scale surface texturing: Methods for preparing a substrate surface are provided, for purposes including manufacturing a low reflectivity surface. In some aspects, the methods include providing a material comprising an etching mask on a substrate, subjecting the material to a first isotropic etching phase, and subjecting the material to a first anisotropic etching... Agent:
20140342493 - Radiation detector having a bandgap engineered absorber: A radiation detector is provided that includes a photodiode having a radiation absorber with a graded multilayer structure. Each layer of the absorber is formed from a semiconductor material, such as HgCdTe. A first of the layers is formed to have a first predetermined wavelength cutoff. A second of the... Agent: Drs Rsta, Inc.
20140342494 - Ohmic n-contact formed at low temperature in inverted metamorphic multijunction solar cells: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the... Agent: Emcore Solar Power, Inc.
20140342495 - Preparation of cigs absorber layers using coated semiconductor nanoparticle and nanowire networks: We disclose a method of preparing CIGS absorber layers using coated semiconductor nanoparticle and nanowire networks. The nanoparticles and nanowires containing one or more elements from group IB and/or IIIA and/or VIA are prepared from metal salts such as metal chloride and acetate at room temperature without inert gas protection.... Agent: Sun Harmonics Ltd.
20140342496 - Preparation of cigs absorber layers using coated semiconductor nanoparticle and nanowire networks: We disclose a method of preparing CIGS absorber layers using coated semiconductor nanoparticle and nanowire networks. The nanoparticles and nanowires containing one or more elements from group IB and/or IIIA and/or VIA are prepared from metal salts such as metal chloride and acetate at room temperature without inert gas protection.... Agent: Sun Harmonics Ltd
20140342497 - Sodium/molybdenum composite metal powders, products thereof, and methods for producing photovoltaic cells: A method for producing a metal article may include: Producing a supply of a composite metal powder by: providing a supply of molybdenum metal powder; providing a supply of a sodium compound; combining the molybdenum metal powder and the sodium compound with a liquid to form a slurry; feeding the... Agent:
20140342499 - Semiconductor device and manufacturing method thereof: The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor... Agent:
20140342498 - Semiconductor device and method for manufacturing the same: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions... Agent:
20140342503 - Compliant interconnects in wafers: A microelectronic assembly includes a substrate and an electrically conductive element. The substrate can have a CTE less than 10 ppm/° C., a major surface having a recess not extending through the substrate, and a material having a modulus of elasticity less than 10 GPa disposed within the recess. The... Agent: Tessera, Inc.
20140342500 - Method and system for template assisted wafer bonding: A method of fabricating a composite semiconductor structure includes providing a substrate including a plurality of devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or... Agent: Skorpios Technologies, Inc.
20140342501 - Package stacks and methods of manufacturing the same: A package stack includes a first package, a second package, first solder balls and a molding member. The first package includes a first package substrate, a first semiconductor chip on the first package substrate and connecting pads. The second package includes a second package substrate and a second semiconductor chip... Agent:
20140342502 - Three-dimensional vertically interconnected structure and fabricating method thereof: The present invention discloses a three-dimensional vertically interconnected structure and a fabricating method for the same. The structure comprises at least two layers of chips which are stacked in sequence or stacked together face to face, and an adhesive material is used for adhesion between adjacent layers of said chips,... Agent: Peking University
20140342504 - Electronic device, method of manufacturing, and electronic device manufacturing apparatus: According to this disclosure, a method of manufacturing an electronic device is provided, which includes exposing a top surface of a first electrode of a first electronic component to organic acid, irradiating the top surface of the first electrode exposed to the organic acid with ultraviolet light, and bonding the... Agent: Fujitsu Limited
20140342505 - Fabrication method of semiconductor package: A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a carrier; disposing at least a semiconductor element on the carrier; forming an encapsulant on the carrier and the semiconductor element for encapsulating the semiconductor element; removing the carrier; disposing a pressure member on the... Agent: Siliconware Precision Industries Co., Ltd
20140342506 - Method for fabricating semiconductor package: Disclosed is a method for fabricating a semiconductor package, including providing a package unit having an insulating layer and at least a semiconductor element embedded into the insulating layer, wherein the semiconductor element is exposed from the insulting layer and a plurality of recessed portions formed in the insulating layer;... Agent: Siliconware Precision Industries Co., Ltd
20140342507 - Fabrication method of semiconductor package: A semiconductor package includes: a dielectric layer having opposite first and second surfaces; a semiconductor chip embedded in the dielectric layer and having a plurality of electrode pads; a plurality of first metal posts disposed on the electrode pads of the semiconductor chip, respectively, such that top ends of the... Agent:
20140342508 - Hybrid substrates, semiconductor packages including the same and methods for fabricating semiconductor packages: Provided are a hybrid substrate, a semiconductor package including the same, and a method for fabricating the semiconductor package. The hybrid substrate may include an insulation layer, and an organic layer. The insulation layer may include a top, a bottom opposite to the top, and a conductive pattern having different... Agent:
20140342509 - Module and assembly with dual dc-links for three-level npc applications: A power semiconductor module has four power terminals. An IGBT has a collector connected to the first power terminal and an emitter coupled to the third power terminal. An anti-parallel diode is coupled in parallel with the IGBT. A DC-link is connected between the second and fourth power terminals. The... Agent:
20140342510 - Bulk finfet esd devices: Aspects of the disclosure provide a dual electrostatic discharge (ESD) protection device in fin field effect transistor (FinFET) process technology and methods of forming the same. In one embodiment, the dual ESD protection device includes: a bulk silicon substrate; a shallow trench isolation (STI) region formed over the bulk silicon... Agent:
20140342511 - Semiconductor structure and method for forming the same: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a first doped region, a second doped region, a doped strip and a top doped region. The first doped region has a first type conductivity. The second doped region is formed in the first... Agent:
20140342512 - High voltage iii-nitride semiconductor devices: A III-N device is described has a buffer layer, a first III-N material layer on the buffer layer, a second III-N material layer on the first III-N material layer on an opposite side from the buffer layer and a dispersion blocking layer between the buffer layer and the channel layer.... Agent: Transphorm Inc.
20140342513 - Semiconductor apparatus and method for manufacturing the semiconductor apparatus: A semiconductor apparatus includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a gate recess formed by removing at least a portion of the second semiconductor layer, an insulation film formed on the gate recess and the second semiconductor layer,... Agent: Fujitsu Limited
20140342514 - Methods for fabricating integrated circuits with the implantation of nitrogen: A method for fabricating an integrated circuit includes forming a first gate electrode structure above a first active region and a second gate electrode structure above a second active region, forming a sacrificial spacer on sidewalls of the first and second gate electrode structures, and forming deep drain and source... Agent:
20140342515 - Esd protection using diode-isolated gate-grounded nmos with diode string: An ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device. A method of forming an ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device.... Agent:
20140342516 - Method of making a dynamic random access memory array: The present invention is related to microelectronic technologies, and discloses specifically a method of making a dynamic random access memory (DRAM) array. The DRAM array uses vertical MOS field effect transistors as array devices for the DRAM, and a buried metal silicide layer as buried bit lines for connecting multiple... Agent:
20140342517 - Method for fabricating trench type power semiconductor device: A method of forming a trench type semiconductor power device is disclosed. An epitaxial layer is formed on a substrate. A gate trench is formed in the epitaxial layer. A gate oxide layer and a trench gate are formed in the gate trench. A source region is then formed in... Agent:
20140342518 - Power mosfet structure and method: A power MOSFET includes a semiconductor substrate with an upper surface, a cavity of a first depth in the substrate whose sidewall extends to the upper surface, a dielectric liner in the cavity, a gate conductor within the dielectric liner extending to or above the upper surface, body region(s) within... Agent: Freescale Semiconductor, Inc.
20140342519 - Three-dimensional non-volatile memory device, memory system and method of manufacturing the same: A three-dimensional (3-D) non-volatile memory device includes channel structures each including channel layers stacked over a substrate and extending in a first direction, wherein the channel layers include well regions, respectively, vertical gates located and spaced from each other between the channel structures, and a well pick-up line contacting on... Agent: Sk Hynix Inc.
20140342520 - Vertical power mosfet and methods for forming the same: A device includes a semiconductor region in a semiconductor chip, a gate dielectric layer over the semiconductor region, and a gate electrode over the gate dielectric. A drain region is disposed at a top surface of the semiconductor region and adjacent to the gate electrode. A gate spacer is on... Agent:
20140342521 - Transistor performance using a two-step damage anneal: A two-step thermal treatment method consists of performing ion implantation in a silicon substrate of the semiconductor device. A first thermal treatment procedure is performed on the semiconductor device. A second thermal treatment procedure is consecutively performed on the semiconductor device to reduce damage produced by the ion implantation.... Agent:
20140342522 - Reducing variation by using combination epitaxy growth: A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region.... Agent:
20140342523 - Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits: Structures and methods for fabricating high speed digital, analog, and combined digital/analog systems using planarized relaxed SiGe as the materials platform. The relaxed SiGe allows for a plethora of strained Si layers that possess enhanced electronic properties. By allowing the MOSFET channel to be either at the surface or buried,... Agent:
20140342524 - Integrated circuit comprising an isolating trench and corresponding method: An integrated circuit including at least one isolating trench that delimits an active area made of a monocrystalline semiconductor material, the or each trench comprising an upper portion including an insulating layer that encapsulates a lower portion of the trench, the lower portion being at least partly buried in the... Agent: Stmicroelectronics (crolles 2) Sas
20140342525 - Method for manufacturing semiconductor substrate: A semiconductor substrate is provided in which an alignment mark is formed that can be used for an alignment even after the formation of an impurity diffused layer by the planarization of an epitaxial film. A trench is formed in an alignment region of an N−-type layer formed on an... Agent:
20140342526 - Method for manufacturing semiconductor substrate: A semiconductor substrate is provided in which an alignment mark is formed that can be used for an alignment even after the formation of an impurity diffused layer by the planarization of an epitaxial film. A trench is formed in an alignment region of an N−-type layer formed on an... Agent:
20140342527 - Integrated circuits separated by through-wafer trench isolation: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of... Agent:
20140342528 - Method for the direct bonding of a silicon oxide layer:
20140342529 - Semiconductor-on-insulator integrated circuit with back side gate: Methods for manufacturing semiconductor-on-insulator (SOI) integrated circuits are disclosed. An SOI wafer is provided having a first surface and a second surface. The substrate of the SOI wafer forms the second surface. A transistor is formed in the semiconductor layer of the SOI wafer. A handle wafer is bonded to... Agent:
20140342530 - Temporary adhesive material for wafer, film for temporary adhesion using same, wafer processing laminate, and method for producing thin wafer using same: A temporary adhesive material for a wafer includes a first temporary adhesive layer of a silicone-containing polymer layer containing a photo base generator and a second temporary adhesive layer of a silicone-containing polymer layer which is laminated on the first temporary adhesive layer, does not contain the photo base generator,... Agent: Shin-etsu Chemical Co., Ltd.
20140342531 - Adhesive sheet for semiconductor wafer processing, method for processing of semiconductor wafer using sheet: To provide an adhesive sheet for wafer processing that satisfies characteristics such as: (1) protecting an uneven circuit surface during grinding with an adhesive force that is not excessively weak; (2) being easy to remove after processing; and (3) leaving very little adhesive residue on the wafer, and that can... Agent:
20140342532 - Delicate dry clean: A method of selectively removing fluorocarbon layers from overlying low-k dielectric material is described. These protective plasma treatments (PPT) are delicate alternatives to traditional post-etch treatments (PET). The method includes sequential exposure to (1) a local plasma formed from a silicon-fluorine precursor followed by (2) an exposure to plasma effluents... Agent: Applied Materials, Inc.
20140342533 - Method of strain and defect control in thin semiconductor films: A method of managing strain and preventing defect formation in semiconductor materials is described. In structures featuring two or more semiconductor materials with different lattice constants, buffer layers may be used to form deposition surfaces that result in defect-free semiconductor devices. The buffer layers typically have compositions, and lattice constants,... Agent:
20140342534 - Method and apparatus for forming amorphous silicon film: A method of forming an amorphous silicon film includes: forming a seed layer on a surface of a base by heating the base and supplying an amino silane-based gas to the heated base, forming the amorphous silicon film with thickness for layer growth on the seed layer by heating the... Agent:
20140342535 - Method for manufacturing semiconductor substrate: A semiconductor substrate preventing a void from being generated in an epitaxial film buried in a trench. An N-type first epitaxial film and first trenches are formed on an N+-type substrate body. A P-type second epitaxial film is buried in the first trenches. An N+-type third epitaxial film having the... Agent:
20140342536 - Defect reduction using aspect ratio trapping: Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls.... Agent:
20140342537 - Mechanisms for forming ultra shallow junction: A method of making a semiconductor device includes forming a fin structure over a substrate. The method further includes performing a plasma doping process on the fin structure. Performing the plasma doping process includes implanting plasma ions into the fin structures at a plurality of implant angles, and the plurality... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140342538 - Ion implantation system and method: An ion implantation system and method, providing cooling of dopant gas in the dopant gas feed line, to combat heating and decomposition of the dopant gas by arc chamber heat generation, e.g., using boron source materials such as B2F4 or other alternatives to BF3. Various arc chamber thermal management arrangements... Agent: Advanced Technology Materials, Inc.
20140342539 - Semiconductor device having mixedly mounted components with common film layers and method of manufacturing the same: A metal gate electrode and a poly-silicon resistance element are mixedly mounted in the same semiconductor substrate. The metal gate electrode is formed on a first gate insulating film and includes a first gate metal film and a first gate silicon film. The poly-silicon resistance element includes a silicon film... Agent: Renesas Electronics Corporation
20140342540 - Semiconductor device and method of manufacturing the same: A semiconductor device having a buried gate is provided. The semiconductor device is formed in a structure in which a plurality of contacts having small step differences are stacked without forming a metal contact applying an operation voltage to the buried gate in a single contact and a contact pad... Agent:
20140342541 - Dummy structure for multiple gate dielectric interface and methods: Dummy structures between a high voltage (HV) region and a low voltage (LV) region of a substrate are disclosed, along with methods of forming the dummy structures. An embodiment is a structure comprising a HV gate dielectric over a HV region of a substrate, a LV gate dielectric over a... Agent:
20140342542 - Structure and metohds of improving reliability of non-volatile memory devices: A method includes forming a patterned gate stack for a memory device, the patterned gate stack including a gate insulation layer, a charge storage layer, a blocking insulation layer and a gate electrode, the gate insulation layer and the blocking insulation layer having an initial width. An etching process is... Agent:
20140342543 - Method and apparatus for single step selective nitridation: Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen... Agent:
20140342544 - Method for manufacturing semiconductor device: A semiconductor wafer is subjected to a protection film formation step process as a process before evaluation of electrical characteristics. In this process, after an insulating film serving as a protection film is formed, a photolithography process and an etching process are performed so as to form a protection film... Agent: Mitsubishi Electric Corporation
20140342545 - Techniques for fabricating fine-pitch micro-bumps: Techniques for fabricating fine-pitch micro-bumps are disclosed. According to one embodiment, a fabrication process may comprise the following steps: depositing a dielectric layer on a wafer; forming a pattern of through holes in the dielectric layer; depositing a seed metal layer on top of the dielectric layer and inside the... Agent: National Center For Advanced Packaging Co., Ltd.
20140342546 - Copper pillar bump with cobalt-containing sidewall protection layer: A method of forming an integrated circuit device comprises forming a metal pillar over a semiconductor substrate. The method also comprises forming a solder layer over the metal pillar. The method further comprises forming a metallization layer comprising a cobalt (Co) element, the metallization layer covering the metal pillar and... Agent:
20140342547 - Tsv structures and methods for forming the same: A device includes a substrate having a front side and a backside, a through-via extending from the backside to the front side of the substrate, and a conductive pad on the backside of the substrate and over the through-via. The conductive pad has a substantially planar top surface. A conductive... Agent:
20140342548 - Integrated circuit devices including interconnections insulated by air gaps and methods of fabricating the same: Semiconductor devices and methods of fabricating the same are provided. The semiconductor device may include interconnections extending in a first direction on a substrate and spaced apart from each other in a second direction perpendicular to the first direction, barrier dielectric patterns disposed on top surfaces of the interconnections, respectively,... Agent:
20140342549 - Dual damascene dual alignment interconnect scheme: A stack of a first metal line and a first dielectric cap material portion is formed within a line trench of first dielectric material layer. A second dielectric material layer is formed thereafter. A line trench extending between the top surface and the bottom surface of the second dielectric material... Agent:
20140342550 - Method for fabricating semiconductor device by damascene process: A method for fabricating a semiconductor device includes forming a plurality of isolation patterns, isolated from each other by a plurality of trenches, over an underlying structure; forming a plurality of conductive lines filled in the trenches, forming contact holes by removing first portions of the isolation patterns, wherein the... Agent: Sk Hynix Inc.
20140342552 - Method of forming a through-silicon via utilizing a metal contact pad in a back-end-of-line wiring level to fill the through-silicon via: A method for fabricating through-silicon vias (TSVs) for semiconductor devices is provided. Specifically, the method involves utilizing copper contact pads in a back-end-of-line wiring level, wherein the copper contact pads act as cathodes for performing an electroplating technique to fill TSVs with plated-conductive material (e.g., copper) from an electroplating solution.... Agent:
20140342551 - Semiconductor devices and method of fabricating the same: In a method of fabricating a semiconductor device, a first sacrificial layer, a first insulating layer, and a second sacrificial layer are successively provided on a substrate. The second sacrificial layer, the first insulating layer, and the first sacrificial layer are patterened to define an opening exposing a portion of... Agent: Samsung Electronics Co., Ltd.
20140342553 - Method for forming semiconductor structure having opening: According to one embodiment of the present invention, a method for forming a semiconductor structure having an opening is provided. First, a substrate is provided, wherein a first region and a second region are defined on the substrate and an overlapping area of the first region and the second region... Agent: United Microelectronics Corp.
20140342554 - Method for manufacturing thin film transistor array: A thin film transistor (TFT) array includes a substrate, a thin film transistor, a first wall, a transparent electrode and a color resist. The thin film transistor is disposed on the substrate. The first wall is disposed on the substrate and separates a first contact hole from a pixel region... Agent:
20140342555 - Deposition chambers with uv treatment and methods of use: Described are apparatus and methods for processing semiconductor wafers so that a film can be deposited on the wafer and the film can be UV treated without the need to move the wafer to a separate location for treatment. The apparatus and methods include a window which is isolated from... Agent:
20140342556 - Reusing active area mask for trench transfer exposure: A method of silicide formation in a semiconductor fabrication process is disclosed. An active area (RX) mask is used to form an active silicon area, and is then reused to form a trench transfer (TT) area. A trench block (TB) mask is logically ANDed with the active area (RX) mask... Agent: Globalfoundries Inc.
20140342557 - Method for etching a complex pattern: A method for etching a desired complex pattern in a first face of a substrate, including: simultaneous etching of at least a first and a second sub-pattern through the first face of the substrate, the etched sub-patterns being separated by at least one separating wall, a width of the first... Agent: Commissariat A L'energie Atomique Et Aux Ene Alt
20140342558 - Substrate treating apparatus with substrate reordering: A treating section has substrate treatment lines arranged one over the other for treating substrates while transporting the substrates substantially horizontally. An IF section transports the substrates fed from each substrate treatment line to an exposing machine provided separately from this apparatus. The substrates are transported to the exposing machine... Agent:
20140342559 - Method of forming a spacer patterning mask: The present disclosure pertains to a method of forming a spacer patterning mask. The method entails: providing a substrate; depositing, on the substrate, an interface layer, a core film and a first hard mask; patterning the core film and the first hard mask to form strips; depositing a spacer patterning... Agent: Semiconductor Manufacturing International (shanghai) Corporation
20140342560 - Polishing composition: A polishing composition of the present invention is to be used for polishing an object including a portion containing a group III-V compound material. The polishing composition contains an oxidizing agent and an anticorrosive agent. The anticorrosive agent is preferably a nitrogen-containing organic compound, such as 1H-1,2,4-triazole and benzotriazole, or... Agent:
20140342561 - Polishing composition: A polishing composition of the present invention is to be used for polishing an object including a portion containing a group III-V compound material. The polishing composition contains abrasive grains, an oxidizing agent, and a water-soluble polymer. When the polishing composition is left to stand for one day in an... Agent:
20140342562 - Polishing composition: A polishing composition of the present invention is to be used for polishing an object including a portion containing a high-mobility material and a portion containing a silicon material. The polishing composition comprises odd-shaped abrasive grains and an oxidizing agent having a standard electrode of 0.3 V or more, and... Agent:
20140342563 - Methods of forming a pattern on a substrate: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At... Agent: Micron Technology, Inc.
20140342566 - Manufacturing method of semiconductor device: To improve the manufacturing yield of semiconductor devices. Over a semiconductor wafer, a film to be processed is formed; over that film, an antireflection film is formed; and, over the antireflection film, a resist layer is formed. Then, the resist layer is subjected to liquid immersion exposure, and a development... Agent:
20140342565 - Method of manufacturing dual gate oxide devices: The present invention provides method of manufacturing dual gate oxide devices. The method comprises coating photoresist on the substrate which is deposited by an oxide thin film; removing some of the photoresist by exposure and development to divide the oxide thin film into a first area to be etched and... Agent: Shanghai Huali Microelectronics Corporation
20140342567 - Method of manufacturing semiconductor structure: A method of manufacturing a semiconductor structure. A patterned first hard mask is formed on a substrate. The patterned first hard mask includes first trench patterns extending along a first direction. A second hard mask is then formed on the patterned first hard mask. A patterned photoresist layer is formed... Agent:
20140342564 - Photomask with three states for forming multiple layer patterns with a single exposure: The present disclosure provides one embodiment of a mask for a lithography exposure process. The mask includes a mask substrate; a first mask material layer patterned to have a first plurality of openings that define a first layer pattern; and a second mask material layer patterned to have a second... Agent:
20140342568 - Controlling temperature of a faraday shield: A method for controlling thermal cycling of a faraday shield in a plasma process chamber is provided. The method includes: performing a first plasma processing operation on a first wafer in the plasma process chamber; terminating the first plasma processing operation; performing a first wafer transfer operation to transfer the... Agent: Lam Research Corporation
20140342569 - Near surface etch selectivity enhancement: A method of selectively dry etching exposed substrate material on patterned heterogeneous structures is described. The method includes a plasma process prior to a remote plasma etch. The plasma process may use a biased plasma to treat an untreated substrate portion in a preferred direction to form a treated substrate... Agent: Applied Materials, Inc.
20140342570 - Etch process having adaptive control with etch depth of pressure and power: The disclosure concerns a plasma-enhanced etch process in which chamber pressure and/or RF power level is ramped throughout the etch process.... Agent: Applied Materials, Inc.
20140342571 - Wafer etching apparatus and wafer etching method using the same: A wafer etching apparatus and a wafer etching method using the wafer etching apparatus, which are capable of etching Si wafer in a dry etching method, are disclosed. According to the wafer etching apparatus and the wafer etching method, the capacitively coupled plasma unit or the inductively coupled plasma unit... Agent: Rorze Systems Corporation
20140342572 - Decapsulator with applied voltage and etchant cooling system for etching plastic-encapsulated devices: An apparatus and a method for selectively etching an encapsulant forming a package of resinous material around an electronic device includes an electronic device package mountable on the etch head; a conductive electrode in electrical contact with package leads of the electronic device package to apply a first voltage to... Agent:
20140342573 - Method for manufacturing semiconductor device, method for processing substrate, substrate processing apparatus and recording medium: There is provided a method for manufacturing a semiconductor device, including forming a thin film containing a specific element and having a prescribed composition on a substrate by alternately performing the following steps prescribed number of times: forming a first layer containing the specific element, nitrogen, and carbon on the... Agent: Hitachi Kokusai Electric Inc.
20140342574 - Pattern formation method: A pattern formation method for forming a micropattern includes a first step of causing a first pattern-formable area at which a first pattern is to be formed on a liquid-repellent, first film that is formed on a substrate and that has a lyophilic/lyophobic variable function to be lyophilic and to... Agent: Fujifilm Corporation
20140342575 - Method for forming an interfacial layer on a semiconductor using hydrogen plasma: Techniques include a method of forming an interfacial passivation layer between a first semiconductor material (such as germanium) and a high-k gate dielectric. Such techniques include using a hydrogen-based plasma formed using a slotted-plane antenna plasma processing system. Such a plasma treatment can be executed with substrate temperatures less than... Agent: Tokyo Electron Limited
20140342576 - Ultraviolet-curable resin material for pattern transfer and magnetic recording medium manufacturing method using the same: According to one embodiment, an ultraviolet curing curable resin material for pattern transfer is provided. The resin contains isobornyl acrylate, an acrylate having a fluorene skeleton, a polyfunctional acrylate, and a polymerization initiator.... Agent:11/13/2014 > 72 patent applications in 55 patent subcategories.
20140335631 - Semiconductor defect characterization: The defect-containing die identified from an inspection layer analysis subsequent to a manufacturing step for a wafer including a plurality of die and as well as the faulty die identified from a fault testing of the wafer are processed to identify a subset of the die that both contain a... Agent: Lattice Semiconductor Corporation
20140335632 - Manufacturing method of semiconductor device, and semiconductor device: Provided is a semiconductor device that suppresses the occurrence of defects due to photocorrosion. A method for manufacturing the semiconductor device includes the steps of: forming an insulating layer with a concave portion over a substrate; forming a conductive film over the insulating film and the inside of the concave... Agent: Renesas Electronics Corporation
20140335633 - Separation method, computer storage medium, and separation system: A superposed wafer is separated to a processing target wafer and a supporting wafer while being heated. Then, an adhesive on a joint surface of the processing target wafer is removed by supplying an organic solvent onto the joint surface of the processing target wafer. Then, an oxide film formed... Agent: Tokyo Electron Limited
20140335634 - Mold release film and method of process for producing a semiconductor device using the same: A mold release film, which is adapted to be disposed on the cavity surface of a mold to form a resin-encapsulated portion by encapsulating a semiconductor element of a semiconductor device with a curable encapsulation resin, has a tensile modulus of elasticity of from 10 to 24 MPa at 132°... Agent: Asahi Glass Company, Limited
20140335635 - Electronic assemblies including a subassembly film and methods of producing the same: Described herein are electronic assemblies including a subassembly film and methods for making the same. In some embodiments, a first subassembly is formed by placing an electronic die at a die placement location on a subassembly film. A second subassembly may be formed by placing the first subassembly at a... Agent: Osram Sylvania Inc.
20140335636 - Method of manufacturing ceramic led packages: Methods of fabricating a light-emitting device are provided. A light-emitting device can be formed from bonding a lens including a plug and a cap to an LED package including a socket configured to receive the plug. The lens can be fabricated using an injection mold formed from a well secured... Agent:
20140335637 - Method of fabricating light extraction substrate for oled: An organic light-emitting device (OLED) which can improve the light extraction efficiency of the OLED, a method of fabricating the same and an OLED including the same. The light extraction substrate is disposed on one surface of an OLED through which light generated from the OLED is emitted outward, and... Agent: Samsung Corning Precision Materials Co., Ltd.
20140335638 - Compounds for use in opto-electrical devices: A composition for use in fabricating opto-electrical devices comprising a solution processable triazine host material and a phosphorescent moiety.... Agent: Sumitomo Chemical Co. Limited
20140335639 - Method for producing organic el display panel: A manufacturing method of an organic EL display panel includes: preparing G, R, and B inks that each include a solvent and respectively include G, R, and B organic light-emitting materials differing from each other in terms of light-emitting wavelength; applying the G ink to G subpixel regions on a... Agent:
20140335640 - Biomems and planar light circuit with integrated package: A BioMEMS microelectromechanical apparatus and for fabricating the same is disclosed. A substrate is provided with at least one signal conduit formed on the substrate. A sacrificial layer of sacrificial material may be deposited on the signal conduit and optionally patterned to remove sacrificial material from outside the packaging covered... Agent:
20140335641 - Method for fabricating sensor: A method for fabricating a sensor includes: forming, on a base substrate, a pattern of a source electrode and a drain electrode, a pattern of a data line, a pattern of a receiving electrode, a pattern of a photodiode, and a pattern of a transparent electrode disposed by using a... Agent:
20140335642 - Method for manufacturing organic solar cell: A method of manufacturing an organic solar cell is provided. According to the exemplary embodiments of the present invention, a laminate section can be easily removed from a substrate by causing a cleaning unit to move up and down above the substrate or to move forward and backward in a... Agent: Kolon Industries, Inc.
20140335643 - Method for producing a photovoltaic module: A photovoltaic module having at least one photovoltaic cell may be produced. At least one photovoltaic cell may be arranged on a substrate, covering the substrate and the cell with at least one rear wall. The rear wall may be made from at least one back sheet material, connecting the... Agent: Fraunhofer-gesellschaft Zur Fö Rderung Der Angewandten Forschung E.v.
20140335644 - Method for producing spot size converter: A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the... Agent: Sumitomo Electric Industries, Ltd.
20140335645 - Photoelectric conversion device and method for producing photoelectric conversion device: A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film overlying the photoreceiving portion, a large refractive index region which is provided so as to correspond to the photoreceiving portion and has a higher refractive index than the... Agent:
20140335646 - Method for forming metal silicide layers: The present invention is related to a method for forming a metal silicide layer on a textured silicon substrate surface. The method includes providing a metal layer on a textured silicon substrate and performing a pulsed laser annealing step providing at least one UV laser pulse with a laser fluence... Agent:
20140335647 - Paste and manufacturing method of solar cell using the same: Disclosed are a paste and a method for manufacturing a solar cell through screen printing said paste. The paste contains inorganic powder; an organic solvent; and a binder, and the inorganic powder has a tap density of 0.01 to 20 g/cm3. An etching mask pattern formed using said paste has... Agent:
20140335648 - Manufacturing method of solid-state dye-sensitized solar cells and electrolyte filling device used therefor: The present description is directed to a manufacturing method of solid-state dye-sensitized solar cells and a solid-state electrolyte filling device used in the manufacturing method. The present invention provides a manufacturing method of dye-sensitized solar cells that fills the solid-state electrolyte more uniformly with enhanced efficiency to secure higher light-to-energy... Agent: Korea Institute Of Science And Technology
20140335649 - Compound semiconductor precursor ink composition, method for forming a chalcogenide semiconductor film, and method for forming a photovoltaic device: A compound semiconductor precursor ink composition includes an ink composition for forming a chalcogenide semiconductor film and a peroxide compound mixed with the ink composition. A method for forming a chalcogenide semiconductor film and a method for forming a photovoltaic device each include using the compound semiconductor precursor ink composition... Agent:
20140335650 - Graphene photodetector: A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do... Agent: International Business Machines Corporation
20140335651 - Inks and pastes for solar cell fabrication: A silicon solar cell is formed with an N-type silicon layer on a P-type silicon semiconductor substrate. An aluminum ink composition is printed on the back of the silicon wafer to form back contact electrodes. The back contact electrodes are sintered to produce an ohmic contact between the electrodes and... Agent:
20140335652 - Semiconductor device and method for manufacturing the same: A miniaturized semiconductor device including a transistor in which a channel formation region is formed using an oxide semiconductor film and variation in electric characteristics due to a short-channel effect is suppressed is provided. In addition, a semiconductor device whose on-state current is improved is provided. A semiconductor device is... Agent:
20140335653 - Transistor, liquid crystal display device, and manufacturing method thereof: Photolithography and etching steps for forming an island-shaped semiconductor layer are omitted, and a liquid crystal display device is manufactured with four photolithography steps: a step of forming a gate electrode (including a wiring formed using the same layer as the gate electrode), a step of forming source and drain... Agent:
20140335655 - Integrated circuit package system with mounting structure: An integrated circuit package system includes: providing a mountable structure having a contact pad and an inner pad; mounting an integrated circuit device having a linear through channel over the mountable structure with the linear through channel traversing between an integrated circuit device first side and an integrated circuit device... Agent:
20140335654 - Method and apparatus for semiconductor device fabrication using a reconstituted wafer: Method and apparatus for semiconductor device fabrication using a reconstituted wafer is described. In one embodiment, diced semiconductor chips are placed within openings on a frame. A reconstituted wafer is formed by filling a mold compound into the openings. The mold compound is formed around the chips. Finished dies are... Agent: Infineon Technologies Ag
20140335656 - Semiconductor stack packages and methods of fabricating the same: Semiconductor chip stacks are provided. The semiconductor chip stack includes a semiconductor chip stack including a plurality of first semiconductor chips vertically stacked on a top surface of the interposer, a second semiconductor chip stacked on a bottom surface of the interposer opposite to the semiconductor chip stack, and an... Agent:
20140335657 - Stack packages having fastening element and halogen-free inter-package connector: A stack package includes a lower package including a lower package substrate and a lower semiconductor chip disposed on the lower package substrate, an upper package including an upper package substrate and an upper semiconductor chip disposed on the upper package substrate, a fastening element formed between a top surface... Agent: Samsung Electronics Co., Ltd
20140335659 - Method of manufacturing semiconductor device: A semiconductor device includes a first semiconductor chip including a first surface, a second surface and a first terminal arranged on the first surface, a second semiconductor chip including a first surface, a second surface and a second terminal arranged on the first surface of the second semiconductor chip, a... Agent:
20140335658 - Semiconductor device and method of land grid array packaging with bussing lines: A semiconductor device and method of making a semiconductor device is described. An embedded die panel comprising a plurality of semiconductor die separated by saw streets is provided. A conductive layer is formed by an electroless plating process, the conductive layer comprising bussing lines disposed in the saw streets and... Agent:
20140335660 - Bonding structure and method: A bonding structure and a method for bonding components, wherein the bonding structure includes a nanoparticle preform. In accordance with embodiments, the nanoparticle preform is placed on a substrate and a workpiece is placed on the nanoparticle preform.... Agent:
20140335661 - Methods and apparatus to form thin film nanocrystal integrated circuits on ophthalmic devices: This invention discloses methods and apparatus to form thin film nanocrystal integrated circuit transistors upon three dimensionally formed insert devices. In some embodiments, the present invention includes incorporating the three dimensional surfaces with thin film nanocrystal integrated circuit based thin film transistors, electrical interconnects and energization elements into an insert... Agent: Johnson & Johnson Vision Care, Inc.
20140335662 - Methods for forming package-on-package structures having buffer dams: Package-on-Package (PoP) structures and methods of forming the same are disclosed. In some embodiments, a method of forming a PoP structure may include: placing a device die having a plurality of metal posts over a release layer, wherein the release layer is over a first carrier; forming a plurality of... Agent:
20140335663 - Method of making a transitor: A method for manufacturing a transistor includes forming a stack of semiconductor on insulator type layers including at least one substrate, surmounted by a first insulating layer and an active layer to form a channel for the transistor; forming a gate stack on the active layer; producing a source and... Agent: Stmiroelectronics (crolles 2) Sas
20140335664 - Method of manufacturing color filter substrate and method of manufacturing thin film transistor substrate: A method of manufacturing a color filter substrate includes forming a plurality of trenches having a predetermined depth by etching a surface of a transparent substrate, disposing a color filter material in the plurality of trenches to form a color filter layer, and forming a transparent electrode on the transparent... Agent:
20140335665 - Low extension resistance iii-v compound fin field effect transistor: A gate stack including a gate dielectric and a gate electrode is formed over at least one compound semiconductor fin provided on an insulating substrate. The at least one compound semiconductor fin is thinned employing the gate stack as an etch mask. Source/drain extension regions are epitaxially deposited on physically... Agent: International Business Machines Corporation
20140335666 - Growth of high-performance iii-nitride transistor passivation layer for gan electronics: Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN HEMT by means of atomic layer epitaxy (ALE), either before or after deposition of a gate metal electrode on the AlGaN barrier layer. Depending on the... Agent: The Government Of The United States Of America, As Represented By The Secretary Of The Navy
20140335668 - Contact landing pads for a semiconductor device and methods of making same: A method of forming a conductive contact landing pad and a transistor includes forming first and second spaced-apart active regions in a semiconducting substrate, forming a layer of gate insulation material on the first and second active regions, and performing an etching process to remove the layer of gate insulation... Agent: Globalfoundries Inc.
20140335667 - Semiconductor device: A semiconductor device includes an active area having a source and a gate. A gate metal contact is deposited above and forms an electrical contact with the gate and a source metal contact is deposited above and forms an electrical contact with the source. The source metal contact includes a... Agent:
20140335669 - Embedded non-volatile memory: The present invention is a method of incorporating a non-volatile memory into a CMOS process that requires four or fewer masks and limited additional processing steps. The present invention is an epi-silicon or poly-silicon process sequence that is introduced into a standard CMOS process (i) after the MOS transistors' gate... Agent:
20140335670 - Semiconductor device including finfet and diode having reduced defects in depletion region: A semiconductor device comprises a first substrate portion and a second substrate portion disposed a distance away from the first substrate portion. The first substrate portion includes a first active semiconductor layer defining at least one semiconductor fin and a first polycrystalline layer formed directly on the fin. The first... Agent:
20140335671 - Non-volatile memory having 3d array of read/write elements with vertical bit lines and select devices and methods thereof: A three-dimensional memory is formed as an array of memory elements that are formed across multiple layers of planes positioned at different distances above a semiconductor substrate. The memory elements reversibly change a level of electrical conductance in response to a voltage difference being applied across them. The three-dimensional array... Agent:
20140335672 - Process for manufacturing semiconductor transistor device: A process for manufacturing a semiconductor transistor device is provided. The process comprises steps of providing a substrate; forming a patterned hard mask on the substrate; forming a spacer on a sidewall of the patterned hard mask; forming a trench by removing a portion of the substrate not being covered... Agent: United Microeletronics Corporation
20140335673 - Methods of manufacturing finfet semiconductor devices using sacrificial gate patterns and selective oxidization of a fin: A method of manufacturing a semiconductor device includes patterning a substrate to form an active fin, forming a sacrificial gate pattern crossing over the active fin on the substrate, forming an interlayer insulating layer on the sacrificial gate pattern, removing the sacrificial gate pattern to form a gap region exposing... Agent: Samsung Electronics Co., Ltd.
20140335674 - Manufacturing method of semiconductor device: A manufacturing method of a semiconductor device is provided. The method includes at least the following steps. A gate structure is formed on a substrate. An epitaxial structure is formed on the substrate, wherein the epitaxial structure comprises SiGe, and the Ge concentration in the epitaxial structure is equal to... Agent: United Microelectronics Corp.
20140335675 - Regulating interface layer growth with n2o for two-terminal memory: Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can be grown on the silicon bearing layer, and the growth... Agent:
20140335676 - Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core: According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate.... Agent:
20140335677 - Method for separating epitaxial layer from growth substrate: The present invention provides a method for separating an epitaxial layer from a growth substrate, comprising growing an epitaxial layer including a plurality of layers on a growth substrate; etching an edge of at least one layer in the epitaxial layer to form a notch; forming a bonding layer on... Agent:
20140335678 - Environmentally-assisted technique for transferring devices onto non-conventional substrates: A device fabrication method includes: (1) providing a growth substrate including an oxide layer; (2) forming a metal layer over the oxide layer; (3) forming a stack of device layers over the metal layer; (4) performing fluid-assisted interfacial debonding of the metal layer to separate the stack of device layers... Agent:
20140335679 - Methods for etching a substrate: In some embodiments, a method for etching features into a substrate may include exposing a substrate having a photoresist layer disposed atop the substrate to a first process gas to form a polymer containing layer atop sidewalls and a bottom of a feature formed in the photoresist layer, wherein the... Agent:
20140335680 - Multi-layer amorphous silicon structure with improved poly-silicon quality after excimer laser anneal: The embodiments described herein generally relate to methods for forming a multi-layer amorphous silicon structure that may be used in thin film transistor devices. In one embodiment, a method includes positioning a substrate comprising a buffer layer in a process chamber, the process chamber comprising a processing region, forming a... Agent:
20140335681 - Graphene transferring methods, device manufacturing method using the same, and substrate structures including graphene: Graphene transferring methods, a device manufacturing method using the same, and substrate structures including graphene, include forming a catalyst layer on a first substrate, forming a graphene layer on the catalyst layer, forming a protection metal layer on the graphene layer, attaching a supporter to the protection metal layer, separating... Agent: Samsung Electronics Co., Ltd.
20140335682 - Semiconductor device and manufacturing method thereof: A semiconductor device according to an embodiment includes a first-conductive-type semiconductor substrate; a first-conductive-type first semiconductor layer formed on the semiconductor substrate, and having an impurity concentration lower than that of the semiconductor substrate; a second-conductive-type second semiconductor layer epitaxially formed on the first semiconductor layer; and a second-conductive-type third... Agent: Kabushiki Kaisha Toshiba
20140335683 - Method for producing gallium nitride: A method for producing a gallium nitride layer using a pulsed laser is disclosed. The method includes (1) providing a substrate; (2) forming a zinc oxide layer on the substrate; and (3) forming a gallium nitride thin film on the zinc oxide layer by pulsed laser deposition (PLD).... Agent: National Taiwan University
20140335684 - Manufacturing method and manufacturing apparatus of semiconductor device: A manufacturing method for a semiconductor device includes implanting dopants into a silicon carbide substrate, applying a carbon-containing material on at least one surface of the silicon carbide substrate, and heating the silicon carbide substrate having the carbon-containing material applied thereon to form a carbon layer on surfaces of the... Agent: Kabushiki Kaisha Toshiba
20140335685 - Methods of annealing after deposition of gate layers: A method of fabricating a gate structure includes depositing a high dielectric constant (high-k) dielectric layer over a substrate. The method further includes performing a multi-stage preheat high-temperature anneal. Performing the multi-stage preheat high-temperature anneal includes performing a first stage preheat at a temperature in a range from about 400°... Agent:
20140335686 - Laser ablation tape for solder interconnect formation: A tape capable of laser ablation may be used in the formation of microelectronic interconnects, wherein the tape may be attached to bond pads on a microelectronic device and vias may be formed by laser ablation through the tape to expose at least a portion of corresponding bond pads. The... Agent:
20140335687 - Method of making a conductive pillar bump with non-metal sidewall protection structure: A method of making a semiconductor device includes forming an under bump metallurgy (UBM) layer over a substrate, the UBM layer comprising sidewalls and a surface region. The method further includes forming a conductive pillar over the UBM layer, the conductive pillar includes sidewalls, wherein the conductive pillar exposes the... Agent:
20140335688 - Mask assembly and thin film deposition method using the same: A mask assembly and a thin film deposition method using the same are provided. The mask assembly includes a mask frame including first to fourth sides. The first to fourth sides form a rectangle. Inner sides of the rectangle define a window. The mask frame has a plurality of substrate... Agent: Samsung Display Co., Ltd.
20140335689 - Method of fabricating a semiconductor interconnect structure: A method for forming a semiconductor interconnect structure includes forming a dielectric layer on a substrate and patterning the dielectric layer to form an opening therein. A metal layer fills the opening and covers the dielectric layer. The metal layer is planarized so that it is co-planar with a top... Agent:
20140335690 - Semiconductor device and method for manufacturing the same: A semiconductor device includes: a contact hole formed over a structure including a conductive pattern; a contact plug formed in the contact hole; a first metal silicide film surrounding the contact plug; and a second metal silicide film formed over the contact plug.... Agent:
20140335691 - Manufacturing method of metal wire and thin transistor array panel: A manufacturing method of a wire including: forming a lower layer on a substrate; forming a middle layer on the lower layer; forming an upper layer on the middle layer; forming, exposing, and developing a photoresist layer on the upper layer to form a photoresist pattern; and etching the upper... Agent: Samsung Display Co., Ltd.
20140335692 - Method for forming a resist under layer film and patterning process: The present invention provides a method for forming a resist under layer film used in a lithography process, comprising: a process for applying a composition for forming a resist under layer film containing an organic compound having an aromatic unit on a substrate; and a process for heat-treating the resist... Agent: Shin-etsu Chemical Co., Ltd.
20140335693 - Substrate processing method, program, control apparatus, film forming apparatus, and substrate processing system: A substrate processing method of the present disclosure includes forming a film on a workpiece using a processing gas in a processing chamber with a setting temperature profile including increase or decrease of a temperature; and etching the film. An etching rate of the film in the etching depends on... Agent: Tokyo Electron Limited
20140335694 - Methods of fabricating substrates: A method of fabricating a substrate includes forming spaced first features over a substrate. An alterable material is deposited over the spaced first features and the alterable material is altered with material from the spaced first features to form altered material on sidewalls of the spaced first features. A first... Agent:
20140335695 - External uv light sources to minimize asymmetric resist pattern trimming rate for three dimensional semiconductor chip manufacture: Embodiments of the present invention provide an apparatus and methods for forming stair-like structures in manufacturing three dimensional (3D) stacking of semiconductor chips. In one embodiment, a method of forming stair-like structures on a substrate includes performing a trimming process on a substrate to trim a patterned photoresist layer disposed... Agent:
20140335696 - Plasma processing apparatus and plasma processing method: The plasma processing apparatus is provided with a chamber 11, a plasma source 13 which generates plasma inside the chamber 11, a stage 16 which is provided inside the chamber 11 and places a carrier 5 thereon, a cover 31 which is arranged above the stage 16 to cover a... Agent: Panasonic Corporation
20140335697 - Pulsed dielectric etch process for in-situ metal hard mask shape control to enable void-free metallization: An all-in-one trench-over-via etch wherein etching of a low-k material beneath a metal hard mask of titanium nitride containing material is carried out in alternating steps of (a) etching the low-k material while maintaining chuck temperature at about 45 to 80° C. and (b) metal hard mask rounding and Ti-based... Agent: Lam Research Corporation
20140335699 - Application of fluids to substrates: Various embodiments relate to application of a fluid to a substrate. The fluid is locally heated, for example, to obtain a desired thickness profile.... Agent: Infineon Technologies Ag
20140335698 - Component of a plasma processing apparatus having a protective in situ formed layer on a plasma exposed surface: A component of a plasma processing chamber having a protective liquid layer on a plasma exposed surface of the component. The protective liquid layer can be replenished by supplying a liquid to a liquid channel and delivering the liquid through liquid feed passages in the component. The component can be... Agent: Lam Research Corporation
20140335700 - Carbon layers for high temperature processes: Carbon layers with reduced hydrogen content may be deposited by plasma-enhanced chemical vapor deposition by selecting processing parameters accordingly. Such carbon layers may be subjected to high temperature processing without showing excessive shrinking.... Agent:
20140335701 - Method of manufacturing semiconductor device, substrate processing apparatus and non-transitory computer-readable recording medium: A thin film containing boron and a borazine ring structure is formed on a substrate by performing a cycle a predetermined number of times under a condition where the borazine ring structure is preserved in a borazine compound. The cycle includes: supplying a source gas containing boron and a halogen... Agent: Hitachi Kokusai Electric Inc.
20140335702 - Preparation of cerium-containing precursor and deposition of cerium-containing films: Methods and compositions for depositing rare earth metal-containing layers are described herein. In general, the disclosed methods deposit the precursor compounds comprising rare earth-containing compounds using deposition methods such as chemical vapor deposition or atomic layer deposition. The disclosed precursor compounds include a cyclopentadienyl ligand having at least one aliphatic... Agent:Previous industry: Chemistry: analytical and immunological testing
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