Semiconductor device manufacturing: process patents - Monitor Patents
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Semiconductor device manufacturing: process

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
07/10/2014 > 57 patent applications in 44 patent subcategories.

20140193928 - Current application device and manufacturing method of semiconductor element: Provided is a current application device capable of applying a test current of a magnitude necessary for testing of a semiconductor element without any trouble. A current application device 1 is configured to have a contacting section having a plurality of projections 21 for contacting a contact region 24 inside... Agent: Honda Motor Co., Ltd.

20140193929 - Integrated reflector and thermal spreader and thermal spray fabrication method: A low-cost integrated reflector and heat spreader for high-density high power solid-state (e.g., LED) lighting arrays includes a base structure onto which is applied a sacrificial material. A relatively thick thermal spray coating is applied over the base structure and sacrificial material. The sacrificial material is removed. A channel(s) is... Agent: Palo Alto Research Center Incorporated

20140193930 - Processes for manufacturing an led package with top and bottom electrodes: An LED package with an extended top electrode and an extended bottom electrode is formed from a first metal and a second metal. An LED is on an inner end of the first metal. An outer end of the first metal has been bent upward twice 90 degrees to form... Agent: Cheng Kung Capital, LLC

20140193931 - Method of bonding a substrate to a semiconductor light emitting device: A method according to embodiments of the invention includes positioning a flexible film (48) over a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a semiconductor structure (13) including a light emitting layer sandwiched between an n-type region and a p-type region. The wafer of semiconductor... Agent: Koninklijke Philips N.v.

20140193932 - Light-emitting device and method for manufacturing the same: A method for manufacturing a light-emitting device comprises the steps of: providing a first substrate; forming a semiconductor structure on the first substrate, wherein the semiconductor structure comprises a first type semiconductor layer, a second type semiconductor layer, and an active layer between the first type semiconductor layer and the... Agent: Epistar Corporation

20140193933 - Method for manufacturing semiconductor optical device: A method for manufacturing a semiconductor optical device includes the steps of preparing a mold having an imprint pattern; forming a substrate product including a semiconductor layer; forming a first resin layer on the semiconductor layer; forming a diffraction grating pattern having periodic projections and recesses in the first resin... Agent: Sumitomo Electric Industries, Ltd.

20140193935 - Collections of laterally crystallized semiconductor islands for use in thin film transistors: Collections of laterally crystallized semiconductor islands for use in thin film transistors and systems and methods for making same are described. A display device includes a plurality of thin film transistors (TFTs) on a substrate, such that the TFTs are spaced apart from each other and each include a channel... Agent: The Trustees Of Columbia University In The City Of New York

20140193934 - Organic light emitting display and manufacturing method thereof: An organic light emitting display resulting in an improved aperture ratio and a manufacturing method thereof. The organic light emitting display that includes a plurality of pixels arranged between first and second substrates, each of said pixels includes a plurality of thin film transistors, an organic light emitting diode, and... Agent: Samsung Display Co., Ltd

20140193937 - Method and compound: wherein Sp1 independently in each occurrence represents a spacer group; w independently in each occurrence is 0 or 1; Ar in each occurrence independently represents an aryl or heteroaryl group; R1 in each occurrence independently represents H or a substituent, with the proviso that at least one R1 is a... Agent: Cambridge Display Technology, Ltd.

20140193936 - Method for fabricating organic light emitting device: A method of fabricating an organic light emitting device includes forming a first electrode layer on a substrate, surface-treating the first electrode layer with CF4 plasma, forming a first common layer containing pentacene on the surface-treated first electrode layer, forming an organic light emitting layer on the first common layer,... Agent:

20140193938 - Chemically sensitive sensor with lightly doped drains: A chemically sensitive sensor with a lightly doped region that affects an overlap capacitance between a gate and an electrode of the chemical sensitive sensor. The lightly doped region extends beneath and adjacent to a gate region of the chemical sensitive sensor. Modifying the gain of the chemically sensitive sensor... Agent: Life Technologies Corporation

20140193939 - Method and system for forming absorber layer on metal coated glass for photovoltaic devices: An apparatus for forming a solar cell includes a housing defining a vacuum chamber, a rotatable substrate support, at least one inner heater and at least one outer heater. The substrate support is inside the vacuum chamber configured to hold a substrate. The at least one inner heater is between... Agent: Tsmc Solar Ltd.

20140193940 - Method and apparatus for image sensor packaging: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140193941 - Method for manufacturing solar cell: A method for manufacturing a solar cell includes forming a first electrode on a substrate, removing a portion of the first electrode to form a first electrode opening, forming a light absorbing layer on the first electrode and in the first electrode opening, and applying a laser beam to the... Agent: Samsung Sdi Co., Ltd.

20140193943 - Method for fabricating cu-in-ga-se film solar cell: A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In2Se3... Agent:

20140193944 - Multilayer thin-film back contact system for flexible photovoltaic devices on polymer substrates: A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is formed at... Agent: Ascent Solar Technologies, Inc.

20140193942 - Systems and methods for thermally managing high-temperature processes on temperature sensitive substrates: A method for depositing one or more thin-film layers on a flexible polyimide substrate having opposing front and back outer surfaces includes the following steps: (a) heating the flexible polyimide substrate such that a temperature of the front outer surface of the flexible polyimide substrate is higher than a temperature... Agent: Ascent Solar Technologies, Inc.

20140193946 - Method for manufacturing semiconductor device: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140193947 - Method for manufacturing semiconductor device: Oxygen vacancies in an oxide semiconductor film and the vicinity of the oxide semiconductor film are reduced and electric characteristics of a transistor including the oxide semiconductor film are improved. Further, a highly reliable semiconductor device including the transistor including the oxide semiconductor film is provided. In the transistor including... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140193945 - Solution for etching a thin film transistor and method of manufacturing the same: Disclosed herein is an aqueous alkaline etching solution comprising water and an alkaline material being selected from the group consisting of ammonium hydroxide, ammonium phosphate, ammonium carbonate, quaternary ammonium hydroxide, quaternary ammonium phosphate, quaternary ammonium carbonate, an alkali metal hydroxide, an alkaline earth metal hydroxide, or a combination comprising at... Agent:

20140193950 - Electronic device package and fabrication method thereof: An electronic device package is disclosed. The package includes at least one semiconductor chip having a first surface and a second surface opposite thereto, in which at least one redistribution layer is disposed on the first surface of the semiconductor chip and is electrically connected to at least one conductive... Agent: Xintec Inc.

20140193948 - Integrated bondline spacers for wafer level packaged circuit devices: A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached... Agent: Raytheon Company

20140193949 - Socket type mems bonding: A method for fabricating an integrated circuit device is disclosed. The method includes providing a first substrate; bonding a second substrate to the first substrate, the second substrate including a microeelectromechanical system (MEMS) device; and bonding a third substrate to the first substrate.... Agent: Taiwan Semiconductor Manufacturing Company Ltd.

20140193951 - Stacked semiconductor package including connections electrically connecting first and second semiconductor packages: A stacked semiconductor package has a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate, a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate, and a plurality of connections... Agent:

20140193952 - Methods for metal bump die assembly: Methods for assembling metal bump dies. In an embodiment, a method includes providing an integrated circuit die having a plurality of conductive terminals; depositing solder to form solder depositions on the conductive terminals; providing a substrate having a die attach region on a surface for receiving the integrated circuit die,... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140193953 - Method of manufacturing semiconductor device mounting structure: A semiconductor device mounting structure includes: a substrate with an opening provided therein; a frame member with a frame body and a protruding portion that protrudes from the frame body, the frame body being formed and accommodated in a groove around the opening; a coreless substrate provided above the substrate... Agent: Fujitsu Limited

20140193954 - Method of manufacturing semiconductor device: The reliability of a semiconductor device is to be improved. A microcomputer chip (semiconductor chip) having a plurality of pads formed on a main surface thereof is mounted over an upper surface of a wiring substrate in an opposed state of the chip main surface to the substrate upper surface.... Agent: Renesas Electronics Corporation

20140193955 - Hybrid fin field-effect transistor structures and related methods: Semiconductor-on-insulator structures facilitate the fabrication of devices, including MOSFETs that are at least partially depleted during operation and FinFETs including bilayer fins and/or crystalline oxide.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140193956 - Transistor and fabriation method: Fabrication methods for junctionless transistor and complementary junctionless transistor are provided. An isolation layer doped with a first-type ion is formed on a semiconductor substrate and an active layer doped with a second-type ion is formed on the isolation layer. The active layer includes a first portion between a second... Agent: Semiconductor Manufacturing International (shanghai) Corporation

20140193957 - Reducing gate height variance during semiconductor device formation: In general, aspects of the present invention relate to approaches for forming a semiconductor device such as a FET with reduced gate stack height variance. Specifically, when a gate stack height variance is detected/identified between a set of gate stacks, a hard mask layer and sets of spacers are removed... Agent: Globalfoundries Inc.

20140193958 - Termination design for high voltage device: The present disclosure describes a termination structure for a high voltage semiconductor transistor device. The termination structure is composed of at least two termination zones and an electrical disconnection between the body layer and the edge of the device. A first zone is configured to spread the electric field within... Agent: Alpha And Omega Semiconductor Incorporated

20140193959 - Finfet body contact and method of making same: A semiconductor device may include body contacts on a finFET device for ESD protection. The semiconductor device comprises a semiconductor fin, a source/drain region and a body contact. The source/drain region and the body contact are in the semiconductor fin. A portion of the fin is laterally between the source/drain... Agent: Taiwan Semiconductor Manufacturing Company, Ltd

20140193960 - Fabrication method of semiconductor device and fabrication method of dynamic threshold transistor: A method includes: etching a silicon substrate except for a silicon substrate portion on which a channel region is to be formed to form first and second trenches respectively at a first side and a second side of the silicon substrate portion; filling the first and second trenches by epitaxially... Agent: Fujitsu Semiconductor Limited

20140193961 - Method of fabricating metal-insulator-metal (mim) capacitor within topmost thick inter-metal dielectric layers: Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 KŘ30 KÅ) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140193962 - Semiconductor devices and methods of forming the same: A method of forming a semiconductor device is provided. The method includes preparing a substrate having a transistor region and an alignment region, forming a first trench and a second trench in the substrate of the transistor region and in the substrate of the alignment region, respectively, forming a drift... Agent: Samsung Electronics Co., Ltd.

20140193963 - Techniques for forming 3d structures: A technique for forming 3D semiconductor structure is disclosed. In one embodiment, a substrate having at least two vertically extending fins is provided. An insulating material is deposited in the trench between the fins. After planarization, an ion implant process is performed to change the properties of the insulating material,... Agent:

20140193964 - Method of manufacturing semiconductor device: The present invention provides a method of manufacturing a semiconductor device. The method at least comprises the following steps. First, the semiconductor device, which comprises a gate, a gate dielectric layer, an active layer, a source and a drain, is manufactured. However, the semiconductor device has a plurality of defects,... Agent: National Chiao Tung University

20140193965 - Reduction of basal plane dislocations in epitaxial sic using an in-situ etch process: A method of: providing an off-axis 4H—SiC substrate, and etching the surface of the substrate with hydrogen or an inert gas.... Agent: The Government Of The United States Of America, As Represented By The Secretary Of The Navy

20140193966 - Methods of manufacturing vertical semiconductor devices: Methods of manufacturing vertical semiconductor devices may include forming a mold structure including sacrificial layers and insulating interlayers with a first opening formed therethrough. The sacrificial layers and the insulating interlayers may be stacked repeatedly and alternately on a substrate. The first opening may expose the substrate. Blocking layers may... Agent: Samsung Electronics Co., Ltd.

20140193967 - Method of forming an epitaxial layer on a substrate, and apparatus and system for performing the same: In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion... Agent: Samsung Electronics Co., Ltd.

20140193968 - Semiconductor device and manufacturing method of the same:

20140193969 - Semiconductor structures and methods of fabrication of same: Semiconductor structure including an etch stop material between a substrate and a stack of alternating insulating materials and first conductive materials, wherein the etch stop material comprises an amorphous aluminum oxide on the substrate and a crystalline aluminum oxide on the amorphous aluminum oxide; a channel material extending through the... Agent: Micron Technology, Inc.

20140193970 - Isolated wire structures with reduced stress, methods of manufacturing and design structures: An integrated circuit (IC) including a set of isolated wire structures disposed within a layer of the IC, methods of manufacturing the same and design structures are disclosed. The method includes forming adjacent wiring structures on a same level, with a space therebetween. The method further includes forming a capping... Agent: International Business Machines Corporation

20140193971 - Semiconductor device and method of manufacturing the same: The semiconductor device includes: a semiconductor substrate; an insulating film provided on a surface of the semiconductor substrate; a porous metal film provided on the insulating film; a protective film provided on the porous metal film, and having an opening portion for defining a pad region; and a wire wire-bonded... Agent: Seiko Instruments Inc.

20140193972 - Buried hard mask for embedded semiconductor device patterning: Methods and apparatus for manufacturing semiconductor devices, and such semiconductor devices, are described. According to various aspects of the disclosure, a semiconductor device can be manufactured by forming a core region of the semiconductor device and forming a periphery region of the semiconductor device. A first polysilicon region can then... Agent: Spansion LLC

20140193973 - Method for forming interlayer connectors to a stack of conductive layers: A method forms interlayer connectors extending to conductive layers of a stack of W conductive layers interleaved with dielectric layers. The stack is etched to expose landing areas at W−1 conductive layers using a set of M etch masks. For each etch mask m, m going from 0 to M−1,... Agent: Macronix International Co., Ltd.

20140193974 - Multi-patterning method and device formed by the method: A multi-patterning method includes: patterning at least two first openings in a hard mask layer over a substrate using a first mask; forming spacers within two of the at least two first openings, each spacer having a spacer opening therein for patterning a respective first circuit pattern over the substrate,... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140193975 - Composition for forming titanium-containing resist underlayer film and patterning process: The invention provides a composition for forming a titanium-containing resist underlayer film comprising: as component (A), a silicon-containing compound obtained by hydrolysis and/or condensation of one or more kinds of silicon compounds shown by the following general formula (A-I) and, as component (B), a titanium-containing compound obtained by hydrolysis and/or... Agent: Shin-etsu Chemical Co., Ltd.

20140193976 - Methods of forming contact holes: Methods of forming contact holes include forming a first guide pattern over an etching target layer. The first guide pattern has first openings each extending in a first direction and each first opening arranged in a direction perpendicular to the first direction. A first BCP structure is formed in each... Agent: Samsung Electronics Co., Ltd.

20140193977 - Plasma etching method and plasma etching apparatus: A plasma etching apparatus includes a processing chamber; a holding unit for holding the substrate within the processing chamber; an electrode plate facing the holding unit; a plurality of supply parts arranged at different radial positions with respect to the substrate for supplying processing gas to a space between the... Agent: Tokyo Electron Limited

20140193978 - Method of plasma processing and apparatuses using the method: A method of operating a plasma processing device includes outputting a first RF power having a first frequency and a first duty ratio, and outputting a second RF power having a second frequency higher than the first frequency and a second duty ratio smaller than the first duty ratio. The... Agent:

20140193979 - Directional sio2 etch using plasma pre-treatment and high-temperature etchant deposition: Methods for processing a substrate are described herein. Methods can include positioning a substrate with an exposed surface comprising a silicon oxide layer in a processing chamber, biasing the substrate, treating the substrate to roughen a portion of the silicon oxide layer, heating the substrate to a first temperature, exposing... Agent:

20140193980 - Patterned line end space: One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. In some embodiments, a first sacrificial HM region and a second sacrificial HM region are formed... Agent: Taiwan Semicondutor Manufacturing Compnay Limited

20140193981 - Photo resist trimmed line end space: One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. Additionally, at least some of the first patterned second HM region is removed. In some embodiments,... Agent: Taiwan Semiconductor Mnufacturing Company Limited

20140193982 - Low thermal conductivity matrices with embedded nanostructures and methods thereof: A matrix with at least one embedded array of nanowires and method thereof. The matrix includes nanowires and one or more fill materials located between the nanowires. Each of the nanowires including a first end and a second end. The nanowires are substantially parallel to each other and are fixed... Agent: Alphabet Energy, Inc.

20140193983 - Apparatuses and methods for depositing sic/sicn films via cross-metathesis reactions with organometallic co-reactants: Disclosed herein are methods of forming SiC/SiCN film layers on surfaces of semiconductor substrates. The methods may include introducing a silicon-containing film-precursor and an organometallic ligand transfer reagent into a processing chamber, adsorbing the silicon-containing film-precursor, the organometallic ligand transfer reagent, or both onto a surface of a semiconductor substrate... Agent:

20140193984 - Apparatus and method for reducing residual stress of semiconductor: An apparatus for reducing residual stress of a semiconductor includes a stage configured to support a semiconductor wafer having the residual stress generated by a semiconductor manufacturing process. The apparatus includes an intense pulsed light (IPL) irradiation unit configured to irradiate IPL to the semiconductor wafer to reduce the residual... Agent: Samsung Electronics Co., Ltd.

  
07/03/2014 > 83 patent applications in 67 patent subcategories.

20140186974 - Measurement device and method for vapour deposition applications: In vapour deposition applications, especially OLED mass production, where it is necessary to measure and/or control the deposition rate of evaporation sources within specific tolerances, a measurement system is adapted to use robust and accurate optical thickness measurement methods at high and low rate sources, so that the thickness of... Agent: Koninklijke Philips N.v.

20140186975 - Method and system for in-line real-time measurements of layers of multilayered front contacts of photovoltaic devices and calculation of opto-electronic properties and layer thicknesses thereof: A method and system for real-time, in-line calculations of opto-electronic properties and thickness of the layers of multi-layered transparent conductive oxide stacks of photovoltaic devices is provided. The method and system include taking measurements of each layer of the stack during deposition thereof. The measurements are then used to calculate... Agent: First Solar, Inc

20140186976 - Light emitting device with planar current block structure: The present disclosure discloses a method of manufacturing a light-emitting device comprising the steps of providing a light-emitting wafer having a semiconductor stacked structure and an alignment mark, sensing the alignment mark, and separating the light-emitting wafer into a plurality of light-emitting diodes and removing the alignment mark accordingly.... Agent: Epistar Corporation

20140186977 - Method for calculating warpage of bonded soi wafer and method for manufacturing bonded soi wafer: A method for calculating a warpage of a bonded SOI wafer includes: assuming that the epitaxial growth SOI wafer is a silicon single crystal wafer having the same dopant concentration as dopant concentration of the bond wafer; calculating a warpage A that occurs at the time of performing the epitaxial... Agent: Shin-etsu Handotai Co., Ltd.

20140186978 - Method of manufacturing organic light-emitting display apparatus: Provided is a method of manufacturing an organic light-emitting display apparatus which may reduce white angular dependency (WAD). The method includes forming a common layer on each of subpixel areas at the same time without discretion within one pixel area, the common layer not being formed on connection areas between... Agent:

20140186979 - Light emitting device and manufacture method thereof: The present disclosure provides a method for forming a light-emitting apparatus, comprising providing a first board having a plurality of first metal contacts, providing a substrate, forming a plurality of light-emitting stacks and trenches on the substrate, wherein the light-emitting stacks are apart from each other by the plurality of... Agent: Epistar Corporation

20140186980 - Method of manufacturing light emitting device and spray coating machine: A method of manufacturing a light emitting device, using a spray coating method, a fluorescent material can be easily adhered on corner portions and side surfaces of an LED chip, a lens-shaped light transmissive resin member surface, an optical lens surface, etc., and a spray coating machine used in the... Agent: Nichia Corporation

20140186981 - Light emitting diode and fabrication method thereof: A fabrication method of a light-emitting diode including forming an epitaxial layer on a first substrate; forming a metal pad and a stress release ring on the epitaxial layer, wherein the stress release ring surrounds the metal pad; performing a substrate replacement process to transfer the epitaxial layer, the metal... Agent: Lextar Electronics Corp.

20140186982 - Organic light emitting diode display and manufacturing method thereof: An organic light emitting diode (OLED) display includes a display substrate, an encapsulation substrate facing the display substrate; a soft sealant disposed between the display substrate and the encapsulation substrate and adhering the display substrate and the encapsulation substrate to each other; and a brittle sealant connecting a side of... Agent:

20140186984 - Complex compounds having tetradentate ligands and the use thereof in the opto-electronic field: The invention describes electronic devices comprising a metal complex compound having at least one tetradentate ligand having N and/or P donors, in particular a ligand having a PPPP, NNNN, PNNP or NPPN structure, and uses of a complex of this type in the electronic field and for the generation of... Agent: Merck Patent Gmbh

20140186983 - Mask, method of cleaning the mask, and method of manufacturing a plurality of organic electroluminescent elements using the mask: A method of cleaning a mask includes preparing a mask on which a first metal layer and a second metal layer are stacked sequentially, and lifting off the second metal layer by removing the first metal layer.... Agent:

20140186985 - Method and apparatus for maufacturing organic el device: Provided is a method and an apparatus for manufacturing an organic EL device which make it possible to manufacture organic EL devices capable of suppressing quality degradation. The method for manufacturing an organic EL device, in which constituent layers of an organic EL element are formed over a substrate in... Agent: Nitto Denko Corporation

20140186986 - Hybrid mems bump design to prevent in-process and in-use stiction: A micro-electro-mechanical systems (MEMS) device and method for forming a MEMS device is provided. A proof mass is suspended a distance above a surface of a substrate by a fulcrum. A pair of sensing plates are positioned on the substrate on opposing sides of the fulcrum. Metal bumps are associated... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140186987 - Manufacturing methods for micro-electromechanical system device having electrical insulating structure: The disclosure relates to a micro-electromechanical system (MEMS) device having an electrical insulating structure. The MEMS device includes at least one moving part, at least one anchor, at least one spring and an insulating layer. The spring is connected to the anchor and to the moving part. The insulating layer... Agent: Industrial Technology Research Institute

20140186988 - Chemical bath deposition apparatus, method of forming buffer layer and method of manufacturing photoelectric conversion device: A chemical bath deposition apparatus includes: a reaction vessel for containing a reaction solution for chemical bath deposition to form a film on a surface of a substrate; a substrate holding section for holding the substrate such that at least the surface of the substrate contacts the reaction solution, the... Agent: Fujifilm Corporation

20140186989 - Conductive base for forming wiring pattern of collector sheet for solar cells, and method for producing collector sheet for solar cells: Provided are: a conductive base for forming a wiring pattern of a collector sheet for solar cells, which has good rust inhibiting properties and solderability without using an organic rust inhibitor that may harm a solar cell element; and a method for producing a collector sheet for solar cells, said... Agent:

20140186990 - Cvd apparatus and method for forming cvd film: As the antireflection film of solar cells, a nitride film was used which was conventionally formed by reduced pressure plasma CVD. However, reducing solar cell production costs has been difficult due to high equipment costs and processing costs involved in reduced pressure treatment. By means of a plasma head comprising... Agent: Wacom

20140186991 - Avalanche photodiode with special lateral doping concentration: Avalanche photodiodes having special lateral doping concentration that reduces dark current without causing any loss of optical signals and method for the fabrication thereof are described. In one aspect, an avalanche photodiode comprises: a substrate, a first contact layer coupled to at least one metal contract of a first electrical... Agent: Sifotonics Technologies Co., Ltd.

20140186992 - Cover for protecting solar cells during fabrication: A removable cover system for protecting solar cells from exposure to moisture during fabrication processes. The cover system includes a cover having a configuration that complements the configuration of a solar cell substrate to be processed in an apparatus where moisture is present. A resiliently deformable seal member attached to... Agent: Tsmc Solar Ltd.

20140186993 - Multilayer thin-film back contact system for flexible photovoltaic devices on polymer substrates: A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is formed at... Agent: Ascent Solar Technologies, Inc.

20140186994 - Composition for solar cell electrodes and electrode fabricated using the same: A composition for solar cell electrodes, a solar cell electrode prepared from the composition, and a method of manufacturing the same, the composition including silver powder; silver nitrate; glass frit; and an organic vehicle, wherein the silver nitrate is present in an amount of about 0.1 wt % to about... Agent:

20140186995 - Method of fabricating cigs solar cells with high band gap by sequential processing: A method for forming TFPV absorber layer. A first layer including In is formed on a substrate. The first layer is partially or fully selenized to form a layer that includes InxSey. A second layer is formed on the partially or fully selenized first layer. The second layer may include... Agent: Intermolecular Inc.

20140186997 - Display device and method for manufacturing the same: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140186996 - Etchant and etching process for oxides containing at least indium and gallium: The present invention relates to an etchant and an etching process, which are preferred for use in etching of oxides containing at least indium and gallium, such as an oxide consisting of indium, gallium and oxygen or an oxide consisting of indium, gallium, zinc and oxygen. According to preferred embodiments... Agent: Mitsubishi Gas Chemical Company, Inc.

20140186998 - Semiconductor device: A highly reliable semiconductor device which is formed using an oxide semiconductor and has stable electric characteristics is provided. A semiconductor device which includes an amorphous oxide semiconductor layer including a region containing oxygen in a proportion higher than that in the stoichiometric composition, and an aluminum oxide film provided... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140186999 - Wafer level packaging of microbolometer vacuum package assemblies: An apparatus for the wafer level packaging (WLP) of micro-bolometer vacuum package assemblies (VPAs), in one embodiment, includes a wafer alignment and bonding chamber, a bolometer wafer chuck and a lid wafer chuck disposed within the chamber in vertically facing opposition to each other, means for creating a first ultra-high... Agent: Flir Systems, Inc.

20140187000 - Semiconductor device and manufacturing method therefor: A semiconductor device includes a circuit substrate, a first semiconductor chip disposed on the circuit substrate, a plurality of first spacers disposed on the first semiconductor chip, a second semiconductor chip which includes a first adhesive agent layer on a lower face thereof and is disposed on upper portions of... Agent: Fujitsu Semiconductor Limited

20140187001 - Method for fabricating array substrate: Disclosed is a method for fabricating an array substrate, comprising: forming a pattern layer comprising a gate and a gate connection on a substrate; sequentially forming an insulation layer film and an active layer film on the substrate, and forming a pattern of a gate insulation layer having a first... Agent: Beijing Boe Optoelectronics Technology Co., Ltd.

20140187003 - High electron mobility transistor and manufacturing method thereof: The present invention discloses a high electron mobility transistor (HEMT) and a manufacturing method thereof. The HEMT includes a semiconductor layer, a barrier layer on the semiconductor layer, a piezoelectric layer on the barrier layer, a gate on the piezoelectric layer, and a source and a drain at two sides... Agent: Richtek Technology Corporation, R.o.c

20140187002 - Method of forming a semiconductor structure: A method of forming a semiconductor structure having a substrate is disclosed. The semiconductor structure includes a first layer formed in contact with the substrate. The first layer made of a first III-V semiconductor material selected from GaN, GaAs and InP. A second layer is formed on the first layer.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140187004 - Method for fabricating semiconductor device: Disclosed is a method for fabricating a semiconductor device including: sequentially forming a first insulating film and a first barrier layer on a first surface of a substrate; etching the first barrier layer to form a first barrier layer pattern; etching the first insulating film to form a first insulating... Agent: Hyundai Motor Company

20140187005 - Semiconductor device, manufacturing method thereof, electronic device and vehicle: A method for manufacturing a semiconductor device includes forming a recess over a surface of an n-type semiconductor substrate, forming a gate insulation film over an inner wall and a bottom face of the recess, embedding a gate electrode into the recess, forming a p-type base layer in the surface... Agent: Renesas Electronics Corporation

20140187006 - Method for fabricating a semiconductor device: A method for fabricating a semiconductor device comprises providing a substrate having a core oxide layer and an I/O oxide layer formed thereon. The I/O oxide layer has an I/O mask layer formed thereon. The method also includes forming an I/O dummy gate on the I/O mask layer and a... Agent: Semiconductor Manufacturing International (shanghai) Corporation

20140187007 - Mosfet including asymmetric source and drain regions: At least one drain-side surfaces of a field effect transistor (FET) structure, which can be a structure for a planar FET or a fin FET, is structurally damaged by an angled ion implantation of inert or electrically active dopants, while at least one source-side surface of the transistor is protected... Agent: International Business Machines Corporation

20140187008 - High tilt angle plus twist drain extension implant for chc lifetime improvement: An integrated circuit containing an analog MOS transistor may be formed by implanting drain extensions with exactly four sub-implants wherein at least one sub-implant implants dopants in a substrate of the integrated circuit at a source/drain gate edge of the analog MOS transistor at a twist angle having a magnitude... Agent:

20140187010 - Replacement gate process: An integrated circuit containing metal replacement gates may be formed by forming a CMP stop layer over sacrificial gates, and forming a dielectric fill layer over the CMP stop layer. Dielectric material from the dielectric fill layer is removed from over the sacrificial gates using a CMP process which exposes... Agent:

20140187009 - Uniform, damage free nitride etch: An integrated circuit may be formed by forming a sacrificial silicon nitride feature. At least a portion of the sacrificial silicon nitride feature may be removed by placing the integrated circuit in a two-step oxidized layer etch tool and removing a surface layer of oxidized silicon from the sacrificial silicon... Agent:

20140187011 - Methods for forming finfets with self-aligned source/drain: A method includes forming a gate stack to cover a middle portion of a semiconductor fin, and doping an exposed portion of the semiconductor fin with an n-type impurity to form an n-type doped region. At least a portion of the middle portion is protected by the gate stack from... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140187012 - Customized shield plate for a field effect transistor: A customized shield plate field effect transistor (FET) includes a semiconductor layer, a gate dielectric, a gate electrode, and at least one customized shield plate. The shield plate includes a conductive layer overlying a portion of the gate electrode, one of the gate electrode sidewalls, and a portion of the... Agent: Freescale Semiconductor, Inc.

20140187013 - Methods for forming finfets having multiple threshold voltages: A method includes forming a first and a second gate stack to cover a first and a second middle portion of a first and a second semiconductor fin, respectively, and performing implantations to implant exposed portions of the first and the second semiconductor fins to form a first and a... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140187014 - Methods for forming bipolar transistors: Methods are provided for forming a device that includes merged vertical and lateral transistors with collector regions of a first conductivity type between upper and lower base regions of opposite conductivity type that are Ohmically coupled via intermediate regions of the same conductivity type and to the base contact. The... Agent: Freescale Semiconductor, Inc.

20140187016 - High work function, manufacturable top electrode: Provided are MIM DRAM capacitors and methods of forming thereof. A MIM DRAM capacitor may include an electrode layer formed from a high work function material (e.g., greater than about 5.0 eV). This layer may be used to reduce the leakage current through the capacitor. The capacitor may also include... Agent: Intermolecular, Inc.

20140187015 - Methods to improve leakage for zro2 based high k mim capacitor: A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive base layer and conductive metal oxide layer. A second electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the second electrode layer contains a conductive base layer and... Agent: Intermolecular, Inc.

20140187017 - Process of preparing a gap filler agent, a gap filler agent prepared using same, and a method for manufacturing semiconductor capacitor using the gap filler agent: A method of preparing a gap filler agent includes adding a halosilane to a basic solvent, and, to the basic solvent and the halosilane, adding ammonia in an amount of about 50 to about 70 parts by weight based on 100 parts by weight of the halosilane at a rate... Agent:

20140187018 - Methods for reproducible flash layer deposition: A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a flash layer between the dielectric layer and the first electrode layer. A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a capping layer between the dielectric layer and the second electrode layer.... Agent: Intermolecular, Inc.

20140187019 - Deposit/etch for tapered oxide: A process for fabricating a tapered field plate dielectric for high-voltage semiconductor devices is disclosed. The process may include depositing a thin layer of oxide, depositing a polysilicon hard mask, depositing a resist layer and etching a trench area, performing deep silicon trench etch, and stripping the resist layer. The... Agent: Power Integrations, Inc.

20140187020 - Method for low temperature layer transfer in the preparation of multilayer semicondutor devices: A method of preparing a monocrystalline donor substrate, the method comprising (a) implanting helium ions through the front surface of the monocrystalline donor substrate to an average depth D1 as measured from the front surface toward the central plane; (b) implanting hydrogen ions through the front surface of the monocrystalline... Agent:

20140187021 - Method of healing defect at junction of semiconductor device using germanium: This invention relates to a method of healing defects at junctions of a semiconductor device, which includes growing a p-Ge layer on a substrate, performing ion implantation on the p-Ge layer to form an n+ Ge region or performing in-situ doping on the p-Ge layer and then etching to form... Agent: Korea Advanced Nano Fab Center

20140187023 - Processes and apparatus for preparing heterostructures with reduced strain by radial compression: Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that conforms to a surface layer having a different crystal lattice constant than the structure to form a relatively low-defect heterostructure.... Agent: Sunedison, Inc.

20140187022 - Processes and apparatus for preparing heterostructures with reduced strain by radial distension: Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that conforms to a surface layer having a different crystal lattice constant than the structure to form a relatively low-defect heterostructure.... Agent: Sunedison, Inc.

20140187024 - Method of forming seed layer, method of forming silicon film, and film forming apparatus: Provided is a method of forming a seed layer as a seed of a thin film on an underlayer, which includes: forming a first seed layer on a surface of the underlayer by heating the underlayer, followed by supplying an aminosilane-based gas onto the surface of the heated underlayer; and... Agent: Tokyo Electron Limited

20140187025 - Method of forming silicon film and film forming apparatus: Provided is a method of forming a film including a silicon film on a base, including: forming a seed layer on a surface of the base by heating the base and supplying an aminosilane-based gas onto the surface of the heated base; and forming the silicon film on the seed... Agent: Tokyo Electron Limited

20140187026 - Method of manufacture of an optoelectronic device and an optoelectronic device manufactured using the method: A method of manufacture of an optoelectronic device includes the steps of: providing or forming a body of crystalline silicon containing substitutional carbon atoms, and irradiating said body of crystalline silicon with protons (H+) to create radiative defect centres in a photoactive region of the device, wherein at least some... Agent: The University Of Surrey

20140187027 - Ion implantation methods: Provided are methods of forming an ion implanted region in a semiconductor device. The methods comprise: (a) providing a semiconductor substrate having a plurality of regions to be ion implanted; (b) forming a photoresist pattern on the semiconductor substrate, wherein the photoresist pattern is formed from a chemically amplified photoresist... Agent:

20140187028 - Concurrently forming nfet and pfet gate dielectric layers: Embodiments include methods of forming an nFET-tuned gate dielectric and a pFET-tuned gate dielectric. Methods may include forming a high-k layer above a substrate having a pFET region and an nFET region, forming a first sacrificial layer, a pFET work-function metal layer, and a second sacrificial layer above the first... Agent: International Business Machines Corporation

20140187029 - Vertical type memory device: A method of fabricating a semiconductor device, comprising: forming a plurality of memory cell strings; coupling an interconnection to at least two of the memory cell strings; and coupling a bitline to the interconnection. The interconnection includes a body extending along a first direction and a protrusion protruding from the... Agent:

20140187030 - Semiconductor device with dual work function gate stacks and method for fabricating the same: A method for fabricating a semiconductor device includes forming a gate dielectric layer over a substrate; forming a metal containing layer, containing an effective work function adjust species, over the gate dielectric layer; forming an anti-reaction layer over the metal containing layer; increasing an amount of the effective work function... Agent: Sk Hynix Inc.

20140187031 - Semiconductor device with recess gate and method for fabricating the same: A method for fabricating a semiconductor device includes forming a conductive layer over first and second regions of a semiconductor substrate, forming a trench extended in the first region of the semiconductor substrate through the conductive layer, forming a recessed gate electrode in the trench, doping the conductive layer and... Agent: Sk Hynix Inc.

20140187032 - Method for fabricating memory device: A method for fabricating a memory device of this invention includes at least the following steps. A tunnel dielectric layer is formed over a substrate. A gate is fowled over the tunnel dielectric layer. At least one charge storage layer is formed between the gate and the tunnel dielectric layer.... Agent: Macronix International Co., Ltd.

20140187033 - Method of manufacturing interconnection and semiconductor device: A method of manufacturing an interconnection of an embodiment includes: forming a via which penetrates an interlayer insulation film on a substrate; forming an underlying film in the via; removing the underlying film on a bottom part of the via; forming a catalyst metal inactivation film on the underlying film;... Agent: Kabushiki Kaisha Toshiba

20140187034 - Integrated circuit chip with pyramid or cone-shaped conductive pads for flexible c4 connections and a method of forming the integrated circuit chip: Disclosed is a chip and method of forming the chip with improved conductive pads that allow for flexible C4 connections with a chip carrier or with another integrated circuit chip. The pads have a three-dimensional geometric shape (e.g., a pyramid or cone shape) with a base adjacent to the surface... Agent: International Business Machines Corporation

20140187035 - Method of etching a porous dielectric material: The invention relates to a method of etching a layer of porous dielectric material, characterized in that the etching is performed in a plasma formed from at least one silicon-based gas mixed with oxygen (O2) and/or nitrogen (N2) so as to grow a passivation layer all along said etching, at... Agent: Cnrs Centre National De La Recherche Scientifique

20140187036 - Integration of ru wet etch and cmp for beol interconnects with ru layer: Embodiments described herein provide approaches for interconnect formation in a semiconductor device. Specifically, a Cu layer is removed to a top surface of an Ru layer using CMP, the Cu layer is removed to form a recess within each of a plurality of trenches of a dielectric of the semiconductor... Agent: Globalfoundries Inc.

20140187037 - Semiconductor device with self-aligned air gap and method for fabricating the same: A method for fabricating a semiconductor device includes forming a plurality of semiconductor structures over a substrate, forming an interlayer dielectric layer over the semiconductor structures, etching the interlayer dielectric layer, and defining open parts between the semiconductor structures to expose a surface of the substrate, forming sacrificial spacers on... Agent: Sk Hynix Inc.

20140187038 - High temperature tungsten metallization process: Embodiments of the invention provide an improved process for depositing tungsten-containing materials. In one embodiment, the method for forming a tungsten-containing material on a substrate includes forming an adhesion layer containing titanium nitride on a dielectric layer disposed on a substrate, forming a tungsten nitride intermediate layer on the adhesion... Agent: Applied Materials, Inc.

20140187039 - Method for tuning the effective work function of a gate structure in a semiconductor device: A method for tuning the effective work function of a gate structure in a semiconductor device is described. The semiconductor device is part of an integrated circuit and the gate structure has a metal layer and a high-k dielectric layer separating the metal layer from an active layer of the... Agent: Imec

20140187040 - 3d ic method and device: A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to... Agent: Ziptronix, Inc.

20140187041 - High dose ion-implanted photoresist removal using organic solvent and transition metal mixtures: Provided are methods for processing semiconductor substrates to remove high-dose ion implanted (HDI) photoresist structures without damaging other structures made of titanium nitride, tantalum nitride, hafnium oxide, and/or hafnium silicon oxide. The removal is performed using a mixture of an organic solvent, an oxidant, a metal-based catalyst, and one of... Agent: Intermolecular Inc.

20140187042 - Method for chemical planarization and chemical planarization apparatus: According to one embodiment, a method is disclosed for chemical planarization. The method can include forming a surface layer on a to-be-processed film having irregularity. The surface layer binds to or adsorbs onto the to-be-processed film along the irregularity to suppress dissolution of the to-be-processed film. The method can include... Agent: Kabushiki Kaisha Toshiba

20140187043 - Polishing agent and polishing method: A non-oxide single-crystal substrate such as a silicon carbide single-crystal substrate is polished at a high polishing rate, whereby a smooth surface is obtained. There is provided a polishing agent containing: an oxidant that contains a transition metal and has a redox potential of 0.5 V or more; silica particles... Agent: Asahi Glass Company, Limited

20140187044 - Addition of carboxyl groups plasma during etching for interconnect reliability enhancement: The present disclosure is directed to a method of manufacturing a semiconductor structure in which a low-k dielectric layer is formed over a semiconductor substrate. Features can be formed proximate to the low-k dielectric layer by plasma etching with a plasma formed of a mixture of a CO2, CO, or... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140187045 - Silicon nitride gapfill implementing high density plasma: Methods of filling features with silicon nitride using high-density plasma chemical vapor deposition are described. Narrow trenches may be filled with gapfill silicon nitride without damaging compressive stress. A low but non-zero bias power is used during deposition of the gapfill silicon nitride. An etch step is included between each... Agent: Applied Materials, Inc.

20140187046 - Method for forming spacers for a transitor gate: t

20140187047 - Patterning process method for semiconductor devices: A method for forming a semiconductor device that includes a SiARC layer formed over a photoresist film which is formed over spacer portions which are formed on a spacer assist layer which is formed over a hard mask layer. The SiARC layer has an etch rate substantially similar to the... Agent: Renesas Electronics Corporation

20140187048 - Plasma etching method: An object of the present invention is to provide a plasma etching method capable of forming a tapered recess portion in a wide-gap semiconductor substrate. As a solving means therefor, a high speed etching film E an etching speed of which is higher than that of a wide-gap semiconductor substrate... Agent: Spp Technologies Co., Ltd.

20140187049 - Showerhead electrode assembly with gas flow modification for extended electrode life: A showerhead electrode assembly for a plasma processing apparatus is provided. The showerhead electrode assembly includes a first member attached to a second member. The first and second members have first and second gas passages in fluid communication. When a process gas is flowed through the gas passages, a total... Agent: Lam Research Corporation

20140187050 - Method for isotropic etching: s

20140187051 - Poly removal for replacement gate with an apm mixture: A method for removing poly-silicon dummy gate structures using an ammonium hydroxide-hydrogen peroxide-water (APM) solution with concentrations between 1:10:20 and 1:1:2 and at temperatures between 20 C and 80 C for times between 1 minute and 60 minutes.... Agent: Intermolecular Inc.

20140187052 - Selective etching of hafnium oxide using diluted hydrofluoric acid: Provided are methods for processing semiconductor substrates having hafnium oxide structures as well as silicon nitride and/or silicon oxide structures. Etching solutions and processing conditions described herein provide high etching selectivity of hafnium oxide relative to these other materials. As such, the hafnium oxide structures can be removed (partially or... Agent: Intermolecular Inc.

20140187053 - Method of cleaning thin film forming apparatus, thin film forming method, thin film forming apparatus and non-transitory recording medium: A method of cleaning a thin film forming apparatus wherein a process for supplying a film forming gas into a reaction tube of the thin film forming apparatus to form a thin film on an object to be processed is repeated more than one time and then a cleaning gas... Agent: Tokyo Electron Limited

20140187054 - Methods of patterning block copolymer layers: A method of patterning a block copolymer layer includes: providing a guide pattern on a surface of a substrate, the guide pattern including sidewalls each elongated in a longitudinal direction and spaced apart from each other, a trench defined by a bottom surface and facing surfaces of the sidewalls, and... Agent: Samsung Electronics Co., Ltd.

20140187055 - Short pulse fiber laser for ltps crystallization: Laser pulses from pulsed fiber lasers are directed to an amorphous silicon layer to produce a polysilicon layer comprising a disordered arrangement of crystalline regions by repeated melting and recrystallization. Laser pulse durations of about 0.5 to 5 ns at wavelength range between about 500 nm and 1000 nm, at... Agent: Nlight Photonics Corporation

20140187056 - Multi charged particle beam writing apparatus and multi charged particle beam writing method: In accordance with one aspect of this invention, a multi charged particle beam writing apparatus includes an aperture member, in which a plurality of openings are formed, configured to form multi-beams by making portions of the charged particle beam pass through the plurality of openings; a plurality of blankers configured... Agent: Nuflare Technology, Inc.

  
06/26/2014 > 99 patent applications in 75 patent subcategories.

20140179026 - Method for generating quantized anomalous hall effect: A method for generating quantum anomalous Hall effect is provided. A topological insulator quantum well film in 3QL to 5QL is formed on an insulating substrate. The topological insulator quantum well film is doped with a first element and a second element to form the magnetically doped topological insulator quantum... Agent: Tsinghua University

20140179027 - Adjusting intensity of laser beam during laser operation on a semiconductor device: Among other things, a system and method for adjusting the intensity of a laser beam applied to a semiconductor device are provided for herein. A sensor is configured to measure the intensity of a laser beam reflected from the semiconductor device. Based upon the reflection intensity, an intensity of the... Agent: Taiwan Semiconductor Manufacturing Company Limited

20140179029 - Method of processing a semiconductor structure: A method according to embodiments of the invention includes providing a wafer including a semiconductor structure grown on a growth substrate, the semiconductor structure comprising a III-nitride light emitting layer sandwiched between an n-type region and a p-type region. The wafer is bonded to a second substrate. The growth substrate... Agent: Koninklijke Philips Electronics N.v.

20140179028 - Plasma doping apparatus and plasma doping method: Disclosed is a plasma doping apparatus provided with a plasma generating mechanism. The plasma generating mechanism includes a microwave generator that generates microwave for plasma excitation, a dielectric window that transmits the microwave generated by the microwave generator into a processing container, and a radial line slot antenna formed with... Agent: Tokyo Electron Limited

20140179030 - Dissolution rate monitor: A multiple channel site-isolated reactor system and method are described. The system contains a reactor block with a plurality of reactors. Input lines are coupled to each reactor to provide a fluid to the respective reactors. A sealing element associated with each reactor contacts a surface of a substrate disposed... Agent: Intermolecular, Inc.

20140179031 - Designed asperity contactors, including nanospikes, for semiconductor test using a package, and associated systems and methods: Nanospike contactors suitable for semiconductor device test, and associated systems and methods are disclosed. A representative apparatus includes a package having a wafer side positioned to face toward a device under test and an inquiry side facing away from the wafer side. A plurality of wafer side sites are carried... Agent: Advanced Inquiry Systems, Inc.

20140179032 - Method of manufacturing semiconductor device: Provided is a method of manufacturing a semiconductor device including a step of testing every one of through-electrodes. A second probe test is conducted to check an electrical coupling state between a plurality of copper post bumps formed on the side of the surface of a wafer and electrically coupled... Agent: Renesas Electronics Corporation

20140179033 - Methods for forming templated materials: Methods of forming layers can comprise defining a plurality of discrete site-isolated regions (SIRs) on a substrate, forming a first layer on one of the discrete SIRs, forming a second layer on the first layer, measuring a lattice parameter or an electrical property of the second layer, The process parameters... Agent: Intermolecular, Inc.

20140179036 - Method and system for heterogeneous substrate bonding for photonic integration: A method of fabricating a composite integrated optical device includes providing a substrate comprising a silicon layer, forming a waveguide in the silicon layer, and forming a layer comprising a metal material coupled to the silicon layer. The method also includes providing an optical detector, forming a metal-assisted bond between... Agent: Skorpios Technologies, Inc.

20140179035 - Method for dispensing glue on led chip: A method for dispensing glue on an LED chip includes following steps: providing a glue dispensing device which includes a syringe, a needle head communicating with the syringe, and a valve mounted on the needle head for controlling flowing of content in the syringe out of the syringe, wherein the... Agent: Hon Hai Precision Industry Co., Ltd.

20140179034 - Semiconductor photonic package: A method for assembling a semiconductor photonic package device includes bonding a portion of a first surface of a semiconductor die portion to a portion of a carrier portion, bonding a single mode optical ferrule portion to a portion of the first surface of the semiconductor die portion, and disposing... Agent: International Business Machines Corporation

20140179039 - Method for manufacturing light emitting diode module: A method for manufacturing an LED module includes following steps: providing a SMT (Surface Mount Technology) apparatus having a CCD (Charge-Coupled Device) image sensor and a nozzle, and providing a PCB and fixing the PCB in the SMT apparatus; providing a plurality of LEDs and mounting the LEDs on the... Agent:

20140179037 - Method for manufcturing backlight module: A method for manufacturing a backlight module comprises following steps: providing a substrate; providing a flip chip LED and mounting the flip chip LED on a top surface of the substrate to electrically connect with two electrodes via flip chip bonding; providing a frame and mounting the frame on the... Agent: Hon Hai Precision Industry Co., Ltd.

20140179038 - Method for manufcturing light emitting diode package: A method for manufacturing an LED package comprising following steps: providing a substrate and an LED chip mounted on the substrate; providing glue and arranging the glue on a periphery of the substrate and drying the glue to form a blocking loop to enclose the LED chip therein; and injecting... Agent:

20140179040 - Multilayer film for encapsulating oxygen and/or moisture sensitive electronic devices: The present invention relates to a multilayer barrier film capable of encapsulating a moisture and/or oxygen sensitive electronic or optoelectronic device, the barrier film including at least one nanostructured layer including reactive nanoparticles capable of interacting with moisture and/or oxygen, the reactive nanoparticles being distributed within a polymeric binder, and... Agent: Agency For Science, Technology And Research

20140179041 - Apparatus and method for manufacturing thin film encapsulation: An apparatus and method for manufacturing a thin film encapsulation includes: a first cluster configured to form a first inorganic layer on a display substrate using a sputtering process; a second cluster configured to form a first organic layer on the first inorganic layer on the display substrate using a... Agent: Samsung Display Co., Ltd.

20140179042 - Light-emitting diode manufacturing method: A light-emitting diode manufacturing method comprises steps of: providing a flexible material layer having a flexible reflective layer and phosphor glue in the flexible reflective layer; providing a hard material layer having a substrate and an LED chip on the substrate; combining the flexible material layer and the hard material... Agent: Advanced Optoelectronic Technology, Inc.

20140179043 - Method of separating substrate and method of fabricating semiconductor device using the same: A method of fabricating a semiconductor device, the method including: forming a first mask pattern including a masking region and an open region on a substrate; forming a sacrificial layer to cover the substrate and the first mask pattern; patterning the sacrificial layer to form a seed layer and to... Agent: Seoul Viosys Co., Ltd.

20140179044 - Method of manufacturing organic light emitting diode display: An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy... Agent: Samsung Display Co., Ltd.

20140179045 - Transparent conductive electrode stack containing carbon-containing material: A transparent conductive electrode stack containing a work function adjusted carbon-containing material is provided. Specifically, the transparent conductive electrode stack includes a layer of a carbon-containing material and a layer of a work function modifying material. The presence of the work function modifying material in the transparent conductive electrode stack... Agent: International Business Machines Corporation

20140179046 - Semiconductor nanocrystal probes for biological applications and process for making and using such probes: A semiconductor nanocrystal compound and probe are described. The compound is capable of linking to one or more affinity molecules. The compound comprises (1) one or more semiconductor nanocrystals capable of, in response to exposure to a first energy, providing a second energy, and (2) one or more linking agents,... Agent: The Regents Of The University Of California

20140179047 - Field effect transistor-based bio-sensor: An apparatus comprises: a sensing element formed on a buried oxide layer of a substrate and providing communication between a source region and a drain region; a gate dielectric layer on the sensing element, the gate dielectric layer defining a sensing surface on the sensing element; a passive surface surrounding... Agent: International Business Machines Corporation

20140179048 - Method for preparing absorbing layer of solar cell and thermal treatment device thereof: A method for preparing an absorbing layer of a solar cell includes the following steps. An absorbing layer precursor containing at least one group XIV element is loaded on a substrate. A solid vapor source containing a group XIV element, the same as the group XIV element in the absorbing... Agent:

20140179049 - Silicon/germanium-based nanoparticle pastes with ultra low metal contamination: Silicon based nanoparticle inks are described with very low metal contamination levels. In particular, metal contamination levels can be established in the parts-per-billion range. The inks of particular interest generally comprise a polymer to influence the ink rheology. Techniques are described that are suitable for purifying polymers soluble in polar... Agent:

20140179050 - Module assembly for thin solar cells: Solar cells are packaged by placing the solar cells between sheets of encapsulants. The encapsulants are exposed to ultraviolet (UV) light to cure the encapsulants and bond the encapsulants together to encapsulate the solar cells. The UV curing steps may be performed to bond one of the encapsulants to a... Agent:

20140179051 - Method of manufacturing an organic light-emitting display device: A method of forming an organic light-emitting display in which a pixel electrode is formed by extending from source and drain electrodes, a capacitor including a thin upper capacitor electrode formed below the pixel electrode and constituting a metal-insulator-metal (MIM) CAP structure, thereby simplifying manufacturing processes, increasing an aperture ratio,... Agent: Samsung Display Co., Ltd.

20140179052 - Method of forming a thin film and an electronic device: A method of forming a thin film includes coating one side of a transferring stamp including a hydrophilic polymer layer with a hydrophilic solution to form a transfer layer, and transferring the transfer layer to the substrate.... Agent: Research & Business Foundation Of Sungkyunkwan University

20140179053 - Method for fabricating absorbing layer of solar cell and thermal treatment device thereof: A method for fabricating an absorbing layer of a solar cell and a thermal treatment device thereof adapted for forming an absorbing layer on a substrate are disclosed. The method includes the following steps. First, a solid-phase vapor source in a chamber and an absorbing layer precursor on a substrate... Agent: Industrial Technology Research Institute

20140179054 - Method for forming patterns of differently doped regions: The disclosed technology generally relates to forming patterns of doped semiconductor regions, and more particularly to methods of forming such patterns in fabricating photovoltaic devices. In one aspect, a method of forming a pattern of different doped regions at the same side of a semiconductor substrate comprises providing a patterned... Agent: Imec

20140179055 - Method for producing photoelectric conversion element and method for producing imaging device: The method produces a photoelectric conversion element comprising a lower electrode, an electron blocking layer, a photoelectric conversion layer, an upper electrode, and a sealing layer which are laminated on one another in this order. The method includes a step of forming a transparent conductive oxide into a film at... Agent: Fujifilm Corporation

20140179056 - Laser-absorbing seed layer for solar cell conductive contact: Laser-absorbing seed layers for solar cell conductive contacts and methods of forming solar cell conductive contacts are described. For example, a method of fabricating a solar cell includes forming a metal seed paste above a substrate. The metal seed paste includes a laser-absorbing species. The metal seed paste is irradiated... Agent:

20140179057 - Method for manufacturing oxide semiconductor layer and thin film transistor having oxide semiconductor layer: A method for manufacturing an oxide semiconductor layer includes following steps: providing a substrate; forming an oxide semiconductor layer on the substrate by sputtering a first kind of metallic ions from a first metallic oxide sputtering target, and sputtering at least two second kinds of metallic ions from a second... Agent: Hon Hai Precision Industry Co., Ltd.

20140179058 - Method for manufacturing semiconductor device: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor,... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140179059 - Package-level integrated circuit connection without top metal pads or bonding wire: An integrated circuit method is provided with package-level connectivity, between internal electronic circuitry thereof and contact points on a package substrate thereof, without requiring top metal pads or bonding wires.... Agent: Mosaid Technologies Incorporated

20140179060 - In situ-built pin-grid arrays for coreless substrates, and methods of making same: A coreless pin-grid array (PGA) substrate includes PGA pins that are integral to the PGA substrate without the use of solder. A process of making the coreless PGA substrate integrates the PGA pins by forming a build-up layer upon the PGA pins such that vias make direct contact to pin... Agent:

20140179061 - Thin wafer handling: A first area of a first surface of an encapsulated component can be thinned, the component including: a semiconductor chip having an active surface opposite the first surface, and an encapsulant extending outwardly from edges of the semiconductor chip. An entire area of the active surface may be aligned with... Agent: Invensas Corporation

20140179062 - Isolation rings for packages and the method of forming the same: A device includes a first package component, and a second package component underlying, and bonded to, the first package component. A molding material is disposed under the first package component and molded to the first and the second package components, wherein the molding material and the first package component form... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140179063 - Resin sealing type semiconductor device and method of manufacturing the same, and lead frame: The invention is directed to firm bonding between semiconductor dies etc bonded to a lead frame and wire-bonding portions of the lead frame by ultrasonic Al wire bonding, and the prevention of shortcircuit between the semiconductor dies etc due to a remaining portion of the outer frame of the lead... Agent: Semiconductor Components Industries, LLC

20140179064 - Method for fabricating a package-in-package for high heat dissipation: A method for fabricating a semiconductor system starts with providing a first component including a first semiconductor chip attached to a pad of a first metal leadframe made of a first metal sheet of high thermal conductivity. A second component including a second semiconductor chip attached to a pad of... Agent: Texas Instruments Incorporated

20140179065 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device includes attaching a curable film to a first connection member including a first circuit terminal, attaching a conductive film to a second connection member including a second circuit terminal, and thermally compressing the first connection member to the second connection member, with the... Agent:

20140179066 - Packaging structure: A method of assembling a packaging structure is provided and includes directly electrically interconnecting respective active surfaces of first and second chips in a face-to-face arrangement, electrically interconnecting at least one of the respective sidewalls of the first and second chips to a common chip and orienting the respective active... Agent: International Business Machines Corporation

20140179067 - Fabrication method of semiconductor package: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into... Agent: Siliconware Precision Industries Co., Ltd.

20140179068 - Non-volatile memory having 3d array of read/write elements with low current structures and methods thereof: A three-dimensional array read/write (R/W) memory elements is formed across multiple layers of planes positioned at different distances above a semiconductor substrate. It is preferable to operate the R/W elements with low current and high resistive states. The resistance of these resistive states depends also on the dimension of the... Agent: Sandisk 3d LLC

20140179069 - Fabrication method of semiconductor apparatus: A method of fabricating a semiconductor apparatus includes forming an insulating layer on a semiconductor substrate, forming a source post in the insulating layer, and forming a semiconductor layer over the source post and the insulating layer.... Agent: Sk Hynix Inc.

20140179070 - Anti-fuses on semiconductor fins: A device includes a substrate, isolation regions at a surface of the substrate, and a semiconductor region over a top surface of the isolation regions. A conductive feature is disposed over the top surface of the isolation regions, wherein the conductive feature is adjacent to the semiconductor region. A dielectric... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140179071 - Two-step shallow trench isolation (sti) process: Methods of making an integrated circuit are disclosed. An embodiment method includes etching a trench in a silicon substrate, depositing a first layer of isolation material in the trench, the first layer of isolation material projecting above surface of the silicon substrate, capping the first layer of isolation material by... Agent:

20140179072 - Semiconductor device having epitaxial semiconductor layer above impurity layer: The semiconductor device includes a first transistor including a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, and... Agent: Fujitsu Semiconductor Limited

20140179073 - Semiconductor devices and methods of manufacturing the same: A method of manufacturing a semiconductor device may include: forming active patterns of pillar-shapes upward protruding from a substrate, the active patterns fully doped with dopants of one conductivity type; forming a gate electrode extending in one direction, the gate electrode overlapped with sidewalls of the active patterns; and forming... Agent: Samsung Electronics Co., Ltd.

20140179074 - Method of making mosfet integrated with schottky diode with simplified one-time top-contact trench etching: Method for fabricating MOSFET integrated with Schottky diode (MOSFET/SKY) is disclosed. Gate trench is formed in an epitaxial layer overlaying semiconductor substrate, gate material is deposited therein. Body, source, dielectric regions are successively formed upon epitaxial layer and the gate trench. Top contact trench (TCT) is etched with vertical side... Agent:

20140179075 - Semiconductor device and method for manufacturing same: According to one embodiment, a method for manufacturing a semiconductor device includes: forming a plurality of trenches; forming a gate insulating film; burying a gate electrode; burying an insulating member; projecting the insulating member; forming a base layer; forming a mask film; forming a first semiconductor layer; forming a carrier... Agent: Kabushiki Kaisha Toshiba

20140179076 - Manufacturing method of semiconductor device: When forming, over the substrate by the gate-last process, a MOSFET of a core region driven by a first power supply voltage and a MOSFET of a high-voltage region driven by a second power supply voltage higher than the first power supply voltage, the thickness of the hard mask film... Agent: Renesas Electronics Corporation

20140179077 - Method of forming semiconductor device including silicide layers: A method includes forming a gate structure on a semiconductor material region, wherein the gate structure includes spacer elements abutting a gate electrode layer. The gate electrode layer is etched to provide a recess. A hard mask layer is formed over the gate electrode layer in the recess. Silicide layers... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140179078 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes: forming a silicon nitride film having a refractive index equal to or larger than 2.2 on a nitride semiconductor layer; and introducing at least one of elements that are oxygen, nitrogen, fluorine, phosphorus, sulfur and selenium into the silicon nitride film, the... Agent: Sumitomo Electric Device Innovations, Inc.

20140179080 - High voltage device with reduced leakage: A semiconductor device is provided which includes a semiconductor substrate, a gate structure formed on the substrate, sidewall spacers formed on each side of the gate structure, a source and a drain formed in the substrate on either side of the gate structure, the source and drain having a first... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140179079 - Manufacturing method of lateral double diffused metal oxide semiconductor device: The present invention discloses a manufacturing method of a lateral double diffused metal oxide semiconductor (LDMOS) device. The LDMOS device includes: a substrate, an epitaxial layer, a first conductivity type channel stop region, a first conductivity type top region, an isolation oxide region, a field oxide region, a first conductivity... Agent: Richtek Technology Corporation, R.o.c.

20140179081 - Semiconductor device manufacturing method: A semiconductor manufacturing method includes exposing on a photoresist film a first partial pattern of a contact hole, overlapping a part of a gate interconnection in alignment with an alignment mark formed simultaneously with forming the gate interconnection, exposing on the photoresist film a second partial pattern, overlapping a part... Agent: Fujitsu Semiconductor Limited

20140179082 - Selective etching of hafnium oxide using non-aqueous solutions: Provided are methods for processing semiconductor substrates having hafnium oxide structures as well as one or more of silicon nitride, silicon oxide, polysilicon, and titanium nitride structures. Selected etching solution compositions and processing conditions provide high etching selectivity of hafnium oxide relative to these other materials. As such, hafnium oxide... Agent: Intermolecular Inc.

20140179083 - High die strength semiconductor wafer processing method and system: Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor... Agent: Nxp B.v.

20140179084 - Wafer dicing from wafer backside: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to... Agent:

20140179086 - Method of manufacturing semiconductor device, method of processing substrate, substrate processing apparatus and computer-readable recording medium: A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number... Agent: Hitachi Kokusai Electric Inc.

20140179085 - Method of manufacturing semiconductor device, substrate processing apparatus, and non-transitory computer-readable recording medium: A method of manufacturing a semiconductor device can enhance controllability of the diameters of grains of a film containing a predetermined element such as a silicon film when the film is formed. The method includes (a) forming a seed layer containing a predetermined element and carbon on a substrate by... Agent: Hitachi Kokusai Electric Inc.

20140179087 - Nanoelectronic structure and method of producing such: The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection... Agent: Qunano Abl

20140179088 - Method for manufacturing semiconductor substrate: The inventive concept provides methods for manufacturing a semiconductor substrate. The method may include forming a stop pattern surrounding an edge of a substrate, forming a transition layer an entire top surface of the substrate except the stop pattern, and forming an epitaxial semiconductor layer on the transition layer and... Agent: Electronics And Telecommunications Research Institute

20140179089 - Process for producing at least one silicon-based nanoelement in a silicon oxide section and process for the manufacture of a device employing the production process: The process for the production of at least one silicon-based nanoelement (4), in particular a nanowire, comprises the following stages: providing a substrate comprising, at the surface, a first layer (1) comprising electrically doped silicon; forming, on the first layer (1), a second layer (2) based on silicon oxide with... Agent:

20140179090 - Storage and sub-atmospheric delivery of dopant compositions for carbon ion implantation: A supply source for delivery of a CO-containing dopant gas composition is provided. The composition includes a controlled amount of a diluent gas mixture such as xenon and hydrogen, which are each provided at controlled volumetric ratios to ensure optimal carbon ion implantation performance. The composition can be packaged as... Agent:

20140179091 - Method for forming ultra-shallow doping regions by solid phase diffusion: A method for forming ultra-shallow dopant regions in a substrate is provided. One embodiment includes depositing a first dopant layer containing a first dopant in direct contact with the substrate, patterning the first dopant layer, depositing a second dopant layer containing a second dopant in direct contact with the substrate... Agent: Tokyo Electron Limited

20140179092 - Method for forming void-free polysilicon and method for fabricating semiconductor device using the same: A method for fabricating a semiconductor device includes forming a buried gate electrode in a semiconductor substrate. An insulating layer is formed over the buried gate electrode and is etched to form a contact hole exposing the semiconductor substrate. A sacrificial spacer is formed on sidewalls of the insulating layer... Agent: Sk Hynix Inc.

20140179093 - Gate structure formation processes: Gate structures and methods of fabricating gate structures of semiconductor devices are provided. One method includes, for instance: providing a sacrificial layer over a substrate; patterning the sacrificial layer to form a gate opening within the sacrificial layer; providing a gate structure within the gate opening in the sacrificial layer;... Agent: Globalfoundries, Inc.

20140179094 - Semiconductor device having field plate electrode and method for manufacturing the same: According to one embodiment, in a semiconductor device, a first semiconductor layer of a first conductivity type has a first impurity concentration. A second semiconductor layer of the first conductivity type is formed on the first semiconductor layer and has a second impurity concentration lower than the first impurity concentration.... Agent: Kabushiki Kaisha Toshiba

20140179096 - Method of manufacturing semiconductor device: A semiconductor device includes a substrate including a first region and a second region, a gate group disposed in the first region of the substrate, the gate group including a plurality of cell gate patterns and at least one selection gate pattern, a first gate pattern disposed in the second... Agent: Samsung Electronics Co., Ltd.

20140179095 - Methods and systems for controlling gate dielectric interfaces of mosfets: Embodiments provided herein describe methods and systems for forming gate dielectrics for field effect transistors. A substrate including a germanium channel and a germanium oxide layer on a surface of the germanium channel is provided. A metallic layer is deposited on the germanium oxide layer. The metallic layer may be... Agent: Intermolecular, Inc.

20140179097 - Deposition apparatus and method: A method for filling features in a layer over a substrate is provided. A dispersion of nanoparticles less than 5 nm is placed on the layer. The liquid is frozen by lowering a temperature of the liquid. The frozen liquid is sublimated by decreasing pressure and subsequently heating the frozen... Agent: Lam Research Corporation

20140179098 - Semiconductor device and method of manufacturing semiconductor device: The semiconductor device includes a capacitor including a plurality of interconnection layers stacked over each other, the plurality of interconnection layers each including a plurality of electrode patterns extended in a first direction, a plurality of via parts provided between the plurality of interconnection layers and electrically interconnecting the plurality... Agent: Fujitsu Semiconductor Limited

20140179099 - Methods and structure for carrier-less thin wafer handling: Methods of forming a microelectronic assembly and the resulting structures and devices are disclosed herein. In one embodiment, a method of forming a microelectronic assembly includes removing material exposed at portions of a surface of a substrate to form a processed substrate having a plurality of thinned portions separated by... Agent: Invensas Corporation

20140179100 - Method to control depth profiles of dopants using a remote plasma source: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of... Agent: Intermolecular, Inc.

20140179101 - Semiconductor device with air gap and method for fabricating the same: A method for fabricating a semiconductor device includes forming a semiconductor structure having an open portion over a substrate, forming a sacrificial spacer on sidewalls of the open portion, forming a recessed first plug in the open portion, forming an air gap by removing the sacrificial spacer, forming a capping... Agent: Sk Hynix Inc.

20140179102 - Semiconductor device with air gaps and method for fabricating the same: A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers on sidewalls of the contact holes, forming first plugs recessed inside the contact holes, forming air gaps by removing the sacrificial... Agent: Sk Hynix Inc.

20140179103 - Semiconductor devices having through-vias and methods for fabricating the same: A conductive via of a semiconductor device is provided extending in a vertical direction through a substrate, a first end of the conductive via extending through a first surface of the substrate, so that the first end protrudes in the vertical direction relative to the first surface of the substrate.... Agent:

20140179104 - Method of depositing a film: A method of depositing a film using an atomic layer deposition (ALD) method while rotating a turntable provided inside a chamber and including a substrate mounting portion, onto which a substrate can be mounted, to cause the substrate to pass through first and second process areas, into which different gases... Agent: Tokyo Electron Limited

20140179105 - Heteroleptic (allyl)(pyrroles-2-aldiminate) metal-containing precursors, their synthesis and vapor deposition thereof to deposit metal-containing films: Disclosed are metal-containing precursors having the formula Compound (I) wherein: —M is a metal selected from Ni, Co, Mn, Pd; and —each of R-1, R2, R3, R4, R5, R6, R7, R8, R9, and R10 are independently selected from H; a C1-C4 linear, branched, or cyclic alkyl group; a C1-C4 linear,... Agent: L'air Liquide, Soci&#xe9 T&#xe9 Anonyme Pour I'etude Et I'exploitation Des Proc&#xe9 D&#xe9 S Georges Claude

20140179106 - In-situ metal residue clean: A method for forming devices in an oxide layer over a substrate, wherein a metal containing layer forms at least either an etch stop layer below the oxide layer or a patterned mask above the oxide layer, wherein a patterned organic mask is above the oxide layer is provided. The... Agent: Lam Research Corporation

20140179107 - Etching silicon nitride using dilute hydrofluoric acid: Provided are methods for processing semiconductor substrates or, more specifically, methods for etching silicon nitride structures without damaging photoresist structures that are exposed to the same etching solutions. In some embodiments, a highly diluted hydrofluoric acid is used for etching silicon nitride. A volumetric ratio of water to hydrofluoric acid... Agent: Intermolecular Inc.

20140179108 - Wafer edge protection and efficiency using inert gas and ring: Embodiments of the invention generally relate to an apparatus and method for plasma etching. In one embodiment, the apparatus includes a process ring with an annular step away from an inner wall of the ring and is disposed on a substrate support in a plasma process chamber. A gap is... Agent:

20140179109 - Method of controlling trench microloading using plasma pulsing: Methods and apparatus for controlling microloading, such as within cell microloading between adjacent cells or isolated/dense microloading between areas of isolated or dense features during shallow trench isolation (STI) fabrication processes, or other trench fabrication processes, are provided herein. In some embodiments, a method for fabricating STI structures may include... Agent: Applied Materials, Inc.

20140179110 - Methods and apparatus for processing germanium containing material, a iii-v compound containing material, or a ii-vi compound containing material disposed on a substrate using a hot wire source: Methods and apparatus for processing a germanium containing material, a III-V compound containing material, or a II-VI compound containing material disposed on a substrate using a hot wire source are provided herein. In some embodiments, a method for processing a material disposed on a substrate, wherein the material is at... Agent: Applied Materials, Inc.

20140179111 - Selective titanium nitride etching: Methods of etching exposed titanium nitride with respect to other materials on patterned heterogeneous structures are described, and may include a remote plasma etch formed from a fluorine-containing precursor. Precursor combinations including plasma effluents from the remote plasma are flowed into a substrate processing region to etch the patterned structures... Agent: Applied Materials, Inc.

20140179112 - High productivity combinatorial techniques for titanium nitride etching: Provided are methods of High Productivity Combinatorial testing of semiconductor substrates, each including multiple site isolated regions. Each site isolated region includes a titanium nitride structure as well as a hafnium oxide structure and/or a polysilicon structure. Each site isolated region is exposed to an etching solution that includes sulfuric... Agent: Intermolecular Inc.

20140179114 - Radical source design for remote plasma atomic layer deposition: A radical source for supplying radicals during atomic layer deposition semiconductor processing operations is provided. The radical source may include a remote volume, a baffle volume, and a baffle that partitions the remote volume from the baffle volume. The baffle volume and the remote volume may be fluidly connected through... Agent:

20140179113 - Surface treatment methods and systems for substrate processing: Embodiments provided herein describe methods and systems for processing substrates. A plasma including radical species and charged species is generated. The charged species of the plasma are collected. A substrate is exposed to the radical species of the plasma. A layer is formed on the substrate after exposing the substrate... Agent: Intermolecular, Inc.

20140179115 - Methods of forming patterns: Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material... Agent: Micron Technology, Inc.

20140179116 - Improvement of reverse recovery using oxygen-vacancy defects: A semiconductor device comprises a semiconductor substrate, a first electrode formed on a first main surface of the semiconductor substrate, and a second electrode formed on a second main surface of the semiconductor substrate. The semiconductor substrate includes a first region in which a density of oxygen-vacancy defects is greater... Agent: Toyota Jidosha Kabushiki Kaisha

20140179117 - Method for forming a layer on a substrate at low temperatures: A method for forming an oxide layer on a substrate is described, wherein a plasma is generated adjacent to at least one surface of the substrate by means of microwaves from a gas containing oxygen, wherein the microwaves are coupled into the gas by a magnetron via at least one... Agent: Centrotherm Thermal Solutions Gmbh & Co. Kg

20140179119 - Advanced low k cap film formation process for nano electronic devices: A method of forming a carbon-rich silicon carbide-like dielectric film having a carbon concentration of greater than, or equal to, about 30 atomic % C and a dielectric constant of less than, or equal to, about 4.5 is provided. The dielectric film may optionally include nitrogen. When nitrogen is present,... Agent: International Business Machines Corporation

20140179118 - Surface treatment method for semiconductor device: A surface treatment method for a semiconductor device includes providing a substrate where a plurality of projected patterns are formed, forming a hydrophobic coating layer on a surface of each of the plurality of projected patterns, rinsing the substrate with deionized water, and drying the substrate, wherein the hydrophobic coating... Agent: Sk Hynix Inc.

20140179120 - Method of depositing a film: A method of depositing a film of forming an oxide film containing a predetermined element on substrates using an apparatus including a turntable mounting substrates, first and second process areas above the upper surface of the turntable provided with gas supplying portions, a separation gas supplying portion between the first... Agent: Tokyo Electron Limited

20140179121 - Method of depositing a film: A method of depositing a film on substrates using an apparatus including a turntable mounting substrates, first and second process areas above the upper surface of the turntable provided with gas supplying portions, a separation gas supplying portion between the first and second process areas, and a separation area including... Agent: Tokyo Electron Limited

20140179122 - Method of depositing a film: A method of depositing a film of forming a doped oxide film including a first oxide film containing a first element and doped with a second element on substrates mounted on a turntable including depositing the first oxide film onto the substrates by rotating the turntable predetermined turns while a... Agent: Tokyo Electron Limited

20140179123 - Site-isolated rapid thermal processing methods and apparatus: Methods and apparatus are described that allow the investigation of process variables used in RTP systems to be varied in a combinatorial manner across a plurality of site-isolated regions designated in the surface of a substrate. The methods and apparatus allow process variables such as power, dwell time, light source,... Agent: Intermolecular, Inc.

20140179124 - Three-dimensional writable printed memory: The present invention discloses a three-dimensional writable printed memory (3D-wP). It comprises at least a printed memory array and a writable memory array. The printed memory array stores contents data, which are recorded with a printing means; the writable memory array stores custom data, which are recorded with a writing... Agent: Hangzhou Haicun Information Technology Co., Ltd.

  
06/19/2014 > 89 patent applications in 64 patent subcategories.

20140170779 - Coherent spin field effect transistor: A coherent spin field effect transistor is provided by depositing a ferromagnetic base like cobalt on a substrate. A magnetic oxide layer is formed on the cobalt by annealing at temperatures on the order of 1000° K to provide a few monolayer thick layer. Where the gate is cobalt, the... Agent: Quantum Devices, LLC

20140170775 - Hpc workflow for rapid screening of materials and stacks for stt-ram: In some embodiments, HPC techniques are applied to the screening and evaluating the materials, process parameters, process sequences, and post deposition treatment processes for the development of STT-RAM stacks. Simple test structures are employed for initial screening of basic materials properties of candidate materials for each layer within the stack.... Agent: Intermolecular, Inc.

20140170774 - Method for manufacturing a magnetoresistive sensor: A method for manufacturing a magnetic sensor that allows the sensor to be constructed with a very narrow track width and with smooth, well defined side walls. A tri-layer mask structure is deposited over a series of sensor layers. The tri-layer mask structure includes an under-layer, a Si containing hard... Agent: Hgst Netherlands B.v.

20140170778 - Method of manufacturing magnetoresistive element and method of processing magnetoresistive film: In a case where reactive ion etching using a gas containing an oxygen atom is used for etching or a magnetoresistive element, a magnetic film becomes damaged due to oxidation. Such damage to the element by the oxidation becomes a factor which causes deterioration in element properties. In the etching... Agent: Canon Anelva Corporation

20140170776 - Mtj stack and bottom electrode patterning process with ion beam etching using a single mask: Fabrication methods using Ion Beam Etching (IBE) for MRAM cell memory elements are described. In embodiments of the invention the top electrode and MTJ main body are etched with one mask using reactive etching such as RIE or magnetized inductively coupled plasma (MICP) for improved selectivity, then the bottom electrode... Agent: Avalanche Technology Inc.

20140170777 - Vertically oriented semiconductor device and shielding structure thereof: The present disclosure involves a semiconductor device. The semiconductor device includes a substrate. The semiconductor device includes an electronic device positioned over the substrate. The electronic device includes an opening. The semiconductor device includes a shielding device positioned over the substrate and surrounding the electronic device. The shielding device includes... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170780 - Method of low-k dielectric film repair: Methods for repairing a carbon depleted low-k material in a low-k dielectric film layer of a semiconductor wafer include providing a proximity head with a plurality of nozzles disposed on a surface of the proximity head. A repair chemistry having a hydrocarbon group is applied to a portion of the... Agent: Lam Research Corporation

20140170781 - Double side polisher with platen parallelism control: A platen for polishing a surface of a wafer has a reaction plate, a polishing plate, and a bladder. The reaction plate has a top and bottom surface, and defines a longitudinal axis. The polishing plate is positioned coaxially with the reaction plate. The polishing plate has a second top... Agent:

20140170783 - Mask alignment system for semiconductor processing: A mask alignment system for providing precise and repeatable alignment between ion implantation masks and workpieces. The system includes a mask frame having a plurality of ion implantation masks loosely connected thereto. The mask frame is provided with a plurality of frame alignment cavities, and each mask is provided with... Agent: Varian Semiconductor Equipment Associates, Inc.

20140170782 - Scanner overlay correction system and method: A method includes performing a semiconductor fabrication process on a plurality of substrates. The plurality of substrates are divided into a first subset and a second subset. A rework process is performed on the second subset of the plurality of substrates but not on the first subset. A respective mean... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140170784 - Method of manufacturing photoelectric composite substrate: A method of manufacturing a photoelectric composite substrate, includes: aligning and fixing an optical element having a solder terminal to an optical waveguide for forming a path of an optical signal on a printed circuit board; mounting the optical waveguide, to which the optical element is fixed, on the printed... Agent: Fujitsu Limited

20140170785 - Mask management system and method for oled encapsulation: A system and method for encapsulating an organic light-emitting diode (OLED) device by enabling a substrate and a plurality of masks to be efficiently received into a vacuum processing environment, transferred between one or more process chambers for the deposition of encapsulating layers, and removed from the processing system. A... Agent: Applied Materials, Inc.

20140170789 - Ceramic composition having dispersion of nano-particles therein and methods of fabricating same: Ceramic compositions having a dispersion of nano-particles therein and methods of fabricating ceramic compositions having a dispersion of nano-particles therein are described. In an example, a method of forming a composition having a dispersion of nano-particles therein includes forming a mixture of semiconductor nano-particles and ceramic precursor molecules. A ceramic... Agent:

20140170786 - Ceramic composition having dispersion of nano-particles therein and methods of fabricating same: Ceramic compositions having a dispersion of nano-particles therein and methods of fabricating ceramic compositions having a dispersion of nano-particles therein are described. In an example, a method of forming a composition having a dispersion of nano-particles therein includes forming a mixture of semiconductor nano-particles and ceramic precursor molecules. A ceramic... Agent:

20140170787 - Manufacturing flexible organic electronic devices: A method of making a flexible organic electronic device includes forming a first portion including a first flexible substrate, wherein the first portion is formed under a first set of conditions to provide a barrier system, separately forming a second portion comprising at least one organic electronic device region deposited... Agent: Universal Display Corporation

20140170788 - Method of manufacturing phosphor for light-emitting diode: The present invention provides a method of manufacturing a phosphor for a light-emitting diode, including filling a phosphor frame in which phosphor models are formed in an engraving form with a fluorescent material solution including a fluorescent material that converts light provided by the light-emitting diode into white light by... Agent: Lightizer Korea Co.

20140170790 - Thin film transistor and display device using the same and method for manufacturing the same: A thin film transistor according to an example embodiment includes: a substrate body; a semiconductor layer formed on the substrate body and comprising a polycrystalline silicon film having a surface resistance from about 2000 ohm/sq to about 8000 ohm/sq; and a source electrode and a drain electrode each contacted with... Agent: Samsung Display Co., Ltd.

20140170791 - Dispenser and method of fabricating organic light emitting display device using the same: A dispenser capable of forming a uniform material layer and a method of fabricating an organic light emitting display device using the same are disclosed. The dispenser includes a syringe including a coating material and provided with a nozzle for ejecting the coating material to a substrate and a syringe... Agent: Lg Display Co., Ltd.

20140170792 - Forming thin film vertical light emitting diodes: A thin film vertical light emitting diode (VLED) structure and process are described. Features of the design include the following: bonding multiple smaller diameter LED wafers to a larger diameter carrier wafer, which reduces the per LED fabrication cost; using thin film techniques to metalize the anode and cathode and... Agent: Nthdegree Technologies Worldwide Inc.

20140170793 - Light-emitting element, light-emitting device, and manufacturing method of light-emitting element: Provided is a highly reliable light-emitting element in which damage to an EL layer is reduced even when an auxiliary electrode for an upper electrode is provided. Further, a highly reliable light-emitting device in which luminance unevenness is suppressed is provided. The light-emitting element includes a first electrode; an insulating... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140170794 - Thermoelectric semiconductor material, thermoelectric semiconductor element using thermoelectric semiconductor material, thermoelectric module using thermoelectric semiconductor element and manufacturing method for same: A metal mixture is prepared, in which an excess amount of Te is added to a (Bi—Sb)2Te3 based composition. After melting the metal mixture, the molten metal is solidified on a surface of a cooling roll of which the circumferential velocity is no higher than 5 m/sec, so as to... Agent: Ihi Corporation

20140170795 - Grid for plasma ion implant: A grid for minimizing effects of ion divergence in plasma ion implant. The plasma grid is made of a flat plate having a plurality of holes, wherein the holes are arranged in a plurality of rows and a plurality of columns thereby forming beamlets of ions that diverge in one... Agent: Intevac, Inc.

20140170796 - Image sensor packaging method: g

20140170797 - Sensor chip protective image sensor packaging method: A sensor chip protective image sensor packaging method includes the steps of a) installing an image sensor chip in a circuit substrate and then covering a passivation layer on a sensing zone of the image sensor chip, b) using a plurality of lead wires to connect respective conducting contacts of... Agent: Stack Devices Corp.

20140170798 - Integrated thin film solar cell interconnection: Photovoltaic modules may include multiple flexible thin film photovoltaic cells electrically connected in series, and laminated to a substantially transparent top sheet having a conductive grid pattern facing the cells. Methods of manufacturing photovoltaic modules including integrated multi-cell interconnections are provided. Methods may include steps of coordinating, integrating, and registering... Agent: Global Solar Energy, Inc.

20140170799 - Method of manufacturing glass substrate with concave-convex flim using dry etching, glass substrate with concave-convex film, solar cell, and method of manufacturing solar cell: [Means to Solve the Problem] In order to give a concave-convex structure to a glass substrate made of a plurality of oxides placed in different vapor pressures during dry etching, a subject film forming step and a concave-convex structure forming step are provided. The subject film forming step forms a... Agent:

20140170800 - Solar cell emitter region fabrication using silicon nano-particles: Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate... Agent:

20140170801 - Methods of fabricating a photovoltaic module, and related system: A method of processing a semiconductor assembly is presented. The method includes fabricating a photovoltaic module including a semiconductor assembly. The fabrication step includes performing an efficiency enhancement treatment on the semiconductor assembly, wherein the efficiency enhancement treatment includes light soaking the semiconductor assembly, and heating the semiconductor assembly. The... Agent: First Solar, Inc.

20140170802 - Absorber layer for a thin film photovoltaic device with a double-graded band gap: A gallium-containing alloy is formed on the light-receiving surface of a CIGS absorber layer, and, in conjunction with a subsequent selenization or anneal process, is converted to a gallium-rich region at the light-receiving surface of the CIGS absorber layer. A second gallium-rich region is formed at the back contact surface... Agent: Intermolecular, Inc.

20140170803 - Cigs absorber formed by co-sputtered indium: In some embodiments, Cu—In—Ga precursor films are deposited by co-sputtering from multiple targets. Specifically, the co-sputtering method is used to form layers that include In. The co-sputtering reduces the tendency for the In component to agglomerate and results in smoother, more uniform films. In some embodiments, the Ga concentration in... Agent: Intermolecular, Inc.

20140170804 - Method and apparatus for resistivity and transmittance optimization in tco solar cell films: A method and system provide for depositing a TCO, transparent conductive oxide, film in one chamber of a manufacturing tool then irradiating the TCO film with light energy in another chamber of the same tool. The TCO film is used in a solar cell and formed on a solar cell... Agent: Tsmc Solar Ltd.

20140170805 - Thermal processing utilizing independently controlled elemental reactant vapor pressures and/or indirect cooling: A machine includes a thermal ramp chamber; a thermal soak chamber coupled to the thermal ramp chamber; and a cooling chamber coupled to the thermal soak chamber. The cooling chamber can be an indirect cooling chamber including a thermal buffer that includes a substrate carrier. Each of the chambers can... Agent:

20140170806 - Tcos for high-efficiency crystalline si heterojunction solar cells: Methods are used to develop and evaluate new processes for cleaning and texturing substrates and layers used in HJCS solar cells. In some embodiments, methods are used to develop and evaluate new processes for the deposition of resistive metal oxide interface layers that are formed between the TCO layers and... Agent: Intermolecular, Inc.

20140170807 - Monolithic integration of heterojunction solar cells: A method for fabricating a device with integrated photovoltaic cells includes supporting a semiconductor substrate on a first handle substrate and doping the semiconductor substrate to form doped alternating regions with opposite conductivity. A doped layer is formed over a first side the semiconductor substrate. A conductive material is patterned... Agent: International Business Machines Corporation

20140170808 - Zinc oxide film method and structure for cigs cell: A method for fabricating a thin film photovoltaic device. The method includes providing a substrate comprising an absorber layer and an overlying window layer. The substrate is loaded into a chamber and subjected to a vacuum environment. The vacuum environment is at a pressure ranging from 0.1 Torr to about... Agent: Stion Corporation

20140170809 - Method for manufacturing semiconductor device: An embodiment of the disclosed invention is a method for manufacturing a semiconductor device, which includes the steps of: forming a first insulating film; performing oxygen doping treatment on the first insulating film to supply oxygen to the first insulating film; forming a source electrode, a drain electrode, and an... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140170811 - Method of fabricating a 3d integrated electronic device structure including increased thermal dissipation capabilities: A method of fabricating a microelectronic device structure including increased thermal dissipation capabilities. The structure including a three-dimensional (3D) integrated chip assembly that is flip chip bonded to a substrate. The chip assembly including a device substrate including an active device disposed thereon. A cap layer is physically bonded to... Agent: General Electric Company

20140170810 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor chip includes forming a masking member including an opening on a wiring substrate including a chip mounting region so as to align the opening with the chip mounting region, forming an uncured sealing resin on at least the chip mounting region of the wiring... Agent: Shinko Electric Industries Co., Ltd.

20140170814 - Ball grid array semiconductor device and its manufacture: A semiconductor device includes: stacked semiconductor chips having respective input/output pads on surfaces thereof; a lower resin body molding the lower semiconductor chip and having a surface coplanar with the lower chip; an upper resin body molding the upper chip and coupled with the first resin body; wirings connected to... Agent: Fujitsu Semiconductor Limited

20140170812 - Method and apparatus for manufacturing chip package: There are proposed a method and apparatus for manufacturing a chip package in which bonding wires are coupled with contact pads in which an overhang holder holds and fixes portions of a surface adjacent to portions where the contact pads are located.... Agent: Sk Hynix Inc.

20140170813 - Method for bonding semiconductor substrates and devices obtained thereof: A method is provided for bonding a first semiconductor substrate to a second semiconductor substrate using low temperature thermo-compression. The bonding method comprises the step of in-situ mechanically scrubbing the metal contact structure surfaces prior to thermo-compression bonding step, thereby planarizing the removing the oxides and/or contaminants from the metal... Agent:

20140170815 - Embedded ball grid array substrate and manufacturing method thereof: Disclosed herein are an embedded ball grid array substrate and a manufacturing method thereof. The embedded ball grid array includes: a core layer having a cavity therein; a semiconductor device embedded in the cavity of the core layer; a first circuit layer having a circuit pattern including a wire bonding... Agent:

20140170816 - Copper post solder bumps on substrates: A method comprises forming semiconductor flip chip interconnects having electrical connecting pads and electrically conductive posts terminating in distal ends operatively associated with the pads. We solder bump the distal ends by injection molding, mask the posts on the pads with a mask having a plurality of through hole reservoirs... Agent: International Business Machines Corporation

20140170818 - Nanorod thin-film transistors: A method for forming an electronic switching device on a substrate, wherein the method comprises depositing the active semiconducting layer of the electronic switching device onto the substrate from a liquid dispersion of ligand-modified colloidal nanorods, and subsequently immersing the substrate into a growth solution to increase the diameter and/or... Agent: Cambridge Enterprise Limited

20140170817 - Silicon germanium and germanium multigate and nanowire structures for logic and multilevel memory applications: A method to provide a transistor or memory cell structure. The method comprises: providing a substrate including a lower Si substrate and an insulating layer on the substrate; providing a first projection extending above the insulating layer, the first projection including an Si material and a Sil-xGex material; and exposing... Agent:

20140170819 - High electron mobility transistor structure with improved breakdown voltage performance: A method comprises epitaxially growing a gallium nitride (GaN) layer over a silicon substrate, epitaxially growing a donor-supply layer over the GaN layer, and etching a portion of the donor-supply layer. The method also comprises depositing a passivation layer over the donor-supply layer and filling the etched portion of the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170820 - Method of fabricating hybrid impact-ionization semiconductor device: A method includes providing a semiconductor substrate having an active region and forming an isolation structure to isolate the active region. First and second gate structures are formed over the active region. First and second doped regions are formed within the active region of the substrate, the first doped region... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170822 - Cross-point diode arrays and methods of manufacturing cross-point diode arrays: Methods of forming an array of memory cells and memory cells that have pillars. Individual pillars can have a semiconductor post formed of a bulk semiconductor material and a sacrificial cap on the semiconductor post. Source regions can be between columns of the pillars, and gate lines extend along a... Agent: Micron Technology, Inc.

20140170821 - Patterning of vertical nanowire transistor channel and gate with directed self assembly: Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical nanowire transistor, potentially based on one lithographic operation. In embodiments, DSA material is confined within a guide opening patterned using convention lithography. In embodiments, channel regions and gate... Agent:

20140170824 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes: sequentially forming an n− type epitaxial layer, a p type epitaxial layer, and a first n+ region on a first surface of an n+ type silicon carbide substrate; forming a trench by penetrating the first n+ region and the p type epitaxial... Agent: Hyundai Motors Company

20140170823 - Method for fabricating trench type transistor: A method for fabricating a trench type transistor. An epitaxial layer is provided on a semiconductor substrate. A hard mask with an opening is formed on the epitaxial layer. A gate trench is etched into the substrate through the opening. A gate oxide layer and a trench gate are formed... Agent: Anpec Electronics Corporation

20140170825 - Finfet with merge-free fins: A semiconductor device comprises an insulation layer, an active semiconductor layer formed on an upper surface of the insulation layer, and a plurality of fins formed on the insulation layer. The fins are formed in the gate and spacer regions between a first source/drain region and second source/drain region, without... Agent: International Business Machines Corporation

20140170826 - Biaxial strained field effect transistor devices: A process for forming contacts to a field effect transistor provides edge relaxation of a buried stressor layer, inducing strain in an initially relaxed surface semiconductor layer above the buried stressor layer. A process can start with a silicon or silicon-on-insulator substrate with a buried silicon germanium layer having an... Agent: Acorn Technologies, Inc.

20140170828 - Plasma doping method and method for fabricating semiconductor device using the same: A doping method that forms a doped region at a desired location of a three-dimensional (3D) conductive structure, controls the doping depth and doping dose of the doped region relatively easily, has a shallow doping depth, and prevents a floating body effect. A semiconductor device is fabricated using the same... Agent: Sk Hynix Inc.

20140170827 - Tunneling field effect transistor (tfet) formed by asymmetric ion implantation and method of making same: An embodiment integrated circuit device and a method of making the same. The embodiment method includes forming a first nitride layer over a gate stack supported by a substrate, implanting germanium ions in the first nitride layer in a direction forming an acute angle with a top surface of the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170829 - Lateral bipolar transistor and cmos hybrid technology: A method of forming a lateral bipolar transistor includes forming a silicon on insulator (SOI) substrate having a bottom substrate layer, a buried oxide layer (BOX) on top of the substrate layer, and a silicon on insulator (SOI) layer on top of the BOX layer, forming a dummy gate and... Agent: International Business Machines Corporation

20140170831 - Phase change memory cell with large electrode contact area: A phase change memory cell and a method for fabricating the phase change memory cell. The phase change memory cell includes a bottom electrode and a first non-conductive layer. The first non-conductive layer defines a first well, a first electrically conductive liner lines the first well, and the first well... Agent: International Business Machines Corporation

20140170832 - Resistive random access memory and method for controlling manufacturing of corresponding sub-resolution features of conductive and resistive elements: A method including: forming a stack of resistive layers; prior to or subsequent to forming the stack of resistive layers, forming a conductive layer; applying a mask layer on the stack of resistive layers or the conductive layer; forming a first spacer on the mask layer; and etching away a... Agent: Marvell World Trade Ltd.

20140170830 - Variable resistance memory device and method for fabricating the same: A method for fabricating a variable resistance memory device includes forming an oxygen-deficient first metal oxide layer over a first electrode, forming an oxygen-rich second metal oxide layer over the first metal oxide layer, treating the first and second metal oxide layers with hydrogen-containing plasma, forming an oxygen-rich third metal... Agent: Sk Hynix Inc.

20140170833 - Methods to improve leakage of high k materials: A method for reducing the leakage current in DRAM Metal-Insulator-Metal capacitors includes forming a capacitor stack including an oxygen donor dopant incorporated within the dielectric layer. The oxygen donor dopants may be incorporated within the dielectric layer during the formation of the dielectric layer. The oxygen donor materials provide oxygen... Agent: Intermolecular, Inc.

20140170834 - Method for manufacturing a hybrid soi/bulk semiconductor wafer: A method for manufacturing a hybrid SOI/bulk substrate, including the steps of starting from an SOI wafer comprising a single-crystal semiconductor layer called SOI layer, on an insulating layer, on a single-crystal semiconductor substrate; depositing on the SOI layer at least one masking layer and forming openings crossing the masking... Agent: Stmicroelectronics S.a.

20140170835 - Method for wafer dicing and composition useful thereof: A solution for semiconductor wafer dicing is disclosed. The solution suppresses the adherence of contamination residues or particles, and reduces or eliminates the corrosion of the exposed metallization areas, during the process of dicing a wafer by sawing. The solution comprises at least one organic acid and/or salt thereof; at... Agent: Air Products And Chemicals, Inc.

20140170836 - Chip comprising a fill structure: A chip includes a dielectric layer and a fill structure in the dielectric layer, wherein the fill structure extends along a dicing edge of the chip, with the fill structure abutting the dicing edge.... Agent: Infineon Technologies Ag

20140170837 - Methods for manufacturing semiconductor devices: A method for reducing defects from an active layer is disclosed. The active layer may be part of a semiconductor in a semiconductor device. The active layer may be defined at least laterally by an isolation structure, and may physically contact an isolation structure at a contact interface. The isolation... Agent: Imec

20140170838 - Apparatus and method for fabricating wafer: A method for fabricating a wafer according to the embodiment comprises the steps of depositing an epi layer in an epi deposition part; transferring the wafer to an annealing part connected to the epi deposition part; annealing the wafer in the annealing part; transferring the wafer to a cooling part... Agent: Lg Innotek Co., Ltd.

20140170839 - Methods of forming fins for a finfet device wherein the fins have a high germanium content: One illustrative method disclosed herein includes forming a silicon/germanium fin in a layer of insulating material, wherein the fin has a first germanium concentration, recessing an upper surface of the layer of insulating material so as to expose a portion of the fin, performing an oxidation process so as to... Agent: Globalfoundries Inc.

20140170840 - Epitaxial formation mechanisms of source and drain regions: The embodiments of mechanisms for forming source/drain (S/D) regions of field effect transistors (FETs) descried enable forming an epitaxially grown silicon-containing material without using GeH4 in an etch gas mixture of an etch process for a cyclic deposition/etch (CDE) process. The etch process is performed at a temperature different form... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170841 - Silicon carbide semiconductor device and method for manufacturing same: The present invention provides a silicon carbide semiconductor device having an ohmic electrode improved in adhesion of a wire thereto by preventing deposition of carbon so as not to form a Schottky contact, as well as a method for manufacturing such a silicon carbide semiconductor device. In the SiC semiconductor... Agent: Sumitomo Electric Industries, Ltd.

20140170842 - Method for forming dummy gate: Disclosed is a method of forming a dummy gate in manufacturing a field effect transistor. The method includes a first process of exposing a workpiece having a polycrystalline silicon layer to plasma of HBr gas, and a second process of further exposing the workpiece to the plasma of HBr gas... Agent: Tokyo Electron Limited

20140170843 - Charge trapping split gate device and method of fabricating same: Embodiments provide a split gate device, methods for fabricating a split gate device, and integrated methods for fabricating a split gate device and a periphery device. In an embodiment, the split gate device is a charge trapping split gate device, which includes a charge trapping layer. In another embodiment, the... Agent: Spansion LLC

20140170844 - Structure and method of tinv scaling for high k metal gate technology: A complementary metal oxide semiconductor (CMOS) structure including a scaled n-channel field effect transistor (nFET) and a scaled p-channel field transistor (pFET) is provided. Such a structure is provided by forming a plasma nitrided, nFET threshold voltage adjusted high k gate dielectric layer portion within an nFET gate stack, and... Agent: International Business Machines Corporation

20140170845 - Semiconductor device manufacturing method: A semiconductor device manufacturing method, the method including: forming an insulation layer having a protruding portion, the insulation layer having a surface and a rising surface that protrudes upward from the surface, on a semiconductor substrate; forming a conductive layer to cover the insulation layer having the protruding portion; and... Agent: Tokyo Electron Limited

20140170846 - Sidewall-free cesl for enlarging ild gap-fill window: An integrated circuit structure includes a first gate strip; a gate spacer on a sidewall of the first gate strip; and a contact etch stop layer (CESL) having a bottom portion lower than a top surface of the gate spacer, wherein a portion of a sidewall of the gate spacer... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170847 - Method of forming crack free gap fill: Techniques disclosed herein may achieve crack free filling of structures. A flowable film may substantially fill gaps in a structure and extend over a base in an open area adjacent to the structure. The top surface of the flowable film in the open area may slope down and may be... Agent: Sandisk 3d LLC

20140170848 - Method of forming substrate: A method of forming a substrate is provided, which includes steps of providing a metal plate having a first surface and a second surface; forming a plurality of recesses on the first surface of the metal plate by using laser cutting technique; filling the plurality of recesses with an insulating... Agent: Viking Tech Corporation

20140170849 - Package systems and manufacturing methods thereof: A method of forming a package system includes providing a first substrate having a metallic pad and at least one metallic guard ring. The method further includes bonding the metallic pad of the first substrate with a semiconductor pad of a second substrate, wherein the at least one metallic guard... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170850 - Ubm structures for wafer level chip scale packaging: A wafer level chip scale semiconductor device comprises a semiconductor die, a first under bump metal structure and a second under bump metal structure. The first under bump metal structure having a first enclosure is formed on a corner region or an edge region of the semiconductor die. A second... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170851 - Substrate contact opening: An under-bump metallization (UBM) structure for a substrate, such as an organic substrate, a ceramic substrate, a silicon or glass interposer, a high density interconnect, a printed circuit board, or the like, is provided. A buffer layer is formed over a contact pad on the substrate such that at least... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140170852 - Process for the manufacture of semiconductor devices comprising the chemical mechanical polishing of elemental germanium and/or si1-xgex material in the presence of a cmp composition comprising a specific organic compound: A process for the manufacture of semiconductor devices comprising the chemical mechanical polishing of elemental germanium and/or Si1-xGex material with 0.1≦x<1 in the presence of a chemical mechanical polishing (CMP) composition comprising: (A) inorganic particles, organic particles, or a mixture or composite thereof, (B) at least one type of an... Agent: Basf Se

20140170853 - Image reversal with ahm gap fill for multiple patterning: Methods and apparatuses for multiple patterning using image reversal are provided. The methods may include depositing gap-fill ashable hardmasks using a deposition-etch-ash method to fill gaps in a pattern of a semiconductor substrate and eliminating spacer etching steps using a single-etch planarization method. Such methods may be performed for double... Agent:

20140170854 - Self-aligned devices and methods of manufacture: A method includes forming patterned lines on a substrate having a predetermined pitch. The method further includes forming spacer sidewalls on sidewalls of the patterned lines. The method further includes forming material in a space between the spacer sidewalls of adjacent patterned lines. The method further includes forming another patterned... Agent: International Business Machines Corporation

20140170855 - Silicon-containing resist underlayer film-forming composition having sulfone structure: [in Formula (1), R3 is an organic group having a sulfonyl group and a light-absorbing group and is bonded to a Si atom through a Si—C bond; R1 is an alkyl, aryl, aralkyl, halogenated alkyl, halogenated aryl, halogenated aralkyl, alkenyl, an organic group having an epoxy, acryloyl, methacryloyl, mercapto, alkoxyaryl,... Agent: Nissan Chemical Industries, Ltd.

20140170856 - Method and system for etching plural layers on a workpiece including a lower layer containing an advanced memory material: Etching of a thin film stack including a lower thin film layer containing an advanced memory material is carried out in an inductively coupled plasma reactor having a dielectric RF window without exposing the lower thin film layer, and then the etch process is completed in a toroidal source plasma... Agent:

20140170857 - Customizing etch selectivity with sequential multi-stage etches with complementary etchants: A method of combinatorial processing involving etching a first material and a second material on a substrate comprising: etching the first material with a high first etch rate with a first etchant; etching the second material with a high second etch rate with a second etchant, wherein the first etchant... Agent: Intermolecular, Inc.

20140170858 - Method of manufacturing semiconductor device, substrate processing apparatus, and non-transitory computer-readable recording medium: Provided is a method including forming a film including a predetermined element, oxygen and at least one element selected from a group consisting of nitrogen, carbon and boron on a substrate by performing a cycle a predetermined number of times, the cycle including supplying a source gas to the substrate... Agent: Hitachi Kokusai Electric Inc.

20140170859 - Film formation device, substrate processing device, and film formation method: A film formation device to conduct a film formation process for a substrate includes a rotating table, a film formation area configured to include a process gas supply part, a plasma processing part, a lower bias electrode provided at a lower side of a position of a height of the... Agent: Tokyo Electron Limited

20140170860 - Substrate processing apparatus and method of manufacturing semiconductor device: Substrate processing uniformity is improved in the surfaces of wafers and between the wafers. A method of manufacturing a semiconductor device, including: loading a substrate holder into an inner tube, the substrate holder holding a plurality of substrates in a state where the plurality of substrates are horizontally oriented and... Agent: Hitachi Kokusai Electric Inc.

20140170861 - Hafnium-containing and zirconium-containing precursors for vapor deposition: Disclosed are hafnium-containing and zirconium-containing precursors and methods of synthesizing the same. The compounds may be used to deposit hafnium, zirconium, hafnium oxide, and zirconium oxide containing layers using vapor deposition methods such as chemical vapor deposition or atomic layer deposition.... Agent:

20140170862 - Substrate processing apparatus, substrate processing method and non-transitory storage medium: A substrate processing apparatus includes a substrate holding part configured to hold and support a substrate, a heating module configured to heat a substrate, and a cooling module configured to cool the substrate heated in the heating module. The substrate processing apparatus further includes a substrate transfer mechanism configured to... Agent: Tokyo Electron Limited

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