Semiconductor device manufacturing: process inventions

20090263918 - Methods and apparatuses for determining thickness of a conductive layer: Methods and apparatuses are provided for calibrating eddy current sensors. A calibration curve is formed relating thickness of a conductive layer in a magnetic field to a value measured by the eddy current sensors or a value derived from such measurement, such as argument of impedance. The calibration curve may... Agent: Knobbe, Martens, Olson & Bear, LLP

20090263919 - Plasma oxidation processing method: A plasma oxidation process is performed to form a silicon oxide film on the surface of a target object by use of plasma with an O(1D2) radical density of 1×1012 [cm−3] or more generated from a process gas containing oxygen inside a process chamber of a plasma processing apparatus. During... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263920 - Protection of cavities opening onto a face of a microstructured element: p

20090263922 - Reflective positive electrode and gallium nitride-based compound semiconductor light-emitting device using the same: A gallium nitride-based compound semiconductor light-emitting device which has a highly reflective positive electrode that has high reverse voltage and excellent reliability with low contact resistance to the p-type gallium nitride-based compound semiconductor layer. The reflective positive electrode for a semiconductor light-emitting device comprises a contact metal layer adjoining a... Agent: Sughrue Mion, PLLC

20090263921 - Thin film transistor substrate with color filter and method for fabricting the same: A color filter-on-thin film transistor substrate includes gate data lines crossing each other and defining pixel areas, thin film transistors is located at crossings of gate and data lines, pixel electrodes connected to the thin film transistors and formed within the pixel areas, and stripe-shaped color filters overlapping a plurality... Agent: Mckenna Long & Aldridge LLP

20090263923 - Semiconductor device using buried oxide layer as optical wave guides: A semiconductor optical wave guide device is described in which a buried oxide layer (BOX) is capable of guiding light. Optical signals may be transmitted from one part of the semiconductor device to another, or with a point external to the semiconductor device, via the wave guide. In one example,... Agent: Banner & Witcoff, Ltd.

20090263924 - Organic light-emitting display device and method of manufacturing the same: Provided is an organic light-emitting display device that can display a full color image by forming a simple structure of light-emitting layers and a method of manufacturing the same. The organic light-emitting display device includes a substrate; a first electrode layer formed on the substrate; a second electrode layer which... Agent: Knobbe Martens Olson & Bear LLP

20090263925 - Nitride-based light-emitting device and method of manufacturing the same: A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear... Agent: Mcdermott Will & Emery LLP

20090263926 - Optical semiconductor device having active layer of p-type quantum dot structure and its manufacture method: An active layer having a p-type quantum dot structure is disposed over a lower cladding layer made of semiconductor material of a first conductivity type. An upper cladding layer is disposed over the active layer. The upper cladding layer is made of semiconductor material, and includes a ridge portion and... Agent: Kratz, Quintos & Hanson, LLP

20090263927 - Isolation structures for cmos image sensor chip scale packages: Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090263928 - Method for making a selective emitter of a solar cell: A method for manufacturing a selective emitter of a solar cell is provided. The method includes steps of providing a substrate; forming an emitter layer on the substrate, wherein the emitter layer has a heavily doped portion located on a top thereof and a relatively lightly doped portion located at... Agent: Volpe And Koenig, P.C.

20090263929 - Methods for producing solid-state imaging device and electronic device: A method for producing a solid-state imaging device includes steps of: forming transfer electrodes on a substrate having a plurality of light-sensing portions through a gate insulating layer so that the light-sensing portions are exposed; forming a planarized insulating layer on the substrate to cover the transfer electrodes formed on... Agent: Rader Fishman & Grauer PLLC

20090263930 - Microcrystalline silicon deposition for thin film solar applications: Embodiments of the invention as recited in the claims relate to thin film multi-junction solar cells and methods and apparatuses for forming the same. In one embodiment a method of forming a thin film multi-junction solar cell over a substrate is provided. The method comprises positioning a substrate in a... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090263931 - Thinned image sensor with trench-insulated contact terminals: The invention relates to the fabrication of thinned substrate image sensors, and notably color image sensors. After the fabrication steps carried out from the front face of a silicon substrate the front face is transferred onto a substrate. The silicon is thinned, and the connection terminals are produced by the... Agent: Lowe Hauptman Ham & Berner, LLP

20090263933 - Field effect transistor and method of producing same: wherein R1 and R2 are independently selected from the group consisting of a hydrogen atom, a halogen atom, a hydroxyl group, and alkyl, alkenyl, oxyalkyl, thioalkyl, alkyl ester and aryl groups each having 1 to 12 carbon atoms with the proviso that adjacent R1 may be the same or different... Agent: Fitzpatrick Cella Harper & Scinto

20090263932 - Organic semiconductor thin films using aromatic enediyne derivatives and manufacturing methods thereof, and electronic devices incorporating such films: Disclosed are organic semiconductor thin films using aromatic enediyne derivatives, manufacturing methods thereof, and methods of fabricating electronic devices incorporating such organic semiconductor thin films. Aromatic enediyne derivatives according to example embodiments provide improved chemical and/or electrical stability which may improve the reliability of the resulting semiconductor devices. Aromatic enediyne... Agent: Harness, Dickey & Pierce, P.L.C

20090263934 - Methods of forming chalcogenide films and methods of manufacturing memory devices using the same: A method of forming a chalcogenide film is provided which includes forming a germanium film on a substrate by exposing the substrate to a germanium source and a first antimony source, and growing a polynary film from the germanium film by exposing the germanium film to at least one of... Agent: Volentine & Whitt PLLC

20090263935 - Recycling faulty multi-die packages: The present invention teaches the recycling of a faulty multi-die memory package by isolating the functional part of the package and using it as a smaller memory package.... Agent: Vierra Magen/sandisk Corporation

20090263936 - Insulating liquid die-bonding agent and semiconductor device: An insulating liquid die-bonding agent for bonding a semiconductor-chip-mounting member to an active surface of a semiconductor chip, said agent comprising: (A) a mixture of (a-1) an organopolysiloxane resin having alkenyl groups and (a-2) a linear-chain organopolysiloxane having in one molecule at least two alkenyl groups; (B) an organopolysiloxane having... Agent: Howard & Howard Attorneys PLLC

20090263937 - Leadframe package for mems microphone assembly: A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have... Agent: Robert D. Atkins

20090263938 - Method for manufacturing semiconductor device: In a double-sided electrode package, a sealing resin layer is formed so as to fill peripheries of surface-side terminals formed on a package substrate. Since the side surfaces of the surface-side terminals have plural protruded rims, adhesion with the sealing resin layer is improved by an anchor effect. At a... Agent: Rabin & Berdo, PC

20090263939 - Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263940 - Molding cleaning sheet and method of producing semiconductor devices using the same: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half... Agent: Mattingly & Malur, P.C.

20090263941 - Multi-channel type thin film transistor and method of fabricating the same: A multi-channel type thin film transistor includes a gate electrode over a substrate extending along a first direction, a plurality of active layers parallel to and spaced apart from each other extending along a second direction crossing the first direction, and source and drain electrodes spaced apart from each other... Agent: Morgan Lewis & Bockius LLP

20090263942 - Semiconductor device and method for manufacturing the same: A single crystal semiconductor substrate including an embrittlement layer is attached to a base substrate with an insulating layer interposed therebetween, and the single crystal semiconductor layer is separated at the embrittlement layer by heat treatment; accordingly, a single crystal semiconductor layer is fixed over the base substrate. The single... Agent: Eric Robinson

20090263943 - Method of fabricating semiconductor integrated circuit device: A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETS by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090263944 - Method for making low vt gate-first light-reflective-layer covered dual metal-gates on high-k cmosfets: This invention proposes a method for making low Vt light-reflective-layer/dual-metal-gates/high-κ CMOSFETs with simple light-irradiation anneal and light-reflective-layer covered dual metal-gates with self-aligned and gate-first process compatible with current VLSI process. At 1.05 nm EOT, good φm-eff of 5.04 and 4.24 eV, low Vt of −0.16 and 0.13 V, high mobility... Agent: Bacon & Thomas, PLLC

20090263946 - Device having pocketless regions and methods of making the device: An example of the present application is directed to an integrated circuit having a first plurality of transistors and a second plurality of transistors. Each of the first plurality of transistors comprises a first gate structure oriented in a first direction and each of the second plurality of transistors comprises... Agent: Texas Instruments Incorporated

20090263945 - Manufacturing method of cmos type semiconductor device, and cmos type semiconductor device: The manufacturing method of the CMOS type semiconductor device which can suppress the boron penetration from the gate electrode of the pMOS transistors to the semiconductor substrate in the case that boron is contained in the gate electrodes, while enabling the improvement in the NBTI lifetime of the pMOS transistors,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263947 - Bottom source ldmosfet structure and method: This invention discloses a method to form a bottom-source lateral diffusion MOS (BS-LDMOS) device with a source region disposed laterally opposite a drain region near a top surface of a semiconductor substrate supporting a gate thereon between the source region and a drain region. The method includes a step of... Agent: Bo-in Lin

20090263948 - Metal oxide semiconductor field-effect transistor (mosfet) and method of fabricating the same: A Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) is provided. The MOSFET includes a semiconductor substrate, a device isolating region disposed on a predetermined portion of the semiconductor substrate to define an active region, a source region and a drain region spaced apart from each other about a channel region within... Agent: F. Chau & Associates, LLC

20090263949 - Transistors having asymmetric strained source/drain portions: A structure formation method. First, a structure is provided including (a) a fin region comprising (i) a first source/drain portion having a first surface and a third surface parallel to each other, not coplanar, and both exposed to a surrounding ambient, (ii) a second source/drain portion having a second surface... Agent: Schmeiser, Olsen & Watts

20090263950 - Semiconductor device: A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263951 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes the steps of forming an insulating film on a semiconductor substrate, forming a plurality of wiring trenches in the insulating film, forming a plurality of wirings in the plurality of wiring trenches, forming a resist mask having an opening for selectively exposing... Agent: Mcdermott Will & Emery LLP

20090263952 - Semiconductor device fabrication using spacers: A process for fabrication of a semiconductor device that includes forming a first trench in a semiconductor body, forming spaced spacers in the first trench, and forming a narrower second trench at the bottom of the first trench using the spacers as a mask.... Agent: Farjami & Farjami LLP

20090263953 - Method for low temperature bonding and bonded structure: A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263954 - Semiconductor wafer sawing system and method: Semiconductor wafer sawing systems and methods are described in which a wafer may be secured in a sawing position having a surface exposed to incur sawing with at least a portion of the exposed wafer surface positioned below the center of gravity of the wafer such that prevailing force of... Agent: Texas Instruments Incorporated

20090263955 - Gan single crystal substrate and method of making the same: The method of making a GaN single crystal substrate comprises a mask layer forming step of forming on a GaAs substrate 2 a mask layer 8 having a plurality of opening windows 10 disposed separate from each other; and an epitaxial layer growing step of growing on the mask layer... Agent: Smith, Gambrell & Russell

20090263958 - Clathrate compounds and methods of manufacturing: The present invention comprises new materials, material structures, and processes of fabrication of such that may be used in technologies involving the conversion of light to electricity and/or heat to electricity, and in optoelectronics technologies. The present invention provide for the fabrication of a clathrate compound comprising a type II... Agent: Smith Hopen, Pa

20090263957 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.

20090263956 - Spray method for producing semiconductor nano-particles: A method is provided for producing semiconductor nanoparticles comprising: (i) dissolving a semiconductor compound or mixture of semiconductor compounds in a solution; (ii) generating spray droplets of the resulting solution of semiconductor compound(s); (iii) vaporizing the solvent of said spray droplets, consequently producing a stream of unsupported semiconductor nanoparticles; and... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20090263959 - Method of manufacturing semiconductor wafer: A device layer is formed on at least the upper surface of a prime wafer by an epitaxial growth method. Then, a protective film is formed to cover at least the device layer. The lower surface of the prime wafer is ground to have a flat lower surface.... Agent: Rabin & Berdo, PC

20090263960 - Semiconductor device with recess gate and method of fabricating the same: A semiconductor device with a recess gate includes a substrate, a semiconductive layer having an opening corresponding to a gate region, a gate electrode filled in the opening, and a gate insulating layer interposed between the gate electrode and the substrate, and between the gate electrode and the semiconductive layer.... Agent: Lowe Hauptman Ham & Berner, LLP

20090263961 - Hardware set for growth of high k & capping material films: The present invention generally includes a method and an apparatus for depositing both a high k layer and a capping layer within the same processing chamber by coupling gas precursors, liquid precursors, and solid precursors to the same processing chamber. By coupling gas precursors, liquid precursors, and solid precursors to... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090263962 - Non-volatile memory cell device and methods: A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming a second dielectric layer over the nanodots, where the second dielectric layer encases the nanodots. In addition, an intergate dielectric layer is formed over the second dielectric layer. To form sidewalls of the... Agent: Brooks, Cameron & Huebsch , PLLC

20090263963 - Semiconductor device and manufacturing method therefor: In a semiconductor having a multilayer wiring structure device on a semiconductor substrate, the multilayer wiring structure includes an interlayer insulating film having at least an organic siloxane insulating film. The organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20090263964 - Interconnections for integrated circuits: An interconnect connection structure having first and second interconnects and multiple connection elements that electrically connect the first interconnect to the second interconnect is described. The multiple connection elements are formed laterally in a lateral region of the first and second interconnects relative to an overlay orientation of the interconnects.... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20090263965 - Self-aligned barrier layers for interconnects: An interconnect structure for integrated circuits incorporates manganese silicate and manganese silicon nitride layers that completely surrounds copper wires in integrated circuits and methods for making the same are provided. The manganese silicate forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown,... Agent: Wilmerhale/boston

20090263966 - Apparatus for sputtering and a method of fabricating a metallization structure: A method of depositing a metallization structure (1) comprises depositing a TaN layer (4) by applying a power supply between an anode and a target in a plurality of pulses to reactively sputter Ta from the target onto the substrate (2) to form a TaN seed layer (4). A Ta... Agent: Pearne & Gordon LLP

20090263969 - Hidden plating traces: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate... Agent: Vierra Magen/sandisk Corporation

20090263968 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes: forming a conductive film over a semiconductor wafer; forming a mask film over the conductive film; removing a portion of the mask film covering at least a peripheral portion of the semiconductor wafer such that a portion of the mask film covering... Agent: Sughrue Mion, PLLC

20090263967 - Method of forming noble metal layer using ozone reaction gas: A noble metal layer is formed using ozone (O3) as a reaction gas.... Agent: Lowe Hauptman Ham & Berner, LLP

20090263970 - Method of forming fine pattern of semiconductor device using sige layer as sacrificial layer, and method of forming self-aligned contacts using the same: There are provided a method of forming a fine pattern of a semiconductor device using a silicon germanium sacrificial layer, and a method of forming a self-aligned contact using the same. The method of forming a self-aligned contact of a semiconductor device includes forming a conductive line structure having a... Agent: F. Chau & Associates, LLC

20090263971 - Method of manufacturing semiconductor device and substrate processing apparatus: A method of manufacturing a semiconductor device comprises: (a) loading a substrate into a process chamber, wherein the substrate has at least a silicon exposure surface and an exposure surface of silicon oxide film or silicon nitride film on a substrate surface; (b) simultaneously supplying at least a first process... Agent: Brundidge & Stanger, P.C.

20090263972 - Boron nitride and boron-nitride derived materials deposition method: A method and apparatus are provided to form spacer materials adjacent substrate structures. In one embodiment, a method is provided for processing a substrate including placing a substrate having a substrate structure adjacent a substrate surface in a deposition chamber, depositing a spacer layer on the substrate structure and substrate... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090263973 - Fin mask and method for fabricating saddle type fin using the same: A fin mask for forming saddle type fins in each of active regions formed in an island shape having a certain size with a major axis and a minor axis includes a first fin mask of a line type, and a second fin mask of an island type, wherein the... Agent: Townsend And Townsend And Crew, LLP

20090263974 - Substrate processing system for performing exposure process in gas atmosphere: A substrate processing system which sprays exposure process gas onto a substrate disposed within a chamber. The substrate processing system is used, for example, for performing an exposure process of an organic film formed on a substrate in a gas atmosphere obtained by vaporizing an organic solvent solution for dissolving... Agent: Muirhead And Saturnelli, LLC

20090263976 - Apparatus for manufacturing semiconductor device and method for manufacturing semiconductor device: Variation in the thickness of the deposited films depending on number of the processed product wafers in the deposition process employing a batch type CVD apparatus is inhibited to provide a manufacture of the film having a predetermined thickness with an improved reproducibility. The deposition apparatus 100 comprises a deposition... Agent: Young & Thompson

20090263975 - Film formation method and apparatus for forming silicon-containing insulating film doped with metal: A film formation method for a semiconductor process performs a film formation process to form a silicon-containing insulating film doped with a metal on a target substrate, in a process field inside a process container configured to be selectively supplied with a silicon source gas and a metal source gas.... Agent: Smith, Gambrell & Russell

20090263977 - Selective functionalization of doped group iv surfaces using lewis acid/lewis base interaction: A method of selectively attaching a capping agent to a Group IV semiconductor surface is disclosed. The method includes providing the Group IV semiconductor surface, the Group IV semiconductor surface including a set of covalently bonded Group IV semiconductor atoms and a set of surface boron atoms. The method also... Agent: Foley & Lardner LLP

20090263978 - Laser mask and crystallization method using the same: An embodiment of a laser crystallization method includes providing a substrate on which an amorphous silicon thin film is deposited, positioning a laser mask over the substrate, the laser mask including a mask pattern that contains transmitting regions and a blocking region, irradiating a first laser beam onto a surface... Agent: Birch Stewart Kolasch & Birch

20090258443 - Nonvolatile memory devices and methods of fabricating the same: Nonvolatile memory devices and methods of fabricating the same are provided. In some embodiments, a nonvolatile memory device includes a lower conductive member formed on an upper part of or inside a substrate, a ferroelectric organic layer formed on the lower conductive member, a protective layer formed on the ferroelectric... Agent: Mills & Onello LLP

20090258444 - Apparatus and methods for manufacturing thin-film solar cells: Improved methods and apparatus for forming thin-film layers of semiconductor material absorber layers on a substrate web. According to the present teachings, a semiconductor layer may be formed in a multi-zone process whereby various layers are deposited sequentially onto a moving substrate web.... Agent: Kolisch Hartwell, P.C.

20090258445 - Multi-variable regression for metrology: A method for assessing metrology tool accuracy is described. Multi-variable regression is used to define the accuracy of a metrology tool such that the interaction between different measurement parameters is taken into account. A metrology tool under test (MTUT) and a reference metrology tool (RMT) are used to measure a... Agent: HorizonIPPte Ltd

20090258446 - Pattern verification method, method of manufacturing semiconductor device, and recording media: A pattern verification method according to an embodiment includes, dividing a pattern data region or a pattern formation region formed based on the pattern data to a plurality of unit regions, calculating a pattern area ratio with respect to each unit region, calculating differences in the amount of the pattern... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090258447 - Method of detecting heavy metal in semiconductor substrate: A method of detecting heavy metal in a semiconductor substrate, includes: a gate oxide film forming step of forming an organic oxide film by spin coating or a sol-gel process, and forming a metal/oxide film/semiconductor junction element by using a mercury probe method; and a step of detecting and quantifying... Agent: Greenblum & Bernstein, P.L.C

20090258448 - Method for making thermal electron emitter: A method for making the thermal electron emitter includes following steps. Providing a carbon nanotube film including a plurality of carbon nanotubes. Treating the carbon nanotube film with a solution comprising of a solvent and compound or a precursor of a compound, wherein the compound and the compound that is... Agent: PCe Industry, Inc. Att. Steven Reiss

20090258449 - Fabricating method of light emitting diode package: A method of fabricating a light emitting diode package structure is provided. First, a first circuit substrate having a first surface and a corresponding second surface and a second circuit substrate having a third surface and a corresponding fourth surface are provided. The second surface and the third surface respectively... Agent: Jianq Chyun Intellectual Property Office

20090258451 - Liquid crystal display device: An LCD device is disclosed in which column spacers for a cell gap are arranged between gate and common lines to reduce a contact area between the column spacers and an opposing substrate, and a stable cell gap is maintained over the whole panel by reducing variation of a thickness... Agent: Mckenna Long & Aldridge LLP

20090258450 - Method for manufacturing wiring, thin film transistor, light emitting device and liquid crystal display device, and droplet discharge apparatus for forming the same: As a semiconductor device, specifically, a pixel portion included in a semiconductor device is made to have higher precision and higher aperture ratio, it is required to form a smaller wiring in width. In the case of forming a wiring by using an ink-jet method, a dot spreads on a... Agent: Nixon Peabody, LLP

20090258453 - Method fabricating nitride-based compound layer, gan substrate and vertical structure nitride-based semiconductor light emitting device: In a method for fabricating a nitride-based compound layer, first, a GaN substrate is prepared. A mask layer with a predetermined pattern is formed on the GaN substrate to expose a partial area of the GaN substrate. Then a buffer layer is formed on the partially exposed GaN substrate. The... Agent: Mcdermott Will & Emery LLP

20090258452 - Method for forming quantum well structure and method for manufacturing semiconductor light emitting element: A method for forming a quantum well structure that can reduce the variation in the In composition in the thickness direction of a well layer and a method for manufacturing a semiconductor light emitting element are provided. In a step of forming a quantum well structure (active layer) by alternately... Agent: Venable LLP

20090258454 - Method of manufacturing gallium nitride based light emitting diode having surface irregularities: An n-type GaN layer is formed on a substrate, and an active layer is formed on the n-type GaN layer. A p-type GaN layer is formed on the active layer, and portions of the p-type GaN layer and the active layer are mesa-etched so as to expose a portion of... Agent: Mcdermott Will & Emery LLP

20090258455 - Method of minimizing beam bending of mems device by reducing the interfacial bonding strength between sacrificial layer and mems structure: The beam bending of a MEMS device is minimized by reducing interfacial strength between a sacrificial layer and a MEMS structure.... Agent: Connolly Bove Lodge & Hutz LLP

20090258456 - Method for manufacturing a solid-state image capturing apparatus, and electronic information device: A method for manufacturing a solid-state image capturing apparatus including a pixel array constituted of a plurality of pixels, is provided, where each of the plurality of pixels includes a photoelectric conversion section, the method comprising the steps of: forming an impurity diffusion area in a surface area of a... Agent: Edwards Angell Palmer & Dodge LLP

20090258457 - Buffer layer deposition for thin-film solar cells: Improved methods and apparatus for forming thin-film buffer layers of chalcogenide on a substrate web. Solutions containing the reactants for the buffer layer or layers may be dispensed separately to the substrate web, rather than being mixed prior to their application. The web and/or the dispensed solutions may be heated... Agent: Kolisch Hartwell, P.C.

20090258458 - Dfn semiconductor package having reduced electrical resistance: A dual flat non-leaded semiconductor package is disclosed. A method of making a dual flat non-leaded semiconductor package includes forming a leadframe having a die bonding area with an integral drain lead, a gate lead bonding area and a source lead bonding area, the gate lead bonding area and a... Agent: Schein & Cai LLP James Cai

20090258459 - Packaged system of semiconductor chips having a semiconductor interposer: A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components... Agent: Texas Instruments Incorporated

20090258460 - Manufacturing method of semiconductor device: A manufacturing method of a semiconductor device includes a film state underfill resin adhering step wherein film state underfill resin in a semi-cured state is adhered on the first surface of the board main body without forming a gap between the first surface of the board main body and the... Agent: Ipusa, P.l.l.c

20090258461 - Semiconductor device and method for manufacturing the same: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the... Agent: Harness, Dickey & Pierce, P.L.C

20090258462 - Method for forming doped polysilicon via connecting polysilicon layers: The invention provides for polysilicon vias connecting conductive polysilicon layers formed at different heights. Polysilicon vias are advantageously used in a monolithic three dimensional memory array of charge storage transistors. Polysilicon vias according to the present invention can be used, for example, to connect the channel layer of a first... Agent: Vierra Magen/sandisk Corporation

20090258463 - Methods of fabricating different thickness silicon-germanium layers on semiconductor integrated circuit devices and semiconductor integrated circuit devices fabricated thereby: Methods of fabricating semiconductor integrated circuit devices are provided. A substrate is provided with gate patterns formed on first and second regions. Spaces between gate patterns on the first region are narrower than spaces between gate patterns on the second region. Source/drain trenches are formed in the substrate on opposite... Agent: Myers Bigel Sibley & Sajovec

20090258464 - Methods for manufacturing a high voltage junction field effect transistor using a hybrid orientation technology wafer: Methods for manufacturing a high voltage junction field effect transistor. The method includes forming an opening extending from a top surface of a device layer of a hybrid orientation technology (HOT) wafer through the device layer and an insulating layer to expose a portion of a bulk layer, and filling... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20090258465 - Mask for silicon crystallization, method of forming poly-silicon thin film, and manufacturing method of thin film transistor: A silicon crystallization mask of the present invention includes; a main exposure portion including a plurality of complete light transmission regions which completely transmit light therethrough, and a preliminary exposure portion including a plurality of incomplete light transmission regions, which each partially transmit light therethrough, wherein at least two of... Agent: Cantor Colburn, LLP

20090258466 - Nonvolatile memory device and method for fabricating the same: A nonvolatile (e.g., flash) memory device includes a substrate having a plurality of isolation areas and active areas; a trench formed on the isolation area; a first electrode layer formed on an inner wall of the trench; a first gate oxide layer formed between the inner wall of the trench... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090258467 - Method for fabricating semiconductor device: A method of fabricating a vertical transistor in a semiconductor device improves integration of the semiconductor device according to a design rule. After a semiconductor substrate is etched to form a buried bit line, a gate electrode pattern that surrounds a cylindrical channel region pattern of the vertical transistor is... Agent: Townsend And Townsend And Crew, LLP

20090258468 - Minimizing transistor variations due to shallow trench isolation stress: The present invention provides, in one embodiment, a method of manufacturing a metal oxide semiconductor (MOS) transistor (100). The method comprises forming an active area (105) in a substrate (115), wherein the active area (105) is bounded by an isolation structure (120). The method further includes placing at least one... Agent: Texas Instruments Incorporated

20090258470 - Method of manufacturing a semiconductor device using an atomic layer deposition process: Methods of manufacturing a semiconductor device include forming an absorption layer on a surface of a substrate by exposing the surface of the substrate to a first reaction gas at a first temperature. A metal oxide layer is then formed on the surface of the substrate by exposing the absorption... Agent: Myers Bigel Sibley & Sajovec

20090258469 - Method of manufacturing semiconductor device: In a method of manufacturing a semiconductor device, a carbon-containing film having electrical conductivity is formed so as to cover a first insulating film, a discharge plug and a conductor plug. A first conductive film is formed so as to pass through the carbon-containing film and to be in contact... Agent: Young & Thompson

20090258471 - Application of different isolation schemes for logic and embedded memory: The present invention facilitates semiconductor device fabrication by providing mechanisms for utilizing different isolation schemes within embedded memory and other logic portions of a device. The isolation mechanism of the embedded memory portion is improved relative to other portions of the device by increasing dopant concentrations or reducing the depth... Agent: Texas Instruments Incorporated

20090258473 - Nonvolatile memory device and method of manufacturing the same: Example embodiments provide a nonvolatile memory device and a method of manufacturing the same. A floating gate electrode of the nonvolatile memory device may have a cross-shaped section as taken along a direction extending along a control gate electrode. The floating gate electrode may have an inverse T-shaped section as... Agent: Harness, Dickey & Pierce, P.L.C

20090258472 - Semiconductor array and method for manufacturing a semiconductor array: a

20090258474 - Method for producing sol substrate: Provided is a method for producing an SOI substrate having a thick-film SOI layer, in which an ion-implanted layer is formed by implanting at least one kind of ion of hydrogen ion and a rare gas ion into a surface of a bond wafer, an SOI substrate having an SOI... Agent: Oliff & Berridge, PLC

20090258475 - Method for producing bonded wafer: Even if an oxygen ion implanted layer in a wafer for active layer is not a completely continuous SiO2 layer but a layer mixed partially with Si or SiOx, it is removed by here is provided a method for producing a bonded wafer in which it is possible to remove... Agent: Sughrue Mion, PLLC

20090258476 - Apparatus and methods for manufacturing thin-film solar cells: Improved methods and apparatus for forming thin-film layers of semiconductor material absorber layers on a substrate web. According to the present teachings, a semiconductor layer may be formed in a multi-zone process whereby various layers are deposited sequentially onto a moving substrate web.... Agent: Kolisch Hartwell, P.C.

20090258477 - Methods of forming phase-change memory units, and methods of manufacturing phase-change memory devices using the same: In a method of forming a phase-change memory unit, a conductive layer is formed on a substrate having a trench. The conductive layer is planarized until the substrate is exposed to form a first electrode. A spacer partially covering the first electrode is formed. A phase-change material layer is formed... Agent: Myers Bigel Sibley & Sajovec

20090258478 - Method for providing a nanoscale, high electron mobility transistor (hemt) on insulator: Various embodiments include forming a silicon-germanium layer over a substrate of a device; forming a layer in the silicon-germanium layer, the layer including at least one of boron and carbon; and forming a silicon layer over the silicon-germanium layer. Additional embodiments are described.... Agent: Schwegman, Lundberg & Woessner / Atmel

20090258479 - Nonvolatile semiconductor memory device and manufacturing method thereof: A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electrode is provided over the charge accumulating layer with a... Agent: Eric Robinson

20090258480 - Method of selectively adjusting ion implantation dose on semiconductor devices: A first semiconductor region and a second semiconductor region separated by a shallow trench isolation region are formed in a semiconductor substrate. A photoresist is applied and patterned so that the first semiconductor region is exposed, while the second semiconductor region is covered. Depending on the setting of parameters for... Agent: Scully, Scott, Murphy & Presser, P.C.

20090258481 - Semiconductor device manufacturing apparatus and semiconductor device manufacturing method: A semiconductor device manufacturing apparatus which uses a thermal CVD reaction to deposit a film onto a substrate has a ring with an electrode terminal that makes contact with either the substrate or the deposited film thereon, a power supply that applies a current or a potential to this electrode... Agent: Hayes Soloway P.C.

20090258482 - Method for fabricating a metal gate structure: A method of fabricating a metal gate structure is provided. The method includes providing a semiconductor substrate with a planarized polysilicon material; patterned the planarized polysilicon material to form at least a first gate and a second gate, wherein the first gate is located on the active region and the... Agent: North America Intellectual Property Corporation

20090258483 - Method of manufacturing a semiconductor device: Embodiments relate to a method of manufacturing a semiconductor device that may simplify a manufacturing process and may reduce process costs. According to embodiments, the method may include simultaneously forming a first gate of a first device area and a second gate of a second device area, patterning a PMD... Agent: Sherr & Vaughn, PLLC

20090258484 - Methods for fabricating dual material gate in a semiconductor device: A method for fabricating dual material gate structures in a device is provided. The dual material gate structures have different gate electrode materials in different regions of the device. In one embodiment, the method includes providing a substrate having a patterned first gate electrode and a patterned first gate dielectric... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090258485 - Semiconductor processing methods: Some embodiments include methods in which insulative material is simultaneously deposited across both a front side of a semiconductor substrate, and across a back side of the substrate. Subsequently, openings may be etched through the insulative material across the front side, and the substrate may then be dipped within a... Agent: Wells St. John P.s.

20090258486 - Semiconductor device fabrication method: A method of forming a semiconductor device including a semiconductor substrate with circuit elements and electrode pads formed on one surface. This surface is covered by a dielectric layer with openings above the electrode pads. A metal layer is deposited on the dielectric layer and patterned to form a conductive... Agent: Volentine & Whitt PLLC

20090258487 - Method for improving the reliability of low-k dielectric materials: A method for forming an integrated circuit structure includes providing a semiconductor substrate; forming a low-k dielectric layer over the semiconductor substrate; generating hydrogen radicals using a remote plasma method; performing a first hydrogen radical treatment to the low-k dielectric layer using the hydrogen radicals; forming an opening in the... Agent: Slater & Matsil, L.L.P.

20090258488 - Methods of fabricating semiconductor devices including storage node landing pads separated from bit line contact plugs: A method can include forming gate lines on a semiconductor substrate and forming a first interlayer dielectric layer for insulating the gate lines from each other. First and second contact plugs are formed on the semiconductor substrate and landing pads are formed on the first contact plugs and the first... Agent: Myers Bigel Sibley & Sajovec

20090258489 - Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same: A method of making a non-volatile memory device includes forming a first electrode, forming a steering element, forming at least one feature, forming a carbon resistivity switching material on at least one sidewall of the at least one feature such that the carbon resistivity switching material electrically contacts the steering... Agent: Sandisk Corporation C/o Foley & Lardner LLP

20090258490 - Method for forming conductive film: A method for forming a conductive film, includes: applying a dispersion liquid above a substrate, the dispersion liquid including a plurality of conductive fine-particles made of one conductive material selected from the group consisting of copper, nickel, and an alloy that includes copper or nickel as a main component; and... Agent: Harness, Dickey & Pierce, P.L.C

20090258491 - Method of inhibiting background plating: Methods of inhibiting background plating on semiconductor substrates using oxidizing agents are disclosed.... Agent: John J. Piskorski Rohm And Haas Electronic Materials LLC

20090258492 - Multiple spacer steps for pitch multiplication: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one... Agent: Knobbe Martens Olson & Bear LLP

20090258493 - Semiconductor device manufacturing method: A substance to be polished made of a silicon oxide film formed on a semiconductor substrate is chemically and mechanically polished and planarized by bringing the substance to be polished into contact with a polishing pad having a modulus of elasticity within a range of 400 to 600 megapascals and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090258494 - Inline integrated circuit system: An integrated circuit package system including: providing a leadframe with an integrated circuit mounted thereover; encapsulating the integrated circuit with an encapsulation; mounting an etch barrier below the leadframe; and etching the leadframe.... Agent: Law Offices Of Mikio Ishimaru

20090258496 - Method for fabricating semiconductor devices using strained silicon bearing material: A method of manufacturing an integrated circuit on semiconductor substrates, e.g., silicon wafer. The method includes providing a semiconductor substrate characterized by a first lattice with a first structure and a first spacing. In a specific embodiment, the semiconductor substrate has an overlying film of material with a second lattice... Agent: Townsend And Townsend And Crew, LLP

20090258498 - Method for manufacturing a semiconductor device: A method for manufacturing a semiconductor device using a photoresist polymer comprising a fluorine component, a photoresist composition containing the photoresist polymer and an organic solvent to reduce surface tension, by forming a photoresist film uniformly on the whole surface of an underlying layer pattern to allow a subsequent ion-implanting... Agent: Marshall, Gerstein & Borun LLP

20090258495 - Modified darc stack for resist patterning: A method of making a device includes forming a device layer, forming an organic hard mask layer over the device layer, forming a first oxide hard mask layer over the organic hard mask layer, forming a DARC layer over the first oxide hard mask layer, forming a photoresist layer over... Agent: Sandisk Corporation C/o Foley & Lardner LLP

20090258497 - Photoresist resin, and method for forming pattern and method for manufacturing display panel using the same: A photoresist resin composition, a method for forming a pattern and a method for manufacturing a display panel using the photoresist resin composition are disclosed. The photoresist resin composition includes an alkali soluble resin, a photoresist compound, and a solvent, wherein the alkali soluble resin includes a first polymer resin... Agent: Cantor Colburn, LLP

20090258501 - Double patterning method: A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern, rendering the first photoresist pattern insoluble to a solvent, forming a second photoresist layer over the first photoresist pattern, patterning the second photoresist... Agent: Sandisk Corporation C/o Foley & Lardner LLP

20090258500 - Method of forming a pattern for a semiconductor device and method of forming the related mos transistor: A method of forming a pattern for a semiconductor device, in which, two hard masks are included between an upper spin-on glass (SOG) layer and a lower etching target layer. The SOG layer is etched twice through two different patterned photoresists respectively to form a fine pattern in the SOG... Agent: North America Intellectual Property Corporation

20090258499 - Method of forming at least an opening using a tri-layer structure: A method of forming openings is disclosed. A substrate is first provided, and the tri-layer structure is formed on the substrate. The tri-layer structure includes a bottom photoresist layer, a silicon-containing layer and a top photoresist layer form bottom to top. Subsequently, the top photoresist layer is patterned, and the... Agent: North America Intellectual Property Corporation

20090258502 - Selective etch of high-k dielectric material: A method for selectively etching a high-k dielectric layer with respect to a polysilicon material is provided. The high-k dielectric layer is partially removed by Ar sputtering, and then the high-k dielectric layer is etched using an etching gas comprising BCl3. The high-k dielectric layer and the polysilicon material may... Agent: Beyer Law Group LLP

20090258503 - Method for manufacturing semiconductor device and computer readable medium for storing pattern size setting program: A method of manufacturing a semiconductor device, which forms a pattern by performing pattern transformation steps multiple times, comprises setting finished pattern sizes for patterns to be formed in each consecutive two pattern transformation steps among the plurality of pattern transformation steps based on a possible total amount of in-plane... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090258504 - Substrate processing apparatus and method of manufacturing semiconductor device: Provided are a substrate processing apparatus and a method of manufacturing a semiconductor device. The substrate processing apparatus includes a reaction vessel configured to process a substrate, a heater configured to heat an inside of the reaction vessel, a gas supply line configured to supply gas into the reaction vessel,... Agent: Brundidge & Stanger, P.C.

20090258505 - Semiconductor device manufacturing method: A manufacturing method for semiconductor devices having MOSFET gate insulation films The method includes forming a silicon oxide film, forming a silicon nitride film, nitriding the silicon nitride film, and first and second heat treatments.... Agent: Volentine & Whitt PLLC

20090258506 - Substrate processing method and substrate processing apparatus: A substrate processing method comprises a main treatment process for oxidizing a substrate containing tungsten with a gas containing oxygen, and a cleaning process for removing tungsten oxides with a gas containing hydrogen. The main treatment process includes a step of loading the substrate containing metal into the processing chamber;... Agent: Kratz, Quintos & Hanson, LLP

20090258507 - Substrate treatment device and substrate treatment method: In order to solve the problem of contamination caused by static electricity on the surface of a substrate after plasma treatment, the invention provides a substrate treatment device comprising a standby chamber in which is arranged a transfer device for loading a substrate out of/into a cassette rack accommodating a... Agent: Mcginn Intellectual Property Law Group, PLLC

20090253221 - Method of measuring nitrogen content, method of forming silicon oxynitride film and process for producing semiconductor device: The total film thickness T1N of silicon oxynitride film and silicon oxide film remaining as its underlying layer is measured. A measurement target substrate is re-oxidized, and, after the re-oxidization, the total film thickness (T2N) of the silicon oxynitride film, silicon oxide film and silicon oxide film resulting from the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090253222 - Etching process state judgment method and system therefor: e

20090253223 - Organic electroluminescent element manufacturing method: An ink containing an electroluminescent light emitting material is discharged onto a buffer layer. The discharge amount of the ink is larger than a maximum volume where the ink is retained by the surface tension thereof on the top surface of the buffer layer.... Agent: Sharp Kabushiki Kaisha C/o Keating & Bennett, LLP

20090253224 - Nanocrystal structures: A structure including a grating and a semiconductor nanocrystal layer on the grating, can be a laser. The semiconductor nanocrystal layer can include a plurality of semiconductor nanocrystals including a Group II-VI compound, the nanocrystals being distributed in a metal oxide matrix. The grating can have a periodicity from 200... Agent: Steptoe & Johnson LLP

20090253225 - Method of processing a semiconductor substrate by thermal activation of light elements: s

20090253226 - Camera module and method of fabricating the same: Example embodiments may provide a camera module including a high-resolution lens member and/or an image sensor chip that may be integrally formed, and a method of fabricating a camera module. Example embodiment camera modules may include a semiconductor package including an image sensor chip. A transparent substrate may include an... Agent: Harness, Dickey & Pierce, P.L.C

20090253227 - Engineered or structured coatings for light manipulation in solar cells and other materials: The present disclosure concerns a means to design, engineer and use antireflective or metallo-dielectric coatings incorporating metallic, nonmetallic, organic and inorganic metamaterials or nanostructures to manipulate light in solar thermal and photovoltaic materials. Such metallic, nonmetallic, organic or inorganic metamaterials or nanostructures could be used to manipulate light for photovoltaic... Agent: Matter, Inc.

20090253228 - Organic thin film transistor and method for manufacturing the same, and active matrix display and radio recognition tag using the same: An organic thin film transistor of the present invention includes a substrate (11) and a semiconductor layer (14) made of an organic semiconductor and formed on the substrate (11). The semiconductor layer (14) is composed of crystals of the organic semiconductor, and a crystal phase of the crystals is the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090253229 - Method and apparatus for manufacturing semiconductor devices: A semiconductor device manufacturing method according to the present invention uses a first raw material gas containing Si, a second raw material gas containing a metal element M and an oxidation gas, in which a first step of supplying the oxidation gas onto a substrate to be treated, and a... Agent: Foley And Lardner LLP Suite 500

20090253230 - Method for manufacturing stack chip package structure: A method for manufacturing a stack chip package structure is disclosed. The method comprises: providing a first substrate; disposing a first chip on the first substrate; disposing a second chip and at least one second substrate on the first chip, wherein the second substrate is electrically connected to the first... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090253231 - Adhesive sheet for laser dicing and its manufacturing method: An adhesive sheet for laser dicing is used for dicing a workpiece into individual chips by light absorption ablation of laser beam and has at least an adhesive layer on one side of a base material which has a surface opposite to the adhesive layer having no convex parts of... Agent: Knobbe Martens Olson & Bear LLP

20090253233 - Method of fabricating bonding structure: A method of fabricating a bonding structure having compliant bumps includes first providing a first substrate and a second substrate. The first substrate includes first bonding pads. The second substrate is disposed on one side of the first substrate and includes second bonding pads and compliant bumps disposed thereon. The... Agent: Jianq Chyun Intellectual Property Office

20090253232 - Microwave cure of semiconductor devices: A method for curing an adhesive is disclosed. A preferred embodiment comprises securing a cover onto a substrate to enclose a MEMs device using an adhesive. The adhesive is either partially or fully cured using microwave radiation. Another preferred embodiment utilizes the microwave radiation to cure an encapsulant placed to... Agent: Texas Instruments Incorporated

20090253234 - Methods of fabricating lateral dmos transistors including retrograde regions therein: A metal-oxide semiconductor transistor includes a semiconductor substrate including a source region and a drain region adjacent a surface of the substrate and a drift region between the source region and the drain region. The drift region has an impurity concentration distribution such that a peak impurity concentration of the... Agent: Myers Bigel Sibley & Sajovec

20090253235 - Method of manufacturing semiconductor device with offset sidewall structure: A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating speed of circuits. An N-type impurity... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090253236 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes forming a plurality of pillar patterns on a substrate, filling a gap between the pillar patterns with a first conductive layer, forming a first hard mask layer pattern over the pillar patterns adjacent in one direction, etching the first conductive layer using... Agent: Lowe Hauptman Ham & Berner, LLP

20090253237 - Scalable power field effect transistor with improved heavy body structure and method of manufacture: A method for forming a field effect transistor (FET) includes the following steps. A well region of a first conductivity type is formed in a semiconductor region of a second conductivity type. A gate electrode is formed adjacent to but insulated from the well region. A source region of the... Agent: Townsend And Townsend And Crew, LLP

20090253238 - Method of forming multiple fins for a semiconductor device: A fabrication process for a FinFET device is provided. The process begins by providing a semiconductor wafer having a layer of conductive material such as silicon. A whole-field arrangement of fins is then formed from the layer of conductive material. The whole-field arrangement of fins includes a plurality of conductive... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20090253239 - Method and structure for ballast resistor: A method for fabricating a low-value resistor such as a ballast resistor for bipolar junction transistors. The resistor may be fabricated using layers of appropriate sheet resistance so as to achieve low resistance values in a compact layout. The method may rely on layers already provided by a conventional CMOS... Agent: King & Spalding

20090253240 - Thick oxide p-gate nmos capacitor for use in a low-pass filter of a circuit and method of making same: A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20090253241 - Method for manufacturing a semiconductor device: Disclosed herein is a method for manufacturing a semiconductor device that includes: etching a semiconductor substrate to form a recess region; forming a device isolation trench in a portion of the etched semiconductor substrate including a portion of the recess region; and forming a device isolation film in the device... Agent: Marshall, Gerstein & Borun LLP

20090253242 - Method of fabricating non-volatile memory device: A method of fabricating a non-volatile memory device includes: forming a tunnel insulation layer pattern and a floating gate electrode layer pattern over a semiconductor substrate; forming an isolation trench by etching an exposed portion of the semiconductor substrate so that the isolation trench is aligned with the tunnel insulation... Agent: Marshall, Gerstein & Borun LLP

20090253243 - Methods of manufacturing non-volatile memory devices: In a method of manufacturing a non-volatile memory device, a conductive structure is formed on a substrate. The conductive structure includes a tunnel oxide pattern, a first conductive pattern, a pad oxide pattern and a hard mask pattern. A trench is formed on the substrate using the conductive structure as... Agent: Myers Bigel Sibley & Sajovec

20090253244 - Nonvolatile memory devices having gate structures doped by nitrogen and methods of fabricating the same: Nonvolatile memory devices are provided including an integrated circuit substrate and a charge storage pattern on the integrated circuit substrate. The charge storage pattern has a sidewall and a tunnel insulating layer is provided between the charge storage pattern and the integrated circuit substrate. A gate pattern is provided on... Agent: Myers Bigel Sibley & Sajovec

20090253245 - Wafer bonding method and wafer structure: A wafer bonding method includes providing a primary wafer and a plurality of secondary wafers, wherein the primary wafer is larger than the secondary wafers. An intermediate material layer is formed on at least one of a bonding surface of the primary wafer and bonding surfaces of the secondary wafers.... Agent: Mills & Onello LLP

20090253250 - Formation of nanowhiskers on a substrate of dissimilar material: A method for forming a nanowhisker of, e.g., a III-V semiconductor material on a silicon substrate, comprises: preparing a surface of the silicon substrate with measures including passivating the substrate surface by HF etching, so that the substrate surface is essentially atomically flat. Catalytic particles on the substrate surface are... Agent: Foley And Lardner LLP Suite 500

20090253247 - Method for manufacturing iron silicide nano-wires: A method for making iron silicide nano-wires comprises the following steps. Firstly, providing a growing substrate and a growing device, the growing device comprising a heating apparatus and a reacting room. Secondly, placing the growing substrate and a quantity of iron powder into the reacting room. Thirdly, introducing a silicon-containing... Agent: PCe Industry, Inc. Att. Steven Reiss

20090253249 - Method of manufacturing semiconductor device: There is provided a method of manufacturing a semiconductor device which, in the case where an InP-based device is formed with a sacrificial layer in between, is capable of obtaining better device characteristics than those in the case where an AlAs single layer is used as the sacrificial layer, and... Agent: Rader Fishman & Grauer PLLC

20090253248 - Method of manufacturing silicon nano-structure: A method for making silicon nano-structure, the method includes the following steps. Firstly, providing a growing substrate and a growing device, the growing device comprising a heating apparatus and a reacting room. Secondly, placing the growing substrate and a quantity of catalyst separately into the reacting room. Thirdly, introducing a... Agent: PCe Industry, Inc. Att. Steven Reiss

20090253246 - Plasma processing apparatus and plasma processing method: A plasma processing device 100 includes a chamber 15, a gas introducing portion 28, an exhaust unit 29, and a high-frequency power supply unit 30. In the chamber 15, there are provided an anode electrode (first electrode) 4 having a flat-plate shape, a cathode electrode (second electrode) 12 having a... Agent: Nixon & Vanderhye, PC

20090253251 - Crystalline semiconductor film, method of manufacturing the same, and semiconductor device: A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount... Agent: Eric Robinson

20090253252 - Substrates for silicon solar cells and methods of producing the same: Aspects of the invention include methods for depositing silicon on a substrate. In certain embodiments, the methods include exposing a substrate containing silicon to a halogenated silane in a manner sufficient to deposit the silicon on the substrate. In certain embodiments, the method includes providing a substrate, one or more... Agent: Wall & Tong , LLP

20090253253 - Method of adjusting fdsoi threshold voltage through oxide charges generation in the buried oxide: Different performance MOSFET Fully Depleted devices can be achieved on a single chip by varying the Vt through ion implantation. The integration of multiple Vt can be achieved through the selection of a metal gate stack with suitable effective WF for one semiconductor device to be included on a chip.... Agent: Texas Instruments Incorporated

20090253254 - Method of fabricating semiconductor device: In a method of fabricating a semiconductor device having vertical channels and a method of patterning a gate electrode of such semiconductor device, an initial conductive layer is removed by multiple etching processes.... Agent: Lowe Hauptman Ham & Berner, LLP

20090253255 - Semiconductor device having a pair of fins and method of manufacturing the same: Example embodiments relate to a semiconductor device and a method of manufacturing the same. A semiconductor device according to example embodiments may have reduced disturbances during reading operations and a reduced short channel effect. The semiconductor device may include a semiconductor substrate having a body and a pair of fins... Agent: Harness, Dickey & Pierce, P.L.C

20090253256 - Methods of fabricating semiconductor devices having transistors with different gate structures: A semiconductor device has two transistors of different structure from each other. One of transistors is P-type and the other is N-type. One of the transistors includes a gate structure in which a polysilicon layer contacts a gate insulation film while the other transistor includes a gate structure in which... Agent: Myers Bigel Sibley & Sajovec

20090253257 - Methods of fabricating multi-layer nonvolatile memory devices: A nonvolatile memory device includes a semiconductor substrate having a first well region of a first conductivity type, and at least one semiconductor layer formed on the semiconductor substrate. A first cell array is formed on the semiconductor substrate, and a second cell array formed on the semiconductor layer. The... Agent: Myers Bigel Sibley & Sajovec

20090253258 - Semiconductor manufacturing apparatus and semiconductor manufacturing method: A plated film having a uniform film thickness is formed on a surface of a substrate. A semiconductor manufacturing apparatus includes: a holding mechanism for holding a substrate rotatably; a nozzle for supplying a processing solution for performing a plating process on a processing target surface of the substrate; a... Agent: Pearne & Gordon LLP

20090253259 - Solder ball attachment jig and method for manufacturing semiconductor device using the same: Disclosed are a solder attachment jig and a method of manufacturing a semiconductor device using the same. The solder ball attachment jig, which arranges a solder ball to be aligned with a conductive post of a semiconductor wafer, can include a body and a receiving hole, which is formed on... Agent: Staas & Halsey LLP

20090253260 - Semiconductor device, its manufacturing method, and sputtering target material for use in the method: A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and excels in reliability of operation over... Agent: Masuvalley & Partners

20090253261 - Silicon wafer having through-wafer vias with a predetermined geometric shape: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other, forming in the semiconductor substrate at least one trench of a predetermined geometric shape in the first main surface, lining the at least one trench with a dielectric... Agent: Panitch Schwarze Belisario & Nadel LLP

20090253262 - Electroless plating system: An electroless plating system includes a plating solution, and controlling reducing agents in the plating solution for deposition over outlier features smaller than about five hundred nanometers and isolated by about one thousand nanometers.... Agent: Law Offices Of Mikio Ishimaru

20090253263 - Method for fabricating semiconductor device capable of decreasing critical dimension in peripheral region: A method for fabricating a semiconductor device where a critical dimension in a peripheral region is decreased. The method includes the steps of: forming a silicon nitride layer on a substrate including a cell region and a peripheral region; forming a silicon oxynitride layer on the silicon nitride layer; forming... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090253265 - Method for fabricating semiconductor device and substrate processing apparatus: Provided is a method and a substrate processing apparatus for fabricating a semiconductor device by forming a film at a relatively high rate without etching an N+ substrate. In the method, a silicon substrate is loaded into a processing chamber in a first step. In a second step, at least... Agent: Brundidge & Stanger, P.C.

20090253264 - Thin film formation method and manufacturing method for semiconductor device: A method of forming a thin film including a first portion having a first film thickness and a second portion having a second film thickness thinner than the first film thickness. A thin film having the first film thickness is formed on a substrate, an interference waveform upon film formation... Agent: Leydig Voit & Mayer, Ltd

20090253266 - Semiconductor device having multiple fin heights: A semiconductor device having multiple fin heights is provided. Multiple fin heights are provided by using multiple masks to recess a dielectric layer within a trench formed in a substrate. In another embodiment, an implant mold or e-beam lithography are utilized to form a pattern of trenches in a photoresist... Agent: Slater & Matsil, L.L.P.

20090253267 - Reverse masking profile improvements in high aspect ratio etch: A method of improving high aspect ratio etching by reverse masking to provide a more uniform mask height between the array and periphery is presented. A layer of amorphous carbon is deposited over a substrate. An inorganic hard mask is deposited on the amorphous carbon followed by a layer of... Agent: Dinsmore & Shohl LLP

20090253268 - Post-contact opening etchants for post-contact etch cleans and methods for fabricating the same: Post-contact opening etchants for post-etch cleans and methods for fabricating such etchants are provided. In an exemplary embodiment, a post-contact opening etchant comprises anhydrous hydrogen fluoride and a fluoride-dissociation modulating agent. In another embodiment, a method for fabricating a post-contact opening etchant comprises providing anhydrous hydrogen fluoride, combining the anhydrous... Agent: Honeywell International Inc. Patent Services

20090253269 - Semiconductor manufacturing apparatus and semiconductor device manufacturing method: A semiconductor manufacturing apparatus comprises: a substrate process chamber accommodating a substrate; a member heating the substrate, wherein the semiconductor manufacturing apparatus is a substrate processing apparatus for forming a film on the substrate by alternately supplying at least two process gases that react with each other to the substrate... Agent: Brundidge & Stanger, P.C.

20090253270 - Deposition method for high-k dielectric materials: A method for depositing a high-k dielectric material on a semiconductor substrate is disclosed. The method includes applying a chemical bath to a surface of a substrate, rinsing the surface, applying a co-reactant bath to the surface of the substrate, and rinsing the surface. The chemical bath includes a metal... Agent: Intel Corporation C/o Cpa Global

20090253271 - Spin-on film processing using accoustic radiation pressure: An apparatus and process operate to impose sonic pressure upon a spin-on film liquid mass that exhibits a liquid topography and in a solvent vapor overpressure to alter the liquid topography. Other apparatus and processes are disclosed.... Agent: Schwegman, Lundberg & Woessner/micron

20090253272 - Method for manufacturing semiconductor device and substrate processing apparatus: A gate insulating film with less leakage current is formed, while a surface temperature of a silicon substrate is decreased. Gas containing oxygen atoms and nitrogen atoms is supplied into a processing chamber, then the gas containing the oxygen atoms and the nitrogen atoms is activated by plasma, and the... Agent: Oliff & Berridge, PLC

20090253273 - Method of heat-treating semiconductor: The present invention relates to a method of heat-treating a semiconductor, and the object is to enable heat-treating to a semiconductor or semiconductor device in a short period time and to obtain a stable and high reforming effect. The present invention is a method in which carbon or a layer... Agent: Ditthavong Mori & Steiner, P.C.