Semiconductor device manufacturing: process patents - Monitor Patents
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Semiconductor device manufacturing: process

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
09/04/2014 > 67 patent applications in 53 patent subcategories.

20140248719 - Mtj manufacturing method utilizing in-situ annealing and etch back: The present invention is directed to a method for manufacturing spin transfer torque magnetic random access memory (STTMRAM) devices. The method, which utilizes in-situ annealing and etch-back of the magnetic tunnel junction (MTJ) film stack, comprises the steps of depositing a barrier layer on top of a bottom magnetic layer... Agent: Avalanche Technology Inc.

20140248718 - Patterning of magnetic tunnel junction (mtj) film stacks: Chemical modification of non-volatile magnetic random access memory (MRAM) magnetic tunnel junctions (MTJs) for film stack etching is described. In an example, a method of etching a MTJ film stack includes modifying one or more layers of the MTJ film stack with a phosphorous trifluoride (PF3) source to provide modified... Agent:

20140248720 - Device for determining the temperature of a substrate: An apparatus for determining the temperature of a substrate, in particular of a semiconductor wafer during a heating thereof by means of a first radiation source is described. Furthermore, an apparatus and a method for thermally treating substrates are described, in which the substrate is heated by means of at... Agent: Centrotherm Thermal Solutions Gmbh &co. Kg

20140248721 - Method of manufacturing semiconductor device and method of testing the same: A method of manufacturing a semiconductor device according to the present invention includes, in a silicon substrate of the semiconductor chip, providing two TSVs (Through-Silicon-Vias) that are formed such that interfaces with the silicon substrate are covered with insulating films and bottom surface sides thereof do not penetrate through the... Agent: Nec Corporation

20140248722 - Packaging and function tests for package-on-package and system-in-package structures: A method includes placing a plurality of bottom units onto a jig, wherein the plurality of bottom units is not sawed apart and forms an integrated component. Each of the plurality of bottom units includes a package substrate and a die bonded to the package substrate. A plurality of upper... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140248723 - Wafer scale packaging platform for transceivers: A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a “platform” (interposer)... Agent: Cisco Technology, Inc.

20140248727 - Flexible lighting devices: A first device and methods for manufacturing the first device are provided. The first device may comprise a flexible substrate and at least one organic light emitting device (OLED) disposed over the flexible substrate. The first device may have a flexural rigidity between 10−1 Nm and 10−6 Nm, and the... Agent: Universal Display Corporation

20140248726 - Method for fabricating the oled using roll to roll processing: A method for fabricating the OLED including a color conversion layer using roll-to-roll processing is provided. To elaborate, the method for fabricating an OLED comprising: bonding an OLED and an inorganic phosphor to each other through roll-to-roll processing is provided, wherein the inorganic phosphor is provided as a color conversion... Agent: Research & Business Foundation Sungkyunkwan University

20140248724 - Method for manufacturing light emitting diode packages: A method for manufacturing LED packages includes steps: providing a lead frame including many pairs of first, second electrodes and first and second tie bars, the first electrodes and second electrodes each including a main body and an extension electrode protruding outward from the main body; forming many molded bodies... Agent: Advanced Optoelectronic Technology, Inc.

20140248725 - Method for manufacturing light emitting diode packages: A method for manufacturing LED packages includes steps: providing a lead frame including many pairs of first and second electrodes, and first and second tie bars, the first electrodes and second electrodes each including a main body and an extension electrode protruding outward from the main body; forming many molded... Agent: Advanced Optoelectronic Technology, Inc.

20140248728 - Optoelectronic device with light directing arrangement and method of forming the arrangement: An optoelectronic device comprises a body of an indirect bandgap semiconductor material having a surface and a photon active region on one side of the surface. A light directing arrangement is formed integrally with the body on an opposite side of the surface.... Agent: Insiava (pty) Limited

20140248729 - Semiconductor device and method for manufacturing the same: According to one embodiment, a semiconductor device includes a substrate and a stacked body on the substrate via a joining metal layer. The stacked body includes a device portion and a peripheral portion. The device portion includes from a bottommost layer to a topmost layer included in the stacked body.... Agent: Kabushiki Kaisha Toshiba

20140248731 - Apparatus integrating microelectromechanical system device with circuit chip and methods for fabricating the same: One embodiment discloses an apparatus integrating a microelectromechanical system device with a circuit chip which includes a circuit chip, a microelectromechanical system device, a sealing ring, and a lid. The circuit chip comprises a substrate and a plurality of metal bonding areas. The substrate has an active surface with electrical... Agent: Industrial Technology Research Institute

20140248732 - Liquid crystal display device having touch sensor embedded therein, method of driving the same and method of fabricating the same: A liquid crystal display device having a touch sensor embedded therein is disclosed. The present invention includes a liquid crystal layer between first and second substrates, a pixel on the second substrate to apply a horizontal electric field to the liquid crystal layer, a touch sensor on the second substrate,... Agent:

20140248730 - Mems device and method of formation thereof: The present disclosure provides a method including providing a first substrate; and forming a microelectromechanical system (MEMS) device on a first surface of the first substrate. A bond pad is formed on at least one bonding site on the first surface of the first substrate. The bonding site is recessed... Agent:

20140248733 - Method of manufacturing photoelectric conversion device: The present invention provides a method of manufacturing a photoelectric conversion device for forming a semiconductor layer on a substrate by the plasma CVD method. The method includes a first plasma processing step in which a processing temperature reaches a first temperature; a second plasma processing step in which the... Agent:

20140248734 - Cmos image sensors and methods for forming the same: A method includes forming a first implantation mask comprising a first opening, implanting a first portion of a semiconductor substrate through the first opening to form a first doped region, forming a second implantation mask comprising a second opening, and implanting a second portion of the semiconductor substrate to form... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140248735 - Thin-film encapsulated infrared sensor: A method of fabricating a bolometer infrared sensor includes depositing a first sacrificial layer on a surface of a substrate over a sensor region, and forming an absorber structure for the infrared sensor on top of the first sacrificial layer. A second sacrificial layer is deposited on top of the... Agent: Robert Bosch Gmbh

20140248736 - Method of forming a low profile image sensor package: An image sensor package, and method of making same, that includes a printed circuit board having a first substrate with an aperture extending therethrough, one or more circuit layers, and a plurality of first contact pads electrically coupled to the one or more circuit layers. A sensor chip mounted to... Agent: Optiz, Inc.

20140248737 - Method of manufacturing optical image stabilizer: A method of manufacturing an optical image stabilizer including providing a silicon-on-insulator (SOI) substrate that includes first and second silicon each provided on an upper surface and a lower surface of the substrate, having an insulator layer therebetween, forming a table, a cantilever arm connected to the table, an anchor... Agent: Samsung Electro-mechanics Co., Ltd.

20140248738 - Method of p-type doping of cadmium telluride: A method of p-type doping cadmium telluride (CdTe) is disclosed. The method comprising the steps of, (a) providing a first component comprising cadmium telluride (CdTe) comprising an interfacial region, and (b) subjecting the CdTe to a functionalizing treatment to obtain p-type doped CdTe, said functionalizing treatment comprising a thermal treatment... Agent: First Solar, Inc.

20140248739 - Heating a furnace for the growth of semiconductor material: A multi-ingot furnace for the growth of crystalline semiconductor material has one or more heating devices for heating a hot zone in which crucibles containing semiconductor material are received. At least one of the heating devices is arranged to apply a predetermined differential heat flux profile across a horizontal cross-section... Agent:

20140248740 - Mixed valent oxide memory and method: Memory devices and methods of forming include a mixed valent oxide located between a first electrode and a second electrode. Implantation of a metal below a surface of one of the electrodes allows formation of the mixed valent oxide with a direct interface to the electrode. An intermetallic oxide can... Agent: Micron Technology, Inc.

20140248742 - Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same: An apparatus includes a substrate having a land side having a plurality of contact pads and a die side opposite the land side. The apparatus includes a first die and a second die wherein the first die and second die are embedded within the substrate such that the second die... Agent:

20140248741 - Package-on-package assembly and method: A package-on-package (PoP) assembly is provided. The package-on-package (PoP) assembly includes a first integrated circuit package and an anisotropic conductive film (ACF) disposed on a top surface of the first integrated circuit package, wherein the anisotropic conductive film comprises a plurality of conductive particles. The package-on-package (PoP) assembly also includes... Agent:

20140248743 - Semiconductor memory modules and methods of fabricating the same: The inventive concept provides semiconductor memory modules and methods of fabricating the same. The semiconductor memory module may include a module board having a first surface and a second surface opposite to the first surface, and memory chips mounted directly on the module board by a flip-chip bonding method. Each... Agent: Samsung Electronics Co., Ltd.

20140248744 - Semiconductor substrate and method for manufacturing semiconductor device: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140248745 - Three-dimensional integrated circuit (3dic): An embodiment 3DIC device includes a semiconductor chip, a die, and a polymer. The semiconductor chip includes a semiconductor substrate, wherein the semiconductor substrate comprises a first edge, and a dielectric layer over the semiconductor substrate. The die is disposed over and bonded to the semiconductor chip. The polymer is... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140248746 - Making a flip-chip assembly with bond fingers: A method of making a flip chip assembly includes a substrate having a top surface and forming a plurality of generally longitudinally extending, laterally spaced apart bond fingers are formed on the top surface. Each of the plurality of bond fingers has a first longitudinal end portion and a second... Agent: Texas Instruments Incorporated

20140248747 - Chip-on-lead package and method of forming: In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major... Agent: Semiconductor Components Industries, LLC

20140248748 - Display device: A display device for improving an aperture ratio of the pixel is provided. In the display device, a transparent oxide layer, an insulating film, and a conductive layer are sequentially stacked on a pixel region on a substrate, the conductive layer has a gate electrode of a thin film transistor... Agent: Panasonic Liquid Crystal Display Co., Ltd.

20140248749 - Stress memorization technique: A method comprises providing a semiconductor structure comprising a gate structure provided over a semiconductor region. An ion implantation process is performed. In the ion implantation process, a first portion of the semiconductor region adjacent the gate structure and a second portion of the semiconductor region adjacent the gate structure... Agent: Globalfoundries Inc.

20140248750 - Vertical type semiconductor device and fabrication method thereof: A vertical memory device and a method of fabricating the same are provided. The vertical type semiconductor device includes a common source region formed in a cell area of a semiconductor substrate. A channel region is formed on the common source region. The channel region has a predetermined height and... Agent: Sk Hynix Inc.

20140248751 - Method and apparatus for enhancing channel strain: An apparatus includes a substrate having a strained channel region, a dielectric layer over the channel region, first and second conductive layers over the dielectric layer having a characteristic with a first value, and a strain-inducing conductive layer between the conductive layers having the characteristic with a second value different... Agent: Taiwan Semiconductor Manufacturing Company Ltd.

20140248752 - Method for fabricating semiconductor device having spacer elements: The present disclosure describes a method of fabricating semiconductor device including providing a semiconductor substrate and a gate stack disposed on the semiconductor substrate. A first spacer element is formed on the substrate abutting the first gate stack. In an embodiment, a source/drain region is then formed. A second spacer... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140248753 - Analog transistor: An analog transistor useful for low noise applications or for electrical circuits benefiting from tight control of threshold voltages and electrical characteristics is described. The analog transistor includes a substantially undoped channel positioned under a gate dielectric between a source and a drain with the undoped channel not being subjected... Agent: Suvolta, Inc.

20140248754 - Controlled air gap formation: A method of forming and controlling air gaps between adjacent raised features on a substrate includes forming a silicon-containing film in a bottom region between the adjacent raised features using a flowable deposition process. The method also includes forming carbon-containing material on top of the silicon-containing film and forming a... Agent:

20140248755 - Methods of fabricating nonvolatile memory devices including voids between active regions and related devices: A method of fabricating a nonvolatile memory device includes forming trenches in a substrate defining device isolation regions therein and active regions therebetween. The trenches and the active regions therebetween extend into first and second device regions of the substrate. A sacrificial layer is formed in the trenches between the... Agent: Samsung Electronics Co., Ltd.

20140248756 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device, the method including providing a substrate; forming a field trench in the substrate; and forming a diffusion barrier region under the field trench, wherein the diffusion barrier region includes carbon.... Agent: Samsung Electronics Co., Ltd.

20140248758 - Method of severing a semiconductor device composite: A method of severing a semiconductor device composite includes a carrier having a main surface and a semiconductor layer sequence arranged on the main surface including forming a separating trench in the semiconductor device composite by a first laser cut such that the separating trench only partially severs the semiconductor... Agent:

20140248757 - Wafer processing method: A wafer processing method for dividing a wafer along a plurality of division lines to obtain a plurality of individual chips. The wafer processing method includes a filament forming step of applying a pulsed laser beam having a transmission wavelength to the wafer along each division line in the condition... Agent: Disco Corporation

20140248759 - Safe handling of low energy, high dose arsenic, phosphorus, and boron implanted wafers: A method of preventing toxic gas formation after an implantation process is disclosed. Certain dopants, when implanted into films disposed on a substrate, may react when exposed to moisture to form a toxic gas and/or a flammable gas. By in-situ exposing the doped film to an oxygen containing compound, dopant... Agent: Applied Materials, Inc.

20140248760 - Methods of forming dual gate structures: Semiconductor devices including dual gate structures and methods of forming such semiconductor devices are disclosed. For example, semiconductor devices are disclosed that include a first gate stack that may include a first conductive gate structure formed from a first material, and a second gate stack that may include a dielectric... Agent: Micron Technology, Inc.

20140248762 - Method for fabricating semiconductor device: A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer... Agent: United Microelectronics Corp.

20140248761 - Semiconductor device having dual metal silicide layers and method of manufacturing the same: A semiconductor device is manufactured using dual metal silicide layers. The semiconductor device includes a substrate having first and second regions, a first metal gate electrode on the substrate in the first region, a second metal gate electrode on the substrate in the second region, a first epitaxial layer on... Agent: Samsung Electronics Co., Ltd.

20140248763 - Vertical bit line non-volatile memory systems and methods of fabrication: Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and methods of fabricating such a memory are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device... Agent: Sandisk 3d LLC

20140248764 - Methods of forming structures on an integrated circuit product: One illustrative method disclosed herein includes forming a seed layer above a substrate that includes a conductive region, wherein the seed layer is comprised of a metal-containing material, forming a nucleation layer on the seed layer, wherein the nucleation layer is comprised of a transition metal oxide ceramic material, and... Agent: Globalfoundries Inc.

20140248765 - Semiconductor memory device having dummy conductive patterns on interconnection and fabrication method thereof: A semiconductor memory device having a cell pattern formed on an interconnection and capable of reducing an interconnection resistance and a fabrication method thereof are provided. The semiconductor device includes a semiconductor substrate in which a cell area, a core area, and a peripheral area are defined and a bottom... Agent: Sk Hynix Inc.

20140248766 - Three-dimensional semiconductor device and method of fabricating the same: Provided are a three-dimensional semiconductor device and a method of fabricating the same. The three-dimensional semiconductor device may include a mold structure for providing gap regions and an interconnection structure including a plurality of interconnection patterns disposed in the gap regions. The mold structure may include interlayer molds defining upper... Agent: Samsung Electronics Co., Ltd.

20140248767 - Methods of fabricating integrated circuitry: A method of fabricating integrated circuitry includes forming a first conductive line. First elemental tungsten is deposited directly against an elevationally outer surface of the first conductive line selectively relative to any exposed non-conductive material. Dielectric material is formed elevationally over the first conductive line and a via is formed... Agent: Micron Technology, Inc.

20140248768 - Mask assignment optimization: A method for optimizing mask assignment for multiple pattern processes includes, through a computing system, defining which of a number of vias to be formed between two metal layers are critical based on metal lines interacting with the vias, determining overlay control errors for an alignment tree that defines mask... Agent:

20140248769 - Methods of processing substrates and methods of forming conductive connections to substrates: Embodiments disclosed include methods of processing substrates, including methods of forming conductive connections to substrates. In one embodiment, a method of processing a substrate includes forming a material to be etched over a first material of a substrate. The material to be etched and the first material are of different... Agent: Micron Technology, Inc.

20140248770 - Microwave-assisted heating of strong acid solution to remove nickel platinum/platinum residues: A method is provided for removing residual Ni/Pt and/or Pt from a semiconductor substrate in a post salicidation cleaning process using microwave heating of a stripping solution. Embodiments include depositing a Ni/Pt layer on a semiconductor substrate; annealing the deposited Ni/Pt layer, forming a nickel/platinum silicide and residual Ni/Pt and/or... Agent: Globalfoundries Inc.

20140248771 - Methods for forming a conductive material and methods for forming a conductive structure: A method of forming a conductive material comprises forming at least one opening extending through an organic material and an insulative material underlying the organic material to expose at least a portion of a substrate and a conductive contact in the substrate. The method further comprises lining exposed surfaces of... Agent: Micron Technology, Inc.

20140248772 - Method for tuning a deposition rate during an atomic layer deposition process: Embodiments of the invention provide methods for depositing a material on a substrate within a processing chamber during a vapor deposition process, such as an atomic layer deposition (ALD) process. In one embodiment, a method is provided which includes sequentially exposing the substrate to a first precursor gas and at... Agent: Applied Materials, Inc.

20140248773 - Patterning method and method of forming memory device: A method of forming memory device is provided. A substrate having at least two cell areas and at least one peripheral area between the cell areas is provided. A target layer, a sacrificed layer and a first mask layer having first mask patterns in the cell areas and second mask... Agent: Winbond Electronics Corp.

20140248774 - Liquid treatment apparatus and liquid treatment method: The liquid treatment apparatus according to the present invention includes a substrate holder configured to horizontally hold a substrate, and a top plate configured to be rotatable and to cover the substrate held by the substrate holder from above so as to define a treatment space. In the treatment space,... Agent: Tokyo Electron Limited

20140248775 - Cleaning agent and method for producing silicon carbide single-crystal substrate: The present invention provides a detergent for effectively cleaning, by a safe and simple method, a manganese component remaining on and adhered to a substrate surface, after polishing a silicon carbide single crystal substrate with a manganese compound-containing polishing agent. The present invention relates to a detergent for cleaning a... Agent: Asahi Glass Company, Limited

20140248776 - Composition for polishing compound semiconductor: Disclosed is a polishing composition that contains at least abrasive grains, an oxidizing agent having a redox potential equal to or greater than 1.8 V at a pH for application of polishing, and water. The abrasive grains are preferably composed of at least one substance selected from among silicon oxide,... Agent: Fujimi Incorporated

20140248777 - Resist composition and method for producing semiconductor device: A resist composition includes: a crosslinking material that is crosslinked in the presence of an acid; an acid amplifier; and a solvent.... Agent: Sony Corporation

20140248778 - Methods of forming asymmetric spacers on various structures on integrated circuit products: One illustrative method disclosed herein includes forming a structure above a semiconductor substrate, performing a conformal deposition process to form a layer of undoped spacer material above the structure, performing an angled ion implant process to form a region of doped spacer material in the layer of undoped spacer material... Agent: Globalfoundries Inc.

20140248779 - Line width roughness improvement with noble gas plasma: A method for forming lines in an etch layer on a substrate may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a photoresist mask, ionizing the UV producing gas to produce UV rays to irradiate the photoresist mask, and etching the lines into the etch layer... Agent:

20140248780 - Enhanced etching processes using remote plasma sources: Methods of etching a patterned substrate may include flowing an oxygen-containing precursor into a first remote plasma region fluidly coupled with a substrate processing region. The oxygen-containing precursor may be flowed into the region while forming a plasma in the first remote plasma region to produce oxygen-containing plasma effluents. The... Agent: Applied Materials, Inc.

20140248781 - Semi-aqueous polymer removal compositions with enhanced compatibility to copper, tungsten, and porous low-k dielectrics: A composition is provided that is effective for removing post etch treatment (PET) polymeric films and photoresist from semiconductor substrates. The composition exhibits excellent polymer film removal capability while maintaining compatibility with copper and low-κ dielectrics and contains water, ethylene glycol, a glycol ether solvent, morpholinopropylamine and a corrosion inhibiting... Agent: Avantor Performance Materials, Inc.

20140248782 - Substrate processing method: A substrate processing method includes rotating a substrate about a central axis thereof; starting irradiation of a surface of the substrate with soft X-rays; simultaneously with or after starting the irradiation of the surface of the substrate with the soft X-rays, starting supply of pure water onto the surface of... Agent:

20140248783 - Cleaning method, method of manufacturing semiconductor device, substrate processing apparatus and recording medium: A cleaning method includes: providing a process container in which a process of forming a film on a substrate is performed; and removing a deposit including the film adhered to the process container by supplying a cleaning gas into the process container after performing the process. The act of removing... Agent: Hitachi Kokusai Electric Inc.

20140248784 - Microwave processing apparatus and microwave processing method: A microwave processing apparatus includes a processing chamber configured to accommodate an object to be processed, a support member configured to support the object by contact with the object in the processing chamber, and a microwave introducing unit configured to generate a microwave for processing the object and introduce the... Agent: Tokyo Electron Limited

  
08/28/2014 > 88 patent applications in 77 patent subcategories.

20140242728 - Method of etching a magnesium oxide film: A magnetoresistive device includes an MR element including a metal layer, and an insulating portion made of magnesium oxide and in contact with the MR element. A method of manufacturing the magnetoresistive device includes the step of removing an unwanted magnesium oxide film that is formed by the magnesium oxide... Agent: Tdk Corporation

20140242729 - Substrate warp correcting device and substrate warp correcting method: A substrate warp correcting device includes, a lower member including a concave portion, and the lower member on which a substrate is to be arranged, an upper member arranged above the lower member, and the upper member including a gas supplying hole, wherein the substrate is arranged between the lower... Agent: Shinko Electric Industries Co., Ltd.

20140242730 - Spectraphic monitoring based on pre-screening of theoretical library: An optical model for a layer stack has a plurality of input parameters, the plurality of input parameters defining a parameter space. A plurality of model spectra are generated by calculating a model spectrum using the optical model for each of a first plurality of different points in the parameter... Agent:

20140242731 - System and method for performing a wet etching process: A system and method for performing a wet etching process is disclosed. The system includes multiple processing stations accessible by a transfer device, including a measuring station to optically measure the thickness of a substrate, a controller to calculate an etch recipe for the substrate, in real time, and cause... Agent: Solid State Equipment LLC

20140242732 - Ion implantation apparatus and method of determining state of ion implantation apparatus: An ion implantation apparatus according to an embodiment includes an ion implantation unit, a position detection unit, a charge supply unit, a current value detection unit, and a determination unit. The ion implantation unit scans the surface of a substrate with an ion beam containing positively charged ions and implants... Agent: Kabushiki Kaisha Toshiba

20140242733 - Reflective mask, method of monitoring the same, and method of manufacturing semiconductor device: According to one embodiment, provided is a reflective mask having a substrate, a reflection layer that reflects EUV light formed above the substrate, and an absorption layer that absorbs the EUV light formed above the reflection layer. The reflective mask further includes a monitor pattern monitoring an attachment amount of... Agent: Kabushiki Kaisha Toshiba

20140242734 - Leadframe, semiconductor device, and method of manufacturing the same: A method of manufacturing a semiconductor device includes mounting at least one of a first semiconductor chip and a second semiconductor chip over a die pad of a leadframe, and inspecting a mounting position of at least one of the first semiconductor chip and the second semiconductor chip, wherein the... Agent: Renesas Electronics Corporation

20140242735 - Method for aligning a biochip: A method of aligning a semiconductor chip includes forming a semiconductor chip with a light-activated circuit including at least one photosite, positioning the semiconductor chip relative to a device, and illuminating the positioned semiconductor chip. The method further includes generating an RF signal with an RF circuit based upon illumination... Agent: Robert Bosch Gmbh

20140242736 - Mixed metal-silicon-oxide barriers: A method of forming a thin barrier film of a mixed metal-silicon-oxide is disclosed. For example, a method of forming an aluminum-silicon-oxide mixture having a refractive index of 1.8 or less comprises exposing a substrate to sequences of a non-hydroxylated silicon-containing precursor, activated oxygen species, and metal-containing precursor until a... Agent:

20140242737 - Cathode deposition mask and method of manufacturing organic light-emitting display device using the same: Provided is a cathode deposition mask. The cathode deposition mask includes a plurality of first columns and a plurality of second columns arranged alternately, the plurality of first columns and the plurality of second columns being parallel to each other and defining a column dimension along the length of each... Agent: Samsung Display Co., Ltd.

20140242738 - Manufacturing method for an led: o

20140242739 - Systems and methods for a pressure sensor having a two layer die structure: Systems and methods for a pressure sensor are provided, where the pressure sensor comprises a housing having a high side input port that allows a high pressure media to enter a high side of the housing and a low side input port that allows a low pressure media to enter... Agent: Honeywell International Inc.

20140242740 - Micromachined ultra-miniature piezoresistive pressure sensor and method of fabrication of the same: A method of fabrication of one or more ultra-miniature piezoresistive pressure sensors on silicon wafers is provided. The diaphragm of the piezoresistive pressure sensors is formed by fusion bonding. The piezoresistive pressure sensors can be formed by silicon deposition, photolithography and etching processes.... Agent:

20140242741 - Material for forming passivation film for semiconductor substrate, passivation film for semiconductor substrate and method of producing the same, and photovoltaic cell element and method of producing the same: The invention provides a material for forming a passivation film for a semiconductor substrate. The material includes a polymer compound having an anionic group or a cationic group.... Agent: Hitachi Chemical Company, Ltd.

20140242742 - Wafer packaging method: A wafer packaging method includes the following steps. A wafer having a plurality of integrated circuit units is provided. A first surface of the wafer opposite to the integrated circuit units is ground. A release layer is formed on a second surface of a light transmissive carrier. An ultraviolet temporary... Agent: Xintec Inc.

20140242743 - Sensor integrated slit for pushbroom hyperspectral system: An entry slit panel for a push-broom hyperspectral camera is formed at least partly from a silicon wafer on which at least one companion sensor is fabricated, whereby the companion sensor is co-planar with the slit and detects light imaged on the panel but not on the slit. In embodiments,... Agent: Bae Systems Information And Electronic Systems Integration Inc.

20140242744 - Substrate and superstrate design and process for nano-imprinting lithography of light and carrier collection management devices: A process for forming a nano-element structure is provided that includes contacting a template with a material to form the nano-element structure having an array of nano-elements and a base physically connecting the array of nano-elements. The material that is contacted with the template is the nano-element structure material or... Agent: Solarity, Inc.

20140242745 - Solid-state imaging device, method of manufacturing same, and electronic apparatus: A solid-state imaging device includes a plurality of photoelectric conversion units configured to receive light and generate signal charge, the plurality of photoelectric conversion units being provided in such a manner as to correspond to a plurality of pixels in a pixel area of a semiconductor substrate; and pixel transistors... Agent: Sony Corporation

20140242746 - Electrode formation for heterojunction solar cells: A method for forming a photovoltaic device includes forming a doped layer on a crystalline substrate, the doped layer having an opposite dopant conductivity as the substrate. A non-crystalline transparent conductive electrode (TCE) layer is formed on the doped layer at a temperature less than 150 degrees Celsius. The TCE... Agent: International Business Machines Corporation

20140242747 - Thin film deposition of materials by external induced release from a ribbon tape: A process where a printed ink is placed onto a sacrificial ribbon. The ink is then converted to a metal film and transferred to a substrate, such as a silicon solar cell at very low temperatures. Further low-temperature processing may be utilized to form an ohmic contact. This process provides... Agent:

20140242748 - Methods of forming germanium-antimony-tellurium materials and chalcogenide materials: Methods of forming a material include exposing a substrate to a first germanium-containing compound and a second, different germanium-containing compound; exposing the substrate to a first antimony-containing compound and a second, different antimony-containing compound; and exposing the substrate to a first tellurium-containing compound and a second, different tellurium-containing compound. Methods... Agent: Micron Technology, Inc.

20140242749 - Method for manufacturing semiconductor device: Electrical characteristics of transistors using an oxide semiconductor are greatly varied in a substrate, between substrates, and between lots, and the electrical characteristics are changed due to heat, bias, light, or the like in some cases. In view of the above, a semiconductor device using an oxide semiconductor with high... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140242750 - Polishing slurry, and polishing method: The present invention provides a polishing slurry capable of polishing even high-hardness materials such as silicon carbide and gallium nitride at a high polishing speed. The present invention is a polishing slurry including a slurry containing a manganese oxide particle and a manganate ion for polishing high-hardness materials having a... Agent:

20140242751 - Packaged integrated circuit devices with through-body conductive vias, and methods of making same: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.... Agent: Micron Technology, Inc.

20140242753 - Flip chip packaging method, and flux head manufacturing method applied to the same: Flip chip packaging methods, and flux head manufacturing methods used in the flip chip packaging methods may be provided. In particular, a flip chip packaging method including printing flux on a pad of a printed circuit board (PCB), mounting the die in a flip chip manner on the PCB such... Agent: Samsung Electronics Co., Ltd.

20140242752 - Method of fabricating semiconductor package: A method of fabricating a semiconductor package includes providing a wafer which includes an upper area having through silicon vias (TSVs) and a lower area not having the TSVs; mounting a semiconductor chip on the upper area of the wafer; forming a passivation layer to a predetermined thickness to cover... Agent: Samsung Electronics Co., Ltd

20140242754 - Multi-chip package and method of manufacturing the same: A multi-chip package may include a package substrate, a first semiconductor chip, a second semiconductor chip and a supporting member. The first semiconductor chip may be arranged on an upper surface of the package substrate. The first semiconductor chip may be electrically connected with the package substrate. The second semiconductor... Agent: Samsung Electronics Co., Ltd.

20140242755 - Making an integtated circuit module with dual leadframes: A method of making an integrated circuit module starts with a top leadframe strip comprising a plurality of integrally connected top leadframes. A plurality of flipchip dies are mounted on the top leadframe strip with solder bumps of each flipchip bonded to predetermined pad portions on each of the top... Agent: Texas Instruments Incorporated

20140242757 - Adhesive for electronic component: An adhesive composition for a pre-applied underfill sealant comprising: (a) a radical polymerizable monomer having one or more functional groups selected from the group consisting of vinyl group, maleimide group, acryloyl group, methacryloyl group and allyl group, (b) a polymer having a polar group, (c) a filler, and (d) a... Agent: Henkel Japan Limited

20140242756 - Method for preparing semiconductor devices applied in flip chip technology: A method for preparing semiconductor devices in a flip chip process comprises forming deep grooves surrounding each of the semiconductor chips; depositing a first plastic package material to form a first plastic package layer covering front surface of the semiconductor wafer and filling the deep grooves; depositing a metal layer... Agent: Alpha And Omega Semiconductor Incorporated

20140242758 - Wafer and method for forming the same: A wafer and a method for forming the same are disclosed. The wafer forming method can separate respective chips from others by performing a Deep Reactive Ion Etching (DRIE) process on a wafer including a plurality of chips. The wafer includes a plurality of chips configured to be arranged in... Agent: Sk Hynix Inc.

20140242759 - Reducing wafer distortion through a high cte layer: Provided is a method of fabricating a semiconductor device. The method includes providing a silicon substrate having opposite first and second sides. At least one of the first and second sides includes a silicon (111) surface. The method includes forming a high coefficient-of-thermal-expansion (CTE) layer on the first side of... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242760 - Semiconductor radio frequency switch with body contact: The present disclosure relates to a radio frequency (RF) switch that includes multiple body-contacted field effect transistor (FET) elements coupled in series. The FET elements may be formed using a thin-film semiconductor device layer, which is part of a thin-film semiconductor die. Conduction paths between the FET elements through the... Agent: Rf Micro Devices, Inc.

20140242761 - High electron mobility transistor and method of forming the same: A method of forming a semiconductor structure, the method includes epitaxially growing a second III-V compound layer on a first III-V compound layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. The method further includes forming a source feature and a... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242762 - Tunable schottky diode with depleted conduction path: A method of fabricating a Schottky diode having an integrated junction field-effect transistor (JFET) device includes forming a conduction path region in a semiconductor substrate along a conduction path of the Schottky diode. The conduction path region has a first conductivity type. A lateral boundary of an active area of... Agent: Freescale Semiconductor, Inc.

20140242763 - Method for fabricating nonvolatile memory structure: A nonvolatile memory structure includes a semiconductor substrate having thereon a first oxide define (OD) region, a second OD region and a third OD region arranged in a row. The first, second, and third OD regions are separated from one another by an isolation region. The isolation region includes a... Agent: Ememory Technology Inc.

20140242765 - 3-dimensional non-volatile memory device including a selection gate having an l shape: A 3-dimensional (3-D) non-volatile memory device includes a first channel protruding from a substrate, a selection gate formed on sidewalls of the first channel and in an L shape, and a gate insulating layer interposed between the first channel and the selection gate and surrounding the first channel. A method... Agent: Sk Hynix Inc.

20140242766 - Method for manufacturing semiconductor device and semiconductor device: A manufacturing method includes forming a fin-shaped silicon layer on a silicon substrate, forming a first insulating film around the fin-shaped silicon layer, and forming a pillar-shaped silicon layer on the fin-shaped silicon layer; forming diffusion layers in an upper portion of the pillar-shaped silicon layer, an upper portion of... Agent: Unisantis Electronics Singapore Pte. Ltd.

20140242764 - Three dimensional non-volatile storage with asymmetrical vertical select devices: A three-dimensional array adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. Bit lines to which the memory elements of all... Agent: Sandisk 3d LLC

20140242767 - Method of manufacturing a semiconductor device: After forming a first film over the main surface of a semiconductor substrate, the first film is patterned, thereby forming a control gate electrode for a non-volatile memory, a dummy gate electrode, and a first film pattern. Subsequently, a memory gate electrode for the non-volatile memory adjacent to the control... Agent: Renesas Electronics Corporation

20140242768 - Reducing wafer distortion through a high cte layer: Provided is a method of fabricating a semiconductor device. The method includes providing a silicon substrate having opposite first and second sides. At least one of the first and second sides includes a silicon (111) surface. The method includes forming a high coefficient-of-thermal-expansion (CTE) layer on the first side of... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242769 - Method of manufacturing a super-junciton semiconductor device: A method of manufacturing a super-junction semiconductor device is disclosed that allows forming a high concentration layer with high precision and improves the trade-off relationship between the Eoff and the dV/dt using a trench embedding method. The method comprises a step of forming a parallel pn layer using a trench... Agent: Fuji Electric Co., Ltd.

20140242770 - Semiconductor process: A semiconductor process includes the following step. A stacked structure is formed on a substrate. A contact etch stop layer is formed to cover the stacked structure and the substrate. A material layer is formed on the substrate and exposes a top part of the contact etch stop layer covering... Agent: United Microelectronics Corp.

20140242771 - Method for manufacturing a semiconductor device: A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes a transient voltage suppression structure that includes at least two diodes and a Zener diode. In accordance with embodiments, a semiconductor material is provided that includes an epitaxial layer. The at least two diodes... Agent: Semiconductor Components Industries, LLC

20140242772 - Method for fabricating semiconductor device: A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a IV group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer.... Agent: Sk Hynix Inc.

20140242773 - Phase change memory device having self-aligned bottom electrode and fabrication method thereof: A semiconductor memory device and a fabrication method thereof capable of improving electric contact characteristic between an access device and a lower electrode are provided. The semiconductor memory device includes an access device formed in a pillar shape on a semiconductor substrate, a first conductive layer formed over the access... Agent: Sk Hynix Inc.

20140242774 - Insulation layer to improve capacitor breakdown voltage: A metal-insulator-metal (MIM) capacitor and a method for forming the same are provided. The MIM capacitor includes an insulator on a bottom metal plate, a top metal plate on the insulator, a dielectric layer on the top metal plate and on at least sidewalls of the top metal plate and... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242775 - Method of fabricating finfets: The disclosure relates to a method of fabricating a semiconductor device including forming a patterned hardmask layer over a substrate comprising a major surface. The method further includes forming a plurality of first trenches and a plurality of second trenches performed at an electrostatic chuck (ESC) temperature between about 90°... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242776 - Strained isolation regions: A method of forming an isolation trench having localized stressors is provided. In accordance with embodiments of the present invention, a trench is formed in a substrate and partially filled with a dielectric material. In an embodiment, the trench is filled with a dielectric layer and a planarization step is... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242777 - Method for bonding semiconductor devices: A method of attaching first and second semiconductor devices to one another includes applying plating gel over a surface of a first semiconductor device, positioning bonding regions of a second semiconductor device in contact with the plating gel on corresponding bonding regions on the first semiconductor device, and reacting at... Agent:

20140242778 - Methods of forming strained-semiconductor-on-insulator device structures: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242779 - Semiconductor device manufacturing method and manufacturing apparatus: According to one embodiment, a semiconductor device manufacturing method includes: bonding a first wafer and a second wafer to each other, to form a stack; rubbing a film attached with a fill material in a thin-film shape into a gap located between a bevel of the first wafer and a... Agent: Kabushiki Kaisha Toshiba

20140242780 - Method and apparatus for plasma dicing a semi-conductor wafer: The present invention provides a method for plasma dicing a substrate. The method comprising: providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate on a carrier support to... Agent: Plasma-therm LLC

20140242781 - Coating adhesives onto dicing before grinding and micro-fabricated wafers: A method for preparing a semiconductor wafer into individual semiconductor dies uses both a dicing before grinding step and/or via hole micro-fabrication step, and an adhesive coating step.... Agent:

20140242784 - Method for forming a graphene layer on the surface of a substrate including a silicon layer: The invention relates to a method for forming a graphene layer (105) on the surface of a substrate (100) including a silicon layer (101), the method comprising the consecutive steps of: forming (1) a silicon-carbide film (103) on a free surface of the silicon layer and gradually heating the substrate... Agent: Centre National De La Recherche Scientifique

20140242782 - Methods of transferring semiconductor elements and manufacturing semiconductor devices: The present disclosure relates to a method of transferring semiconductor elements from a non-flexible substrate to a flexible substrate. The present disclosure also relates to a method of manufacturing a flexible semiconductor device based on the method of transferring semiconductor elements. The semiconductor elements grown or formed on a non-flexible... Agent: Samsung Electronics Co., Ltd.

20140242783 - Reactor and method for production of silicon by chemical vapor deposition: The invention provides a reactor for the manufacture of silicon by chemical vapour deposition (CVD), the reactor comprises a reactor body that can rotate around an axis with the help of a rotation device operatively arranged to the reactor, at least one sidewall that surrounds the reactor body, at least... Agent: Dynatec Engineering As

20140242785 - Semiconductor films on sapphire glass: A method is disclosed for growing large grain to single crystalline semiconductor films on inexpensive glass substrates. The method comprises deposition of semiconductor films from a eutectic melt on sapphire glass... Agent: Solar-tectic, LLC

20140242786 - Method of manufacturing nonvolatile semiconductor memory device: According to one embodiment, a method includes forming first and second gate patterns each including a structure stacked in order of a first insulating layer, a floating gate layer, a charge trap layer, a second insulating layer and a dummy layer on a semiconductor layer, implanting impurities in the semiconductor... Agent:

20140242787 - Photosensitive resin composition and method for producing semiconductor device: Disclosed is a photosensitive resin composition which exhibits positive or negative photosensitivity and is used as a mask in an ion implantation step, the photosensitive resin composition including, as a resin, (A) a polysiloxane. The photosensitive resin composition of the present invention has high heat resistance and is capable of... Agent: Toray Industries, Inc.

20140242788 - Method of forming a high quality interfacial layer for a semiconductor device by performing a low temperature ald process: One illustrative method disclosed herein includes performing an atomic layer deposition (ALD) process at a temperature of less than 400° C. to deposit a layer of silicon dioxide on a germanium-containing region of semiconductor material and forming a gate structure of a transistor device above the layer of silicon dioxide.... Agent: Globalfoundries Inc.

20140242789 - Semiconductor device manufacturing method: A semiconductor device manufacturing method includes forming a dielectric film on a semiconductor substrate; performing a heat treatment on the dielectric film; forming an electrode on a first region of the dielectric film; irradiating an ionized gas cluster to a second region of the dielectric film where the electrode is... Agent: Tokyo Electron Limited

20140242790 - Method of manufacturing semiconductor device: A metal-containing film capable of adjusting a work function is formed. A first source containing a first metal element and a halogen element and a second source containing a second metal element different from the first metal element and an amino group are alternately supplied onto a substrate having a... Agent: Hitachi Kokusai Electric Inc.

20140242791 - Method of forming bump structure: A method of forming a bump structure includes forming a metallization layer on a top metal layer by electroless plating process, forming a polymer layer over the metallization layer; forming an opening on the polymer layer to expose the metallization layer, and forming a solder bump over the exposed metallization... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242792 - Method for forming semiconductor device: A method for forming a semiconductor device is provided, which may include: providing an interlayer dielectric layer, a metal layer formed on the interlayer dielectric layer, an etch stop layer formed on the metal layer, and a first opening extending through the etch stop layer and the metal layer, wherein... Agent: Shanghai Huahong Grace Semiconductor Manufacturing Corporation

20140242793 - Pattern forming method and method of manufacturing semiconductor device: According to one embodiment, a core material is ejected onto an object using an inkjet method to form a core pattern on the object, a mask pattern is formed on the object so as to embed the core pattern, and the core pattern which is embedded in the mask pattern... Agent: Kabushiki Kaisha Toshiba

20140242794 - Methods of patterning small via pitch dimensions: Integrated circuit methods are described. The methods include providing a photomask that includes two main features for two via openings and further includes an optical proximity correction (OPC) feature linking the two main features; forming a hard mask layer on a substrate, the hard mask layer including two trench openings;... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140242795 - Volatile imidazoles and group 2 imidazole based metal precursors: t

20140242796 - Method of manufacturing semiconductor device: To improve a semiconductor device having a nonvolatile memory. a first MISFET, a second MISFET, and a memory cell are formed, and a stopper film made of a silicon oxide film is formed thereover. Then, over the stopper film, a stress application film made of a silicon nitride film is... Agent: Renesas Electronics Corporation

20140242797 - Semiconductor fabrication method using stop layer: A method of making a semiconductor assembly including the steps of: (i) providing an initial-state assembly including: (a) a fin layer, and (b) a hard mask layer located on top of at least a portion of the fin layer; (ii) performing a first material removal on the initial-state assembly, by... Agent: International Business Machines Corporation

20140242798 - Polishing composition: A polishing composition of the present invention is used for polishing an object containing a phase-change alloy and is characterized by containing an ionic additive. Examples of the ionic additive include a cationic surfactant, an anionic surfactant, an amphoteric surfactant, and a cationic water-soluble polymer.... Agent: Fujimi Incorporation

20140242799 - Pattern formation method and method for manufacturing semiconductor device: According to one embodiment, a pattern formation method includes forming a first mask layer including a first and a second concave pattern on a first surface of a substrate. The method can include providing a protection film in the first concave pattern. The method can include providing a self-assembling material... Agent:

20140242800 - Methods of forming layer patterns of a semiconductor device: A method of manufacturing a layer pattern of a semiconductor device, the method including forming an anti-reflective coating (ARC) layer on an etching object layer such that the ARC layer includes a polymer having an imide group; forming a photoresist pattern on the ARC layer; wet etching portions of the... Agent: Samsung Electronics Co., Ltd

20140242801 - Multi-level autolimitating etching method: A method for producing patterns includes inclined flanks from a face of a substrate. A protective mask is formed covering at least two masked areas of the face of the substrate and defining at least one intermediate space. An inclined flank is plasma etched from each masked area, wherein the... Agent: Commissariat A L'energie Atomique Et Aux Ene Alt

20140242802 - Semiconductor process: A semiconductor process includes the following steps. A wafer on a pedestal is provided. The pedestal is lifted to approach a heating source and an etching process is performed on the wafer. An annealing process is performed on the wafer by the heating source. In another way, a wafer on... Agent: United Microelectronics Corp.

20140242803 - Dry etching agent and dry etching method using the same: A dry etching agent according to the present invention contains (A) a fluorinated propyne represented by the chemical formula: CF3C≡CX where X is H, F, Cl, Br, I, CH3, CFH2 or CF2H; and either of: (B) at least one kind of gas selected from the group consisting of O2, O3,... Agent: Central Glass Company, Limited

20140242804 - Integrated platform for improved wafer manufacturing quality: The present disclosure relates to a method and apparatus for performing a dry plasma procedure, while mitigating internal contamination of a semiconductor substrate. In some embodiments, the apparatus includes a semiconductor processing tool having a dry process stage with one or more dry process elements that perform a dry plasma... Agent: Taiwan Semiconductor Manufacturing Co. Ltd.

20140242805 - Laser-enhanced chemical etching of nanotips: A method for sharpening a nanotip involving a laser-enhanced chemical etching is provided. The method includes immersing a nanotip in an etchant solution. The nanotip includes a base and an apex, the apex having a diameter smaller than a diameter of the base. The method also includes irradiating the nanotip... Agent: Globalfoundries Singapore Pte. Ltd.

20140242806 - Metal amide deposition precursors and their stabilization with an inert ampoule liner: Described are methods and apparatuses for the stabilization of precursors, which can be used for the deposition of manganese-containing films. Certain methods and apparatus relate to lined ampoules and/or 2-electron donor ligands.... Agent:

20140242807 - Method for facilitating crack initiation during controlled substrate spalling: A method is provided in which a substrate including various materials of different fracture toughness (KIc) can be spalled in a controlled manner. In particular, a surface step region is formed within a surface portion of the substrate prior to formation of a stressor layer. The presence of the surface... Agent: International Business Machines Corporation

20140242808 - Semiconductor device manufacturing method and substrate processing system: A semiconductor device manufacturing method includes forming a first high-k insulating film on a processing target object; performing a crystallization heat-treatment process on the first high-k insulating film at a temperature equal to or higher than about 650° C. for a time less than about 60 seconds; and forming, on... Agent: Tokyo Electron Limited

20140242809 - Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium: A method of manufacturing a semiconductor device is disclosed. The method includes forming a film containing a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a first process gas containing the predetermined element and a halogen element to... Agent: Hitachi Kokusai Electric Inc.

20140242810 - Substrate processing apparatus and method of supplying and exhausting gas: A substrate processing apparatus includes: a process chamber for processing a substrate; a substrate mounting member including a mounting surface on which a plurality of substrates are concentrically mounted with facing a ceiling of the process chamber; a rotation instrument for rotating the substrate mounting member in a direction parallel... Agent: Hitachi Kokusai Electric, Inc.

20140242811 - Atomic layer deposition method: An ALD method includes providing a substrate in an ALD reactor, performing a pre-ALD treatment to the substrate in the ALD reactor, and performing one or more ALD cycles to form a dielectric layer on the substrate in the ALD reactor. The pre-ALD treatment includes providing a hydroxylating agent to... Agent: United Microelectronics Corp.

20140242812 - Method of forming dielectric films, new precursors and their use in semiconductor manufacturing: Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe2)3, Zr(EtCp)(NMe2)3, ZrCp(NMe2)3, Zr(MeCp)(NEtMe)3, Zr(EtCp)(NEtMe)3, ZrCp(NEtMe)3, Zr(MeCp)(NEt2)3, Zr(EtCp)(NEt2)3, ZrCp(NEt2)3, Zr(iPr2Cp)(NMe2)3, Zr(tBu2Cp)(NMe2)3, Hf(MeCp)(NMe2)3, Hf(EtCp)(NMe2)3, HfCp(NMe2)3, Hf(MeCp)(NEtMe)3, Hf(EtCp)(NEtMe)3, HfCp(NEtMe)3, Hf(MeCp)(NEt2)3, Hf(EtCp)(NEt2)3, HfCp(NEt2)3, Hf(iPr2Cp)(NMe2)3, Hf(tBu2Cp)(NMe2)3, and... Agent: L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude

20140242813 - Low k precursors providing superior integration attributes: A deposition for producing a porous organosilica glass film comprising: introducing into a vacuum chamber gaseous reagents including one precursor of an organosilane or an organosiloxane, and a porogen distinct from the precursor, wherein the porogen is aromatic in nature; applying energy to the gaseous reagents in the chamber to... Agent: Air Products And Chemicals, Inc.

20140242814 - Method for forming nitride film: Disclosed is a method of forming a nitride film on an object to be processed (“processed object”). The method includes: exposing the processed object to dichlorosilane which is a The method includes a step (step (a)) of exposing the processed object to dichlorosilane which is a precursor gas and a... Agent: Tokyo Electron Limited

20140242815 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device according to the present invention includes the steps of (b) forming, on a back face of a dummy substrate and back faces of a plurality of semiconductor substrates, inorganic films having such thicknesses as to be resistant to a temperature of a thermal... Agent: Mitsubishi Electric Corporation

  
08/21/2014 > 83 patent applications in 60 patent subcategories.

20140234990 - Methodology and apparatus for tuning driving current of semiconductor transistors: A method and apparatus for repairing transistors may include applying a first voltage to a source, a second voltage to the gate and a third voltage to the drain for a predetermined time. In this manner the transistor structure may be repaired or returned to operate at or near the... Agent: International Business Machines Corporation

20140234991 - Thermal processing apparatus for thermal processing substrate and positioning method of positioning substrate transfer position: A substrate holder positioning method, capable of positioning a substrate holder without using any positioning jig, includes: measuring a first position of a substrate held on a substrate holder included in a substrate carrying mechanism; carrying the substrate held on the substrate holder to a substrate rotating unit for holding... Agent: Tokyo Electron Limited

20140234992 - Plasma etching method and semiconductor device manufacturing method: A plasma etching method is provided for etching a substrate corresponding to an etching object within an etching apparatus that includes a supply condition adjustment unit for adjusting a supply condition for supplying etching gas to the substrate, a temperature adjustment unit for adjusting a temperature of the substrate placed... Agent: Tokyo Electron Limited

20140234994 - Inspection method for semiconductor light-emitting device and manufacturing method for semiconductor light-emitting device: An inspection method for a semiconductor light-emitting device includes an image capturing step for capturing an image of photoluminescence released from the active layer, an inspection region extracting step for extracting an inspection region from the captured image; a luminance average determination step for, determining the semiconductor light emitting device... Agent: Nichia Corporation

20140234993 - Sti cmp under polish monitoring: Methods of deducing oxide thickness using calculated and measured scattering spectra are provided. Embodiments include depositing an oxide over a semiconductor wafer, reducing the oxide from a portion of the semiconductor wafer, and deducing a thickness of oxide remaining at a location within the portion using scatterometric metrology. Embodiments further... Agent: Globalfoundries Singapore Pte. Ltd.

20140234995 - Method of forming flexible and tunable semiconductor photonic circuits: Methods to physically transfer highly integrated silicon photonic devices from high-quality, crystalline semiconductors on to flexible plastic substrates by a transfer-and-bond fabrication method. With this method, photonic circuits including interferometers and resonators can be transferred onto flexible plastic substrates with preserved optical functionalities and performance.... Agent:

20140234996 - Ohmic contacts for semiconductor structures: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least... Agent: Micron Technology, Inc.

20140234997 - Light-emitting device: This disclosure discloses a light-emitting device, comprising a substrate having a first major surface and a second major surface; a plurality of light-emitting stacks on the first major surface; and at least one electronic device on the second major surface, wherein the light-emitting stacks are electrically connected to each other... Agent: Epistar Corporation

20140234998 - Organic light-emitting display device and method of fabricating the same: Disclosed is an organic light-emitting display device capable of preventing the occurrence of cracks at corner regions of an adhesive layer. The organic light-emitting display device includes a first substrate including a plurality of pixels and a second substrate. A thin film transistor (TFT) located at each pixel of the... Agent: Lg Display Co., Ltd.

20140234999 - Method for processing devices including quantum dots and devices: A method of processing quantum dots is disclosed. The method comprises applying energy to excite the quantum dots to emit light and placing the quantum dots under vacuum after excitation of the quantum dots. Also disclosed is a method of processing a component including quantum dots comprising applying energy to... Agent: Qd Vision, Inc.

20140235000 - Method of grinding substrate and method of manufacturing semiconductor light emitting device using the same: A method of grinding a substrate is provided. A substrate including a first main surface having a semiconductor layer formed thereon and a second main surface opposed to the first main surface is prepared. A support film is attached to the first main surface using a glue. The second main... Agent: Samsung Electronics Co., Ltd.

20140235001 - Reflective layer for light-emitting diodes: A system and method for manufacturing a light-generating device is described. A preferred embodiment comprises a plurality of LEDs formed on a substrate. Each LED preferably has spacers along the sidewalls of the LED, and a reflective surface is formed on the substrate between the LEDs. The reflective surface is... Agent:

20140235002 - Surface treatment of a semiconductor light emitting device: A method according to embodiments of the invention includes roughening (FIG. 6) a surface (58) of a semiconductor structure (46-48, FIG. 5). The semiconductor structure includes a light emitting layer (47). The surface (58) is a surface from which light is extracted from the semiconductor structure. After roughening, the roughened... Agent: Koninklijke Philips N.v.

20140235003 - Vapor deposition apparatus, deposition method, and method of manufacturing organic light-emitting display apparatus by using the same: Provided is a vapor deposition apparatus including: a plasma generator configured to change at least a portion of a first raw material gas into a radical form; a corresponding surface corresponding to the plasma generator; a reaction space between the plasma generator and the corresponding surface; and an insulating member... Agent: Samsung Display Co., Ltd.

20140235004 - Method of manufacturing organic light emitting display: A method of manufacturing an organic light emitting display includes forming a first light-emitting layer on a substrate, forming a first portion of a second light-emitting layer on the first light-emitting layer, forming a third light-emitting layer on the first light-emitting layer, and forming a second portion of the second... Agent: Samsung Display Co., Ltd.

20140235006 - Copper(i) complexes for optoelectronic devices: m

20140235007 - Method of manufacturing semiconductor light emitting device and chemical vapor deposition apparatus: A method of manufacturing a semiconductor light emitting device, includes sequentially growing a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a substrate to form a light emitting layer. The forming of the light emitting layer includes a first growth process, a second growth... Agent: Samsung Electronics Co., Ltd.

20140235005 - Method of producing p-type nitride semiconductor and method of manufacturing nitride semiconductor light emitting device therewith: A method of producing a p-type nitride semiconductor includes growing a first nitride semiconductor layer doped with a first concentration of a p-type impurity. The first nitride semiconductor layer is annealed to activate the p-type impurity. A second nitride semiconductor layer doped with a second concentration of a p-type impurity... Agent: Samsung Electronics Co., Ltd.

20140235008 - Back side illumination (bsi) sensors, manufacturing methods thereof, and semiconductor device manufacturing methods: Back side illumination (BSI) sensors, manufacturing methods thereof, and semiconductor device manufacturing methods are disclosed. In some embodiments, a method of manufacturing a semiconductor device includes providing a workpiece having a front side and a back side opposite the front side. An integrated circuit is formed on the workpiece, and... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140235009 - Method for making an imager device: c

20140235010 - Method for manufacturing photovoltaic module formed on corrugated-sheet building material: A method for manufacturing a photovoltaic module formed on a corrugated-sheet building material includes: shaping a base board in a manner that the base board thus shaped takes on a corrugated-sheet shape and therefore not only has thereon alternating grooves and ridges but also a processing surface defined between a... Agent:

20140235011 - Process of manufacturing of the catalytic layer of the counter-electrodes of dye-sensitized solar cells: A process of manufacturing the catalytic layer of the counter-electrodes of dye-sensitized solar cells is described. The process has the following steps: depositing a catalyst precursor paste or precursor solution layer over the counter-electrodes conductive and transparent substrates, by screen printing, doctor blade, spin coating or brush,and irradiating the catalyst... Agent: Dyepower

20140235012 - Deposition of patterned organic thin films: Embodiments disclosed herein provide devices having a nozzle die with one or more nozzles, each of which has one or more integrated skimmers. The use of an integrated nozzle/skimmer structure allows for higher-resolution printing in OVJP-type deposition techniques without requiring the use of a shadow mask by allowing for a... Agent:

20140235013 - Process of structuring an active organic layer deposited on a substrate: A method of structuring an active organic layer deposited on a substrate, including depositing a sacrificial layer on the substrate by photolithography, the sacrificial layer being made of at least one resist, creating at least one pattern inside of the sacrificial layer, depositing an active organic layer on the sacrificial... Agent: Commissariat A L'energie Atomique Et Aux Energies Alternatives

20140235014 - Method for manufacturing a metal-insulator-semiconductor (mis) structure for an electroluminescent diode: A method for manufacturing a structure comprising a substrate made of at least one n-type semiconducting metal oxide is disclosed. In one aspect, the method comprises providing a substrate made of at least one n-type semiconducting metal oxide selected from the group consisting of: ZnO, CdO, MgO, ZnMgO, and ZnCdO,... Agent: Commissariat &#xe0 L'&#xe9 Nergie Atomique Et Aux &#xe9 Nergies Alternatives

20140235015 - Method for manufacturing oxide semiconductor film and method for manufacturing semiconductor device: An object is to provide an oxide semiconductor having stable electric characteristics and a semiconductor device including the oxide semiconductor. A manufacturing method of a semiconductor film by a sputtering method includes the steps of holding a substrate in a treatment chamber which is kept in a reduced-pressure state; heating... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140235016 - Method of fabricating semiconductor package: Provided is a method of fabricating a semiconductor package, including preparing a die including a first metal layer and a second metal layer which are sequentially stacked on a silicon substrate, preparing a package substrate including a lead frame, and forming an adhesive layer between the lead frame and the... Agent: Electronics And Telecommunications Research Institute

20140235017 - Semiconductor package and method of forming the same: A semiconductor package includes a first package substrate, a first semiconductor chip disposed on the first package substrate, the semiconductor chip including first through hole vias, and a chip package disposed on the first semiconductor chip, the chip package including a second package substrate and a second semiconductor chip disposed... Agent:

20140235018 - Diamond particle mololayer heat spreaders and associated methods: Thermally regulated semiconductor devices having reduced thermally induced defects are provided, including associated methods. Such a device can include a heat spreader having a monolayer of diamond particles within a thin metal matrix and a semiconductor material thermally coupled to the heat spreader. In one aspect, the coefficient of thermal... Agent:

20140235019 - Decoupling mim capacitor designs for interposers and methods of manufacture thereof: Decoupling metal-insulator-metal (MIM) capacitor designs for interposers and methods of manufacture thereof are disclosed. In one embodiment, a method of forming a decoupling capacitor includes providing a packaging device, and forming a decoupling MIM capacitor in at least two metallization layers of the packaging device.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140235020 - Method of manufacturing semiconductor device and semiconductor device: Techniques capable of improving the yield of IGBTs capable of reducing steady loss, turn-off time, and turn-off loss are provided. Upon formation of openings in an interlayer insulting film formed on a main surface of a substrate, etching of a laminated insulating film of a PSG film and an SOG... Agent: Renesas Electronics Corporation

20140235021 - Junction field effect transistor structure with p-type silicon germanium or silicon germanium carbide gate(s) and method of forming the structure: Disclosed are embodiments of a junction field effect transistor (JFET) structure with one or more P-type silicon germanium (SiGe) or silicon germanium carbide (SiGeC) gates (i.e., a SiGe or SiGeC based heterojunction JFET). The P-type SiGe or SiGeC gate(s) allow for a lower pinch off voltage (i.e., lower Voff) without... Agent: International Business Machines Corporation

20140235022 - Semiconductor device and method of manufacturing semiconductor device: The semiconductor device includes a first transistor including a first impurity layer containing boron or phosphorus, a first epitaxial layer formed above the first impurity layer, a first gate electrode formed above the first epitaxial layer with a first gate insulating film formed therebetween and first source/drain regions, and a... Agent: Fujitsu Semiconductor Limited

20140235024 - Method of making mosfet integrated with schottky diode with simplified one-time top-contact trench etching: Method for fabricating MOSFET integrated with Schottky diode (MOSFET/SKY) is disclosed. Gate trench is formed in an epitaxial layer overlaying semiconductor substrate, gate material is deposited therein. Body, source, dielectric regions are successively formed upon epitaxial layer and the gate trench. Top contact trench (TCT) is etched with vertical side... Agent: Alpha And Omega Semiconductor Incorporated

20140235023 - Trench metal oxide semiconductor with recessed trench material and remote contacts: Remote contacts to the polysilicon regions of a trench metal oxide semiconductor (MOS) barrier Schottky (TMBS) device, as well as to the polysilicon regions of a MOS field effect transistor (MOSFET) section and of a TMBS section in a monolithically integrated TMBS and MOSFET (SKYFET) device, are employed. The polysilicon... Agent: Vishay-siliconix

20140235025 - Semiconductor device and related fabrication methods: Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a first vertical drift region of semiconductor material, a second vertical drift region of semiconductor material, and a buried lateral drift region of semiconductor material that abuts the vertical drift regions. In one or more... Agent:

20140235026 - Methods for forming electrostatic discharge protection clamps with increased current capabilities: Methods for forming an electrostatic discharge protection (ESD) clamps are provided. In one embodiment, the method includes forming at least one transistor having a first well region of a first conductivity type extending into a substrate. At least one transistor is formed having another well region of a second opposite... Agent:

20140235027 - Silicon carrier space transformer and temporary chip attach burn-in vehicle for high density connections: A silicon carrier space transformer assembly includes one or more silicon structures, which provide space transformer scaling to permit interconnection for fine pitch input/output interconnections with a semiconductor die or wafer, and fine pitch test probe tips connected to the one or more silicon structures.... Agent: International Business Machines Corporation

20140235029 - Bipolar multistate nonvolatile memory: Embodiments generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching capacity by using multiple layers of variable resistance layers. In one embodiment, the resistive switching element comprises at least three layers of variable resistance materials to... Agent: Sandisk 3d LLC

20140235028 - High voltage resistor with pin diode isolation: Provided is a high voltage semiconductor device that includes a PIN diode structure formed in a substrate. The PIN diode includes an intrinsic region located between a first doped well and a second doped well. The first and second doped wells have opposite doping polarities and greater doping concentration levels... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140235030 - Method and system for fabricating floating guard rings in gan materials: A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial... Agent: Avogy, Inc.

20140235031 - Methods for wafer bonding and for nucleating bonding nanophases using wet and steam pressurization: Substrates may be bonded according to a method comprising contacting a first bonding surface of a first substrate with a second bonding surface of a second substrate to form an assembly in the presence of an steam atmosphere under suitable conditions to form a bonding layer between the first and... Agent:

20140235032 - Method for producing transparent soi wafer: The method for producing a transparent SOI wafer is provided and includes treating a bonded wafer at a first temperature of 150 to 300° C. as a first heat treatment; cutting off an unbonded portion of the bonded wafer by irradiating a visible light laser from a silicon wafer side... Agent: Shin-etsu Chemical Co., Ltd.

20140235034 - Method and apparatus for plasma dicing a semi-conductor wafer: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on... Agent: Plasma-therm LLC

20140235033 - Non-conventional method of silicon wafer sawing using a plurality of wafer saw rotational angles: A silicon wafer saw can be set to either three or four different cutting angle orientations from a zero degree reference to produce integrated circuit dice having corners greater than 90 degrees. Three different saw angle orientations will produce six sided dice, and four different saw cutting angle orientations will... Agent: Microchip Technology Incorporated

20140235035 - Methods of forming semiconductor devices: In one embodiment, a method of forming a semiconductor device includes forming openings in a substrate. The method includes forming a dummy fill material within the openings and thinning the substrate to expose the dummy fill material. The dummy fill material is removed.... Agent: Infineon Technologies Ag

20140235037 - Crystal film, crystal substrate, and semiconductor device: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces... Agent: Sony Corporation

20140235040 - Growing iii-v compound semiconductors from trenches filled with intermediate layers: A method of forming an integrated circuit structure includes forming an insulation layer over at least a portion of a substrate; forming a plurality of semiconductor pillars over a top surface of the insulation layer. The plurality of semiconductor pillars is horizontally spaced apart by portions of the insulation layer.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140235036 - Hot-wire method for depositing semiconductor material on a substrate and device for performing the method: A hot wire device and method for depositing semiconductor material onto a substrate in a deposition chamber in which the ends of at least two filaments are clamped into a filament holder and heated by supplying current, wherein a voltage for generating an electrical current is applied in temporal succession... Agent: Forschungszentrum Juelich Gmbh

20140235039 - Method for producing a protective structure: A method for producing a protective structure may include: providing a semiconductor base substrate with a doping of a first conductivity type; producing a first epitaxial layer on the substrate; implanting a dopant of a second conductivity type in a delimited implantation region of the first epitaxial layer; applying a... Agent: Infineon Technologies Ag

20140235038 - Semiconductor device and method of forming epitaxial layer: A method for forming epitaxial layer is disclosed. The method includes the steps of providing a semiconductor substrate, and forming an undoped first epitaxial layer in the semiconductor substrate. Preferably, the semiconductor substrate includes at least a recess, the undoped first epitaxial layer has a lattice constant, a bottom thickness,... Agent: United Microelectronics Corp.

20140235041 - Chemical vapor deposition reactor having ceramic lining for production of polysilicon: Apparatus configured to produce polysilicon by chemical vapor deposition, including a reactor vessel having an inner surface defining at least a portion of a chamber, the inner surface having a lining of quartz ceramic. The apparatus also includes a silicon substrate disposed within the chamber of the reactor vessel, the... Agent: Ecolive Technologies Ltd.

20140235042 - Ion implantation method and ion implantation apparatus: An ion implantation method includes reciprocally scanning an ion beam, mechanically scanning a wafer in a direction perpendicular to the ion beam scanning direction, implanting ions into the wafer, and generating an ion implantation amount distribution in a wafer surface of an isotropic concentric circle shape for correcting non-uniformity in... Agent: Sen Corporation

20140235043 - Method for forming fin-shaped structure: A method for forming a fin-shaped structure includes the following steps. A pad layer is formed on a substrate. A sacrificial pattern is formed on the pad layer. A spacer is formed on the pad layer beside the sacrificial pattern, wherein the ratio of the height of the spacer to... Agent: United Microelectronics Corp.

20140235045 - Method of manufacturing semiconductor device: A hard mask formed above a gate film is patterned with a first mask pattern, the patterned hard mask film is processed into a gate pattern with a second mask pattern, the gate film is patterned with the hard mask film as a mask, a spacer insulating film is formed,... Agent: Fujitsu Semiconductor Limited

20140235044 - Multi-composition dielectric for semiconductor device: The present disclosure provides a method of semiconductor device fabrication including forming a multi-composition ILD layer by forming a first portion of an inter-layer dielectric (ILD) layer on a semiconductor substrate; and forming a second portion of an ILD layer on the first portion of the ILD layer. The second... Agent: Taiwan Semiconductor Manufacturing Company Ltd

20140235046 - Method of integrating a charge-trapping gate stack into a cmos flow: A method of fabricating a memory device is described. Generally, the method includes: forming on a surface of a substrate a dielectric stack including a tunneling dielectric and a charge-trapping layer overlying the tunneling dielectric; forming a cap layer overlying the dielectric stack, wherein the cap layer comprises a multi-layer... Agent: Cypress Semiconductor Corporation

20140235047 - Methods of forming gates of semiconductor devices: Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k... Agent: Samsung Electronics Co., Ltd.

20140235048 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes forming ohmic electrodes on a source region and a drain region of a nitride semiconductor layer, forming a low-resistance layer between an uppermost surface of the nitride semiconductor layer and the ohmic electrodes by annealing the nitride semiconductor layer, removing the ohmic... Agent: Sumitomo Electric Industries, Ltd.

20140235049 - Semiconductor devices and methods of manufacture thereof: Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece including a conductive feature formed in a first insulating material and a second insulating material disposed over the first insulating material. The second insulating material has an... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140235050 - Method of semiconductor integrated circuit fabrication: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate and depositing a conductive layer on the substrate. A patterned hard mask and a catalyst layer are formed on the conductive layer. The method further includes growing a plurality of carbon nanotubes (CNTs)... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140235051 - Structure and method for high performance interconnect: The present disclosure provides an integrated circuit structure. The integrated circuit structure includes a substrate having an IC device formed therein; a first dielectric material layer disposed on the substrate and having a first trench formed therein; and a first composite interconnect feature disposed in the first trench and electrically... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140235052 - Methods for fabricating semiconductor devices having through electrodes: Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via... Agent: Samsung Electronics Co., Ltd.

20140235053 - Methods of forming through silicon via openings: A method of forming a through-silicon-via (TSV) opening includes forming a TSV opening through a substrate. A recast of a material of the substrate on sidewalls of the TSV opening is removed with a first chemical. The sidewalls of the TSV opening are cleaned with a second chemical by substantially... Agent:

20140235054 - Tungsten diazabutadiene precursors, their synthesis, and their use for tungsten containing film depositions: Disclosed are tungsten diazabutadiene molecules, their method of manufacture, and their use in the deposition of tungsten-containing films. The disclosed molecules have the formula W(DAD)3, wherein DAD is a 1,4-diazabuta-1,3-diene Isgand N4 and its reduced derivatives. The DAD !igand is directly coordinated to tungsten through the N atoms. The disclosed... Agent:

20140235055 - Method for fabricating a semiconductor integrated circuit with a litho-etch, litho-etch process for etching trenches: Methods are provided for fabricating semiconductor integrated circuits including isolated trench features. In one embodiment, a method includes providing a semiconductor substrate with an overlying process layer. A trench pattern to be etched into the process layer is determined and that trench pattern is decomposed into first and second patterns,... Agent: Globalfoundries, Inc.

20140235056 - System, method and apparatus for ion milling in a plasma etch chamber: A system and method of ion milling performed in a plasma etch system including a plasma etch chamber, multiple process gas sources coupled to the plasma etch chamber, a radio frequency bias source and a controller. The plasma etch chamber including a substrate support. The substrate support being a non-pivoting... Agent: Lam Research Corporation

20140235059 - Diarylamine novolac resin: (in Formula (1), each of Ar1 and Ar2 is a benzene ring or a naphthalene ring). A method for manufacturing a semiconductor device, including: forming an underlayer film on a semiconductor substrate with the resist underlayer film-forming composition; forming a hardmask on the underlayer film; forming a resist film on... Agent: Nissan Chemical Industries, Ltd

20140235058 - Method for forming a power semiconductor device: A method for forming a semiconductor device includes providing a semiconductor body which has a main surface and a first n-type semiconductor region, forming a trench which extends from the main surface into the first n-type semiconductor region, and forming a dielectric layer having fixed negative charges on a surface... Agent:

20140235057 - Pattern forming process: A pattern is formed by coating a resist composition comprising a resin comprising recurring units having an acid labile group, a photoacid generator, and a first organic solvent onto a processable substrate, prebaking, exposing, PEB, and developing in an organic solvent developer to form a negative pattern; heating the negative... Agent: Shin-etsu Chemical Co., Ltd.

20140235060 - Resist underlayer film-forming composition which contains alicyclic skeleton-containing carbazole resin: There is provided a resist underlayer film used in lithography process that has a high n value and a low k value, and can effectively reduce reflection of light having a wavelength of 193 nm from the substrate in a three-layer process in which the resist underlayer film is used... Agent: Nissan Chemical Industries, Ltd.

20140235061 - Ductile mode machining methods for hard and brittle components of plasma processing apparatuses: A method of ductile mode machining a component of a plasma processing apparatus wherein the component is made of nonmetallic hard and brittle material wherein the method comprises single point turning the component with a diamond cutting tool causing a portion of the nonmetallic hard and brittle material to undergo... Agent: Lam Research Corporation

20140235062 - Plasma processing method and plasma processing apparatus: Disclosed is a plasma processing method which includes a gas supplying process, a power supplying process, and an etching process. In the gas supplying process, a processing gas is supplied into a processing container in which an object to be processed is disposed. In the power supplying process, a plasma... Agent: Tokyo Electron Limited

20140235063 - Hybrid edge ring for plasma wafer processing: An edge ring assembly is disclosed for use in a plasma processing chamber, which includes an RF conductive ring positioned on an annular surface of a base plate and configured to surround an upper portion of the baseplate and extend underneath an outer edge of a wafer positioned on the... Agent: Lam Research Corporation

20140235064 - Etchant composition and etching method: This invention is concerning an etchant composition used to etch a silicon-containing film formed on a target substrate. The etchant composition includes at least one selected from the group consisting of an organic compound containing a hydroxyl group, an organic compound containing a carbonyl group, an inorganic acid and inorganic... Agent: Hayashi Pure Chemical Ind., Ltd.,

20140235066 - Method of manufacturing semiconductor device and method of cleaning processing vessel: When a dry cleaning process is performed in a processing chamber by adding nitrogen monoxide (NO) gas to a cleaning gas, the handling is facilitated, and cleaning performance is improved. A substrate processing apparatus includes a processing vessel configured to process a substrate, a first cleaning gas supply system configured... Agent: L'air Liquide Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude

20140235065 - Method of manufacturing semiconductor device and semiconductor manufacturing apparatus: Disclosed is a semiconductor device manufacturing method that manufactures a semiconductor device having a resist pattern which is excellent in roughness property and line width property. The method includes forming a film which is elastic and incompatible with a resist patterned on an object to be processed to cover the... Agent: Tokyo Electron Limited

20140235067 - Method of manufacturing semiconductor device, substrate processing method, substrate processing apparatus, and recording medium: A thin film that has a predetermined composition and containing predetermined elements is formed on a substrate by performing a cycle of steps a predetermined number of times, said cycle comprising: a step wherein a first layer containing the predetermined elements, nitrogen and carbon is formed on the substrate by... Agent: Hitachi Kokusai Electric Inc.

20140235068 - Method of manufacturing semiconductor device, apparatus for manufacturing semiconductor device, and non-transitory computer-readable recording medium: Provided is a method of manufacturing a semiconductor device. The method includes (a) loading a substrate having a silicon-containing film formed thereon into a process chamber; (b) supplying a gas into the process chamber from a gas supply unit until an inner pressure of the process chamber is equal to... Agent: Hitachi Kokusai Electric Inc.

20140235069 - Multi-plenum showerhead with temperature control: An apparatus for use with radical sources for supplying radicals during semiconductor processing operations is provided. The apparatus may include a stack of plates or components that form a faceplate assembly. The faceplate assembly may include a radical diffuser plate, a precursor delivery plate, and a thermal isolator interposed between... Agent:

20140235070 - Cover plate for wind mark control in spin coating process: Techniques disclosed herein provide an apparatus and method of spin coating that inhibits the formation of wind marks and other defects from turbulent fluid-flow, thereby enabling higher rotational velocities and decreased drying times, while maintaining film uniformity. Techniques disclosed herein include a fluid-flow member, such as a ring or cover,... Agent: Tokyo Electron Limited

20140235071 - Substrate rapid thermal heating system and methods: A method and apparatus for rapid thermal heat treatment of semiconductor and other substrates is provided. A number of heat lamps arranged in an array or other configuration produce light and heat radiation. The light and heat radiation is directed through a heat slot that forms a radiation beam of... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140235072 - Thermal processing method and thermal processing apparatus for heating substrate, and susceptor: A semiconductor wafer with (100) plane orientation has two orthogonal cleavage directions. A notch is provided so as to indicate one of these directions. During irradiation with a flash, the semiconductor wafer warps about one of two radii at an angle of 45 degrees with respect to the cleavage directions... Agent: Dainippon Screen Mfg Co., Ltd.

  
08/14/2014 > 90 patent applications in 71 patent subcategories.

20140227805 - Adhesion of ferroelectric material to underlying conductive capacitor plate: Deposition of lead-zirconium-titanate (PZT) ferroelectric material over iridium metal, in the formation of a ferroelectric capacitor in an integrated circuit. The capacitor is formed by the deposition of a lower conductive plate layer having iridium metal as a top layer. The surface of the iridium metal is thermally oxidized, prior... Agent: Texas Instruments Incorporated

20140227803 - Method for making a current-perpendicular-to-the-plane (cpp) magnetoresistive sensor having a low-coercivity reference layer: A method for making a current-perpendicular-to-the-plane (CPP) magnetoresistive (MR) sensor that has a reference layer with low coercivity includes first depositing, within a vacuum chamber, a seed layer and an antiferromagnetic layer on a substrate without the application of heat. The substrate with deposited layers is then heated to between... Agent: Hgst Netherlands B.v.

20140227801 - Methods of forming a magnetic tunnel junction device: Embodiments of the present disclosure are a method of forming a magnetic tunnel junction (MTJ) device and methods of forming a magnetic random access memory (MRAM) device. An embodiment is a method of forming a magnetic tunnel junction (MTJ) device, the method comprising forming an MTJ layer over a bottom... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140227802 - Process to remove film from semiconductor devices: Embodiments of the present disclosure are a method of forming a semiconductor device, a method of forming an MRAM device, and a method of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a second layer over a first layer, and... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140227804 - System and process to remove film from semiconductor devices: Embodiments of the present disclosure are a method of forming a semiconductor device, a method of forming a magnetic tunnel junction (MTJ) device, and a process tool. An embodiment is a process tool comprising an ion beam etch (IBE) chamber, an encapsulation chamber, a transfer module interconnecting the IBE chamber... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140227806 - Method of manufacturing white light emitting device (led) and apparatus measuring phosphor film: A method of manufacturing a white light emitting device includes dividing a phosphor sheet into phosphor film units to be applied to individual light emitting diode (LED) devices, measuring light conversion characteristics of the respective phosphor film units, classifying the phosphor film units of the phosphor sheet into a plurality... Agent: Samsung Electronics Co., Ltd.

20140227807 - Semiconductor manufacturing apparatus and manufacturing method of semiconductor device: A semiconductor manufacturing apparatus according to the present embodiment includes a vacuum chamber. A stage mounts a semiconductor substrate thereon within the vacuum chamber. An electrostatic chuck fixes the semiconductor substrate onto the stage. A sensor detects a height of a surface of the semiconductor substrate fixed onto the stage... Agent: Kabushiki Kaisha Toshiba

20140227808 - Ink-jet recording head, recording element substrate, method for manufacturing ink-jet recording head, and method for manufacturing recording element substrate: An ink-jet recording head includes a plurality of recording element substrates each having an ejection pressure generating element configured to generate pressure for ejecting ink from an ink discharge port. The plurality of recording element substrates each include a first surface on which the corresponding ejection pressure generating element is... Agent: Canon Kabushiki Kaisha

20140227809 - Method of forming nano crystals and method of manufacturing organic light-emitting display apparatus including thin film having the same: A method of forming nanocrystals and a method of manufacturing an organic light-emitting display apparatus that includes a metal compound thin film having the nanocrystals. The method of forming nanocrystals includes forming a metal compound thin film under a first pressure by using a reactive sputtering process, and forming the... Agent:

20140227810 - Organic light emitting display device and method for fabricating the same: The present application relates to a method for fabricating an organic light emitting display device, comprising: forming a drive thin film transistor on a substrate at a non-light emission region; forming a protective layer on the substrate; forming a color filter on the protective layer; forming a planarizing layer on... Agent: Lg Display Co., Ltd.

20140227811 - Method for producing an optoelectronic device with wireless contacting: A method for producing an optoelectronic device is provided, in which a luminescent diode chip (10) is mounted on a base surface (8) on the first terminal area (1) of a carrier (3). An electrically insulating layer (4) is applied to side faces (17) of the luminescent diode chip (10).... Agent: Osram Opto Semiconductors Gmbh

20140227812 - Discrete phosphor chips for light-emitting devices and related methods: In accordance with certain embodiments, phosphor chips are formed and subsequently attached to light-emitting elements.... Agent:

20140227813 - Method of manufacturing light emitting element: A light emitting element for flip-chip mounting having a flat mounting surface which allows a decrease in the width of the streets of a wafer. In the light emitting element, the insulating member filling around the bumps and flattening the upper surface is formed with a margin of a region... Agent: Nichia Corporation

20140227815 - Charge-transporting varnish: (In the formula: R1-R4 each independently represent a hydrogen atom, a halogen atom, a nitro group, a cyano group, a hydroxyl group, a thiol group, a phosphate group, a sulfone group, a carboxyl group, an alkoxy group having 1-20 carbon atoms, or the like; R5-R8 each independently represent a hydrogen... Agent: Nissan Chemical Industries, Ltd.

20140227814 - Method of manufacturing light-emitting device: An LED includes a compound semiconductor structure having first and second compound layers and an active layer, first and second electrode layers atop the second compound semiconductor layer and connected to respective compound layers. An insulating layer is coated in regions other than where the first and second electrode layers... Agent: Samsung Electronics Co., Ltd.

20140227816 - Method to package multiple mems sensors and actuators at different gases and cavity pressures: A method for fabricating a multiple MEMS device. A semiconductor substrate having a first and second MEMS device, and an encapsulation wafer with a first cavity and a second cavity, which includes at least one channel, can be provided. The first MEMS can be encapsulated within the first cavity and... Agent: Mcube Inc.

20140227817 - Manufacturing process of mems device: A manufacturing process of a M EMS device divides a substrate for fabricating u MEMS component into two electrically isolated regions, so that the MEMS component and the circuit disposed on its surface could connect electrically with another substrate below respectively through the corresponding conducing regions, whereby the configuration of... Agent: Miradia, Inc.

20140227818 - Semiconductor structure with lamella defined by singulation trench: A method for fabricating a semiconductor structure includes etching a first opening into a substrate; etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench; fabricating a sense element for sensing a deflection of the lamella; and singulating the... Agent: Infineon Technologies Ag

20140227819 - Thermal fluid flow sensor and method of manufacturing the same: In a thermal sensor with a detection part and a circuit part formed on the same substrate, an insulating film for protection of the circuit part causes problems of lowering in sensitivity of a heater, deterioration in accuracy due to variation of a residual stress in the detection part, etc.... Agent: Hitachi Automotive Systems, Ltd.

20140227821 - P-type diffusion layer forming composition: The composition for forming a p-type diffusion layer in accordance with the present invention contains an acceptor element-containing glass powder and a dispersion medium. A p-type diffusion layer and a photovoltaic cell having a p-type diffusion layer are prepared by applying the composition for forming a p-type diffusion layer, followed... Agent: Hitachi Chemical Company, Ltd.

20140227820 - Passivation layer removal by delivering a split laser pulse: Embodiments of the present invention generally provide methods for forming features or holes in a passivation layer without damaging the underlying solar cell substrate. A source laser beam is split into a first laser beam and a second laser beam. The first laser beam is modified to have a different... Agent: Applied Materials, Inc.

20140227822 - Method for forming solar cells: A method for forming a thin film solar cell that includes one or more moisture barrier layer made of a water-insoluble material for protection against water and oxygen damage to the top electrode layer material is disclosed.... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140227823 - Array of monolithically integrated thin film photovoltaic cells and associated methods: A process of forming an array of monolithic ally integrated thin film photo voltaic cells from a stack of thin film layers formed on an insulating substrate includes forming at least one cell isolation scribe in the stack of thin film layers. A second electrical contact layer isolation scribe is... Agent: Ascent Solar Technologies, Inc.

20140227825 - Interdigitated back contact heterojunction photovoltaic device: A photovoltaic device includes a crystalline substrate having a first dopant conductivity, an interdigitated back contact and a front surface field structure. The front surface field structure includes a crystalline layer formed on the substrate and a noncrystalline layer formed on the crystalline layer. The crystalline layer and the noncrystalline... Agent: International Business Machines Corporation

20140227824 - Interdigitated back contact heterojunction photovoltaic device with a floating junction front surface field: A photovoltaic device includes a crystalline substrate having a first dopant conductivity, an interdigitated back contact and a front surface field structure. The front surface field structure includes a crystalline layer formed on the substrate and a noncrystalline layer formed on the crystalline layer. The crystalline layer and the noncrystalline... Agent: International Business Machines Corporation

20140227826 - Method for treating a semiconductor: Methods for treating a semiconductor material, and for making devices containing a semiconducting material, are presented. One embodiment is a method for treating a semiconductor material that includes a chalcogenide. The method comprises contacting at least a portion of the semiconductor material with a chemical agent. The chemical agent comprises... Agent: First Solar, Inc.

20140227828 - Dye-sensitized solar cell and method for manufacturing the same: Provided is a dye-sensitized solar cell, and a method for manufacturing the same, that in a technology in which a current collector electrode is used instead of a transparent conductive film, can be manufactured by a simple cell producing operation and is capable of achieving a desirably thin thickness for... Agent: Nippon Steel Chemical Co., Ltd.

20140227827 - Methods for metallizing an aluminum paste: The present technology generally relates to methods for metallizing an aluminum paste comprising contacting the aluminum paste with a cleaner, contacting the aluminum paste with an oxidation inhibiting deposit solution to deposit a layer of an oxidation inhibiting composition onto the aluminum paste and contacting the aluminum paste with conductive... Agent:

20140227829 - Using interrupted through-silicon-vias in integrated circuits adapted for stacking: In an integrated circuit (IC) adapted for use in a stack of interconnected ICs, interrupted through-silicon-vias (TSVs) are provided in addition to uninterrupted TSVs. The interrupted TSVs provide signal paths other than common parallel paths between the ICs of the stack. This permits IC identification schemes and other functionalities to... Agent: Conversant Intellectual Property Management Inc

20140227830 - Method for fabricating quad flat non-leaded package structure with electromagnetic interference shielding function: A quad flat non-leaded (QFN) package structure with an electromagnetic interference (EMI) shielding function is proposed, including: a lead frame having a die pad, a plurality of supporting portions connecting to the die pad and a plurality of leads disposed around the periphery of the die pad without connecting to... Agent: Siliconware Precision Industries Co., Ltd.

20140227831 - Front side copper post joint structure for temporary bond in tsv application: A method of forming an integrated circuit structure is provided. The method includes providing a substrate, the substrate having a conductive pad thereon. A dielectric buffer layer is formed over at least a portion of the conductive pad, and an under-bump-metallurgy (UBM) is formed directly coupled to the conductive pad,... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140227832 - Semiconductor packages and methods of packaging semiconductor devices: A device is disclosed. The device includes a carrier substrate having first and second major surfaces. The first surface includes a die region and contact pads and the second surface includes package contacts. The carrier substrate includes a patterned lead frame which defines a line level with conductive traces and... Agent: United Test And Assembly Center Ltd.

20140227833 - Sensor array package: Various methods for forming a low profile assembly are described. The low profile assembly may include an integrated circuit. The integrated circuit as well as components associated with the integrated circuit may be positioned below a surface plane of a printed circuit board in which the integrated circuit is located.... Agent: Apple Inc.

20140227834 - Method for incorporating stress sensitive chip scale components into reconstructed wafer based modules: Techniques for constructing an electronic module are provided herein. For example, the techniques include orienting at least one die having a top side (e.g., a first side), a bottom side (e.g., a second side) and one or more side walls, on a substrate with the top side of the die... Agent: The Charles Stark Draper Laboratory, Inc.

20140227835 - Process for improving package warpage and connection reliability through use of a backside mold configuration (bsmc): A backside mold configuration (BSMC) process for manufacturing packaged integrated circuits includes applying a mold compound to a side of a packaging substrate opposite an attached die. The mold compound is deposited on a dielectric (such as photo resist). The mold compound and dielectric are patterned after coupling a die... Agent: Qualcomm Incorporated

20140227836 - Nitride based semiconductor device and method for manufacturing the same: Disclosed herein is a nitride based semiconductor device including: a base substrate; an epitaxial growth layer disposed on the base substrate and generating a 2-dimensional electron gas in an inner portion thereof; and an electrode structure disposed on the epitaxial growth layer, wherein the electrode structure includes: a gate electrode;... Agent: Samsung Electro-mechanics Co., Ltd.

20140227837 - Lateral super junction device with high substrate-gate breakdown and built-in avalanche clamp diode: A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device... Agent:

20140227838 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device which includes forming first and second gate patterns, forming first and second sidewall spacers on sidewalls of the first and second gate patterns respectively, implanting a first impurity into the semiconductor substrate, forming a third sidewall spacer on the first sidewall spacer and... Agent: Fujitsu Semiconductor Limited

20140227839 - Method of manufacturing semiconductor device: Provided is a semiconductor device having improved performance. In a semiconductor substrate located in a memory cell region, a memory cell of a nonvolatile memory is formed while, in the semiconductor substrate located in a peripheral circuit region, a MISFET is formed. At this time, over the semiconductor substrate located... Agent: Renesas Electronics Corporation

20140227840 - 3d non-volatile memory device and method for fabricating the same: A non-volatile memory device having a string of a plurality of memory cells that are serially coupled, wherein the string of memory cells includes a plurality of second channels of a pillar type, a first channel coupling lower end portions of the plurality of the second channels with each other,... Agent: Sk Hynix Inc.

20140227842 - 3d structured memory devices and methods for manufacturing thereof: A 3D structured nonvolatile semiconductor memory devices and methods for manufacturing are disclosed. One such device includes an n+ region at a source/drain region; a p+ region at the source/drain region; and a diffusion barrier material between the n+ region and the p+ region. The n+ region is substantially isolated... Agent: Micron Technology, Inc.

20140227841 - Three-dimensional semiconductor memory devices and methods of fabricating the same: Example embodiments relate to a three-dimensional semiconductor memory device including an electrode structure on a substrate, the electrode structure including at least one conductive pattern on a lower electrode, and a semiconductor pattern extending through the electrode structure to the substrate. A vertical insulating layer may be between the semiconductor... Agent: Samsung Electronics Co., Ltd.

20140227844 - Method for fabricating integrated circuit with different gate heights and different materials: A method for fabricating an integrated circuit includes the following steps of: providing a substrate with at least one isolation structure formed therein so as to separate the substrate into a first active region with a first stacked structure formed thereon and a second active region with a second stacked... Agent: United Microelectronics Corporation

20140227843 - Method of manufacturing a semiconductor device: A control gate electrode and a memory gate electrode of a memory cell of a non-volatile memory are formed in a memory cell region of a semiconductor substrate, and a dummy gate electrode is formed in a peripheral circuit region. Then, n+-type semiconductor regions for a source or a drain... Agent: Renesas Electronics Corporation

20140227845 - Methods of forming multiple n-type semiconductor devices with different threshold voltages on a semiconductor substrate: One illustrative method disclosed herein involves forming an integrated circuit product comprised of first and second N-type transistors formed in and above first and second active regions, respectively. The method generally involves performing a common threshold voltage adjusting ion implantation process on the first and second active regions, forming the... Agent: Globalfoundries Inc.

20140227846 - Double channel doping in transistor formation: A method includes performing a first well doping on a first active region and a second active region simultaneously, and forming a first and a second dummy gate covering a first middle portion of the first active region and a second middle portion of the second active region, respectively. The... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140227847 - Method for fabricating a semiconductor device: A method for fabricating a semiconductor device includes forming a pre-isolation layer covering a fin formed on a substrate, the pre-isolation layer including a lower pre-isolation layer making contact with the fin and an upper pre-isolation layer not making contact with the fin, removing a portion of the upper pre-isolation... Agent: Samsung Electronics Co., Ltd.

20140227848 - Semiconductor device and method of fabricationg the same: A method of fabricating a semiconductor device includes forming first gate patterns on a semiconductor substrate using an etch mask pattern, forming a trench in the semiconductor substrate between the first gate patterns, forming an insulating layer in the trench, such that the insulating layer fills the trench and is... Agent: Samsung Electronics Co., Ltd.

20140227849 - Methods of trimming nanowire structures: One illustrative method disclosed herein includes forming an initial nanowire structure having an initial cross-sectional size, performing a doping diffusion process to form an N-type doped region in the initial nanowire structure and performing an etching process to remove at least a portion of the doped region and thereby define... Agent: Globalfoundries Inc.

20140227850 - Finfet/tri-gate channel doping for multiple threshold voltage tuning: An embodiment method of controlling threshold voltages in a fin field effect transistor (FinFET) includes forming a dummy gate over a central portion of a fin, the central portion of the fin disposed between exterior portions of the fin unprotected by the dummy gate, removing the exterior portions of the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140227852 - Capacitor forming methods: A capacitor forming method includes forming an electrically conductive support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at... Agent: Micron Technology, Inc.

20140227851 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing the same are disclosed. An additional spacer is formed at a lateral surface of an upper part of the bit line so that the distance of insulation films between a storage node and a neighboring storage node contact plug is increased. Accordingly,... Agent: Sk Hynix Inc.

20140227853 - Method for forming resistance-switching memory cell with multiple electrodes using nano-particle hard mask: In a fabrication process for reversible resistance-switching memory cells, a bottom electrode layer is coated with nano-particles. The nano-particles are used to etch the bottom electrode layer, forming multiple narrow, spaced apart bottom electrode structures for each memory cell. A resistance-switching material is then deposited between and above the bottom... Agent: Sandisk 3d LLC

20140227854 - Semiconductor device and fabricating method of the same: Openings are formed by lithography and subsequent dry etching at the portions of a first protective film which correspond to connecting holes of second plugs which will be described later, namely at the portions thereof which align with first plugs, wherein the openings have a diameter greater than that of... Agent: Fujitsu Semiconductor Limited

20140227855 - Semiconductor device having gate trench and manufacturing method thereof: Disclosed herein is a semiconductor device that includes a trench formed across active regions and the element isolation regions. A conductive film is formed at a lower portion of the trench, and a cap insulating film is formed at an upper portion of the trench. The cap insulating film has... Agent: Elpida Memory, Inc.

20140227856 - Methods of fabricating semiconductor device having shallow trench isolation (sti): Methods of fabricating a semiconductor device include forming a field trench in a silicon substrate, forming a first oxide layer in the field trench, forming a first thinned oxide layer by partially removing a surface of the first oxide layer, and forming a first nitride layer on the first thinned... Agent: Samsung Electronics Co., Ltd.

20140227857 - Methods of fabricating semiconductor devices including fin-shaped active regions: A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming... Agent: Samsung Electronics Co., Ltd.

20140227858 - Shallow trench isolation integration methods and devices formed thereby: Aspects of the present invention generally relate to approaches for forming a semiconductor device such as a TSV device having a “buffer zone” or gap layer between the TSV and transistor(s). The gap layer is typically filled with a low stress thin film fill material that controls stresses and crack... Agent: Globalfoundries Inc.

20140227859 - Diffusion resistor with reduced voltage coefficient of resistance and increased breakdown voltage using cmos wells: Integrated circuits and manufacturing methods are presented for creating diffusion resistors (101, 103) in which the diffusion resistor well is spaced from oppositely doped wells to mitigate diffusion resistor well depletion under high biasing so as to provide reduced voltage coefficient of resistivity and increased breakdown voltage for high-voltage applications.... Agent: Texas Instruments Incorporated

20140227860 - Workpiece cutting method: Fractures (17a, 17b) are generated from modified regions (7a, 7b) to front and rear faces (12a, 12b) of a object to be processed (1), respectively, while an unmodified region (2) is interposed between the modified regions (7a, 7b). This can prevent fractures from continuously advancing in the thickness direction of... Agent: Hamamatsu Photonics K.k.

20140227861 - Bottom-up peald process: The present disclosure relates to a method and apparatus for performing a plasma enhanced ALD (PEALD) process that provides for improved step coverage. The process introduces a precursor gas into a processing chamber comprising a semiconductor workpiece. The first gas is ionized to from a plurality of ionized precursor molecules.... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140227863 - Methods of forming a metal telluride material, related methods of forming a semiconductor device structure, and related semiconductor device structures: Accordingly, a method of forming a metal chalcogenide material may comprise introducing at least one metal precursor and at least one chalcogen precursor into a chamber comprising a substrate, the at least one metal precursor comprising an amine or imine compound of an alkali metal, an alkaline earth metal, a... Agent: Micron Technology, Inc.

20140227862 - Semiconductor nanocrystals and methods: In one embodiment, a method for forming a coating comprising a semiconductor material on at least a portion of a population of semiconductor nanocrystals comprises providing a first mixture including semiconductor nanocrystals and an aromatic solvent, introducing one or more cation precursors and one or more anion precursors into the... Agent: Qd Vision, Inc.

20140227864 - Method for producing group iii nitride semiconductor: Group III nitride semiconductor having reduced threading dislocation density and uniform Ga-polar surface is provided. Forming a capping layer on a buffer layer containing Al as an essential element at a temperature lower than a temperature at which an oxide of element constituting the buffer layer is formed. Heat treating... Agent: Toyoda Gosei Co., Ltd.

20140227865 - Diffusion-agent composition, method for forming impurity-diffusion layer, and solar cell: A diffusion-agent composition including a borate ester (A); a polyhydric alcohol (B) represented by general formula (1); and an alkoxysilane compound (C). In general formula (1), k represents an integer from 0 to 3, m represents an integer of 1 or more, and R2 and R3 each independently represent a... Agent: Tokyo Ohka Kogyo Co., Ltd.

20140227866 - Method of making a gas distribution member for a plasma processing chamber: A method of making a Si containing gas distribution member for a semiconductor plasma processing chamber comprises forming a carbon member into an internal cavity structure of the Si containing gas distribution member. The method includes depositing Si containing material on the formed carbon member such that the Si containing... Agent: Lam Research Corporation

20140227867 - Self-aligned insulating etchstop layer on a metal contact: A semiconductor device comprising a substrate having a transistor that includes a metal gate structure; a first oxide layer formed over the substrate; a silane layer formed on the first oxide layer; and a non-conductive metal oxide layer grown on the metal gate structure, wherein the silane layer inhibits nucleation... Agent:

20140227868 - Semiconductor device and method for fabricating the same: A method of fabricating a semiconductor device includes forming a first gate pattern and a dummy gate pattern on a first active area and a second active area of a substrate, respectively, the first gate pattern including a first gate insulating layer and a silicon gate electrode, removing the dummy... Agent: Samsung Electronics Co., Ltd.

20140227869 - Methods of forming a semiconductor device by performing a wet acid etching process while preventing or reducing loss of active area and/or isolation regions: One method disclosed includes forming a sidewall spacer proximate a gate structure, forming a sacrificial layer of material above a protective cap layer, the sidewall spacer and a substrate, forming a sacrificial protection layer above the sacrificial layer, reducing a thickness of the sacrificial protection layer such that its upper... Agent: Globalfoundries Inc.

20140227870 - Method of forming a through-silicon via utilizing a metal contact pad in a back-end-of-line wiring level to fill the through-silicon via: A method for fabricating through-silicon vias (TSVs) for semiconductor devices is provided. Specifically, the method involves utilizing copper contact pads in a back-end-of-line wiring level, wherein the copper contact pads act as cathodes for performing an electroplating technique to fill TSVs with plated-conductive material (e.g., copper) from an electroplating solution.... Agent: International Business Machines Corporation

20140227871 - Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region: A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the... Agent: Intermolecular, Inc.

20140227872 - Methods of forming conductive structures using a sacrificial liner layer: One illustrative method disclosed herein includes performing a first etching process to define a via opening in a layer of insulating material, performing at least one process operation to form a sacrificial liner layer on the sidewalls of the via opening, performing a second etching process to define a trench... Agent: Globalfoundries Inc.

20140227873 - Semiconductor device and process for producing the same: A semiconductor device having a contact structure is provided. The semiconductor device includes: a conductive region; a first film and a second film which are formed over the conductive region to realize a layer; and a contact electrode which extends through the layer to the conductive region, and is formed... Agent: Fujitsu Semiconductor Limited

20140227874 - Elongated via structures: An integrated circuit structure includes a plurality of insulator layers (connected to each other) that form a laminated structure. Further included are via openings within each of the insulator layers, and conductive via material within the via openings. The conductive via material within corresponding via openings of adjacent insulator layers... Agent: International Business Machines Corporation

20140227875 - Method for exposing a layer: A method for exposing a layer buried in a substrate via a trench having an insulated lateral wall and an insulated floor includes the steps of applying an oxide onto the substrate and anisotropic etching. Applying the oxide onto the substrate takes place at least in a region of the... Agent: Fraunhofer-gesellschaft Zur Foerderung Der Angewandten Forschung E.v.

20140227876 - Semiconductor device manufacturing method: In a semiconductor device manufacturing method having a plasma etching process, a substrate is plasma etched using a resist layer as a mask. The plasma etching process has: a first etching step wherein a mixed gas having a deposition gas and an etching gas mixed at a ratio is introduced... Agent: Tokyo Electron Limited

20140227877 - Method of forming a metal contact opening with a width that is smaller than the minimum feature size of a photolithographically-defined opening: The width of a metal contact opening is formed to be smaller than the minimum feature size of a photolithographically-defined opening. The method forms the metal contact opening by first etching the fourth layer of a multilayered hard mask structure to have a number of trenches that expose the third... Agent: Texas Instruments Incorporated

20140227878 - Method for manufacturing small-size fin-shaped structure: A method for manufacturing a small-size fin-shaped structure, comprising: forming a first mask layer and a second mask layer on a substrate in sequence; etching the first mask layer and the second mask layer to form a hard mask pattern, wherein a second mask layer pattern is wider than a... Agent: Institute Of Microelectronics, Chinese Academy Of Sciences

20140227880 - Combinatorial plasma enhanced deposition and etchtechniques: According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is... Agent: Intermolecular, Inc.

20140227879 - Methods for fabricating integrated circuits with improved semiconductor fin structures: Methods for fabricating integrated circuits are provided herein. In an embodiment, a method for fabricating an integrated circuit includes providing a mandrel layer overlying a semiconductor substrate and patterning the mandrel layer into mandrel structures. The method further includes forming a protective layer between the mandrel structures. Spacers are formed... Agent: Globalfoundries, Inc.

20140227881 - Semiconductor processing systems having multiple plasma configurations: An exemplary system may include a chamber configured to contain a semiconductor substrate in a processing region of the chamber. The system may include a first remote plasma unit fluidly coupled with a first access of the chamber and configured to deliver a first precursor into the chamber through the... Agent: Applied Materials, Inc.

20140227882 - Cleaning method, processing apparatus, and storage medium: Deposits such as particles deposited on a surface of a target object can be easily removed while suppressing damage to the target object such as destruction of pattern formed on the surface of the target object or film roughness on the surface of the target object. In a pre-treatment, vapor... Agent: Tokyo Electron Limited

20140227883 - Substrate processing apparatus and substrate processing method: In a substrate processing apparatus, an outer edge portion of a substrate in a horizontal state is supported from below by an annular substrate supporting part, and a lower surface facing part having a facing surface facing a lower surface of the substrate is provided inside the substrate supporting part.... Agent: Dainippon Screen Mfg. Co., Ltd.

20140227884 - Process and apparatus for treating surfaces of wafer-shaped articles: An apparatus and method for processing wafer-shaped articles utilizes at least first and second liquid-dispensing nozzles, wherein a first liquid-dispensing nozzle is positioned closer to an axis of rotation than the second liquid-dispensing nozzle. A liquid supply system supplies heated process liquid to the nozzles such that process liquid dispensed... Agent: Lam Research Ag

20140227885 - Method for the conditioning of flat objects: An apparatus which is suitable for carrying out the method has two regions arranged parallel to the apparatus longitudinal axis (L) and above one another, wherein the upper region is configured as an adapter region (1). The lower region is formed as a holding region (2) which comprises a part,... Agent: Rena Gmbh

20140227886 - Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium: A method of manufacturing a semiconductor device is disclosed. The method includes forming a thin film containing a predetermined element, boron, carbon, and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes forming a first layer containing boron and a halogen group by... Agent: Hitachi Kokusai Electric Inc.

20140227887 - Phenol-based self-crosslinking polymer and resist underlayer film composition including same: A phenolic self-crosslinking polymer whose self-crosslinking reaction at a heating step is performed without additives for hardening the polymer, and a composition of resist-underlayer-film containing the same, are disclosed. The phenolic self-crosslinking polymer being selected from a group consisting of a polymer represented by Formula 1, a polymer represented by... Agent:

20140227888 - Remote plasma radical treatment of silicon oxide: Embodiments described herein generally relate to methods for manufacturing flash memory devices. In one embodiment, the method includes generating a plasma comprising nitrogen-containing radicals in a remote plasma applicator, flowing the plasma comprising nitrogen-containing radicals into a processing region of the processing chamber where a semiconductor device is disposed, wherein... Agent:

20140227889 - Laser-based materials processing apparatus, method and applications: In a particular embodiment, a relatively high-energy thulium fiber laser operating at the wavelength λ=2 μm may be used to selectively modify a front and/or a back surface of silicon and gallium arsenide wafers. The processing regime was studied in terms of the process parameters variation, and the corresponding modification... Agent: University Of Central Florida Research Foundation, Inc.

20140227890 - Apparatus and methods for improving the intensity profile of a beam image used to process a substrate: Methods and apparatuses are provided for improving the intensity profile of a beam image used to process a semiconductor substrate. At least one photonic beam may be generated and manipulated to form an image having an intensity profile with an extended uniform region useful for thermally processing the surface of... Agent: Ultratech, Inc.

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