|Semiconductor device manufacturing: process patents - Monitor Patents|
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Semiconductor device manufacturing: process May archived by USPTO category 05/11Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 05/26/2011 > 73 patent applications in 58 patent subcategories. archived by USPTO category
20110124133 - Spin-current switchable magnetic memory element and method of fabricating the memory element: A method of fabricating a magnetic memory element includes forming a plurality of magnetic layers having a perpendicular magnetic anisotropy component, in which the plurality of magnetic layers includes a first magnetic layer having an alloy of a rare-earth metal and a transition metal, and a second magnetic layer.... Agent: International Business Machines Corporation
20110124134 - End-cut first approach for critical dimension control: A method for fabricating a semiconductor device is disclosed. The method includes forming at least one material layer over a substrate; performing an end-cut patterning process to form an end-cut pattern overlying the at least one material layer; transferring the end-cut pattern to the at least one material layer; performing... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20110124135 - Solar cell module and method for assembling a solar cell module: The invention relates to a method for assembly of solar cell modules by arranging a multitude pre-manufactured, individualized solar cells for forming a matrix of solar cells for the solar cell module; depositing a metallization layer at least partially on at least one surface of the matrix of solar cells... Agent: International Business Machines Corporation
20110124137 - Organic electro-luminescence display device and method of manufacturing the same: Provided is an organic electro-luminescence display device. The organic electro-luminescence display device includes: a first electrode, a first charge transport pattern, an organic emission pattern, a second charge transport pattern, and a second electrode. The first charge transport pattern is formed on the first electrode, and the organic emission pattern... Agent: Lg. Display Co., Ltd.
20110124138 - Organic electroluminescent display device and method of producing the same: An organic electroluminescent display device in which a plurality of light-emitting cells each having an organic electroluminescent portion are arranged on a substrate, wherein, for each of the light-emitting cells, a first transistor which controls energization on the organic electroluminescent portion, and a second transistor which switches a signal to... Agent: Fujifilm Corporation
20110124136 - Process for producing organic electroluminescent panel: Provided is a process for producing an organic EL panel by using an ultrathin glass plate, in which the ultrathin glass plate is not “fractured” or “cut” in the production process, the organic EL element is formed reliably when formed by vacuum deposition, and recovered without damage after the production... Agent: Nitto Denko Corporation
20110124139 - Method for manufacturing free-standing substrate and free-standing light-emitting device: The present invention provides a method for manufacturing a free-standing substrate, comprising: growing a first layer having a sacrificial layer on a growth substrate; patterning the first layer into a patterned first layer having a structure of a plurality of protrusions; growing a second layer on the patterned first layer... Agent:
20110124140 - Semiconductor laser device and manufacturing method thereof: A semiconductor laser device includes a chip obtained from a substrate and a semiconductor multi-layer formed on the substrate. The semiconductor multi-layer is formed from a plurality of semiconductor layers of a semiconductor material having a hexagonal structure, and includes a stripe-shaped wave guide portion. The chip includes two chip... Agent: Panasonic Corporation
20110124141 - Method for producing a doped organic semiconducting layer: A process is provided for producing a doped organic semiconductive layer, comprising the process steps of A) providing a matrix material, B) providing a dopant complex, and C) simultaneously applying the matrix material and the dopant complex to a substrate by vapor deposition, wherein, in process step C), the dopant... Agent: Osram Opto Semiconductors Gmbh
20110124142 - Gan semiconductor optical element, method for manufacturing gan semiconductor optical element, epitaxial wafer and method for growing gan semiconductor film: In a GaN based semiconductor optical device 11a, the primary surface 13a of the substrate 13 tilts at a tilting angle toward an m-axis direction of the first GaN based semiconductor with respect to a reference axis “Cx” extending in a direction of a c-axis of the first GaN based... Agent: Sumitomo Electric Industries, Ltd.
20110124143 - Packaged device and method of manufacturing the same: A packaged device includes a package having an inner surface defining a closed internal space, a device chip fixed to the package in the internal space, and a parylene film covering at least a part of the inner surface of the package and/or at least a part of a surface... Agent: Fujitsu Limited
20110124144 - Substrate processing system and substrate processing method: A substrate processing apparatus includes an evacuatable process chamber configured to receive a substrate carrier having at least one substrate, a plasma generating module, a gas feed, a gas discharge and a vapor etching module provided in the process chamber. A substrate processing method includes introducing a substrate carrier including... Agent: Roth & Rau Ag
20110124145 - Template for three-dimensional thin-film solar cell manufacturing and methods of use: A template 100 for three-dimensional thin-film solar cell substrate formation for use in three-dimensional thin-film solar cells. The template 100 comprises a substrate which comprises a plurality of posts 102 and a plurality of trenches 104 between said plurality of posts 102. The template 100 forms an environment for three-dimensional... Agent: Solexel, Inc.
20110124146 - Methods of forming high-efficiency multi-junction solar cell structures: In various embodiments, solar cells include a junction including SiGe, a junction including at least one III-V material, and may be formed on silicon substrates and/or with silicon-based capping layers thereover.... Agent:
20110124147 - Method for separating silicon solar cells: In a method for separating silicon solar cells, a groove is introduced into a silicon wafer containing the silicon solar cells along a separating line in a front side of the silicon wafer adjacent to a p-n junction in the silicon wafer using a first laser beam. The groove has... Agent: Rofin-baasel Lasertech Gmbh & Co. Kg
20110124148 - Methods of forming nano structure and methods of forming solar cell using the same: Provided are methods of forming a nano structure and method of forming a solar cell using the same. The method of forming the nano structure includes: preparing a template; ionizing a surface of the template; forming an oxide layer enclosing the template on the surface of the template; and removing... Agent: Electronics And Telecommunications Research Institute
20110124150 - Chalcogenide absorber layers for photovoltaic applications and methods of manufacturing the same: In one example embodiment, a method includes depositing one or more thin-film layers onto a substrate. More particularly, at least one of the thin-film layers comprises at least one electropositive material and at least one of the thin-film layers comprises at least one chalcogen material suitable for forming a chalcogenide... Agent: Applied Quantum Technology, LLC
20110124149 - Method and device for coating a carrier for thin-film solar cells: A system (11) is designed to coat a film-like, long carrier (18) for thin-film solar cells on the absorber layer thereof with cadmium sulfide. To this end, the carrier (18) is continuously guided through a solution (23) made of cadmium acetate, ammonia and thiourea or is immersed into a bath... Agent: Gebr. Schmid Gmbh & Co.
20110124151 - Photovoltaic device and method for manufacturing the same: It is the gist of the present invention to provide a photovoltaic device in which a single crystal semiconductor layer provided over a substrate having an insulating surface or an insulating substrate is used as a photoelectric conversion layer, and the single crystal semiconductor layer is provided with a so-called... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110124153 - Method for manufacturing semiconductor device: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110124152 - Method of manufacturing semiconductor for transistor and method of manufacturing the transistor: A method of manufacturing a semiconductor for a transistor that includes forming a precursor layer by coating a surface of an insulation substrate with a precursor solution for an oxide semiconductor, forming an oxide semiconductor by oxidizing a portion of the precursor layer, and removing a remaining precursor layer except... Agent: Samsung Electronics Co., Ltd.
20110124154 - Hybrid structure of multi-layer substrates and manufacture method thereof: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric... Agent: Princo Corp.
20110124155 - Hybrid structure of multi-layer substrates and manufacture method thereof: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric... Agent: Princo Corp.
20110124156 - Method of fabricating semiconductor die with through-hole via on saw streets and through-hole via in active area of die: A semiconductor wafer contains a plurality of die with contact pads disposed on a first surface of each die. Metal vias are formed in trenches in the saw street guides and are surrounded by organic material. Traces connect the contact pads and metal vias. The metal vias can be half-circle... Agent: Stats Chippac, Ltd.
20110124157 - Method for encapsulating electronic components on a wafer: A method for encapsulating electronic components, including the steps of: forming, in a first surface of a semiconductor wafer, electronic components; forming, on the first surface, an interconnection stack including conductive tracks and vias separated by an insulating material; forming first and second bonding pads on the interconnection stack; thinning... Agent: Stmicroelectronics (tours) Sas
20110124158 - Thermal enhanced upper and dual heat sink exposed molded leadless package: A semiconductor package includes a semiconductor device 30 and a molded upper heat sink 10. The heat sink has an interior surface 16 that faces the semiconductor device and an exterior surface 15 that is at least partially exposed to the ambient environment of the packaged device. An annular planar... Agent: Fairchild Semiconductor Corporation
20110124159 - Manufacturing method of semiconductor device: Performing electrolysis plating to a wiring is made possible, aiming at the increasing of pin count of a semiconductor device. Package substrate 3 by which ring shape common wiring 3p for electric supply was formed in the inner area of bonding lead 3j in device region 3v of main surface... Agent:
20110124160 - Semiconductor device and method of producing the same: A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region... Agent: Fuji Electric Systems Co., Ltd.
20110124161 - Structure and method for fabricating a microelectronic device provided with one or more quantum wires able to form one or more transistor channels: The disclosure concerns a microelectronic device provided with one or more <<quantum wires>>, able to form one or more transistor channels, and optimized in terms of arrangement, shape or/and composition. The invention also uses a method for fabricating said device, comprising the steps of: the forming, in one or more... Agent: Commissariat A L'energie Atomique
20110124162 - Method of fabricating array substrate: A method of fabricating an array substrate includes forming a gate line and a gate electrode; forming a gate insulating layer, an intrinsic amorphous silicon layer, an inorganic material insulating layer and a heat transfer layer on the gate line and the gate electrode; irradiating a laser beam onto the... Agent:
20110124163 - Thin film transistor array panel and method for manufacturing the same: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below... Agent:
20110124164 - Method for manufacturing soi substrate and semiconductor device: An amorphous semiconductor layer is formed over a first single crystal semiconductor layer provided over a glass substrate or a plastic substrate with an insulating layer therebetween. The amorphous semiconductor layer is formed by a CVD method at a deposition temperature of higher than or equal to 100° C. and... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110124165 - Structure and method for manufacturing device with a v-shape channel nmosfet: A CMOS structure includes a v-shape surface in an nMOSFET region. The v-shape surface has an orientation in a (100) plane and extends into a Si layer in the nMOSFET region. The nMOSFET gate dielectric layer is a high-k material, such as Hf02. The nMOSFET has a metal gate layer,... Agent: International Business Machines Corporation
20110124166 - Memory device and method of manufacturing the same: In a memory device and a method of manufacturing the memory device, a source contact connected to a common source line may be formed on a drain region instead of a source region. A transistor having a negative threshold voltage may be formed between the source region and the drain... Agent:
20110124167 - Configuration and method to form mosfet devices with low resistance silicide gate and mesa contact regions: A novel integration scheme for forming power MOSFET, particularly forming salicides for both gate and mesa contact regions, as well as using multiple energy contact implants through the salicided layer to form conductive body contacts which short to the source region by the salicides.... Agent:
20110124168 - Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuit: The invention includes methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded... Agent: Micron Technology, Inc.
20110124169 - Methods of selectively depositing an epitaxial layer: Methods for selectively depositing an epitaxial layer are provided herein. In some embodiments, providing a substrate having a monocrystalline first surface and a non-monocrystalline second surface; exposing the substrate to a deposition gas to deposit a layer on the first and second surfaces, the layer comprising a first portion deposited... Agent: Applied Materials, Inc.
20110124170 - Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor: Processes for forming self-aligned, deposited source/drain, insulated gate, transistors and, in particular, FETs. By depositing a source/drain in a recess such that it remains only in the recess, the source/drain can be formed self-aligned to a gate and/or a channel of such a device. For example, in one such process... Agent:
20110124171 - Applying epitaxial silicon in disposable spacer flow: A method of fabricating transistors on a semiconductor substrate includes forming transistor gates of first and second transistors located in first and second areas of the semiconductor substrate, respectively. The transistor gates have generally vertical sidewalls. Source and drain regions are simultaneously formed for the first and second transistors. Temporary... Agent: Round Rock Research, LLC
20110124172 - Method of forming insulating layer and method of manufacturing transistor using the same: Provided are a method of forming an insulating layer and a method of manufacturing a transistor using the method. The method of forming the insulating layer includes forming a preliminary insulating layer including silicon oxide (SiO2) on a silicon (Si)-containing substrate. A reactive gas containing ammonia (NH3) gas is supplied... Agent: Samsung Electronics Co., Ltd.
20110124173 - Method of manufacturing semiconductor device: Methods of manufacturing a semiconductor device include forming a gate electrode on a semiconductor substrate, forming spacers on side walls of the gate electrode, and doping impurities into the semiconductor substrate on both sides of the spacers to form highly doped impurity regions. The spacers are selectively etched to expose... Agent:
20110124175 - Alteration method and alteration apparatus for titanium nitride: An alteration method of a titanium nitride film, comprising exposing a titanium nitride film formed on a semiconductor substrate to plasma obtained by exciting a process gas that includes noble gas or nitrogen and excludes oxygen, thereby increasing a specific resistance of the titanium nitride film.... Agent: Tokyo Electron Limited
20110124174 - Method of forming variable resistance memory device: Provided are a method of forming an electrode of a variable resistance memory device and a variable resistance semiconductor memory device using the method. The method includes: forming a heat electrode; forming a variable resistance material layer on the heat electrode; and forming a top electrode on the variable resistance... Agent:
20110124176 - Methods of forming a capacitor structure and methods of manufacturing a semiconductor device using the same: In a method of forming a capacitor, a seed stopper and a sacrificial layer is formed on an insulating interlayer having a plug therethrough. An opening is formed through the sacrificial layer and the seed stopper to expose the plug. A seed is formed on an innerwall of the opening.... Agent: Samsung Electronics Co., Ltd.
20110124177 - Simultaneously formed isolation trench and through-box contact for silicon-on-insulator technology: A semiconductor fabrication method comprises providing a structure which includes a semiconductor substrate having a plurality of subsurface layers, the substrate comprising a top surface and the subsurface layers comprising a top subsurface layer below the top surface of the substrate. A protective material is patterned on the top surface... Agent: International Business Machines Corporation
20110124178 - Structure and method of fabricating a transistor having a trench gate: An integrated circuit transistor is fabricated with a trench gate having nonconductive sidewalls. The transistor is surrounded by an isolation trench filled with a nonconductive material. The sidewalls of the gate trench are formed of the nonconductive material and are substantially free of unetched substrate material. As a result, the... Agent: Round Rock Research, LLC
20110124179 - Soi substrate and manufacturing method thereof: The semiconductor substrate provided with a groove portion is irradiated with ions so that an embrittled region is formed in the semiconductor substrate, the semiconductor substrate and a base substrate are bonded to each other with an insulating layer interposed therebetween and a space which is surrounded by the groove... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110124180 - Semiconductor device manufacturing method comprising a metal pattern and laser modified regions in a cutting region: To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position away in plane... Agent: Renesas Electronics Corporation
20110124181 - Workpiece cutting method: A cutting method for cutting a workpiece by using a cutting blade. The cutting method includes the steps of attaching an adhesive sheet to one surface of the workpiece, holding the workpiece through the adhesive sheet on holding means, and feeding the cutting blade into the workpiece until reaching the... Agent: Disco Corporation
20110124182 - System for the delivery of germanium-based precursor: A supply of a germanium precursor such as germanium n-butylamidinate is provided in close proximity to a microelectronic device substrate to be contacted therewith for deposition of germanium-containing material on the substrate. Specific arrangements are described, including tray and reservoir structures from which solid, liquid, suspended or dissolved germanium precursor... Agent: Advanced Techology Materials, Inc.
20110124183 - Method for manufacturing flexible semiconductor substrate: A production method for a flexible semiconductor substrate according to the present invention includes: a step of providing an inorganic substrate 11; a step of forming a polyimide layer 22a on the inorganic substrate by using a material in solution form, the polyimide layer 22a having a thickness of less... Agent:
20110124185 - Graded core/shell semiconductor nanorods and nanorod barcodes: Graded core/shell semiconductor nanorods and shapped nanorods are disclosed comprising Group II-VI, Group III-V and Group IV semiconductors and methods of making the same. Also disclosed are nanorod barcodes using core/shell nanorods where the core is a semiconductor or metal material, and with or without a shell. Methods of labeling... Agent: The Regents Of The University Of California
20110124184 - Method of forming polysilicon, thin film transistor using the polysilicon, and method of fabricating the thin film transistor: A method of forming polysilicon, a thin film transistor (TFT) using the polysilicon, and a method of fabricating the TFT are disclosed. The method of forming the polysilicon comprises: forming an insulating layer on a substrate; forming a first electrode and a second electrode on the insulating layer; forming at... Agent:
20110124186 - Apparatus and method for controllably implanting workpieces: A plasma processing apparatus comprises a plasma source configured to produce a plasma in a plasma chamber, such that the plasma contains ions for implantation into a workpiece. The apparatus also includes a focusing plate arrangement having an aperture arrangement configured to modify a shape of a plasma sheath of... Agent: Varian Semiconductor Equipment Associates, Inc.
20110124187 - Vapor phase deposition processes for doping silicon: A process of doping a silicon layer with dopant atoms generally includes reacting a vapor of a dopant precursor with oxide and/or hydroxide reactive sites present on the silicon layer to form a self assembled monolayer of dopant precursor; hydrolyzing the self assembled monolayer of the dopant precursor with water... Agent: International Business Machines Corporation
20110124188 - Methods of fabricating electrodes and uses thereof: The present invention relates to methods for fabricating nanoscale electrodes separated by a nanogap, wherein the gap size may be controlled with high precision using a self-aligning aluminum oxide mask, such that the gap width depends upon the thickness of the aluminum oxide mask. The invention also provides methods for... Agent: The Trustees Of Columbia University In The City Of New York
20110124189 - Increasing electromigration resistance in an interconnect structure of a semiconductor device by forming an alloy: By introducing a metallic species into an exposed surface area of a copper region, the electromigration behavior of this surface area may be significantly enhanced. The incorporation of the metallic species may be accomplished in a highly selective manner so as to not unduly affect dielectric material positioned adjacent to... Agent: Globalfoundries Inc.
20110124190 - Method for manufacturing a semiconductor device: A semiconductor device includes a semiconductor substrate, a copper-containing metal interconnect over the semiconductor substrate, and a copper-containing connection plug, and the metal interconnect includes metal elements other than copper, and a concentration of different metal elements in a connection portion between the metal interconnect and the connection plug is... Agent: Renesas Electronics Corporation
20110124191 - Compositions for the currentless deposition of ternary materials for use in the semiconductor industry: The present invention relates to the use of ternary nickel-containing metal alloys of the NiMR type (where M=Mo, W, Re or Cr, and R=B or P) deposited by an electroless process in semiconductor technology. In particular, the present invention relates to the use of these deposited ternary nickel-containing metal alloys... Agent: Basf Aktiengesellschaft
20110124192 - Process for forming cobalt-containing materials: Embodiments of the invention described herein generally provide methods and apparatuses for forming cobalt silicide layers, metallic cobalt layers, and other cobalt-containing materials. In one embodiment, a method for forming a cobalt silicide containing material on a substrate is provided which includes exposing a substrate to at least one preclean... Agent:
20110124193 - Customized patterning modulation and optimization: The present disclosure provides one embodiment of an integrated circuit (IC) design method. The method includes providing an IC design layout of a circuit; applying an electrical patterning (ePatterning) modification to the IC design layout according to an electrical parameter of the circuit and an optical parameter of IC design... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20110124194 - Methods of manufacturing semiconductors using dummy patterns: A method of manufacturing a semiconductor device is provided. A pattern layer is formed on a substrate defined to include a main pattern region and a dummy pattern region. A preliminary main pattern and a preliminary dummy pattern may be formed by patterning the pattern layer so that an upper... Agent: Samsung Electronics Co., Ltd.
20110124195 - Chemical mechanical polishing composition containing polysilicon polish finisher: Provided are a chemical mechanical polishing (CMP) composition used for polishing a semiconductor device which contains polysilicon film and insulator, and a chemical mechanical polishing method thereof. The CMP composition is especially useful in a isolation CMP process for semiconductor devices. Provided is a highly selective CMP composition containing a... Agent: Techno Semichem Co., Ltd.
20110124196 - Method for forming fine pattern in semiconductor device: A method for forming a contact hole of a semiconductor device according to the present invention forms a contact hole which is defined as a new contact hole region (a second contact hole region), between spacers as well as a contact hole defined within the spacer (a first contact hole... Agent: Hynix Semiconductor Inc.
20110124197 - Method to improve the reliability of the breakdown voltage in high voltage devices: A structure to diminish high voltage instability in a high voltage device when under stress includes an amorphous silicon layer over a field oxide on the high voltage device.... Agent: Fairchild Semiconductor Corporation
20110124198 - Method of manufacturing fine patterns of semiconductor device: A method of forming fine patterns of a semiconductor device comprises forming sacrificial film patterns of a line type in a cell region of a semiconductor substrate and, at the same time, forming pad patterns in a peripheral region of the semiconductor substrate, forming a spacer on sidewalls of each... Agent: Hynix Semiconductor Inc.
20110124199 - Apparatus and method for high-throughput atomic layer deposition: Atomic layer deposition apparatus for depositing a film in a continuous fashion. The apparatus includes a process tunnel, extending in a transport direction and bounded by at least a first and a second wall. The walls are mutually parallel and allow a flat substrate to be accommodated there between. The... Agent:
20110124201 - Chemical vaporizer for material deposition systems and associated methods: System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with... Agent: Micron Technology, Inc.
20110124200 - Method and apparatus of plasma treatment: The present invention provides a plasma treatment apparatus and a conditioning method capable of performing a conditioning for the whole vacuum chamber. A plasma treatment apparatus according to an embodiment of the present invention is provided with a moving means for moving a substrate holder (2) between a reaction chamber... Agent: Canon Anelva Corporation
20110124202 - Plasma processing method and computer storage medium: According to the present invention, when a nitridation process by plasma generated by a microwave is applied to a substrate with an oxide film having been formed thereon to form an oxynitride film, the microwave is intermittently supplied. By the intermittent supply of the microwave, ion bombardment is reduced in... Agent: Tokyo Electron Limited
20110124203 - Method of forming a gate insulator in group iii-v nitride semiconductor devices: A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer includes gallium oxynitride and gallium oxide, and performing a rapid thermal annealing... Agent:
20110124204 - Method of manufacturing semiconductor device, method of processing substrate, and substrate processing apparatus: A semiconductor device manufacturing method includes: forming a layer on a substrate by supplying source gas into a process vessel; changing the layer into an oxide layer by supplying gases containing oxygen and hydrogen into the process vessel heated and kept lower than atmospheric pressure; and forming an oxide film... Agent: Hitachi-kokusai Electric Inc.
20110124205 - Tuning of photo-absorption materials through use of magnetic fields: The disclosure relates to using magnetic fields for the purposes of modifying the absorption characteristics of materials, such as semiconductor materials, to both tune the materials to specific wavelengths and to enhance the absorption of the materials by concentrating the continuum of states of the conduction and valence bands into... Agent: Washington University05/19/2011 > 77 patent applications in 66 patent subcategories. archived by USPTO category
20110117677 - Spacer structure in mram cell and method of its fabrication: Methods are presented for fabricating an MTJ element having a uniform vertical distance between its free layer and a bit line and, in addition, having a protective spacer layer formed abutting the lateral sides of the MTJ element to eliminate leakage currents between MTJ layers and the bit line. Each... Agent: Maglc Technologies, Inc.
20110117678 - Carbon containing low-k dielectric constant recovery using uv treatment: A method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric and associated apparatus enables process induced damage repair. The methods of the invention are particularly applicable in the context of damascene processing to recover lost low-k property of a dielectric damaged during processing, either pre-metallization, post-planarization, or both. UV... Agent:
20110117679 - Sacrificial offset protection film for a finfet device: A method for fabricating a semiconductor device is disclosed. An exemplary embodiment of the method includes providing a substrate; forming a fin structure over the substrate; forming a gate structure, wherein the gate structure overlies a portion of the fin structure; forming a sacrificial-offset-protection layer over another portion of the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20110117680 - Inline detection of substrate positioning during processing: Embodiments of the present invention generally provide a method for detecting the position of a substrate within a processing chamber. Embodiments of the present invention are particularly useful for the detection of a mis-positioned solar cell substrate during photoabsorber layer deposition processes within a solar cell production line. Reflected power... Agent: Applied Materials, Inc.
20110117681 - Thin film imaging method and apparatus: Methods and apparatus are presented for monitoring the deposition and/or post-deposition processing of semiconductor thin films using photoluminescence imaging. The photoluminescence images are analysed to determine one or more properties of the semiconductor film, and variations thereof across the film. These properties are used to infer information about the deposition... Agent: Bt Imaging Pty Ltd
20110117682 - Apparatus and method for plasma processing: Disclosed is an apparatus and method for plasma processing, which facilitates to constantly control a RF voltage supplied to a substrate supporting member by precisely detecting an inductive RF voltage induced to the substrate supporting member for a plasma, the apparatus comprising: a substrate supporting member for supporting a substrate,... Agent: Jusung Engineering Co., Ltd.
20110117683 - Chip quality determination method and marking mechanism using same: A chip quality determination method includes the steps of (a) determining the continuity of defective chips in at least four directions of an X-axis and a Y-axis on a wafer based on the wafer test result of determining the acceptability of chips arranged in a matrix in the four directions... Agent: Ricoh Company, Ltd.
20110117684 - Semiconductor light-emitting element and method for producing the same: A semiconductor light-emitting element includes, a first semiconductor layer, a second semiconductor layer, a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer, a first electrode connected to the first semiconductor layer, and a second electrode provided on the second semiconductor layer. A side of the... Agent: Kabushiki Kaisha Toshiba
20110117685 - Method of manufacturing organic light emitting diode display: A method of manufacturing an organic light emitting diode display, the method including forming an amorphous silicon layer on a buffer layer disposed on substrate, heat-treating the amorphous silicon film to form a microcrystalline silicon film; and scanning and irradiating a linear laser beam twice or more onto the microcrystalline... Agent: Samsung Mobile Display Co., Ltd.
20110117686 - Method of fabricating light extractor: Methods of fabricating light extractors are disclosed. The method of fabricating an optical construction for extracting light from a substrate includes the steps of: (a) providing a substrate that has a surface; (b) disposing a plurality of structures on the surface of the substrate, where the plurality of structures form... Agent:
20110117687 - Organic light-emitting display device and method for manufacturing the same: Provided is an organic light-emitting display device (OLED) and method of manufacturing the same. The OLED comprises a substrate and a thin film transistor, with source/drain electrodes, located at a predetermined area on the substrate. A passivation layer is located on the source/drain electrodes with a via hole exposing one... Agent: Samsung Mobile Display Co., Ltd.
20110117688 - Organic el device: According to one embodiment, a method of manufacturing an organic EL device includes providing a structure including a substrate and an electrode positioned above the substrate, and forming an organic layer including a mixture of first and second organic materials above the electrode. The first organic material has a first... Agent:
20110117689 - Semiconductor sensor and manufacturing method of sensor body for semiconductor sensor: A semiconductor sensor of which the thickness may be reduced and a method of manufacturing a sensor body for the semiconductor sensor are provided. A total length L1 of a weight portion 5 and an additional weight portion 3 as measured in an extending direction of a centerline C is... Agent: Hokuriku Electric Industry Co., Ltd.
20110117690 - Fabrication of nanovoid-imbedded bismuth telluride with low dimensional system: A new fabrication method for nanovoids-imbedded bismuth telluride (Bi—Te) material with low dimensional (quantum-dots, quantum-wires, or quantum-wells) structure was conceived during the development of advanced thermoelectric (TE) materials. Bismuth telluride is currently the best-known candidate material for solid-state TE cooling devices because it possesses the highest TE figure of merit... Agent: And Space Administration
20110117691 - Mixed trimming method: The invention relates to a method of trimming a structure that includes a first wafer bonded to a second wafer, with the first wafer having a chamfered edge. The method includes a first step of trimming the edge of the first wafer by mechanical machining over a predetermined depth in... Agent: S.o.i.tec Silicon On Insulator Technologies
20110117692 - Cigs solar cell having thermal expansion buffer layer and method for fabricating the same: A copper/indium/gallium/selenium (CIGS) solar cell including a thermal expansion buffer layer, and a method for fabricating the same are provided. The thermal expansion buffer layer is configured between an alloy thin film layer and a CIGS thin film layer. The thermal expansion buffer layer is deposited by executing a thin... Agent: Jenn Feng Industrial Co., Ltd.
20110117693 - Device and method for tempering objects in a treatment chamber: The invention relates to a device (1) and to a method for tempering objects (2, 15). According to the invention, a temporary process box (11) is used to overcome the disadvantages of tempering processes previously known, in particular to achieve a high level of reproducibility and a high throughput during... Agent:
20110117694 - Solar cell having spherical surface and method of manufacturing the same: Provided is a solar cell having a spherical surface. The solar cell includes a substrate having a back contact layer formed thereon; a plurality of carbon nanoelectrodes formed on the back contact layer so as to cross the back contact layer at right angles; a p-type junction layer formed to... Agent: Samsung Electro-mechanics Co., Ltd.
20110117695 - Fabrication method of organic thin-film transistors: This invention discloses a fabrication method of organic thin-film transistors (OTFTs) using the micro-contact printing. The OTFT can be of the bottom-gate or top-gate configuration. The micro-contact printing operation of this fabrication method does not require clean-room environment and high processing temperature, and does not have the problem of 2D... Agent: Metal Industries Research & Development Centre
20110117696 - Cdte surface treatment for stable back contacts: Disclosed are etching compositions and processes of using the same for etching the surface of CdTe-containing layers.... Agent: Air Liquide Electronics U.s. Lp
20110117698 - Method for manufacturing semiconductor device: An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer,... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110117697 - Semiconductor device and manufacturing method thereof: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110117699 - Method of manufacturing semiconductor device: A semiconductor substrate made of a semiconductor material is prepared, and a hetero semiconductor region is formed on the semiconductor substrate to form a heterojunction in an interface between the hetero semiconductor region and the semiconductor substrate. The hetero semiconductor region is made of a semiconductor material having a bandgap... Agent: Nissan Motor Co., Ltd.
20110117700 - Stackable semiconductor device packages: Described herein are stackable semiconductor device packages and related stacked package assemblies and methods. In one embodiment, a manufacturing method includes: (1) providing a substrate including contact pads disposed adjacent to an upper surface of the substrate; (2) applying an electrically conductive material to form conductive bumps disposed adjacent to... Agent: Advanced Semiconductor Engineering, Inc.
20110117701 - Fiducial scheme adapted for stacked integrated circuits: A method for stacking integrated circuit substrates and the substrates used therein are disclosed. In the method, an integrated circuit substrate having top and bottom surfaces is provided. The substrate is divided vertically into a plurality of layers including an integrated circuit layer having integrated circuit elements constructed therein and... Agent:
20110117702 - Apparatus and method for processing a substrate: A method of processing a substrate that displays out-gassing when placed in a vacuum comprises placing the substrate in a vacuum and performing an out-gassing treatment by heating the substrate to a temperature T1 and removing gaseous contamination emitted from the substrate until the out-gassing rate is determined by the... Agent: Oc Oerlikon Balzers Ag
20110117703 - Fabrication of electronic devices including flexible electrical circuits: A packaged electronic device includes a die, a flexible circuit structure, and a barrier film disposed on the die. The die includes die circuitry and electrical contacts. The flexible circuit structure is bonded directly to the die, and includes electrical conductors encapsulated by structural layers. Each electrical conductor contacts a... Agent:
20110117704 - Circuit member, manufacturing method of the circuit member, and semiconductor device including the circuit member: A circuit member includes a lead frame material having a die pad, a lead part to be electrically connected with a semiconductor chip, and an outer frame configured to support the die pad and the lead part. The lead frame material includes a resin sealing region. Roughened faces 10A to... Agent: Dai Nippon Printing Co., Ltd.
20110117705 - Multi-layer thick-film rf package: A method for producing a multi-layer thick-film RF package includes forming conductive layer(s) including one or more source portions, one or more gate portions, and/or one or more drain portions on a ceramic substrate. The conductive layer(s) and the ceramic substrate are fired or otherwise heated in a furnace until... Agent: Microsemi Corporation
20110117706 - Protective tape joining method and protective tape joining apparatus: A cooling plate having a cooling pipe mounted therein in a serpentine shape is placed in a stack manner on a rear face of a chuck table for suction-holding a rear face of the semiconductor wafer. A coolant is circulated through the cooling pipe, thereby cooling the chuck table. The... Agent:
20110117707 - Pixel structure and method for manufacturing the same: A method for manufacturing a pixel structure is provided. First, a first mask process is performed to form a patterned first metal layer on a substrate, wherein the patterned first metal layer includes a gate. Next, a second mask process is performed to form a patterned insulating layer and a... Agent: Au Optronics Corp.
20110117708 - Method of manufacturing semiconductor device: To suppress an effect of metal contamination caused in manufacturing an SOI substrate. After forming a damaged region by irradiating a semiconductor substrate with hydrogen ions, the semiconductor substrate is bonded to a base substrate. Heat treatment is performed to cleave the semiconductor substrate; thus an SOI substrate is manufactured.... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110117709 - Semiconductor device fabricating method: A semiconductor device fabricating method is described. The semiconductor device fabricating method includes providing a substrate. A first gate insulating layer and a second gate insulating layer are formed on the substrate, respectively. A gate layer is blanketly formed. A portion of the gate layer, the first gate insulating layer... Agent: Vanguard International Semiconductor Corporation
20110117710 - Method of fabricating efuse, resistor and transistor: A method of fabricating an efuse, a resistor and a transistor includes the following steps: A substrate is provided. Then, a gate, a resistor and an efuse are formed on the substrate, wherein the gate, the resistor and the efuse together include a first dielectric layer, a polysilicon layer and... Agent:
20110117711 - Double gate depletion mode mosfet: A metal-oxide-semiconductor field effect transistor (MOSFET) has a body layer that follows the contour of exposed surfaces of a semiconductor substrate and contains a bottom surface of a shallow trench and adjoined sidewalls. A bottom electrode layer vertically abuts the body layer and provides an electrical bias to the body... Agent: International Business Machines Corporation
20110117713 - Method of making flash memory cells and peripheral circuits having sti, and flash memory devices and computer systems having the same: An integrated circuit includes flash memory cells, and peripheral circuitry including low voltage transistors (LVT) and high voltage transistors (HVT). The integrated circuit includes a tunnel barrier layer comprising SiON, SiN or other high-k material. The tunnel barrier layer may comprise a part of the gate dielectric of the HVTs.... Agent:
20110117712 - Semiconductor device with high k dielectric control terminal spacer structure: A semiconductor device including a control terminal sidewall spacer structure made of a high-K dielectric material. The semiconductor device includes a control terminal where the spacer structure is a sidewall spacer structure for the control terminal. The semiconductor device includes current terminal regions located in a substrate. In some examples,... Agent:
20110117714 - Integration of multiple gate oxides with shallow trench isolation methods to minimize divot formation: A method of forming an isolation region is provided that in one embodiment substantially reduces divot formation. In one embodiment, the method includes providing a semiconductor substrate, forming a first pad dielectric layer on an upper surface of the semiconductor substrate and forming a trench through the first pad dielectric... Agent: International Business Machines Corporation
20110117715 - Methods of forming capacitors for semiconductor memory devices: A capacitor of a semiconductor memory device, and methods of forming the same, are disclosed. A pad interlayer insulating layer is disposed on a semiconductor substrate of an active region. Landing pads and a central landing pad are disposed in peripheral portions and a central portion of the active region,... Agent:
20110117716 - Programmable capacitor associated with an input/output pad: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first... Agent: Micron Technology, Inc.
20110117717 - Programmable resistive memory cell with filament placement structure: Programmable metallization memory cells having a first metal contact and a second metal contact with an ion conductor solid electrolyte material between the metal contacts. The first metal contact has a filament placement structure thereon extending into the ion conductor material. In some embodiments, the second metal contact also has... Agent: Seagate Technology LLC
20110117718 - Method of forming semiconductor device: A method of forming a semiconductor device includes forming a hole in an insulating film, forming a first conductive film in the hole, removing at least a portion of the insulating film around the first conductive film, and reducing a thickness of the first conductive film to produce a second... Agent: Elpida Memory, Inc.
20110117719 - Methods of processing semiconductor substrates in forming scribe line alignment marks: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning... Agent:
20110117721 - Method of forming isolation layer structure and method of manufacturing a semiconductor device including the same: An isolation layer structure includes first to fourth oxide layer patterns. The first and third oxide layer patterns are sequentially formed in a first trench defined by a first recessed top surface of a substrate and sidewalls of gate structures on the substrate in a first region. The first trench... Agent: Samsung Electronics Co., Ltd
20110117723 - Nano imprint technique with increased flexibility with respect to alignment and feature shaping: By forming metallization structures on the basis of an imprint technique, in which via openings and trenches may be commonly formed, a significant reduction of process complexity may be achieved due to the omission of at least one further alignment process as required in conventional process techniques. Furthermore, the flexibility... Agent: Advanced Micro Devices, Inc.
20110117722 - Semiconductor device with charge storage pattern and method for fabricating the same: A semiconductor device (e.g., a non-volatile memory device) with improved data retention characteristics includes active regions that protrude above a top surface of a device isolation region. A tunneling insulating layer is formed on the active regions. Charge storage patterns (e.g., charge trap patterns) are formed so as to be... Agent:
20110117724 - Isolation structure for strained channel transistors: A method and system is disclosed for forming an improved isolation structure for strained channel transistors. In one example, an isolation structure is formed comprising a trench filled with a nitrogen-containing liner and a gap filler. The nitrogen-containing liner enables the isolation structure to reduce compressive strain contribution to the... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20110117725 - Methods of forming recessed access devices associated with semiconductor constructions: The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the... Agent: Micron Technology, Inc.
20110117726 - Bonded intermediate substrate and method of making same: A method includes growing a first epitaxial layer of III-nitride material, forming a damaged region by implanting ions into an exposed surface of the first epitaxial layer, and growing a second epitaxial layer of III-nitride material on the exposed surface of the first epitaxial layer. A level of defects present... Agent: Amberwave Systems Corporation
20110117727 - Method for manufacturing soi wafer and soi wafer: According to the present invention, there is provided a method for manufacturing an SOI wafer, the method configured to grow an epitaxial layer on an SOI layer of the SOI wafer having the SOI layer on a BOX layer to increase a thickness of the SOI layer, wherein epitaxial growth... Agent: Shin-etsu Handotai Co., Ltd.
20110117729 - Fluid bed reactor: Fluidized bed reactor systems for producing high purity silicon-coated particles are disclosed. A vessel has an outer wall, an insulation layer inwardly of the outer wall, at least one heater positioned inwardly of the insulation layer, a removable concentric liner inwardly of the heater, a central inlet nozzle, a plurality... Agent: Rec Silicon Inc
20110117728 - Method of decontamination of process chamber after in-situ chamber clean: A method and apparatus for removing deposition products from internal surfaces of a processing chamber, and for preventing or slowing growth of such deposition products. A halogen containing gas is provided to the chamber to etch away deposition products. A halogen scavenging gas is provided to the chamber to remove... Agent: Applied Materials, Inc.
20110117730 - Growing iii-v compound semiconductors from trenches filled with intermediate layers: A method of forming an integrated circuit structure includes forming an insulation layer over at least a portion of a substrate; forming a plurality of semiconductor pillars over a top surface of the insulation layer. The plurality of semiconductor pillars is horizontally spaced apart by portions of the insulation layer.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20110117731 - Laser mask and sequential lateral solidification crystallization method using the same: A laser mask is disclosed. In one embodiment, the laser mask includes: a mask substrate including i) at least one light transmission portion configured to transmit light therethrough and ii) a plurality of light interruption portions separated by the light transmission portion interposed therebetween. The light interruption portions are configured... Agent: Samsung Mobile Display Co., Ltd.
20110117732 - Cyclical epitaxial deposition and etch: Methods for selectively depositing high quality epitaxial material include introducing pulses of a silicon-source containing vapor while maintaining a continuous etchant flow. Epitaxial material is deposited on areas of a substrate, such as source and drain recesses. Between pulses, the etchant flow continues such that lower quality epitaxial material may... Agent: Asm America, Inc.
20110117733 - Methods of utilizing block copolymers to form patterns: Some embodiments include methods of forming patterns utilizing copolymer. A copolymer composition is formed across a substrate. The composition includes subunits A and B, and will be self-assembled to form core structures spaced center-to-center by a distance of L0. The core structures are contained within a repeating pattern of polygonal... Agent:
20110117734 - Method of fabricating high-k poly gate device: The present disclosure provides a semiconductor device that includes a semiconductor substrate, and a transistor formed in the substrate. The transistor has a gate structure that includes an interfacial layer formed on the substrate, a high-k dielectric layer formed on the interfacial layer, a capping layer formed on the high-k... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20110117735 - Methods of fabricating non-volatile memory devices having carbon nanotube layer and passivation layer: Nonvolatile memory devices may be fabricated to include a switching device on a substrate and/or a storage node electrically connected to the switching device. A storage node may include a lower metal layer electrically connected to the switching device, a first insulating layer, a middle metal layer, a second insulating... Agent:
20110117736 - Manufacturing method of semiconductor integrated circuit device: One invention of the present application relates to detecting the added amount of Tl in the plating solution by monitoring the voltage applied to the plating solution in formation of bump electrodes by an electrolytic Au plating using a non-cyan based plating solution according to the manufacturing method of a... Agent: Renesas Electronics Corporation
20110117737 - Method of forming metal interconnect structures in ultra low-k dielectrics: A metal interconnect structure in ultra low-k dielectrics is described having a capped interconnect layer; an interconnect feature with a contact via and a contact line formed in a dielectric layer, where the via is partially embedded into the interconnect layer; and a thin film formed on the dielectric layer... Agent:
20110117738 - Method to alter silicide properties using gcib treatment: A method of manufacturing a semiconductor device is described. The method comprises performing a gas cluster ion beam (GCIB) pre-treatment and/or post-treatment of at least a portion of a silicon-containing substrate during formation of a silicide region.... Agent: Tel Epion Inc.
20110117739 - Methods for forming semiconductor device structures: The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the... Agent: Micron Technology, Inc.
20110117740 - Method for polishing heterostructures: A polishing method for a heterostructure of at least one relaxed superficial heteroepitaxial layer on a substrate made of a different material. The method includes a first chemical mechanical polishing step of the surface of the heteroepitaxial layer performed with a polishing cloth having a first compressibility ratio and with... Agent: S.o.i. Tec Silicon On Insulator Technologies
20110117741 - Method of fabricating soi wafer: There is provided a method of fabricating an SOI wafer, the method including: a) preparing a bonded SOI substrate that has a buried oxide layer and an SOI layer formed in this sequence on a circular plate shaped support, and at a peripheral edge portion of the support substrate, has... Agent: Oki Semiconductor Co., Ltd.
20110117743 - Multiple deposition for integration of spacers in pitch multiplication process: Pitch multiplication is performed using a two step process to deposit spacer material on mandrels. The precursors of the first step react minimally with the mandrels, forming a barrier layer against chemical reactions for the deposition process of the second step, which uses precursors more reactive with the mandrels. Where... Agent: Round Rock Research, LLC
20110117742 - Plasma processing method: [Solving Means] In a plasma processing method according to the present invention, the process of etching a substrate (W) having a mask pattern formed on a surface thereof by using plasma formed in a vacuum vessel (21) and the process of forming a protective film on a side wall portion... Agent: Ulvac, Inc.
20110117744 - Pattern forming method and pattern forming apparatus: According to one embodiment, a first pattern is formed at first pattern coverage in a first region on a film to be processed and a second pattern is formed at second pattern coverage in a second region on the film to be processed. During the formation of the second pattern,... Agent:
20110117746 - Coating composition and pattern forming method: It is an object to provide a coating composition applicable to “reversal patterning” and suitable for forming a film covering a resist pattern. The object is accomplished by a coating composition for lithography comprising an organopolysiloxane, a solvent containing the prescribed organic solvent as a main component, and a quaternary... Agent: Nissan Chemical Industries, Ltd.
20110117745 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device according to an embodiment includes processing a second film 14 formed on a semiconductor substrate to a pattern including a plurality of linear parts and end portions formed in an end of each of the linear parts, having a width wider than the... Agent:
20110117748 - Localized plasma processing: A method of localized plasma processing improves processing speed and reduces work piece damage compared to charged particle beam deposition and etching. In one embodiment, a plasma jet exits a plasma generating chamber and activates a reactive gas. A jet of plasma and reactive gas impacts and processes the work... Agent: Fei Company
20110117747 - Method of fabricating single chip for integrating field-effect transistor into mems structure: A method of fabricating a single chip for integrating a field-effect transistor into a microelectromechanical systems (MEMS) structure is provided. The method includes the steps of: providing a substrate having thereon at least one transistor structure, a MEMS structure and a blocking structure, wherein the blocking structure encircles the MEMS... Agent: National Chip Implementation Center National Applied Research Laboratories
20110117749 - Method for reducing line width roughness with plasma pre-etch treatment on photoresist: A method for reducing line width roughness (LWR) of a feature in an etch layer below a patterned photoresist mask having mask features is provided. The method includes (a) non-etching plasma pre-etch treatment of the photoresist mask, and (b) etching of a feature in the etch layer through the pre-treated... Agent: Lam Research Corporation
20110117750 - Novel wet etching agent for ii-vi semiconductors and method: A novel etching agent for etching II-VI semiconductors is provided. The etching agent includes an aqueous solution of potassium permanganate and phosphoric acid. This etching solution can etch II-VI semiconductors at a rapid rate but tend to be much less reactive with III-V semiconductors. The provided agent can be used... Agent: 3m Innovative Properties Company
20110117751 - Non-selective oxide etch wet clean composition and method of use: Composition and method to remove undoped silicon-containing materials from microelectronic devices at rates greater than or equal to the removal of doped silicon-containing materials.... Agent: Advanced Technology Materials, Inc.
20110117752 - Method and system for etching a silicon dioxide film using densified carbon dioxide: The present invention relates to a method and system for removing a sacrificial layer from an MEMS structure or from any other semiconductor substrate that includes a sacrificial layer. The above etching method and system use densified carbon dioxide, fluorine compounds, and co-solvents as the processing fluid and are capable... Agent:
20110117753 - Heat treatment apparatus and semiconductor device manufacturing method: A heat treatment apparatus including a vacuum vessel, a substrate stage which holds a substrate mounted on it, a heating unit for heating the substrate, and an exhaust unit for evacuating the vacuum vessel includes a first reflector which covers the upper portion of the exhaust port of the exhaust... Agent: C/o Canon Anelva Corporation05/12/2011 > 73 patent applications in 61 patent subcategories. archived by USPTO category
20110111532 - Methods of forming pattern structures and methods of manufacturing semiconductor devices using the same: Methods of forming pattern structures and methods of manufacturing memory devices using the same are provided, the methods of forming pattern structures include forming an etching object layer on a substrate and performing a plasma reactive etching process on the etching object layer using an etching gas including at least... Agent: Samsung Electronics Co., Ltd.
20110111533 - Uv and reducing treatment for k recovery and surface clean in semiconductor processing: Treatment of carbon-containing low-k dielectric with UV radiation and a reducing agent enables process-induced damage repair. Also, treatment with a reducing agent and UV radiation is effective to clean a processed wafer surface by removal of metal oxide (e.g., copper oxide) and/or organic residue of CMP slurry from the planarized... Agent:
20110111534 - Method for producing a contact for solar cells: The invention relates to a method for producing a contact for solar cells (30) arranged in a laminated solar panel (1), wherein the solar cells (30) are coated on both sides of the main surfaces thereof with at least one layer and before a lamination step the solar cells (30)... Agent: Guedel Group Ag
20110111535 - Method for evaluating oxide semiconductor and method for manufacturing semiconductor device: Many of the principles of an oxide semiconductor are still unclear and therefore there is no established method for evaluating an oxide semiconductor. Thus, an object is to provide a novel method for evaluating an oxide semiconductor. Carrier density is evaluated, and hydrogen concentration is also evaluated. Specifically, a MOS... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110111537 - High thermal conductivity substrate for a semiconductor device: A method and apparatus for packaging semiconductor dies for increased thermal conductivity and simpler fabrication when compared to conventional semiconductor packaging techniques are provided. The packaging techniques described herein may be suitable for various semiconductor devices, such as light-emitting diodes (LEDs), central processing units (CPUs), graphics processing units (GPUs), microcontroller... Agent:
20110111536 - Method of mounting a led module to a heat sink: A method of mounting a light emitting diode (LED) module (100) to a heat sink (102), the method comprising the steps of placing the LED module (100) in a hole (120) in the heat sink (102); and expanding a portion of the LED module (100) such that the LED module... Agent: Koninklojke Philips Electronics N.v.
20110111538 - Method for forming led phosphor resin layer: A method for forming an LED phosphor resin layer includes the following steps: (A) providing an upper mold, a lower mold, and an LED support, wherein the LED support supports an LED chip; (B) securing the LED support on the lower mold; (C) providing a phosphor resin material between the... Agent: Forward Electronics Co., Ltd.
20110111539 - Method of manufacturing light emitting diode package: A method of manufacturing a light emitting diode (LED) package includes disposing at least one LED chip on a first surface of a lead frame, and the LED chip is connected to the lead frame. At least one heat dissipation area corresponding to the LED chip is defined on a... Agent: Industrial Technology Research Institute
20110111540 - Method of fabricating flat panel display: Exemplary embodiments provide a flat panel display and method for forming the same including a substrate having a pixel driving circuit region and an emission region, a thin film transistor in the pixel driving circuit region, and a pixel electrode on the same layer as the source and drain electrodes.... Agent: Samsung Mobile Display Co., Ltd.
20110111541 - Semiconductor device and method for manufacturing the same: A silicon film is crystallized in a predetermined direction by selectively adding a metal element having a catalytic action for crystallizing an amorphous silicon and annealing. In manufacturing TFT using the crystallized silicon film, TFT provided such that the crystallization direction is roughly parallel to a current-flow between a source... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110111542 - Method of fabricating organic light emitting diode display: A method of fabricating an OLED display, includes sequentially forming a TFT array, first electrodes, and a first related layer on a first substrate, respectively forming heat-generating elements on second and third substrates, forming a red organic emission pattern on the second substrate, and forming a green organic emission pattern... Agent:
20110111543 - Method for manufacturing liquid crystal display device: A thin-film transistor including a gate electrode, a drain electrode, and a source electrode is formed. A first insulating film is formed so as to cover the thin-film transistor. A second insulating film is formed on the first insulating film. A transparent conductive film is formed on the second insulating... Agent: Hitachi Displays, Ltd.
20110111544 - mems mirror system for laser printing applications: A MEMS mirror for a laser printing application includes providing a CMOS substrate including a pair of electrodes, and providing a reflecting mirror moveable over the substrate and the electrodes. Voltages applied to the electrodes create an electrostatic force causing an end of the mirror to be attracted to the... Agent: Miradia Inc.
20110111545 - Low temperature ceramic microelectromechanical structures: A method of providing microelectromechanical structures (MEMS) that are compatible with silicon CMOS electronics is provided. The method providing for processes and manufacturing sequences limiting the maximum exposure of an integrated circuit upon which the MEMS is manufactured to below 350° C., and potentially to below 250° C., thereby allowing... Agent: The Royal Institution For The Advancement Of Learning / Mcgill University
20110111546 - Method for production of a thermoelectric apparatus: m
20110111547 - Backside-illuminated imaging device and manufacturing method of the same: A backside-illuminated imaging device, which performs imaging by illuminating light from a back side of a semiconductor substrate to generate electric charges in the semiconductor substrate based on the light and reading out the electric charges from a front side of the semiconductor substrate, is provided and includes: a back-side... Agent:
20110111548 - Method of manufacturing a solar cell using a pre-cleaning step that contributes to homogeneous texture morphology: A method of manufacturing a solar cell wherein a pre-cleaning step is completed prior to a saw damage removal step and prior to texturization, thereby resulting in the subsequently formed textured surface to have a more homogeneous textural morphology. In one aspect, the invention is a method comprising: a) applying... Agent:
20110111549 - Image sensor with pixel wiring to reflect light: An image sensor with a plurality of photodiodes pixels. At least one of the photodiodes pixels includes a reflective element that prevents light from traveling onto an adjacent photodiode pixel. The reflective element may be a floating contact adjacent a routing wire of the image sensor. The reflective element may... Agent:
20110111550 - Hybrid window layer for photovoltaic cells: A novel photovoltaic solar cell and method of making the same are disclosed. The solar cell includes: at least one absorber layer which could either be a lightly doped layer or an undoped layer, and at least a doped window-layers which comprise at least two sub-window-layers. The first sub-window-layer, which... Agent:
20110111551 - Photoelectric conversion device fabrication method: Provided is a photoelectric conversion device fabrication method that realizes both high productivity and high conversion efficiency by rapidly forming an n-layer having good coverage. The fabrication method for a photoelectric conversion device includes a step of forming a silicon photoelectric conversion layer on a substrate by a plasma CVD... Agent: Mitsubishi Heavy Industries, Ltd.
20110111553 - Advanced cmos using super steep retrograde wells: The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer (110) beneath the gate dielectric (50) and source and drain regions (80) of a MOS transistor. The carbon containing layer (110) will prevent the diffusion of... Agent: Texas Instruments Incorporated
20110111554 - Memory device, semiconductor device, and method for manufacturing memory device: Objects are to solve inhibition of miniaturization of a memory element and complexity of a manufacturing process thereof, and to provide a nonvolatile memory device and a semiconductor device each having the memory device, in which data can be additionally written except at the time of manufacture and in which... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110111552 - Method for forming organic layers of electronic devices by contact printing: A method for forming organic layers of electronic devices by contact printing is disclosed, which comprises: (A) providing a substrate, which has an electrode formed thereon; (B) coating an organic material ink onto a mold; (C) applying the ink-coated mold onto the substrate, to transfer the organic material ink onto... Agent: National Tsing Hua University
20110111555 - Semiconductor device and manufacturing method thereof: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110111556 - Antimony compounds useful for deposition of antimony-containing materials: Precursors for use in depositing antimony-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of A Ge2Sb2Te5 chalcogenide thin films in the manufacture of... Agent: Advanced Technology Materials, Inc.
20110111557 - Method for manufacturing semiconductor device: It is an object to drive a semiconductor device at high speed or to improve the reliability of the semiconductor device. In a method for manufacturing the semiconductor device, in which a gate electrode is formed over a substrate with an insulating property, a gate insulating film is formed over... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110111558 - Method for manufacturing semiconductor element and semiconductor device, and deposition apparatus: An object is to provide a deposition apparatus for forming a thin film which contains few impurities such as a hydrogen atom or a carbon atom. Further, an object is to provide a method for forming a thin film containing few impurities. Furthermore, an object is to provide a method... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110111559 - Integrated-circuit package for proximity communication: Embodiments of a multi-chip module (MCM) are described. This MCM includes a first semiconductor die and a second semiconductor die, where a given semiconductor die, which can be the first semiconductor die or the second semiconductor die, includes proximity connectors proximate to a surface of the given semiconductor die. Moreover,... Agent: Oracle International Corporation
20110111561 - Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods: Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system in accordance with a particular embodiment includes a first semiconductor substrate having a first substrate material, and a penetrating structure carried by the first semiconductor substrate. The system further includes... Agent: Micron Technology, Inc.
20110111560 - Lock and key through-via method for wafer level 3d integration and structures produced thereby: A three dimensional device stack structure comprises two or more active device and interconnect layers further connected together using through substrate vias. Methods of forming the three dimensional device stack structure comprise alignment, bonding by lamination, thinning and post thinning processing. The via features enable the retention of alignment through... Agent: International Business Machines Corporation
20110111562 - Partially patterned lead frames and methods of making and using the same in semiconductor packaging: A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging lead-count, wherein the method lends itself to better automation of the manufacturing line and improved quality and reliability of the packages produced therefrom. A major portion of the manufacturing process steps is... Agent:
20110111563 - Adhesive tape for resin-encapsulating and method of manufacture of resin-encapsulated semiconductor device: An adhesive tape for resin-encapsulating used in a method of manufacture of a resin-encapsulated semiconductor device has a base material layer and an adhesive agent layer laminated on the base material layer, a total film thickness of the base material layer and the adhesive agent layer of 25 to 40... Agent: Nitto Denko Corporation
20110111564 - Method and apparatus for optical modulation: The present invention is a method and an apparatus for optical modulation, for example for use in optical communications links. In one embodiment, an apparatus for optical modulation includes a first silicon layer having one or more trenches formed therein, a dielectric layer lining the first silicon layer, and a... Agent:
20110111565 - Dual gate finfet: A circuit has a fin supported by a substrate. A source is formed at a first end of the fin and a drain is formed at a second end of the fin. A pair of independently accessible gates are laterally spaced along the fin between the source and the drain.... Agent: Infineon Technologies Ag
20110111566 - Semiconductor device and manufacturing method of the same: Manufacturing technique for a semiconductor device having a first MISFET of an n channel-type and a second MISFET of a p channel type, including forming a first insulating film composed of a silicon oxide film or a silicon oxynitride film on a semiconductor substrate for forming a gate insulating film... Agent:
20110111567 - Semiconductor device and method of manufacturing the same: The semiconductor device includes a first MIS transistor including a gate insulating film 92, a gate electrode 108 formed on the gate insulating film 92 and source/drain regions 154, a second MIS transistor including a gate insulating film 96 thicker than the gate insulating film 92, a gate electrode 108... Agent: Fujitsu Limited
20110111568 - Methods of fabricating vertical channel transistors: Methods of fabricating vertical channel transistors may include forming an active region on a substrate, patterning the active region to form vertical channels at sides of the active region, forming a buried bit line in the active region between the vertical channels, and forming a word line facing a side... Agent: Samsung Electronics Co., Ltd.
20110111569 - Mos transistor with gate trench adjacent to drain extension field insulation: An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source diffused region overlap the bottom surface of the gate trench. An integrated circuit containing an MOS transistor with a first trenched gate abutting an isolation... Agent: Texas Instruments Incorporated
20110111570 - Methods of fabricating non-volatile memory devices including double diffused junction regions: A nonvolatile memory device includes a string selection gate and a ground selection gate on a semiconductor substrate, and a plurality of memory cell gates on the substrate between the string selection gate and the ground selection gate. First impurity regions extend into the substrate to a first depth between... Agent: Samsung Electronics Co., Ltd.
20110111571 - Method for obtaining quality ultra-shallow doped regions and device having same: A method of forming ultra-shallow p-type lightly doped drain (LDD) regions of a PMOS transistor in a surface of a substrate includes the steps of providing a gaseous mixture of an inert gas, a boron-containing source, and an optional carbon-containing source, wherein the concentration of the gaseous mixture is at... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20110111572 - Memory including bipolar junction transistor select devices: An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions... Agent:
20110111573 - Low parasitic capacitance bit line process for stack dram: A method of manufacturing low parasitic capacitance bit line for stack DRAM, comprising the following steps: offering a semi-conductor base, which semi-conductor having already included an oxide, plural word line stacks, plural bit line stacks and plural polysilicons; applying a multi layer resist coat; removing the multi layer resist coat... Agent: Inotera Memories, Inc.
20110111574 - Method for manufacturing semiconductor substrate: A nitride-based semiconductor crystal and a second substrate are bonded together. In this state, impact is applied externally to separate the low-dislocation density region of the nitride-based semiconductor crystal along the hydrogen ion-implanted layer, thereby transferring (peeling off) the surface layer part of the low-dislocation density region onto the second... Agent: Shin-etsu Chemical Co., Ltd.
20110111575 - Method for manufacturing soi substrate: A heating plate having a smooth surface is placed on a hot plate which constitutes a heating section, and the smooth surface of the heating plate is closely adhered on the rear surface of a single-crystal Si substrate bonded to a transparent insulating substrate. The temperature of the heating plate... Agent: Shin-etsu Chemical Co., Ltd.
20110111576 - Laser-scribing system for structuring substrates for thin layer solar modules: The invention relates to a laser scribing system (10) for structuring substrates, said system being characterised in that the planar rotor (56) together with the laser device (60) has a mass that is essentially less than the mass of the table (20) and the substrate (30) such that the machining... Agent:
20110111578 - Method of forming p-type gallium nitride based semiconductor, method of forming nitride semiconductor device, and method of forming epitaxial wafer: A method of forming a p-type gallium nitride based semiconductor without activation annealing is provided, and the method can provide a gallium nitride based semiconductor doped with a p-type dopant. A GaN semiconductor region 17 containing a p-type dopant is formed on a supporting base 13 in a reactor 10.... Agent: Sumitomo Electric Industries, Ltd.
20110111577 - Semiconductor carbon nanotubes and method of selectively growing semiconductor carbon nanotubes using light irradiation: A method of selectively growing a plurality of semiconductor carbon nanotubes using light irradiation. The method includes disposing a plurality of nanodots, which include a catalyst material, on a substrate; growing a plurality of carbon nanotubes from the plurality of nanodots, and irradiating light onto the nanodot to selectively grow... Agent: Samsung Electronics Co., Ltd.
20110111579 - Non-volatile semiconductor storage device and method of manufacturing the same: A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a memory columnar semiconductor extending in a direction perpendicular to a substrate; a tunnel insulation layer contacting the memory columnar semiconductor; a... Agent: Kabushiki Kaisha Toshiba
20110111580 - Method of fabricating a semiconductor device: According to one embodiment, a method of fabricating a semiconductor device is disclosed. The method can include forming an amorphous layer on a portion of a first silicon substrate having a first plane orientation, and irradiating with micro wave on the amorphous layer to transform from the amorphous layer into... Agent:
20110111581 - Deposition apparatus and manufacturing method of thin film device: [Solution] In the deposition apparatus 1 including a substrate holder 12 supported in a vacuum chamber 10 grounded on the earth, a substrate 14 held by the substrate holder 12, deposition sources 34, 36 placed distant from the substrate 14 so as to face the substrate, an ion gun 38... Agent: Shincron Co., Ltd.
20110111582 - Method for depositing ultra fine grain polysilicon thin film: Disclosed is a method for depositing a polysilicon thin film with ultra-fine crystal grains. According to the present invention, the polysilicon thin film is deposited on a substrate by supplying source gases inside a chamber in which the substrate is loaded, wherein the source gases include a silicon-based gas and... Agent:
20110111583 - Method of reducing coupling between floating gates in nonvolatile memory: A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.... Agent:
20110111584 - Sram cell having a rectangular combined active area for planar pass gate and planar pull-down nfets: A planar pass gate NFET is designed with the same width as a planar pull-down NFET. To optimize a beta ratio between the planar pull-down NFET and an adjoined planar pass gate NFET, the threshold voltage of the planar pass gate NFET is increased by providing a different high-k metal... Agent: International Business Machines Corporation
20110111585 - Manufacturing method of semiconductor device: The invention provides a technique to manufacture a highly reliable semiconductor device and a display device at high yield. As an exposure mask, an exposure mask provided with a diffraction grating pattern or an auxiliary pattern formed of a semi-transmissive film with a light intensity reducing function is used. With... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110111586 - Method of setting a work function of a fully silicided semiconductor device, and related device: A method of setting a work function of a fully silicided semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a dielectric layer, a silicide layer on the dielectric layer that defines... Agent: Texas Instruments Incorporated
20110111587 - Method for forming post bump: Disclosed is a method for forming post bumps, the method including the steps of: forming a seed layer for metal plating on a substrate; forming a resist layer having openings provided as positions where the seed layer is subjected to metal plating; forming a dummy sheet, exposing the openings, on... Agent: Samsung Electro-mechanics Co., Ltd.
20110111589 - Barrier-metal-free copper camascence technology using atomic hydrogen enhanced reflow: A method for forming conductive contacts and interconnects in a semiconductor structure, and the resulting conductive components are provided. In particular, the method is used to fabricate single or dual damascene copper contacts and interconnects in integrated circuits such as memory devices and microprocessor.... Agent: Mosaid Technologies, Incorporated
20110111588 - Wiring forming method: Size reduction and high integration of each of the laminated substrates are achieved, while forming an excellent wiring which electrically connects the substrates to each other. A conductive ink, i.e., an ink, containing a conductive material is used, and in a state where a voltage is applied between a print... Agent: Konica Minolta Holdings, Inc.
20110111590 - Device and methodology for reducing effective dielectric constant in semiconductor devices: Method of manufacturing a structure which includes the steps of providing a structure having an insulator layer with at least one interconnect, forming a sub lithographic template mask over the insulator layer, and selectively etching the insulator layer through the sub lithographic template mask to form sub lithographic features spanning... Agent: International Business Machines Corporation
20110111591 - Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer: A semiconductor wafer contains a plurality of die with contact pads disposed on a first surface of each die. Metal vias are formed in trenches in the saw street guides and are surrounded by organic material. Traces connect the contact pads and metal vias. The metal vias can be half-circle... Agent: Stats Chippac, Ltd.
20110111592 - Angle ion implant to re-shape sidewall image transfer patterns: A method for fabrication of features of an integrated circuit and device thereof include patterning a first structure on a surface of a semiconductor device and forming spacers about a periphery of the first structure. An angled ion implantation is applied to the device such that the spacers have protected... Agent: International Business Machines Corporation
20110111593 - Pattern formation method, pattern formation system, and method for manufacturing semiconductor device: According to one embodiment, a pattern formation method is disclosed. The method can form a patterning film on a substrate. The method can transfer a form pattern provided on a template onto an imprint material by bringing the template into contact with the imprint material. The imprint material is coated... Agent:
20110111594 - Wafer bonding method: Even for the case where a CVD oxide film is interposed at a bonding interface, as a pre-processing of bonding a first wafer and a second wafer, at least the surface roughness of the CVD oxide film of the first wafer is made small after removing organic substances. Therefore, it... Agent: Sumco Corporation
20110111596 - Sidewall image transfer using the lithographic stack as the mandrel: In one non-limiting exemplary embodiment, a method includes: providing a structure having at least one lithographic layer on a substrate, where the at least one lithographic layer includes a planarization layer (PL); forming a sacrificial mandrel by patterning at least a portion of the at least one lithographic layer using... Agent: International Business Machine Corporation
20110111597 - Methods of utilizing silicon dioxide-containing masking structures: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water.... Agent: Micron Technology, Inc.
20110111598 - Method for preparing patterned substrate by using nano- or micro- particles: A method for preparing patterned substrate by using nano- or micro-particles is disclosed, which comprises the following steps: (A) providing a substrate with a photoresist layer formed thereon; (B) coating a surface of the photoresist layer with plural nano- or micro-particles, to form a particle layer; (C) exposing and developing... Agent:
20110111599 - Method for patterned etching of selected material: Surface processing in which the area to be processed is restricted to a predetermined pattern, can be achieved by: (a) providing a layer of a first reagent over a region of the surface to be processed which at least covers an area of the predetermined pattern; (b) providing one or... Agent:
20110111600 - Processing method for soi substrate: A method of processing a SOI substrate to form a groove in the SOI substrate in which a silicon layer is stacked on both sides of an oxide layer is disclosed. In accordance with an embodiment of the present invention, the method includes dividing a portion of the silicon layer,... Agent: Samsung Electro-mechanics Co., Ltd.
20110111601 - Plasma processing apparatus and plasma processing method: In a plasma processing apparatus, thrust-up pins are elevated and a thrust-up force is detected when electrostatic attraction for a substrate by a substrate holding device is ceased after completion of plasma processing, the elevation of the thrust-up pins is ceased upon detection of a detection threshold, and a stepped... Agent:
20110111602 - Plasma processing method: Disclosed is a plasma processing method that excels in mass production consistency as it suppresses the flaking of a reaction product deposited on a portion outside the effective range of a Faraday shield in a vacuum vessel. The plasma processing method, which plasma-processes a sample having a layer made of... Agent: Hitachi High-technologies Corporation
20110111603 - Atomic layer deposition apparatus: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected... Agent:
20110111604 - Plasma surface treatment to prevent pattern collapse in immersion lithography: The present invention comprises a method of reducing photoresist mask collapse when the photoresist mask is dried after immersion development. As feature sizes continue to shrink, the capillary force of water used to rinse a photoresist mask approaches the point of being greater than adhesion force of the photoresist to... Agent:05/05/2011 > 82 patent applications in 63 patent subcategories. archived by USPTO category
20110104828 - Method for making microstructures by converting porous silicon into porous metal or ceramics: A method for making a micro structure (100) is proposed. The method starts with the step of providing a silicon substrate (102), which has a main surface. A porous silicon layer (103)—extending into the silicon substrate from the main surface—is then formed. The method continues by etching the porous silicon... Agent: Rise Technology S.r.l.
20110104829 - Method of transfer by means of a ferroelectric substrate: A method of carrying out a transfer of one or more first components or of a first layer onto a second substrate including: a) application and maintaining, by electrostatic effect, of the one or more first components or of the first layer, on a first substrate, made of a ferroelectric... Agent: Commiss. A L'energie Atom. Et Aux Energ. Alterna.
20110104827 - Template-registered diblock copolymer mask for mram device formation: A method for fabricating a magnetoresistive random access memory (MRAM) includes forming a mask over a magnetic layer; forming a template on the mask; applying a diblock copolymer to the template; curing the diblock copolymer to form a first plurality of uniform shapes registered to the template; etching the mask... Agent: International Business Machines Corporation
20110104830 - Apparatus for inspection with electron beam, method for operating same, and method for manufacturing semiconductor device using former: A substrate inspection apparatus 1-1 (FIG. 1) of the present invention performs the following steps of: carrying a substrate “S” to be inspected into an inspection chamber 23-1; maintaining a vacuum in said inspection chamber; isolating said inspection chamber from a vibration; moving succe-ssively said substrate by means of a... Agent: Ebara Corporation
20110104831 - Deletable nanotube circuit: Carbon nanotube template arrays may be edited to form connections between proximate nanotubes and/or to delete undesired nanotubes or nanotube junctions.... Agent: Searete LLC, A Limited Liability Corporation Of The State Of Delaware
20110104832 - Method for producing a field-emitter array with controlled apex sharpness: A method of manufacturing field-emitter arrays by a molding technique includes uniformly controlling a shape of mold holes to obtain field emitter tips having diameters below 100 nm and blunted side edges. Repeated oxidation and etching of a mold substrate formed of single-crystal semiconductor mold wafers is carried out, wherein... Agent: Paul Scherrer Institut
20110104833 - Organic light emitting display and method of manufacturing the same: An organic light emitting display is disclosed. The display has a pixel which includes a transistor and a capacitor. The active layer of the transistor and at least one of the electrodes of the capacitor comprise a semiconductor oxide.... Agent: Samsung Mobile Display Co., Ltd.
20110104834 - Light emitting device including a sealing portion, and method of making the same: A method of making a light emitting device, includes a mounting and a light emitting element on a substrate; hot-pressing a glass material on the light emitting element to form a glass sealing portion for sealing the light emitting element; and forming a phosphor layer on a surface of the... Agent: Toyoda Gosei Co., Ltd.
20110104835 - Method of manufacturing semiconductor light emitting elements: A method of manufacturing semiconductor light emitting elements with improved yield and emission power uses laser lift-off and comprises the steps of forming a semiconductor grown layer formed of a first semiconductor layer, an active layer, and a second semiconductor layer on a first principal surface of a growth substrate;... Agent: Stanley Electric Co., Ltd.
20110104837 - Gallium nitride based compound semiconductor light-emitting device having high emission efficiency and method of manufacturing the same: The present invention provides a gallium nitride based compound semiconductor light-emitting device having high light emission efficiency and a low driving voltage Vf. The gallium nitride based compound semiconductor light-emitting device includes a p-type semiconductor layer, and a transparent conductive oxide film that includes dopants and is formed on the... Agent: Showa Denko K.k.
20110104836 - Method for producing an optoelectronic component and optoelectronic component: In a method for producing an optoelectronic component, a growth substrate having a first coefficient of thermal expansion is provided. A multilayered buffer layer sequence is applied thereto. A layer sequence having a second coefficient of thermal expansion—different than the first coefficient of thermal expansion—is subsequently deposited epitaxially. It furthermore... Agent: Osram Opto Semiconductors Gmbh
20110104838 - Liquid crystal display and method of making the same: A method of making a liquid crystal display having a display region and a non-display region, the method comprises forming a thin film transistor (“TFT”) having a drain electrode on an insulating substrate, forming an inorganic layer and an organic insulating layer sequentially on the TFT, forming an organic insulating... Agent: Samsung Electronics Co., Ltd.
20110104839 - Semiconductor laser device and method of manufacturing the same: A semiconductor laser device includes a substrate and a semiconductor layer formed on a surface of the substrate and having a waveguide extending in a first direction parallel to the surface, wherein the waveguide is formed on a region approaching a first side from a center of the semiconductor laser... Agent: Sanyo Electric Co., Ltd.
20110104840 - Etchant solutions and additives therefor: The present invention is concerned with etchant or etching solutions and additives therefor, a process of preparing the same, a process of patterning a substrate employing the same, a patterned substrate thus prepared in accordance with the present invention and an electronic device including such a patterned substrate. An etchant... Agent: Koninklijke Philips Electronics, N.v.
20110104842 - Manufacturing method of organic el display: Provided is a method of manufacturing an organic EL display which includes a substrate having a TFT therein and a plurality of organic EL elements disposed on the substrate, each of the organic EL elements having a first electrode disposed on the substrate, an organic layer disposed on the first... Agent: Panasonic Corporation
20110104841 - Mask level reduction for mofet: A method of fabricating a thin film transistor for an active matrix display using reduced masking operations includes patterning a gate on a substrate. A gate dielectric is formed over the gate and a semiconducting metal oxide is deposited on the gate dielectric. A channel protection layer is patterned on... Agent:
20110104843 - Method of reducing degradation of multi quantum well (mqw) light emitting diodes: A method of fabricating a light emitting diode. According to embodiments of the present invention an active region comprising a plurality of gallium nitride (GaN) barrier layers and a plurality of indium gallium nitride (InGan) quantum well layers are formed over a substrate. A p-type gallium nitride layer is formed... Agent: Applied Materials, Inc.
20110104844 - Method for fabricating micro-electro-mechanical system (mems) device: A method for fabricating MEMS device includes providing a substrate having a first side and a second side. Then, a structural dielectric layer is formed over the substrate at the first side, wherein a structural conductive layer is embedded in the structural dielectric layer. A multi-stage patterning process is performed... Agent: Solid State System Co., Ltd.
20110104845 - Production method of mems sensor: Production method for a MEMS sensor including a substrate, a lower thin film, opposed to a surface of the substrate at an interval, having a plurality of lower through-holes formed to pass through the lower thin film in the thickness direction thereof, an upper thin film, opposed to the lower... Agent: Rohm Co., Ltd
20110104846 - Thermoelectric 3d cooling: The invention comprises a 3D chip stack with an intervening thermoelectric coupling (TEC) plate. Through silicon vias in the 3D chip stack transfer electronic signals among the chips in the 3D stack, power the TEC plate, as well as distribute heat in the stack from hotter chips to cooler chips.... Agent: International Business Machines Corporation
20110104847 - Evaporative system for solar cell fabrication: A plurality of chamber are arranged about a transport chamber. The linear transport chamber may include a linear track supporting robot arms. The robot arms transport substrates to and from the chambers. Each chamber includes a plurality of evaporators, each controlled independently. Each substrate positioned in the chamber is coated... Agent: Intevac, Inc.
20110104848 - Hot wire chemical vapor deposition (cvd) inline coating tool: Methods and apparatus for hot wire chemical vapor deposition (HWCVD) are provided herein. In some embodiments, an inline HWCVD tool may include a linear conveyor for moving a substrate through the linear process tool; and a multiplicity of HWCVD sources, the multiplicity of HWCVD sources being positioned parallel to and... Agent: Applied Materials, Inc.
20110104849 - Photovoltaic device and manufacturing method thereof: A photovoltaic device capable of improving an output characteristic is provided. The photovoltaic device includes an n-type single-crystal silicon substrate, a p-type amorphous silicon substrate, and a substantially intrinsic i-type amorphous silicon layer disposed between the n-type single-crystal silicon substrate and the p-type amorphous silicon layer. The i-type amorphous silicon... Agent: Sanyo Electric Co., Ltd.
20110104850 - Solar cell contact formation process using a patterned etchant material: Embodiments of the invention contemplate the formation of a high efficiency solar cell using novel methods to form the active region(s) and the metal contact structure of a solar cell device. In one embodiment, the methods include the use of various etching and patterning processes that are used to define... Agent:
20110104851 - Semiconductor device and manufacturing method thereof: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110104852 - Semiconductor memory device and manufacturing method thereof: A semiconductor memory device has a plurality of core chips and an interface chip, whose specification can be easily changed, while suppressing the degradation of its reliability. The device has an interposer chip. First internal electrodes connected to core chips are formed on the first surface of the interposer chip.... Agent: Elpida Memory, Inc.
20110104854 - Method and leadframe for packaging integrated circuits: A leadframe suitable for use in the packaging of at least two integrated circuit dice into a single integrated circuit package is described. The leadframe includes a plurality of leads. Each of a first set of the plurality of leads has a first side and a second side substantially opposite... Agent: National Semiconductor Corporation
20110104853 - Method of forming semiconductor package: A method of forming a semiconductor package includes providing a transfer film and placing electronic components on the transfer film with active sides of the electronic components facing the transfer film. The electronic components include a first assembled package and one or more of a second assembled package and a... Agent: Freescale Semiconductor, Inc
20110104855 - Method of making a semiconductor chip assembly with a post/base heat spreader with an esd protection layer: A method of making a semiconductor chip assembly includes providing a post, a base, an ESD protection layer and a metal layer, wherein the post extends above the base and the ESD protection layer is sandwiched between the base and the metal layer, mounting an adhesive on the base including... Agent: Bridge Semiconductor Corporation
20110104856 - Method of making a semiconductor chip assembly with a post/base/post heat spreader: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive, the second post extends from the base in... Agent: Bridge Semiconductor Corporation
20110104857 - Packaged microdevices and methods for manufacturing packaged microdevices: Microdevices and methods for packaging microdevices. One embodiment of a packaged microdevice includes a substrate having a mounting area, contacts in the mounting area, and external connectors electrically coupled to corresponding contacts. The microdevice also includes a die located across from the mounting area and spaced apart from the substrate... Agent: Micron Technology, Inc.
20110104858 - Method of manufacturing semiconductor element mounted wiring board: A semiconductor element sealed substrate including a semiconductor element covered by an insulating layer is fabricated while a wiring substrate formed by stacking wiring layers is fabricated by a process different from the process of fabricating the semiconductor element sealed substrate. Next, the semiconductor element sealed substrate and the wiring... Agent: Shinko Electric Industries Co., Ltd.
20110104859 - Manufacturing method of semiconductor device: A manufacturing method of a semiconductor device is provided, which includes a process in which a transistor is formed over a first substrate; a process in which a first insulating layer is formed over the transistor; a process in which a first conductive layer connected to a source or a... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110104860 - Semiconductor nanowire with built-in stress: A semiconductor nanowire having two semiconductor pads on both ends is suspended over a substrate. Stress-generating liner portions are formed over the two semiconductor pads, while a middle portion of the semiconductor nanowire is exposed. A gate dielectric and a gate electrode are formed over the middle portion of the... Agent: International Business Machines Corporation
20110104861 - Integrated complementary low voltage rf-ldmos: Complementary RF LDMOS transistors have gate electrodes over split gate oxides. A source spacer of a second conductivity type extends laterally from the source tap of a first conductivity type to approximately the edge of the gate electrode above the thinnest gate oxide. A body of a first conductivity type... Agent:
20110104862 - Method of forming semiconductor device and semiconductor device: A method of forming a semiconductor device includes the following processes. A first semiconductor structure is formed, which extends upwardly in a direction perpendicular to a main surface from a surface of a semiconductor substrate. A first insulating film is formed which extends on a surface of the first semiconductor... Agent: Elpida Memory, Inc.
20110104863 - Transistor including a high-k metal gate electrode structure formed prior to drain/source regions on the basis of a sacrificial carbon spacer: When forming sophisticated high-k metal gate electrode structures in an early manufacturing stage, the dielectric cap layer of the gate electrode structures may be efficiently removed on the basis of a carbon spacer element, which may thus preserve the integrity of the silicon nitride spacer structure. Thereafter, the sacrificial carbon... Agent:
20110104864 - Method of fabricating semiconductor device: A method of fabricating a complementary metal oxide semiconductor (CMOS) device is provided. A first conductive type MOS transistor including a source/drain region using a semiconductor compound as major material is formed in a first region of a substrate. A second conductive type MOS transistor is formed in a second... Agent:
20110104865 - Method of fabricating a semiconductor device: A semiconductor device includes: a transistor including source and drain diffusion-layers, a gate insulating film and a gate electrode; first and second plugs formed in a first interlayer-insulating film and connected to the source and drain diffusion-layers, respectively; a third plug extending through a second interlayer-insulating film and connected to... Agent: Elpida Memory, Inc.
20110104866 - Enhanced adhesion of pecvd carbon on dielectric materials by providing an adhesion interface: Amorphous carbon material may be deposited with superior adhesion on dielectric materials, such as TEOS based silicon oxide materials, in complex semiconductor devices by applying a plasma treatment, such as an argon treatment and/or forming a thin adhesion layer based on silicon dioxide, carbon-doped silicon dioxide, prior to depositing the... Agent:
20110104867 - Fabricating vias of different size of a semiconductor device by splitting the via patterning process: When forming a complex metallization system in which vias of different lateral size have to be provided, a split patterning sequence may be applied. For this purpose, a lithography process may be specifically designed for the critical via openings and a subsequent second patterning process may be applied for forming... Agent:
20110104868 - Method of forming semiconductor device: A method of forming a semiconductor device include the following processes. A groove is formed in a semiconductor substrate. A first insulating film is formed on a bottom surface of the groove and a second insulating film on a side surface of the groove. The second insulating film is thinner... Agent: Elpida Memory, Inc.
20110104869 - Three-dimensional semiconductor memory device and method of fabricating the same: An embodiment is directed to a method of fabricating a semiconductor memory device, the method including preparing a substrate having a cell array region and a contact region, forming a thin film structure on the substrate, including forming sacrificial film patterns isolated horizontally by a lower isolation region, the lower... Agent:
20110104871 - Method for manufacturing bonded substrate: Provided is a method for manufacturing a bonded wafer with a good thin film over the entire substrate surface, especially in the vicinity of the lamination terminal point. The method for manufacturing a bonded wafer comprises at least the following steps of: forming an ion-implanted region by implanting a hydrogen... Agent: Shin-etsu Chemical Co., Ltd.
20110104870 - Method for manufacturing bonded wafer: A method for manufacturing a bonded wafer, including at least implanting at least one type of gas ion selected from a hydrogen ion and a rare gas ion from a surface of a bond wafer to form an ion-implanted layer in the wafer, bonding an ion-implanted surface of the bond... Agent: Shin-etsu Handotai Co., Ltd.
20110104872 - Method of manufacturing a semiconductor device having a heat spreader: A semiconductor device manufacturing method includes cutting a resin sealing body into a plurality of pieces, in which the resin sealing body includes a plurality of semiconductor chips mounted on a wiring board, a heat spreader disposed above the plurality of the semiconductor chips, and a sealing resin filled between... Agent: Renesas Electronics Corporation
20110104873 - Dicing/die bonding film: Provided is a dicing die-bonding film which is excellent in balance between retention of a semiconductor wafer upon dicing and releasability upon picking up. Disclosed is a dicing die-bonding film comprising a dicing film having a pressure-sensitive adhesive layer on a substrate material, and a die-bonding film formed on the... Agent: Nitto Denko Corporation
20110104874 - Energy ray-curable polymer, an energy ray-curable adhesive composition, an adhesive sheet and a processing method of a semiconductor wafer: In a pressure-sensitive adhesive composition or a pressure-sensitive adhesive sheet containing an energy ray-curable polymer, problems associated with the volatilization of a low molecular weight compound contained in the composition are overcome. An energy ray-curable polymer characterized by comprising a radical generating group, which is capable of initiating a polymerization... Agent: Lintec Corporation
20110104876 - Atmospheric pressure chemical vapor deposition method for producing a n-semiconductive metal sulfide thin layer: An atmospheric pressure chemical vapor deposition method for producing an N-type semiconductive metal sulfide thin film on a heated substrate includes converting an indium-containing precursor to at least one of a liquid phase and a gaseous phase. The indium-containing precursor is mixed with an inert carrier gas stream and hydrogen... Agent: Helmholtz-zentrum Berlin Fuer Materialien Und Energie Gmbh
20110104877 - Compositions and methods for forming a semiconducting and/or silicon-containing film, and structures formed therefrom: Compositions, inks and methods for forming a patterned silicon-containing film and patterned structures including such a film. The composition generally includes (a) passivated semiconductor nanoparticles and (b) first and second cyclic Group IVA compounds in which the cyclic species predominantly contains Si and/or Ge atoms. The ink generally includes the... Agent:
20110104875 - Selective silicon etch process: A process for etching a silicon layer disposed on a substrate, including anisotropically etching a first trench in the silicon layer; selectively anisotropic wet etching silicon surfaces in the first trench, the wet etching comprising exposing the silicon surfaces to an aqueous composition including an aromatic tri(lower)alkyl quaternary onium hydroxide,... Agent:
20110104878 - Semiconductor device comprising nmos and pmos transistors with embedded si/ge material for creating tensile and compressive strain: By forming a substantially continuous and uniform semiconductor alloy in one active region while patterning the semiconductor alloy in a second active region so as to provide a base semiconductor material in a central portion thereof, different types of strain may be induced, while, after providing a corresponding cover layer... Agent: Advanced Micro Devices, Inc.
20110104879 - Method of manufacturing semiconductor device and substrate processing apparatus: Provided are a method of manufacturing a semiconductor device and a substrate processing apparatus, which can improve the surface roughness of an amorphous silicon film. The method of manufacturing a semiconductor device comprises: in a process of forming an amorphous silicon film on a substrate, setting, in an initial stage... Agent: Hitachi-kokusai Electric Inc.
20110104880 - Corner rounding in a replacement gate approach based on a sacrificial fill material applied prior to work function metal deposition: In a replacement gate approach, a top area of a gate opening has a superior cross-sectional shape which is accomplished on the basis of a plasma assisted etch process or an ion sputter process. During the process, a sacrificial fill material protects sensitive materials, such as a high-k dielectric material... Agent:
20110104882 - Method for processing semiconductor device: The present invention relates to a method for processing semiconductor devices with a fine structure, and more particularly, to a processing method suitable for miniaturizing semiconductor devices with a so-called high-k/metal gate structure. In an embodiment of the present invention, a deposited film, which includes an insulating film made of... Agent: Hitachi High-technologies Corporation
20110104881 - Method of reducing wordline shorting: A method of fabricating a memory device includes providing a substrate having an insulating layer, forming first, second, and third conductive layers on the insulating layer, forming a mask on the third conductive layer, etching through the third conductive layer and a first portion thickness of the second conductive layer... Agent: Macronix International Co., Ltd.
20110104883 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes forming a gate insulating film on a semiconductor substrate, forming a first conductive layer on the gate insulating film, forming an intergate insulating film on the first conductive layer, forming a second conductive layer on the intergate insulating film, dividing the conductive... Agent: Kabushiki Kaisha Toshiba
20110104884 - Hot edge ring with sloped upper surface: A hot edge ring with extended lifetime comprises an annular body having a sloped upper surface. The hot edge ring includes a step underlying an outer edge of a semiconductor substrate supported in a plasma processing chamber wherein plasma is used to process the substrate. The step includes a vertical... Agent: Lam Research Corporation
20110104885 - Method for treating a metal oxide layer: The invention relates to a method for treating a metal oxide layer deposited on a substrate. The method comprises the step of applying a substantially atmospheric plasma process at a relatively low temperature. Preferably, the temperature during the plasma process is lower than approximately 180° C. Further, the atmospheric plasma... Agent: Nederlandse Organisatie Voor Toegepastnatuurwetenschappelijk Onderzoek Tno
20110104886 - Manufacturing method of semiconductor package: A manufacturing method includes forming a semi-cured insulation layer made of a photosensitive material on a supporting body; forming an opening part in the insulation layer by a photolithography method, the opening part being configured to expose the supporting body; arranging a semiconductor chip on the insulation layer so that... Agent: Shinko Electric Industries Co., Ltd.
20110104887 - Semiconductor element and method of manufacturing the same: A method of manufacturing a semiconductor element including a semiconductor substrate, a conductive post portion provided on the semiconductor substrate to protrude therefrom, and a solder layer provided on the conductive post portion, includes forming on the semiconductor substrate the conductive post portion having a distal end surface curved in... Agent: Renesas Electronics Corporation
20110104889 - Methods of forming integrated circuit devices using contact hole spacers to improve contact isolation: Methods of forming integrated circuit devices include upper sidewall spacers in contact holes to provide enhanced electrical isolation to contact plugs therein while maintaining relatively low contact resistance. These methods include forming an interlayer insulating layer on a semiconductor substrate. The interlayer insulating layer includes at least a first electrically... Agent:
20110104888 - Semiconductor devices having redistribution structures and packages, and methods of forming the same: Semiconductor devices and methods of forming the same, including forming a chip pad on a chip substrate, forming a passivation layer on the chip pad and the chip substrate, forming a first insulation layer on the passivation layer, forming a recess and a first opening in the first insulation layer,... Agent: Samsung Electronics Co., Ltd.
20110104890 - Method for forming cu electrical interconnection film: Provided is a Cu electrical interconnection film forming method, wherein an adhesive layer (base film) having improved adhesiveness with a Cu electrical interconnection film is used, in a semiconductor device manufacturing process. After forming a barrier film on a substrate whereupon a hole or the like is formed, a PVD-Co... Agent: Ulvac, Inc
20110104891 - Methods and apparatus of creating airgap in dielectric layers for the reduction of rc delay: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing... Agent:
20110104892 - Etching method and manufacturing method of semiconductor device: The present invention discloses technique of etching selectively a layer containing siloxane. The present invention provides a semiconductor device with reduced operation deterioration due to etching failure. A method for manufacturing a semiconductor device comprises steps of forming a conductive layer electrically connecting to a transistor, an insulating layer covering... Agent: Semiconductor Energy Laboratory Co., Ltd.
20110104893 - Method for fabricating mos transistor: A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a gate and a source/drain region thereon; forming a Ni—Pt layer on surface of the gate and the source/drain region; performing a first rapid thermal process to react a... Agent:
20110104894 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes etching a semiconductor substrate using a hard mask layer as a barrier to form a trench defining a plurality of active regions, forming a gap-fill layer to gap-fill a portion of the inside of the trench so that the hard mask layer... Agent:
20110104895 - Method for forming a plug structure: A method for forming a plug structure includes the following steps. A substrate is provided. The substrate includes a MOS device with a source/drain region, a dielectric layer disposed on the MOS device, an opening defined in the dielectric layer, and a first glue layer disposed on a sidewall and... Agent:
20110104896 - Method of manufacturing semiconductor device and substrate processing apparatus: There are provided a method of manufacturing a semiconductor device and a substrate processing apparatus, which are designed to prevent deterioration of the surface morphology of a Ni-containing film caused by dependence on an under layer, and to form a continuous film in a thin-film region. The method includes: loading... Agent: Hitachi Kokusai Electric, Inc.
20110104897 - Contact clean by remote plasma and repair of silicide surface: Embodiments provide methods for treating a metal silicide contact which includes positioning a substrate having an oxide layer disposed on a metal silicide contact surface within a processing chamber, cleaning the metal silicide contact surface to remove the oxide layer while forming a cleaned silicide contact surface during a cleaning... Agent:
20110104898 - Method of forming semiconductor device: A method of forming a semiconductor device comprises forming a mask pattern over an etch target layer, forming an ion implantation region in the mask pattern through an ion implantation process, and forming an ion non-implantation region within the mask pattern, removing the ion implantation region on a top surface... Agent: Hynix Semiconductor Inc.
20110104899 - Sub-lithographic printing method: A trench structure and an integrated circuit comprising sub-lithographic trench structures in a substrate. In one embodiment the trench structure is created by forming sets of trenches with a lithographic mask and filling the sets of trenches with sets of step spacer blocks comprising two alternating spacer materials which are... Agent: International Business Machines Corporation
20110104900 - Alkaline rinse agents for use in lithographic patterning: Lithographic patterning methods involve the formation of a (one or more) metal oxide capping layer, which is rinsed with an aqueous alkaline solution as part of the method. The rinse solution does not damage the capping layer, but rather allows for lithographic processing without thinning the capping layer or introducing... Agent: International Business Machines Corporation
20110104901 - Semiconductor device manufacturing method: A semiconductor device manufacturing method includes a process of forming a first organic film pattern on a to-be-etched layer on a substrate, a process of forming a silicon oxide film coating the first organic film pattern in an isotropic manner, a process of etching the silicon oxide film to form... Agent: Tokyo Electron Limited
20110104902 - Plasma processing apparatus and plasma processing method: A plasma processing apparatus includes a processing chamber including a dielectric window; a coil shaped RF antenna provided outside the dielectric window; a substrate supporting unit, provided in the processing chamber, for mounting thereon a target substrate to be processed; a processing gas supply unit for supplying a desired processing... Agent: Tokyo Electron Limited
20110104903 - Manufacturing apparatus and method for semiconductor device: A manufacturing apparatus for a semiconductor device, comprising: a chamber configured to process a wafer; a wafer stage installed in the chamber and formed with a plurality of holes for supplying gas to a rear surface of the wafer; a gas detection mechanism configured to detect an amount of gas... Agent: Kabushiki Kaisha Toshiba
20110104905 - Etching composition, in particular for strained or stressed silicon materials, method for characterizing defects on surfaces of such materials and process of treating such surfaces with the etching composition: The present invention provides a chromium-free etching composition suitable for treating various silicon-containing surfaces, including strained silicon on insulator surfaces as well as stressed silicon surfaces. The novel and inventive etching composition in accordance with the present invention includes hydrofluoric acid, nitric acid, acetic acid and an alkali iodide, preferably... Agent: S.o.i. Tec Silicon On Insulator Technolgies
20110104904 - Method of processing silicon wafer: A method of processing a silicon wafer including sequentially carrying out the steps of (1) preparing a lapped semiconductor silicon wafer, (2) cleaning the wafer with a surfactant, (3) cleaning the wafer with alkali or acid, and (4) etching the wafer with high-purity sodium hydroxide.... Agent: Siltronic Ag
20110104906 - Method of growing oxide thin films: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least... Agent: Asm International N.v.
20110104907 - Methods of forming a metal silicate layer and methods of fabricating a semiconductor device including the metal silicate layer: Methods of forming a metal silicate layer and methods of fabricating a semiconductor device including the metal silicate layer are provided, the methods of forming the metal silicate layer include forming the metal silicate using a plurality of silicon precursors. The silicon precursors are homoleptic silicon precursors in which ligands... Agent:
20110104908 - Laser mask and crystallization method using the same: A crystallization method using a mask includes providing a substrate having a semiconductor layer; positioning a mask over the substrate, the mask having first, second and third blocks, each block having a periodic pattern including a plurality of transmitting regions and a blocking region, the periodic pattern of the first... Agent:Previous industry: Chemistry: analytical and immunological testing
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