|Semiconductor device manufacturing: process patents - Monitor Patents|
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Semiconductor device manufacturing: process March listing by industry category 03/10Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 03/25/2010 > patent applications in patent subcategories. listing by industry category
20100075442 - Semiconductor wafer processing apparatus, reference angular position detection method, and semiconductor wafer: [Means for Solving Problems] A semiconductor wafer (100) is formed at part of an outer circumference edge part (101) with a crystal orientation detection flat surface (102) vertical to the diametrical direction at a position forming a predetermined angle with the crystal orientation. The semiconductor wafer processing apparatus successively captures... Agent: Kratz, Quintos & Hanson, LLP
20100075443 - Template inspection method and manufacturing method for semiconductor device: A template inspection method for performing defect inspection of a template, by bringing a pattern formation surface of a template used to form a pattern close to a first fluid coated on a flat substrate, filling the first fluid into a pattern of the template, and by performing optical observation... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100075444 - Method of manufacturing semiconductor chip and semiconductor module: An FOM (figure of merit) enabling evaluation from a cost aspect, as well as evaluation of electrical performance, is newly proposed to provide a method of manufacturing based on the FOM a semiconductor chip intended for a lower cost production in addition to satisfying electrical performance. An FOMC of a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100075445 - Silicon microchannel plate devices with smooth pores and precise dimensions: A method of fabricating a microchannel plate includes forming a plurality of pores in a silicon substrate. The plurality of pores is oxidized, thereby consuming silicon at surfaces of the plurality of pores and forming a silicon dioxide layer over the plurality of pores. At least a portion of the... Agent: Rauschenbach Patent Law Group, LLC
20100075446 - Method of forming assymetrical encapsulant bead: A method of forming an asymmetrical encapsulant bead on a series of wire bonds electrically connecting a micro-electronic device to a series of conductors, the micro-electronic device having a planar active surface. The method has the steps of positioning the die and the wire bonds beneath an encapsulant jetter that... Agent: Silverbrook Research Pty Ltd
20100075447 - Method of manufacturing a flexible device and method of manufacturing a flexible display: Provided are a method of separating a metal layer and an organic light emitting diode. A method of manufacturing a flexible device and a method of manufacturing a flexible display include forming a releasing layer on a substrate, forming a metal layer on the releasing layer, forming an insulating layer... Agent: Hosoon Lee
20100075448 - Method of making a semiconductor chip assembly with a post/base/cap heat spreader: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then... Agent: David M. Sigmond
20100075450 - Method for manufacturing array substrate of liquid crystal display: A method for manufacturing an array substrate of liquid crystal display comprising the following steps: providing a substrate having gate lines, a gate insulating layer and an active layer pattern formed thereon in this order; depositing a first transparent conductive layer and a source/drain metal layer in this order on... Agent: Ladas & Parry LLP
20100075449 - Method of forming amorphous silicon layer and method of fabricating lcd using the same: Methods and systems for forming an amorphous silicon layer are disclosed for one or more embodiments. For example, a substrate may be provided, and an amorphous silicon layer, in which a ratio of Si—H to Si—H2 has a value equal to or less than 4 to 1, may be formed... Agent: Haynes And Boone, LLPIPSection
20100075451 - Method for manufacturing a thin film structure: The present invention discloses a method for manufacturing thin film structure, which comprises the following steps: providing a substrate having a first recess and a second recess formed therein with the first recess being deeper than the second recess; depositing a first material layer and a second material layer of... Agent: Ladas & Parry LLP
20100075452 - Semiconductor light emitting diode having high efficiency and method of manufacturing the same: Provided is a semiconductor light emitting diode having a textured structure formed on a substrate. In a method of manufacturing the semiconductor light emitting diode, a metal layer is formed on the substrate, and a metal oxide layer having holes is formed by anodizing the metal layer. The metal oxide... Agent: Buchanan, Ingersoll & Rooney PC
20100075453 - System architecture and method for solar panel formation: A method and apparatus for forming solar panels from n-doped silicon, p-doped silicon, intrinsic amorphous silicon, and intrinsic microcrystalline silicon using a cluster tool is disclosed. The cluster tool comprises at least one load lock chamber and at least one transfer chamber. When multiple clusters are used, at least one... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100075454 - Solid-state image pickup device and method for producing the same: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation... Agent: Robert J. Depke Lewis T. Steadman
20100075455 - Film formation apparatus, method for forming film, and method for manufacturing photoelectric conversion device: The present invention relates to a film formation apparatus including a first transfer chamber having a roller for sending a substrate, a film formation chamber having a discharging electrode, a buffer chamber provided between the transfer chamber and the film formation chamber or between the film formation chambers, a slit... Agent: Nixon Peabody, LLP
20100075456 - Method and system for producing films for devices such as solar cells from semiconductor powders or dust: The present invention relates generally to production of photoelectric grade films or cells from semiconductor powders or dust. In one embodiment, the present invention provides a method for producing a photoelectric grade film from a semiconductor powder. The method includes providing a substrate, coating the substrate with a layer of... Agent: Wall & Tong , LLP
20100075457 - Method of manufacturing stacked-layered thin film solar cell with a light-absorbing layer having band gradient: A method of manufacturing a stacked-layered thin film solar cell with a light-absorbing layer having a band gradient is provided. The stacked-layered thin film solar cell includes a substrate, a back electrode layer, a light-absorbing layer, a buffer layer, a window layer, and a top electrode layer stacked up sequentially.... Agent: Sinorica, LLC
20100075458 - Film deposition of amorphous films with a graded bandgap by electron cyclotron resonance: A method is described of forming a film of an amorphous material on a substrate (14) by deposition from a plasma. The substrate (14) is placed in an enclosure, a film precursor gas is introduced into the enclosure through pipes (20), and unreacted and dissociated gas is extracted from the... Agent: Darby & Darby P.C.
20100075459 - Thermal barrier layer for integrated circuit manufacture: Exemplary embodiments provide methods and systems for assembling electronic devices, such as integrated circuit (IC) chips, by selectively and scalably embedding or seating IC elements onto/into a receiving substrate, such as a chip substrate. Preparing of the chip substrate can be performed by depositing or patterning an activatable thermal barrier... Agent: Eastman Kodak Company Patent Legal Staff
20100075460 - Low cost die-to-wafer alignment/bond for 3d ic stacking: The cost associated with alignment in a stacked IC device can be reduced by aligning multiple die instead of a single die during the alignment step. In one embodiment, the alignment structures are placed in the scribe line instead of within the die itself. Aligning four die instead of one... Agent: Qualcomm Incorporated
20100075461 - Method for transferring chips onto a substrate: e
20100075462 - Method of forming semiconductor package: A method of forming a semiconductor package (10) including forming a plurality of cavities (14) in a substrate (12). An electrically conductive pattern (16) is formed on the substrate (12) and over the cavities (14). An electrically insulating layer (22) is formed over the substrate (12) and the electrically conductive... Agent: Freescale Semiconductor, Inc. Law Department
20100075463 - Method and apparatus for fabricating self-assembling microstructures: A method and apparatus for assembling microstructures onto a substrate through fluid transport. The microstructures being shaped blocks self-align into recessed regions located on a substrate such that the microstructure becomes integral with the substrate. The improved method includes a step of transferring the shaped blocks into a fluid to... Agent: Townsend And Townsend And Crew, LLP
20100075464 - Method of reducing voids in encapsulant: A method of reducing voids within a bead of encapsulant material deposited on a series of wire bonds connecting a micro-electronic device with die contact pads extending along one edge, and a plurality of conductors on a support structure such that the wire bonds extend across a gap defined between... Agent: Silverbrook Research Pty Ltd
20100075466 - Method of forming assymetrical encapsulant bead: A method of forming an asymmetrical encapsulant bead on a series of wire bonds electrically connecting a micro-electronic device to a series of conductors, the micro-electronic device having a planar active surface. The method has the steps of positioning the die and the wire bonds beneath an encapsulant jetter that... Agent: Silverbrook Research Pty Ltd
20100075465 - Method of reducing voids in encapsulant: A method of reducing voids within a bead of encapsulant material deposited on a series of wire bonds connecting a micro-electronic device with die contact pads extending along one edge, and a plurality of conductors on a support structure such that the wire bonds extend across a gap defined between... Agent: Silverbrook Research Pty Ltd
20100075467 - Non-volatile electromechanical field effect devices and circuits using same and methods of forming same: Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each of the source, drain, and gate have a corresponding terminal. An electromechanically-deflectable, nanotube switching element is electrically positioned between one of... Agent: Wilmerhale/boston
20100075468 - Methods, devices and compositions for depositing and orienting nanostructures: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation... Agent: Nanosys Inc.
20100075469 - Method for making thin transistor: A method for making a thin film transistor, the method comprising the steps of: (a) providing a carbon nanotube array and an insulating substrate; (b) pulling out a carbon nanotube film from the carbon nanotube array by using a tool; (c) placing at least one carbon nanotube film on a... Agent: PCe Industry, Inc. Att. Steven Reiss
20100075470 - Method of manufacturing soi substrate: After a single crystal semiconductor layer provided over a base substrate by attaching is irradiated with a laser beam, characteristics thereof are improved by first heat treatment, and after adding an impurity element imparting conductivity to the single crystal semiconductor layer, second heat treatment is performed at lower temperature than... Agent: Eric Robinson
20100075471 - Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation: Embodiments of a manufacturing process for recessed gate devices on silicon-on-insulator (SOI) substrate with self-aligned lateral isolation are described. This allows the creation of true in-pitch recessed gate devices without requiring an extra isolation dimension. A lateral isolation trench is formed between pairs of recessed gate devices by etching the... Agent: Courtney Staniford & Gregory LLP
20100075472 - Tft array substrate and the fabrication method thereof: A TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line crossing the gate line to define a pixel region; a drain electrode which is opposite to the source electrode with a channel in between; a semiconductor layer defining the... Agent: Mckenna Long & Aldridge LLP
20100075473 - Transistor forming methods: A transistor forming method includes forming a dielectric spacer in a trench surrounding an active area island, forming line openings through the spacer, and forming a gate line extending through the line openings, over opposing sidewalls, and over a top of the fin. Source/drain regions are in the fin. Another... Agent: Wells St. John P.s.
20100075475 - Method for producing a thin film transistor and method for forming an electrode: An electrode is prevented from being peeled from a substrate or a silicon layer. After the surface of a first copper thin film composed mainly of copper is treated by exposing it to an ammonia gas, a film of silicon nitride is formed on the surface of the first copper... Agent: Kratz, Quintos & Hanson, LLP
20100075474 - Silicon carbide semiconductor device and method for producing the same: A gate electrode 18 formed on a silicon carbide substrate 11 includes a silicon lower layer 18A and a silicide upper layer 18B provided on the silicon lower layer 18A, the silicide upper layer 18B being made of a compound of a first metal and silicon. A source electrode 1as... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP
20100075476 - Semiconductor device fabrication method: A method of manufacturing a semiconductor device which includes forming first and second gate patterns, forming first and second sidewall spacers on sidewalls of the first and second gate patterns respectively, implanting a first impurity into the semiconductor substrate, forming a third sidewall spacer on the first sidewall spacer and... Agent: Westerman, Hattori, Daniels & Adrian, LLP
20100075477 - Method of manufacturing semiconductor device: An embodiment of the disclosure relates to a method of manufacturing semiconductor devices. According to this embodiment, a tunnel insulating layer, a conductive layer for a floating gate, and a hard mask layer are sequentially formed over a semiconductor substrate. Isolation trenches are formed by etching the hard mask layer,... Agent: Marshall, Gerstein & Borun LLP
20100075478 - Method for photoresist pattern removal: The present disclosure provides a method for making a semiconductor device. The method includes forming a sacrificial layer on a substrate; forming a patterned resist layer on the sacrificial layer; performing an ion implantation to the substrate; applying a first wet etch solution to remove the patterned photoresist layer; and... Agent: Haynes And Boone, LLPIPSection
20100075479 - Semiconductor device and method of forming the same: A method of forming a semiconductor device includes forming a trench on a semiconductor substrate to define an active region, forming a radical oxide layer on a sidewall and a bottom surface of the trench, and forming a nitride layer on the radical oxide layer. The conduction band offset of... Agent: F. Chau & Associates, LLC
20100075480 - Sti stress modulation with additional implantation and natural pad sin mask: A method of manufacturing a semiconductor structure is provided. The method includes forming a hard mask pattern on a semiconductor substrate, wherein the hard mask pattern covers active regions; forming a trench in the semiconductor substrate within an opening defined by the hard mask pattern; filling the trench with a... Agent: Haynes And Boone, LLPIPSection
20100075481 - Method and structure of monolithically integrated ic-mems oscillator using ic foundry-compatible processes: The present invention relates to integrating an inertial mechanical device on top of an IC substrate monolithically using IC-foundry compatible processes. The IC substrate is completed first using standard IC processes. A thick silicon layer is added on top of the IC substrate. A subsequent patterning step defines a mechanical... Agent: Townsend And Townsend And Crew, LLP
20100075482 - Bonded wafer assembly system and method: A system and method for the removal of superfluous material in a bonded wafer assembly. The method includes cutting a plurality of parallel cuts in a top wafer, the plurality of cuts defining a segment of the top wafer attached to another portion of the top wafer via a tab,... Agent: Texas Instruments Incorporated
20100075483 - Method for manufacturing nitride semiconductor device: A method for manufacturing a nitride semiconductor device, includes forming a p-type nitride semiconductor layer on a substrate, from an organic metal compound as a group III element source material, ammonia and a hydrazine derivative as group V element source materials, and a Mg source material gas as a p-type... Agent: Leydig Voit & Mayer, Ltd
20100075484 - Soi device with contact trenches formed during epitaxial growing: A method for manufacturing an integrated electronic device. The method includes providing an SOI substrate having a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor starting layer on the insulating layer; epitaxially growing the starting layer to obtain a semiconductor active layer on the insulating layer... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.
20100075485 - Integrated emitter formation and passivation: Embodiments of the present invention provide a method for forming an emitter region in a crystalline silicon substrate and passivating the surface thereof by depositing a doped amorphous silicon layer onto the crystalline silicon substrate and thermally annealing the crystalline silicon substrate while oxidizing the surface thereof. In one embodiment,... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100075486 - Formation of single crystal semiconductor nanowires: A method is provided for growing mono-crystalline nanostructures onto a substrate. The method comprises at least the steps of first providing a pattern onto a main surface of the substrate wherein said pattern has openings extending to the surface of the substrate, providing a metal into the openings of the... Agent: Knobbe Martens Olson & Bear LLP
20100075487 - Crystallization method: m
20100075488 - Cvd reactor with multiple processing levels and dual-axis motorized lift mechanism: An apparatus for processing a substrate, comprising a processing chamber and a substrate support and lift pin assembly disposed within the chamber. The substrate support and lift pin assembly are coupled to a lift mechanism that controls positioning of the substrate support and the lift pins and provides rotation for... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100075489 - Method for producing semiconductor device and semiconductor producing apparatus: A plasma of a gas containing an impurity is produced through a discharge in a vacuum chamber, and a plurality of substrates are successively doped with the impurity by using the plasma, wherein a plasma doping condition of a subject substrate is adjusted based on an accumulated discharge time until... Agent: Mcdermott Will & Emery LLP
20100075490 - Defect-free junction formation using laser melt annealing of octadecaborane self-amorphizing implants: A method and apparatus for implanting a semiconductor substrate with boron clusters. A substrate is implanted with octadecaborane by plasma immersion or ion beam implantation. The substrate surface is then melted, resolidified, and annealed to completely dissociate and activate the boron clusters.... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100075491 - Dry etching method of silicon compound film: A silicon compound film is dry etched by parallel-plate type dry etching using an etching gas including at least COF2.... Agent: Frishauf, Holtz, Goodman & Chick, PC
20100075492 - Nonvolatile semiconductor memory and method of fabrication thereof: A method of fabricating a semiconductor memory having word lines and bit lines disposed on a semiconductor substrate, with memory cells being formed at intersecting portions of the word lines and the bit lines. The method includes forming a first insulating film on the semiconductor substrate, forming a first polysilicon... Agent: Rabin & Berdo, PC
20100075493 - Method of forming electrode connecting portion: A manufacturing method for an electrode connecting portion includes covering an electrode forming surface with a solder sheet, rolling a heating roller on the solder sheet that covers the electrode forming surface, and removing the solder sheet after the heating roller has passed over the solder sheet.... Agent: Westerman, Hattori, Daniels & Adrian, LLP
20100075494 - Integration of ald tantalum nitride for copper metallization: A method and apparatus for depositing a tantalum nitride barrier layer is provided for use in an integrated processing tool. The tantalum nitride is deposited by atomic layer deposition. The tantalum nitride is removed from the bottom of features in dielectric layers to reveal the conductive material under the deposited... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100075495 - Method of selectively plating without plating lines: A method of selectively plating without plating lines is provided. The method employs a loading plate having a metalized temporary conductive layer. The loading plate and the temporary conductive layer are adapted for transmitting a plating current. A patterning photoresist layer is accorded for selectively and sequentially plating a separating... Agent: Lin & Associates Intellectual Property, Inc.
20100075496 - Surface preparation process for damascene copper deposition: A method is disclosed for metallizing a substrate comprising an interconnect feature in the manufacture of a microelectronic device, wherein the interconnect feature comprises a bottom, a sidewall, and a top opening having a diameter, D. The method comprises the following steps: depositing a barrier layer on the bottom and... Agent: Senniger Powers LLP
20100075497 - Non-plating line plating method using current transmitted from ball side: A non-plating line (NPL) plating method is provided. The NPL plating method is featured in that at first it forms a circuit layer on a bump side only, and therefore a plating current can be transmitted via a plating metal layer on a ball side to the circuit layer (enclosed... Agent: Lin & Associates Intellectual Property, Inc.
20100075498 - Semiconductor device and method for manufacturing the same, and processing liquid: A semiconductor device has interconnects protected with an alloy film having a minimum thickness necessary for producing the effect of preventing diffusion of oxygen, copper, etc., formed more uniformly over an entire surface of a substrate with less dependency to the interconnect pattern of the substrate. The semiconductor device includes,... Agent: Wenderoth, Lind & Ponack, L.L.P.
20100075499 - Method and apparatus for metal silicide formation: Embodiments described herein include methods of forming metal silicide layers using a diffusionless annealing process. In one embodiment a method for forming a metal silicide material on a substrate is provided. The method comprises depositing a metal material over a silicon containing surface of a substrate, depositing a metal nitride... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100075500 - Metal polishing slurry and chemical mechanical polishing method: The invention provides a metal polishing slurry containing a compound represented by the general formula (1): (X1)n-L wherein X1 represents a heterocycle containing at least one nitrogen atom, n represents an integer of 2 or more, and L represents a linking group having a valence of 2 or more, provided... Agent: Akerman Senterfitt
20100075502 - Barrier slurry for low-k dielectrics: The invention provides a chemical-mechanical polishing composition for polishing a substrate. The polishing composition comprises silica, a compound selected from the group consisting of an amine-substituted silane, a tetraalkylammonium salt, a tetraalkylphosphonium salt, and an imidazolium salt, a carboxylic acid having seven or more carbon atoms, an oxidizing agent that... Agent: Steven Weseman Associate General Counsel, I.p.
20100075501 - Chemical mechanical polishing aqueous dispersion and chemical mechanical polishing method: A chemical mechanical polishing aqueous dispersion is used to polish a polishing target that includes an interconnect layer that contains tungsten. The chemical mechanical polishing aqueous dispersion includes: (A) a cationic water-soluble polymer; (B) an iron (III) compound; and (C) colloidal silica particles. The content (MA) (mass %) of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100075503 - Integral patterning of large features along with array using spacer mask patterning process flow: Embodiments of the present invention pertain to methods of forming patterned features on a substrate having an increased density (i.e. reduced pitch) as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask while also allowing both the width of the patterned features and spacing... Agent: Townsend And Townsend And Crew LLP
20100075504 - Method of treating a semiconductor substrate: A method of treating a semiconductor substrate has forming convex patterns over the semiconductor substrate by dry etching, cleaning and modifying a surface of the convex patterns by using chemical, forming a hydrophobic functional surface on the modified surface of the convex patterns, after forming the hydrophobic functional surface, rinsing... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100075505 - Plasma processing apparatus and methods for removing extraneous material from selected areas on a substrate: Apparatus and methods for shielding a feature projecting from a first area on a substrate to a plasma while simultaneously removing extraneous material from a different area on the substrate with the plasma. The apparatus includes at least one concavity positioned and dimensioned to receive the feature such that the... Agent: Wood, Herron & Evans, LLP (nordson)
20100075506 - Apparatus and method for manufacturing semiconductor element and semiconductor element manufactured by the method: An apparatus for manufacturing a semiconductor element includes processing chambers arranged to accommodate a flexible substrate which is step-transferred by one effective region each time; a first electrode and a second electrode which are provided in the processing chamber; and a mask portion having an opening so as to expose... Agent: Sharp Kabushiki Kaisha C/o Keating & Bennett, LLP
20100075507 - Method of fabricating a gate dielectric for high-k metal gate devices: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a substrate, forming an interfacial layer on the substrate by treating the substrate with radicals, and forming a high-k dielectric layer on the interfacial layer. The radicals are selected from the group consisting of hydrous... Agent: Haynes And Boone, LLPIPSection
20100075508 - Method of fabricating a semiconductor device: A dielectric insulating film including HfO or the like is formed by: cleaning a surface of a semiconductor substrate by exposing the substrate surface to a fluorine radical; performing hydrogen termination processing with a fluorine radical or a hydride (SiH4 or the like); sputtering HE or the like; and then... Agent: Fitzpatrick Cella Harper & Scinto
20100075509 - Manufacturing method and manufacturing apparatus for semiconductor device: A manufacturing method for a semiconductor device, including: loading a wafer into a reaction chamber; placing the wafer on a push-up shaft moved up; preheating the wafer under controlling an in-plane temperature distribution of the wafer to be a recess state under a state of placing the wafer on the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100075510 - Method for pulsed plasma deposition of titanium dioxide film: A method for pulsed plasma deposition of titanium dioxide film is revealed. The method includes the steps of: (1) set a substrate into a chamber and the chamber is pumped down to a certain vacuum level. (2) Introduce titanium tetraisopropoxide gas and gas containing oxygen into the chamber and a... Agent: Sinorica, LLC03/18/2010 > patent applications in patent subcategories. listing by industry category
20100068829 - Manufacture method for semiconductor device capable of preventing reduction of ferroelectric film: A ferroelectric capacitor is formed on a semiconductor substrate, the ferroelectric capacitor comprising a lower electrode, a ferroelectric film and an upper electrode stacked in an order recited. A first capacitor protective film of aluminum oxide having a thickness equal to or thicker than 30 nm is formed covering the... Agent: Westerman, Hattori, Daniels & Adrian, LLP
20100068828 - Method of forming a structure having a giant resistance anisotropy or low-k dielectric: A method is provided involving the growth of carbon nanotubes to provide giant resistance anisotropy or a low-k dielectric. The method comprises growing a plurality of one-dimensional nanostructures (18) orthogonal to a first conductive layer (14). A dielectric material (22, 32, 60) is formed covering the plurality of one-dimensional nanostructures... Agent: Motorola, Inc.
20100068830 - Marker structure and method for controlling alignment of layers of a multi-layered substrate: The invention includes a lithographic system having a first source for generating radiation with a first wavelength and an alignment system with a second source for generating radiation with a second wavelength. The second wavelength is larger than the first wavelength. A marker structure is provided having a first layer... Agent: Pillsbury Winthrop Shaw Pittman, LLP
20100068831 - Method for wafer trimming for increased device yield: According to an exemplary embodiment, a method for site-specific trimming of a wafer to provide a target parameter value for a plurality of devices on the wafer includes performing a first measurement of a parameter at a subset of the number of devices on the wafer. The method further includes... Agent: Kathy Manke Avago Technologies Limited
20100068834 - Damage evaluation method of compound semiconductor member, production method of compound semiconductor member, gallium nitride compound semiconductor member, and gallium nitride compound semiconductor membrane: A method of evaluating damage of a compound semiconductor member, comprising: a step of performing spectroscopic ellipsometry measurement on a surface of the compound semiconductor member; and a step of evaluating damage on the surface of the compound semiconductor member, using a spectrum in a wavelength band containing a wavelength... Agent: Mcdermott Will & Emery LLP
20100068832 - Method for the protection of information in multi-project wafers: A method for the protection of the information in a multi-project wafer (MPW) is provided. First, a substrate is provided. There are a first die and a second die on the substrate. Second, a first wafer process is performed on the substrate. The first wafer process includes performing a wafer... Agent: North America Intellectual Property Corporation
20100068833 - System of testing semiconductor devices, a method for testing semiconductor devices, and a method for manufacturing semiconductor devices: A system of testing semiconductor devices includes a classification module configured to classify a plurality of lots into a plurality of groups; an apparatus assignment module configured to assign a plurality of testing apparatuses to each of the groups; and a test recipe creation module configured to create a test... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100068836 - Method of measuring resistivity of sidewall of contact hole: A method of measuring a resistivity of a sidewall of a contact hole formed in a semiconductor device, wherein said semiconductor device includes a first electrode formed on a substrate; a second electrode formed on the first electrode with an insulating film in between; a resist pattern formed on the... Agent: Kubotera & Associates, LLC
20100068837 - Structures and methods for wafer packages, and probes: This document describes the fabrication and use of multilayer ceramic substrates, having one or more levels of internal thick film metal conductor patterns, wherein any or all of the metal vias intersecting one or both of the major surface planes of the substrates, extend out of the surface to be... Agent: Tue Nguyen
20100068835 - Thin film scribe process: A method and apparatus for improving a thin film scribing procedure is presented. Embodiments of the invention include a method and apparatus for determining a scribe setting for removal of an absorber layer of a photovoltaic device that improves contact resistance between a back contact layer and a front contact... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100068838 - Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system: The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes forming at least one first conductor coupled to a base; coupling a plurality of substantially spherical substrate... Agent: Gamburd Law Group LLC
20100068839 - Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system: The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes forming at least one first conductor coupled to a base; coupling a plurality of substrate particles to... Agent: Gamburd Law Group LLC
20100068840 - Organic light emitting apparatus and method of producing the same: Provided are an organic light emitting apparatus for use in, for example, a flat device display, and a method of producing the apparatus. The organic light emitting apparatus has sides formed by division at ends of its substrate. Three-dimensional portions are formed on the surface of the substrate along the... Agent: Fitzpatrick Cella Harper & Scinto
20100068841 - Thin film transistor array panel and method of manufacturing the same: A method of manufacturing a thin film transistor array panel is provided, which includes: forming a semiconductor layer of polysilicon on an insulating substrate; forming a gate insulating layer on the semiconductor layer; forming a gate electrode on the gate insulating layer; forming a source region and a drain region... Agent: Innovation Counsel LLP
20100068842 - Long-wavelength resonant-cavity light-emitting diode: An efficient long-wavelength light-emitting diode has a resonant-cavity design. The light-emitting diode preferably has self-organized (In,Ga)As or (In,Ga)(As,N) quantum dots in the light-emitting active region, deposited on a GaAs substrate. The light-emitting diode is capable of emitting in a long-wavelength spectral range of preferably 1.15-1.35 μm. The light-emitting diode also... Agent: Brown & Michaels, PC 400 M & T Bank Building
20100068843 - Distributed bragg's reflector of digital-alloy multinary compound semiconductor: There is provided a distributed Bragg's reflector (DBR) comprising a substrate and an unit distributed Bragg's reflector (DBR) layer, wherein a multi-layer is laminated on the substrate. The unit DBR layer is composed of a multi-layer laminated structure of unit digital-alloy multinary compound semiconductor layer/multinary compound semiconductor layer or unit... Agent: Jones Day
20100068844 - Microcap wafer bonding method and apparatus: A method of fabricating an apparatus including a sealed cavity and an apparatus embodying the method are disclosed. To fabricate the apparatus, a device chip including a substrate and at least one circuit element on the substrate is fabricated. Also, a cap is fabricated. Next, the device chip and the... Agent: Kathy Manke Avago Technologies Limited
20100068845 - Photodetector using nanoparticles: The present invention relates to a photodetector using nanoparticles, and more particularly, to a novel photodetector wherein surfaces of nanoparticles synthesized by a wet colloidal process are capped with organic materials which then serve as channels for electron migration, or nanoparticles, from which organic materials capped on the surfaces of... Agent: Cantor Colburn, LLP
20100068846 - Package structure and fabrication method thereof: A package structure and fabrication method thereof. The structure includes a substrate having a terminal, a chip overlying the substrate, the chip having an active surface, having a center region and periphery region, the periphery region having an electrode thereon, a patterned cover plate overlying the chip and exposing the... Agent: Birch Stewart Kolasch & Birch
20100068847 - Method for manufacturing an image sensor: A method for fabricating an image sensor die includes providing a wafer having a plurality of die, each die having a raised portion adjacent to an image area onto which a glass cover will be adhered; and thereafter dicing the wafer so that the plurality of die are separated into... Agent: Peter P. Hernandez Patent Legal Staff
20100068848 - One-step diffusion method for fabricating a differential doped solar cell: A one-step diffusion method for fabricating a differential doped solar cell is described. The one-step diffusion method includes the following step. First, a substrate is provided. A doping control layer is formed on the substrate. The doping control layer includes a plurality of openings therein. A doping process is conducted... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20100068849 - Manufacturing method of translucent solar cell: A translucent solar cell and a manufacturing method thereof are provided. The translucent solar cell at least includes a substrate, a front electrode layer, a photoconductive layer, and a back electrode layer stacked in order. Therein, a plurality of apertures are formed on the front electrode layer. In addition, a... Agent: Sinorica, LLC
20100068851 - Castellation wafer level packaging of integrated circuit chips: Systems and methods for packaging integrated circuit chips in castellation wafer level packaging are provided. The active circuit areas of the chips are coupled to castellation blocks and, depending on the embodiment, input/output pads. The castellation blocks and input/output pads are encapsulated and held in place by an encapsulant. When... Agent: Ropes & Gray LLP
20100068850 - Semiconductor device and a method of manufacturing the same: A technique for mounting two semiconductor chips over a wiring substrate including mounting a first chip having first bonding pads over a surface of the wiring substrate having electrodes and stacking the second chip having second bonding pads over the first chip; connecting each of the first bonding pads to... Agent: Antonelli, Terry, Stout & Kraus, LLP
20100068852 - Method of manufacturing a semiconductor device: The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural leads having respective to-be-connected surfaces exposed to outer... Agent: Miles & Stockbridge PC
20100068853 - Method of manufacturing semiconductor device: In a method of manufacturing a semiconductor device, a substrate having first electrodes on a main surface thereof and a semiconductor chip having second electrodes on a first main surface thereof are arranged such that the main surface of the substrate and the first main surface of the semiconductor chip... Agent: Sughrue Mion, PLLC
20100068854 - Mems switch capping and passivation method: A MEMS switch with a platinum-series contact is capped through a process that also passivates the contact by controlling, over time, the amount of oxygen in the environment, pressures and temperatures. Some embodiments passivate a contact in an oxygenated atmosphere at a first temperature and pressure, before hermetically sealing the... Agent: Sunstein Kann Murphy & Timbers LLP
20100068855 - Group iii nitride semiconductor devices with silicon nitride layers and methods of manufacturing such devices: Methods of fabricating transistor in which a first Group III nitride layer is formed on a substrate in a reactor, and a second Group III nitride layer is formed on the first Group III nitride layer. An insulating layer such as, for example, a silicon nitride layer is formed on... Agent: Myers Bigel Sibley & Sajovec, P.A.
20100068857 - Semiconductor device and manufacturing method of same: A semiconductor device in which a channel region of MOS transistor is provided not to include a non-flat active region end portion and a manufacturing method thereof is disclosed. According to one aspect, there is provided a semiconductor device comprising a semiconductor substrate, a device isolation separating active region, wherein... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100068858 - Double gate fet and fabrication process: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material,... Agent: Robert A. Parsons
20100068859 - Method of manufacturing a fet gate: A method of manufacturing a FET gate with a plurality of materials includes depositing a dummy region 8, and then forming a plurality of metallic layers 16, 18, 20 on gate dielectric 6 by conformally depositing a layer of each metallic layer and the anisotropically etching back to leave the... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing
20100068860 - Semiconductor device and method of manufacture thereof: There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped... Agent: Eric Robinson
20100068861 - Method of defining gate structure height for semiconductor devices: Provided is a method of semiconductor fabrication including process steps allowing for defining and/or modifying a gate structure height during the fabrication process. The gate structure height may be modified (e.g., decreased) at one or more stages during the fabrication by etching a portion of a polysilicon layer included in... Agent: Haynes And Boone, LLPIPSection
20100068862 - Semiconductor device having a round-shaped nano-wire transistor channel and method of manufacturing same: A field-effect transistor (FET) with a round-shaped nano-wire channel and a method of manufacturing the FET are provided. According to the method, source and drain regions are formed on a semiconductor substrate. A plurality of preliminary channel regions is coupled between the source and drain regions. The preliminary channel regions... Agent: Mills & Onello LLP
20100068863 - Method of manufacturing a bipolar transistor and bipolar transistor obtained therewith: The invention relates to a method of manufacturing a semiconductor device (10) comprising a substrate (12) and a silicon semiconductor body (11) and comprising a bipolar transistor with an emitter region (1) of a first conductivity type, a base region (2) of a second conductivity type opposite to the first... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing
20100068864 - Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits: Methods for forming multiple inductors on a semiconductor wafer are described. A plating layer and a photoresist layer are applied over a semiconductor wafer. Recess regions are etched in the photoresist layer using photolithographic techniques, which exposes portions of the underlying plating layer. Metal is electroplated into the recess regions... Agent: Beyer Law Group LLP/ Nsc
20100068865 - Method for manufacturing shallow trench isolation layer of semiconductor device: An electrical device, such as a semiconductor device, and methods of manufacturing the same. A semiconductor device having a shallow trench isolation (STI) layer may include a pad oxide layer formed over a semiconductor substrate, a trench formed over the substrate, a liner insulating layer formed over the trench, a... Agent: Sherr & Vaughn, PLLC
20100068866 - Iii-v compound semiconductor epitaxy from a non-iii-v substrate: A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions... Agent: Slater & Matsil, L.L.P.
20100068867 - Method for producing bonded silicon wafer: A bonded silicon wafer is produced by a method comprising an oxygen ion implantation step on a silicon wafer for active layer having the specified wafer face; a step of bonding the silicon wafer for active layer to a silicon wafer for support; a first heat treatment step; an inner... Agent: Christensen, O'connor, Johnson, Kindness, PLLC
20100068868 - Wafer temporary bonding method using silicon direct bonding: A wafer temporary bonding method using silicon direct bonding (SDB) may include preparing a carrier wafer and a device wafer, adjusting roughness of a surface of the carrier wafer, and combining the carrier wafer and the device wafer using the SDB. Because the method uses SDB, instead of an adhesive... Agent: Harness, Dickey & Pierce, P.L.C
20100068870 - High speed thin film deposition via pre-selected intermediate: A method and apparatus for the unusually high rate deposition of thin film materials on a stationary or continuous substrate. The method includes delivery of a pre-selected precursor intermediate to a deposition chamber and formation of a thin film material from the intermediate. The intermediate is formed outside of the... Agent: Kevin L. Bray Ovshinsky Innovation, LLC
20100068871 - Microwave heating for semiconductor nanostructure fabrication: The present invention grows nanostructures using a microwave heating-based sublimation-sandwich SiC polytype growth method comprising: creating a sandwich cell by placing a source wafer parallel to a substrate wafer, leaving a small gap between the source wafer and the substrate wafer; placing a microwave heating head around the sandwich cell... Agent: George Mason University Office Of Technology Transfer, Msn 5g5
20100068872 - Method for fabricating single-crystalline substrate containing gallium nitride: The present invention provides a method for fabricating a single-crystalline substrate containing gallium nitride (GaN) comprising the following steps. First, form a plurality of island containing GaN on a host substrate. Next, use the plurality of islands containing GaN as a mask to etch the substrate and form an uneven... Agent: Sinorica, LLC
20100068873 - Depletion-free mos using atomic-layer doping: A semiconductor device and a method of manufacturing are provided. A dielectric layer is formed over a substrate, and a first silicon-containing layer, undoped, is formed over the dielectric layer. Atomic-layer doping is used to dope the undoped silicon-containing layer. A second silicon-containing layer is formed over first silicon-containing layer.... Agent: Slater & Matsil, L.L.P.
20100068874 - Method for forming a sacrificial sandwich structure: The present disclosure provides a method for making a semiconductor device. The method includes forming a first material layer on a substrate; forming a second material layer on the first material layer; forming a sacrificial layer on the second material layer; forming a patterned resist layer on the sacrificial layer;... Agent: Haynes And Boone, LLPIPSection
20100068875 - Double treatment on hard mask for gate n/p patterning: The present disclosure provides a method that includes providing a semiconductor substrate having a first region and a second region, forming first and second gate stacks over the first and second regions, respectively, the first and second gate stacks each including a dummy gate electrode, removing the dummy gate electrodes... Agent: Haynes And Boone, LLPIPSection
20100068876 - Methods of fabricating high-k metal gate devices: Methods of fabricating semiconductor devices with high-k/metal gate features are disclosed. In some instances, methods of fabricating semiconductor devices with high-k/metal gate features are disclosed that prevent or reduce high-k/metal gate contamination of non-high-k/metal gate wafers and production tools. In some embodiments, the method comprises forming an interfacial layer over... Agent: Haynes And Boone, LLPIPSection
20100068877 - Method for tuning a work function of high-k metal gate devices: The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming first and second transistors in the substrate, the first transistor having a first gate structure that includes a first dummy gate, the second transistor having a second gate structure that includes a... Agent: Haynes And Boone, LLPIPSection
20100068878 - Thin film fuse phase change cell with thermal isolation pad and manufacturing method: A memory device comprising a first electrode having a top side, a second electrode having a top side and an insulating member between the first electrode and the second electrode. The insulating member has a thickness between the first and second electrodes near the top side of the first electrode... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP
20100068879 - Contact for memory cell: A contact for memory cells and integrated circuits having a conductive layer supported by the sidewall of a dielectric mesa, memory cells incorporating such a contact, and methods of forming such structures.... Agent: Dickstein Shapiro LLP
20100068880 - Semiconductor device manufacturing method and semiconductor device manufacturing apparatus: A method for manufacturing a semiconductor device that improves the reliability of a metal cap layer and productivity. The method includes an insulation layer step of superimposing an insulation layer (11) on a semiconductor substrate (2) including an element region (2b), a recess step of forming a recess (12) in... Agent: J. Rodman Steele Novak Druce & Quigg LLP
20100068881 - Method of forming metallization in a semiconductor device using selective plasma treatment: A method of forming metallization in a semiconductor device, including forming an interlayer insulation layer on a semiconductor layer, forming a hole in the interlayer insulation layer by removing a portion of the interlayer insulation layer, forming a metal seed layer in the hole and on an upper surface of... Agent: Lee & Morse, P.C.
20100068882 - Semiconductor device and method for manufacturing the same: The present method for manufacturing a semiconductor device comprises the steps of forming an aluminum wiring layer on a substrate; sequentially forming a hard mask, a polysilicon layer, and a bottom anti-reflective coating over the aluminum wiring layer; etching the polysilicon layer using a photoresist pattern formed over the bottom... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.
20100068883 - Cmp slurry composition for forming metal wiring line: Disclosed is CMP slurry, which includes a pyridine-based compound including at least two pyridinyl groups, and minimizes the occurrence of dishing and erosion of a wiring line.... Agent: Mckenna Long & Aldridge LLP
20100068884 - Method of etching a layer of a semiconductor device using an etchant layer: A method of semiconductor fabrication including an etching process is provided. The method includes providing a substrate and forming a target layer on the substrate. An etchant layer is formed on the target layer. The etchant layer reacts with the target layer and etches a portion of the target layer.... Agent: Haynes And Boone, LLPIPSection
20100068886 - Method of fabricating a differential doped solar cell: A method of fabricating a differential doped solar cell is described. The method includes the following steps. First, a substrate is provided. A doping process is conducted thereon to form a doped layer. A heavy doping portion of the doped layer is partially or fully removed. Subsequently, an anti-reflection coating... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20100068885 - Sidewall forming processes: An etch layer underlying a patterned photoresist mask is provided. A plurality of sidewall forming processes are performed. Each sidewall forming process comprises depositing a protective layer on the patterned photoresist mask by performing multiple cyclical depositions. Each cyclical deposition involves at least a depositing phase for depositing a deposition... Agent: Beyer Law Group LLP
20100068887 - Plasma reactor with adjustable plasma electrodes and associated methods: Plasma reactors with adjustable plasma electrodes and associated methods of operation are disclosed herein. The plasma reactors can include a chamber, a workpiece support for holding a microfeature workpiece, and a plasma electrode in the chamber and spaced apart from the workpiece support. The plasma electrode has a first portion... Agent: Perkins Coie LLP Patent-sea
20100068888 - Dry etching method: A dry etching method includes: mounting a silicon substrate on an electrode arranged in a processing chamber; generating a plasma by discharging an etching gas in the processing chamber; supplying to the electrode a radio frequency power for attracting ions from the plasma; and etching the silicon substrate by the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100068889 - Particle-containing etching pastes for silicon surfaces and layers: The present invention relates to particle-containing etching media in the form of etching pastes which are suitable for the full-area or selective etching of extremely fine lines or structures in silicon surfaces and layers and in glass-like surfaces formed from suitable silicon compounds. The present invention also relates to the... Agent: Millen, White, Zelano & Branigan, P.C.
20100068890 - Printable medium for etching oxidic, transparent and conductive layers: The present invention relates to novel printable etching media having improved properties for use in the process for the production of solar cells. These are corresponding particle-containing compositions by means of which extremely fine lines and structures can be etched very selectively without damaging or attacking adjacent areas.... Agent: Millen, White, Zelano & Branigan, P.C.
20100068894 - Composition and method for low temperature chemical vapor deposition of silicon-containing films including silicon carbonitride and silicon oxycarbonitride films: Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as films including silicon carbonitride, silicon oxycarbonitride, and silicon nitride (Si3N4), and a method of depositing the silicon precursors on substrates using low temperature (e.g., <550° C.) chemical vapor deposition processes, for fabrication of ULSI devices and... Agent: Intellectual Property / Technology Law
20100068893 - Film deposition apparatus, film deposition method, and computer readable storage medium: A film deposition apparatus includes a reaction chamber evacuatable to a reduced pressure; a substrate holding portion rotatably provided in the reaction chamber and configured to hold a substrate; a first reaction gas supplying portion configured to flow a first reaction gas from an outer edge portion toward a center... Agent: Ipusa, P.l.l.c
20100068891 - Method of forming barrier film: A barrier film made of a ZrB2 film is formed by use of a coating apparatus provided with plasma generation means including a coaxial resonant cavity and a microwave supply circuit for exciting the coaxial resonant cavity, the coaxial resonant cavity including spaced apart conductors provided around the periphery of... Agent: Tomoko Nakajima
20100068892 - Substrate processing method: In a substrate processing method of processing a substrate in which a processing target layer, an intermediate layer, and a mask layer are stacked one on top of another, the mask layer having an opening that partially exposes the intermediate layer, a thickness of the mask layer is increased by... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100068895 - Substrate processing apparatus and substrate processing method: A substrate processing apparatus includes a processing chamber that processes a substrate, and a substrate placing base enclosed in the processing chamber, and a substrate transporting member that allows the substrate to wait temporarily on the substrate placing base, and exhaust holes provided so as to surround the substrate placing... Agent: Oliff & Berridge, PLC
20100068896 - Method of processing substrate: A method of processing a substrate to form a thin film into which an impurity is introduced, the method including forming a thin film on the substrate; and introducing the impurity to the thin film by irradiating a gas cluster ion beam, which is generated by ionizing and accelerating a... Agent: Cantor Colburn, LLP
20100068897 - Dielectric treatment platform for dielectric film deposition and curing: A system for curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The system comprises one or more process modules configured for exposing the low-k dielectric film to electromagnetic... Agent: Tokyo Electron U.s. Holdings, Inc.
20100068898 - Managing thermal budget in annealing of substrates: A method and apparatus are provided for treating a substrate. The substrate is positioned on a support in a thermal treatment chamber. Electromagnetic radiation is directed toward the substrate to anneal a portion of the substrate. Other electromagnetic radiation is directed toward the substrate to preheat a portion of the... Agent: Patterson & Sheridan, LLP - - Appm/tx03/11/2010 > patent applications in patent subcategories. listing by industry category
20100062546 - Method of manufacturing soi substrate: An object of the present invention is to improve use efficiency of a semiconductor substrate without lowering efficiency of a fabrication process. Another object of the present invention is to achieve cost reduction by effective use of a semiconductor substrate whose thickness is reduced due to repeated use in a... Agent: Eric Robinson
20100062547 - Technique for monitoring and controlling a plasma process with an ion mobility spectrometer: A plasma processing apparatus includes a process chamber, a platen positioned in the process chamber for supporting a workpiece, a source configured to generate a plasma in the process chamber, and a monitoring system including an ion mobility spectrometer configured to monitor a condition of the plasma. A monitoring method... Agent: Nields, Lemack & Frame, LLC
20100062548 - Photo key and method of fabricating semiconductor device using the photo key: A photo key has a plurality of first regions spaced apart from one another on a semiconductor substrate, and a second region surrounding the first regions, and one of the first regions and the second region constitutes a plurality of photo key regions spaced apart from one another. Each of... Agent: Volentine & Whitt PLLC
20100062549 - Pattern correcting method, method of manufacturing semiconductor device, and pattern correcting program: A side of a correction target pattern is divided into a plurality of segments. A space between each of the divided segments or an imaginary segment extended from both the ends of the segment to outer sides and a side of an adjacent pattern adjacent to the segment is measured.... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100062550 - Method for reducing occurrence of short-circuit failure in an organic functional device: A method, for reducing occurrence of short-circuit failure in an organic functional device (101, 201, 401) comprising a first transparent electrode layer (104), a second electrode layer (105) and an organic functional layer (103) sandwiched between said first and second electrode layers (104; 105). The method comprises the steps of... Agent: Philips Intellectual Property & Standards
20100062551 - Method of separating light-emitting diode from a growth substrate: A method of forming a light-emitting diode (LED) device and separating the LED device from a growth substrate is provided. The LED device is formed by forming an LED structure over a growth substrate. The method includes forming and patterning a mask layer on the growth substrate. A first contact... Agent: Slater & Matsil, L.L.P.
20100062552 - Silicone resin composition for encapsulating luminescent element and process for producing optical-semiconductor electronic part with the same through potting: More particularly, the invention provides a silicone resin composition for encapsulating light-emitting elements, including 2 to 25 wt % of silica with a mean particle size of 1 to 30 nm based on the total amount of Components (A) and (B); and having a viscosity (23° C.) of more than... Agent: Edwards Angell Palmer & Dodge LLP
20100062553 - Organic light emitting display device: An organic light emitting display device capable of hermetically sealing a space between a deposition substrate and an encapsulation substrate with inorganic sealing materials is disclosed. One embodiment of the organic light emitting display device includes a first substrate including power supply lines formed on an array, and a circumference... Agent: Knobbe Martens Olson & Bear LLP
20100062554 - Light-emitting device, light-emitting element and method of manufacturing same: Provided are a light-emitting element and a light-emitting device, and methods of fabricating the same. The method of fabricating a light-emitting element includes forming a buffer layer on a substrate and forming photonic crystal patterns and a pad pattern on the buffer layer. Each of the pad pattern and the... Agent: Mills & Onello LLP
20100062555 - Method of forming crystallized silicon and method of fabricating thin film transistor and liquid crystal display using the same: A method of crystallizing amorphous silicon comprises forming an amorphous silicon layer on a substrate; forming an insulating layer on the amorphous silicon layer; forming a heat distributing metal layer on the insulating layer; and forming a thermite layer on the heat distributing metal layer. Ignition heat is then applied... Agent: Haynes And Boone, LLPIPSection
20100062557 - Liquid crystal display device and fabrication method thereof: A method for fabricating an LCD device includes forming an active layer having a source region, a drain region and a channel region on the first substrate; forming first and second conductive layers on the first substrate; forming a gate electrode, a gate line and a pixel electrode by patterning... Agent: Mckenna Long & Aldridge LLP
20100062556 - Methods for manufacturing thin film transistor and display device: The present invention provides a method for manufacturing a thin film transistor with small leakage current and high switching characteristics. In a method for manufacturing a thin film transistor, a back channel portion is formed in the thin film transistor by conducting etching using a resist mask, the resist mask... Agent: Eric Robinson
20100062558 - Method for producing transparent conductive layer comprising tio2 and method for producing semiconductor light-emitting element utilizing said method for producing transparent conductive layer: When a p-layer 4 composed of GaN is maintained at ordinary temperature and TNO is sputtered thereon by an RF magnetron sputtering method, a laminated TNO layer 5 is in an amorphous state. Then, there is included a step of thermally treating the amorphous TNO layer in a reduced-pressure atmosphere... Agent: Mcginn Intellectual Property Law Group, PLLC
20100062559 - Methods of manufacturing image sensors having shielding members: An epitaxial layer may be formed on a substrate having a first region and a second region. A photo diode may be formed on a first portion of the epitaxial layer in the first region of the substrate. At least one transfer transistor may be formed on the epitaxial layer... Agent: Harness, Dickey & Pierce, P.L.C
20100062560 - Application specific solar cell and method for manufacture using thin film photovoltaic materials: A method for manufacture of application specific solar cells includes providing and processing custom design information to determine at least a cell size and a cell shape. The method includes providing a transparent substrate having a back surface region, a front surface region, and one or more grid-line regions overlying... Agent: Townsend And Townsend And Crew, LLP
20100062561 - Method for forming a film with a graded bandgap by deposition of an amorphous material from a plasma: A method is described of forming a film of an amorphous material on a substrate by deposition from a plasma. The substrate is placed in an enclosure, a film precursor gas is introduced into the enclosure, and unreacted and dissociated gas is extracted from the enclosure so as to provide... Agent: Darby & Darby P.C.
20100062562 - Methods utilizing microwave radiation during formation of semiconductor constructions: Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500°... Agent: Wells St. John P.s.
20100062564 - Method for producing electronic part package: A peeling off layer 18 is formed on an entire surface of one surface side of a support plate 10 including the inner wall surfaces respectively of a recessed part 12 for an electronic part and recessed parts 16 for posts in which the posts 20 are formed. Then, the... Agent: Drinker Biddle & Reath (dc)
20100062563 - Method of manufacturing a stacked die module: A method of manufacturing a stacked die module includes applying a plurality of stacked die structures to a carrier. Each stacked die structure includes a first semiconductor die applied to the carrier and a second semiconductor die stacked over the first semiconductor die. The second semiconductor die has a larger... Agent: Dicke, Billig & Czaja
20100062566 - Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component: A first semiconductor element is bonded on a substrate. A complex film formed of integrated dicing film and adhesive film is affixed on a rear surface of a semiconductor wafer which is to be second semiconductor elements, the dicing film having a thickness within a range of not less than... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100062567 - Multi layer low cost cavity substrate fabrication for pop packages: In a method and system for fabricating a semiconductor device (100) having a package-on-package structure, a base laminate substrate (BLS) (110) is formed to include a base center portion (112) and a peripheral portion (114) separated by a barrier element (120). The barrier element (120) forms a peripheral wall (118)... Agent: Texas Instruments Incorporated
20100062565 - Substrate bonding with bonding material having rare earth metal: A microchip has a bonding material that bonds a first substrate to a second substrate. The bonding material has, among other things, a rare earth metal and other material.... Agent: Sunstein Kann Murphy & Timbers LLP
20100062568 - Electronic module with a conductive-pattern layer and a method of manufacturing same: This publication discloses an electronic module and a method for manufacturing an electronic module, in which a component (6) is glued (5) to the surface of a conductive layer, from which conductive layer conductive patterns (14) are later formed. After gluing the component (6), an insulating-material layer (1), which surrounds... Agent: Birch Stewart Kolasch & Birch
20100062569 - Layer having functionality, method for forming flexible substrate having the same, and method for manufacturing semiconductor device: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide... Agent: Eric Robinson
20100062570 - Leadframe surface with selective adhesion promoter applied with an offset gravure printing process for improved mold compound and die attach adhesive adhesion: Placement of an encapsulation material adhesion promoter onto a semiconductor device leadframe can be performed through the use of an offset printing apparatus such as a rotogravure printing apparatus or a tampoprint printing apparatus. This can provide accurate and low-cost placement of the adhesion promoter.... Agent: Texas Instruments Incorporated
20100062571 - Microelectronic devices and methods for manufacturing microelectronic devices: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a device includes a support member and a flexed microelectronic die mounted to the support member. The flexed microelectronic die has a plurality of terminals electrically coupled to the support member and an integrated circuit operably... Agent: Perkins Coie LLP Patent-sea
20100062572 - Manufacturing method of semiconductor device: A semiconductor chip which is mounted on a wiring substrate and which is electrically connected to the wiring substrate is disposed in a sealing apparatus. A sealing resin material made of a thermosetting resin composition is supplied into the sealing apparatus. The sealing resin material contains a solid foreign matter... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100062573 - Method for producing an electronic component, method for producing a thyristor, method for producing a drain-extended mos filed-effect transistor, electronic component, drain-extended mos field-effect transistor, electronic component arrangement: In a method for producing an electronic component, a first doped connection region and a second doped connection region are formed on or above a substrate; a body region is formed between the first doped connection region and the second doped connection region; at least two gate regions separate from... Agent: Brinks Hofer Gilson & Lione/infineon Infineon
20100062574 - Thin-film transistor, method of manufacturing the same, liquid crystal display panel having the same and electro-luminescence display panel having the same: A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a... Agent: Innovation Counsel LLP
20100062575 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device includes a semiconductor substrate; a first gate insulation film formed on the semiconductor substrate; a second gate insulation film formed on the semiconductor substrate; a first gate electrode formed on the first gate insulation film and fully silicided; and a second gate electrode formed on the second... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100062576 - Method for fabricating cmos image sensor with plasma damage-free photodiode: A method for fabricating a complementary metal-oxide semiconductor (CMOS) image sensor includes providing a semi-finished substrate, forming a patterned blocking layer over a photodiode region of the substrate, implanting impurities on regions other than the photodiode region using a mask while the patterned blocking layer remains, and removing the mask.... Agent: Mcandrews Held & Malloy, Ltd
20100062577 - High-k metal gate structure fabrication method including hard mask: Provided is a method of fabricating a semiconductor device including a high-k metal gate structure. A substrate is provided including a dummy gate structure (e.g., a sacrificial polysilicon gate), a first and second hard mask layer overlie the dummy gate structure. In one embodiment, a strained region is formed on... Agent: Haynes And Boone, LLPIPSection
20100062578 - Bipolar transistor and method for making same: One or more embodiments of the invention relate to a method of making a heterojunction bipolar transistor, including: forming a collector layer; forming a stack of at least a second dielectric layer overlying a first dielectric layer, the stack formed over the collector layer; removing a portion of each of... Agent: Infineon Technologies Ag Patent Department
20100062580 - Fabrication processes for forming dual depth trenches using a dry etch that deposits a polymer: Trench isolation structures and methods to form same for use in the manufacture of semiconductor devices are described. The trench isolation structures are formed using several processing schemes that utilize disclosed dry etching processes to form a significant depth Δ between an array trench depth and a periphery trench depth.... Agent: Micron Technology, Inc.
20100062581 - Method of fabricating non-volatile memory device: Provided is a method of fabricating a non-volatile semiconductor device. The method includes: forming a first hard mask layer over a substrate; etching the first hard mask layer and the substrate to form a plurality of isolation trenches extending in parallel to one another in a first direction; burying a... Agent: Lowe Hauptman Ham & Berner, LLP
20100062579 - Self-aligned trench formation: Methods for forming a semiconductor device include forming self-aligned trenches, in which a first set of trenches is used to align a second set trenches. Methods taught herein can be used as a pitch doubling technique, and may therefore enhance device integration. Further, employing a very thin CMP stop layer,... Agent: Knobbe Martens Olson & Bear LLP
20100062582 - Method of manufacturing silicon carbide semiconductor device: There is provided a method of manufacturing a silicon carbide semiconductor device including the steps of: in a semiconductor stacked substrate including a first conductivity type silicon carbide crystal substrate, a first conductivity type silicon carbide crystal layer, a second conductivity type silicon carbide crystal layer, and a first conductivity... Agent: Venable LLP
20100062583 - Manufacturing method of semiconductor device: To provide a manufacturing method of a semiconductor device in which, even when the semiconductor device is formed over an SOI substrate which uses a glass substrate, an insulating film and a semiconductor film over the glass substrate are not peeled by stress applied by a conductive film in formation... Agent: Eric Robinson
20100062584 - Method for producing wafer for backside illumination type solid imaging device: A wafer for backside illumination type solid imaging device having a plurality of pixels inclusive of a photoelectric conversion device and a charge transfer transistor at its front surface side and a light receiving surface at its back surface side is produced by a method comprising a step of forming... Agent: Christensen, O'connor, Johnson, Kindness, PLLC
20100062585 - Method for forming silicon thin film: Provided is a method for forming a silicon thin film in which a substrate S is exposed to plasma of a gas for hydrogen bonding process containing hydrogen, and a crystalline silicon thin film is then formed on the substrate. By employing as the substrate S a substrate in which... Agent: Cheng Law Group, PLLC
20100062586 - Method for manufacturing semiconductor device: It is an object to provide a homogeneous semiconductor film in which variation in the size of crystal grains is reduced. Alternatively, it is an object to provide a homogeneous semiconductor film and to achieve cost reduction. By introducing a glass substrate over which an amorphous semiconductor film is formed... Agent: Eric Robinson
20100062587 - Method to manufacture silicon quantum islands and single-electron devices: A method of manufacturing a single-electron transistor device is provided. The method includes forming a thinned region in a silicon substrate, the thinned region offset by a non-selected region. The method also includes forming at least one quantum island from the thinned region by subjecting the thinned region to an... Agent: Texas Instruments Incorporated
20100062588 - Method of manufacturing semiconductor substrate: A method of manufacturing a semiconductor substrate, in which a silicon layer is provided on a buried oxide film, includes preparing a base substrate having a seed layer of the silicon layer on the buried oxide film with a film thickness equal to or more than 1 nm and equal... Agent: Greenblum & Bernstein, P.L.C
20100062589 - Implanting a solar cell substrate using a mask: Various masks for use with ion implantation equipment are disclosed. In one embodiment, the masks are formed by assembling a collection of segments and spacers to create a mask having the desired configuration. This collection of parts is held together with a carrier of frame. In another embodiment, a panel... Agent: Nields, Lemack & Frame, LLC
20100062591 - N2 based plasma treatment and ash for hk metal gate protection: The present disclosure provides a method for making a semiconductor device. The method includes forming a first material layer on substrate; forming a patterned photoresist layer on the first material layer; applying an etching process to the first material layer using the patterned photoresist layer as a mask; and applying... Agent: Haynes And Boone, LLPIPSection
20100062590 - Novel solution for polymer and capping layer removing with wet dipping in hk metal gate etching process: The present disclosure provides a method for making metal gate stacks of a semiconductor device. The method includes applying a first etching process to the substrate to remove a polysilicon layer and a metal gate layer on the substrate; applying a diluted hydrofluoric acid (HF) to the substrate to remove... Agent: Haynes And Boone, LLPIPSection
20100062592 - Method for forming gate spacers for semiconductor devices: A method for forming gate spacers for semiconductor devices includes forming a patterned gate structure on substrate, where the patterned gate structure contains an interface layer on the substrate, a high-k film on the interface layer, and a gate electrode on the high-k film. The method further includes depositing a... Agent: Tokyo Electron U.s. Holdings, Inc.
20100062594 - Method for manufacturing a semiconductor device: In accordance with an embodiment of the invention the method of manufacturing a semiconductor device is capable of forming a semiconductor substrate having an embossing structure. The method includes forming a layer having a plurality of hemispherical single crystal silicon elements, and forming one or more carbon nano tubes between... Agent: Marshall, Gerstein & Borun LLP
20100062593 - Method for preparing multi-level flash memory devices: A method for preparing a multi-level flash memory device comprises forming a dielectric stack including a charge-trapping layer on a semiconductor substrate, forming an insulation structure having a depression on the charge-trapping layer, removing a portion of the charge-trapping layer from the depression such that the charge-trapping layer is segmented... Agent: Wpat, PC Intellectual Property Attorneys
20100062595 - Nonvolatile memory device and method of forming the same: A nonvolatile memory device and a method of forming the nonvolatile memory device, the method including forming a tunnel insulating layer on a substrate, wherein forming the tunnel insulating layer includes forming a multi-element insulating layer by a process including sequentially supplying a first element source, a second element source,... Agent: Lee & Morse, P.C.
20100062596 - Semiconductor device and manufacturing method for the same: In a semiconductor substrate on which are formed an N-type MOS transistor and a P-type MOS transistor, the gate electrode of the N-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the gate electrode of the P-type MOS transistor comprises a tungsten film,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100062597 - Interconnection for flip-chip using lead-free solders and having improved reaction barrier layers: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally... Agent: Thomas A. Beck
20100062598 - Method for fabricating semiconductor device with metal line: A method for fabricating a semiconductor device includes forming an inter-layer insulation layer on a substrate; forming openings in the inter-layer insulation layer; forming a metal barrier layer in the openings and on the inter-layer insulation layer; forming a first conductive layer on the metal barrier layer and filled in... Agent: Ip & T Law Firm PLC
20100062599 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device includes the steps of forming a P-type region on a surface of a semiconductor substrate, forming at least one Al electrode on the P-type region, forming an interlayer film in contact with the at least one Al electrode, the interlayer film being of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100062600 - Method of manufacturing a semiconductor device: A method of manufacturing a semiconductor device includes the steps of forming a first insulating layer with a first opening; forming a first redistribution layer having a first via with a recess; forming a second insulating layer with a second opening on the first redistribution layer so that the second... Agent: Rabin & Berdo, PC
20100062601 - Methods for polishing aluminum nitride: The present invention provides a method for polishing an aluminum nitride substrate. The method comprises abrading a surface of the aluminum nitride substrate with a basic, aqueous polishing composition, which comprises an abrasive (e.g., colloidal silica), an oxidizing agent (e.g., hydrogen peroxide), and an aqueous carrier. The methods of the... Agent: Steven Weseman Associate General Counsel, I.p.
20100062602 - Etching method, method for producing dielectric film of low dielectric constant, method for producing porous member, etching system and thin film forming equipment: In the etching method, performed are an adsorption step of employing halogen radicals generated from a halogen through formation of a plasma thereof, and a precursor 24 formed from the halogen and a noble metal component generated through etching of a noble metal member 11 by the halogen radicals, wherein... Agent: Fitzpatrick Cella Harper & Scinto
20100062603 - Semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof: Semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. In some embodiments, a semiconductor device may include a floating gate having a first width proximate a base of the floating gate that is greater than a second width proximate a top of the floating... Agent: MoserIPLaw Group / Applied Materials, Inc.
20100062604 - Method for fabricating device pattern: A method for fabricating a device pattern includes the following steps. A first pattern having a first density is formed in a pre-determined region on a substrate. The first pattern includes a base portion along a first direction and at least two protruding portions along a second direction and connected... Agent: Jianq Chyun Intellectual Property Office
20100062605 - Method of forming a contact hole for a semiconductor device: Forming contact holes of a semiconductor device includes forming a reaction layer that is provided with a reaction pattern on a semiconductor substrate. Subsequently, a self-assembled monolayer is formed by injecting a polymer from a functional group that is capable of being chemically bonded to the reaction pattern. A coating... Agent: Ladas & Parry LLP
20100062606 - Dry etching method: The object of the present invention is to provide a dry etching method by which generation of a notch in an insulating layer can be suppressed and highly-accurate microfabrication can be realized. In a dry etching method according to the present invention, a substrate in which a semiconductor layer is... Agent: Harness, Dickey & Pierce, P.L.C
20100062607 - Dry etching method: In a dry etching method, a silicon substrate is mounted on an electrode arranged in a processing chamber; a plasma is generated by discharging an etching gas in the processing chamber; a radio frequency power for attracting ions from the plasma is supplied to the electrode; and the silicon substrate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100062608 - Method for selective palsmochemical dry-etching of phosphosilicate glass deposited on surfaces of silicon wafers: The invention relates to a method for the selective plasmochemical dry-etching of phosphosilicate glass ((SiO2)xP2O5)y) formed on surfaces of silicon wafers. In this respect, it is the object of the invention to provide a cost-effective, efficient, selective possibility which at least reduces manufacturing losses and with which phosphosilicate glass can... Agent: Jacobson Holman PLLC
20100062610 - Method of regulating the titration of a solution, device for controlling said regulation and system comprising such a device: Method for regulating the titration of a solution, in which a predetermined amount of a product contained in the solution is added to the solution according to a time interval, called the addition interval, which is proportional to the product of the time degradation coefficient D of the product in... Agent: Air Liquide Intellectual Property
20100062609 - Methods for retaining metal-comprising materials using liquid chemistry dispense systems from which oxygen has been removed: Methods for fabricating a semiconductor device from a semiconductor substrate having a metal-comprising material and a disposable material are provided. In accordance with an exemplary embodiment, the method comprises providing a system for exposing the disposable material to a liquid chemistry and removing oxygen from the system. The disposable material... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)
20100062611 - Method and apparatus for thinning a substrate: Provided is a method for fabricating a semiconductor device that includes providing a semiconductor substrate having a front side and a backside, where active or passive devices are formed in the front side, rotating the semiconductor substrate, and etching the backside of the semiconductor substrate by introducing a first etchant... Agent: Haynes And Boone, LLPIPSection
20100062612 - Aftertreatment method for amorphous carbon film: The present invention is an aftertreatment method further applied to an amorphous carbon film to which a treatment including heating is performed after the film has been formed on a substrate. The treatment of preventing oxidation of the amorphous carbon film is performed immediately after the treatment including heating.... Agent: Masuvalley & Partners
20100062613 - Method of processing a substrate: A method of processing a substrate using plasma includes loading a substrate into a chamber, processing the substrate with a first plasma mode and then processing the substrate with a second plasma mode, wherein at least one of the first plasma mode and the second plasma mode is a time-modulation... Agent: Mills & Onello LLP
20100062614 - In-situ chamber treatment and deposition process: Embodiments of the invention provide a method for treating the inner surfaces of a processing chamber and depositing a material on a during a vapor deposition process, such as atomic layer deposition (ALD) or by chemical vapor deposition (CVD). In one embodiment, the inner surfaces of the processing chamber and... Agent: Patterson & Sheridan, LLP - - Appm/tx03/04/2010 > patent applications in patent subcategories. listing by industry category
20100055804 - Method for patterning semiconductor device having magnetic tunneling junction structure: A method for patterning a semiconductor device includes forming a lower electrode conductive layer over a substrate, forming a stack structure including a lower electrode conductive layer, a first ferromagnetic layer, an insulation layer and a second ferromagnetic layer over a substrate, forming an upper electrode conductive layer used as... Agent: Ip & T Law Firm PLC
20100055806 - Piezoelectrically actuated ultrananocrystalline diamond tip array integrated with ferroelectric or phase change media for high-density memory: A compact large density memory piezoactuated storage device and process for its fabrication provides an integrated microelectromechanical (MEMS) and/or nanoelectromechanical (NEMS) system and structure that features an integrated large density array of nanotips made of wear-resistant conductive ultrananocrystalline diamond (UNCD) in which the tips are actuated via a piezoelectric thin... Agent: Tolpin & Partners, PC
20100055805 - Semiconductor device manufacturing method: A semiconductor device manufacturing method includes forming a first film made of a first metal to an upper portion of a substrate, forming a second film made of an amorphous metal oxide or an microcrystalline metal oxide on the first film, subjecting the second film to a heat treatment, subjecting... Agent: Westerman, Hattori, Daniels & Adrian, LLP
20100055807 - Plasma ashing apparatus and endpoint detection process: A plasma ashing apparatus for removing organic matter from a substrate including a low k dielectric, comprising a first gas source; a plasma generating component in fluid communication with the first gas source; a process chamber in fluid communication with the plasma generating component; an exhaust conduit in fluid communication... Agent: Cantor Colburn, LLP
20100055808 - Substrate processing apparatus and method of manufacturing semiconductor device: A substrate processing apparatus for executing a predetermined process on a substrate loaded into a process chamber by running a recipe containing a plurality of steps is provided. The recipe includes a process step of processing the substrate, and a leak check step executed before the process step to check... Agent: Brundidge & Stanger, P.C.
20100055809 - Process of fabricating a workpiece using a test mask: A product workpiece can be processed to form product dice. A test mask can allow intentional changes to be made to a feature on the product workpiece to examine how the altered feature performs. Use of the test mask may be used or not used based on the needs or... Agent: Larson Newman & Abel, LLP
20100055810 - Mask for thin film deposition and method of manufacturing oled using the same: A mask for thin film deposition used in forming an organic thin film or a conductive layer in an organic light emitting device is disclosed. In one embodiment, the mask includes i) a base member, ii) a plurality of slits configured to penetrate through the base member, wherein the plurality... Agent: Knobbe Martens Olson & Bear LLP
20100055812 - Method of making a semiconductor chip assembly with a post/base heat spreader and a conductive trace: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then... Agent: David M. Sigmond
20100055811 - Method of making a semiconductor chip assembly with a post/base heat spreader and a substrate: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post through an opening in the adhesive, mounting a substrate on the adhesive including inserting the post into an aperture in the substrate to form a... Agent: David M. Sigmond
20100055814 - Method of manufacturing light emitting diode device: A method of manufacturing light-emitting diode device has steps of isolating a light-emitting side of an LED chip from a wire-bonding region by disposing partition panels on the wire-bonding region and coating phosphors on the light-emitting side of the LED chip in a phosphor-coating process. The method can be applied... Agent: Patenttm.us
20100055813 - Method of packaging light emitting diode on through-hole substrate: In a method of packaging a light emitting diode on a through-hole substrate, through holes are created and a wire bonded light emitting diode (LED) chip is set on the substrate, and a lens is set on the through holes and the wire bonded LED chip. The through holes are... Agent: Hdls Patent & Trademark Services
20100055816 - Light emitting device manufacturing apparatus and method: A disclosed light-emitting-device manufacturing apparatus for manufacturing a light emitting device by forming, on an in-process substrate, an organic layer including an emitting layer includes multiple processing chambers to which the in-process substrate is sequentially transferred to be subjected to multiple substrate processing steps; and multiple substrate transfer chambers, each... Agent: Ipusa, P.l.l.c
20100055815 - Method of manfuacturing lens for light emitting diode package: The present invention provides a method of manufacturing a lens for a light emitting diode package including the steps of: preparing a substrate mounting a light emitting chip; forming a temporarily cured resin covering the light emitting chip on the substrate; and curing the temporarily cured resin in a lens... Agent: Mcdermott Will & Emery LLP
20100055817 - Method of manufacturing array substrate of horizontal electric field type transreflective liquid crystal display: A method of manufacturing an array substrate of horizontal electric field type transreflective LCD is provided in the invention. An array substrate of liquid crystal display is obtained by using one full tone mask and two dual tone masks according to the method. Specifically, the gate line, the gate electrode... Agent: Ladas & Parry LLP
20100055818 - Light-emitting diode on a conductive substrate: A light-emitting diode (LED) device is provided. The LED device is formed by forming an LED structure on a first substrate. A portion of the first substrate is converted to a porous layer, and a conductive substrate is formed over the LED structure on an opposing surface from the first... Agent: Slater & Matsil, L.L.P.
20100055819 - Method for manufacturing semiconductor light emitting device: A method for manufacturing a semiconductor light emitting device is provided. The device includes: an n-type semiconductor layer; a p-type semiconductor layer; and a light emitting unit provided between the n-type semiconductor layer and the p-type semiconductor layer. The method includes: forming a buffer layer made of a crystalline AlxGa1-xN... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100055820 - Method for producing nitride semiconductor optical device and epitaxial wafer: In step S106, an InXGa1-XN well layer is grown on a semipolar main surface between times t4 and t5 while a temperature in a growth furnace is maintained at temperature TW. In step S107, immediately after completion of the growth of the well layer, the growth of a protective layer... Agent: Venable LLP
20100055821 - Method for manufacturing an intergrated pressure sensor: A differential pressure sensor comprises a membrane arranged over a cavity on a semiconductor substrate. A lid layer is arranged at the top side of the device and comprises an access opening for providing access to the top side of the membrane. A channel extends laterally from the cavity and... Agent: Richard F. Jaworski Cooper & Dunham LLP
20100055822 - Back contact solar cells using printed dielectric barrier: Embodiments of the invention contemplate the formation of a high efficiency solar cell using novel methods to form the active doped region(s) and the metal contact structure of the solar cell device. In one embodiment, the methods include the steps of depositing a dielectric material that is used to define... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100055823 - Methods of manufacturing cmos image sensors: Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the... Agent: Harness, Dickey & Pierce, P.L.C
20100055824 - Micro/nanostructure pn junction diode array thin-film solar cell and method for fabricating the same: The present invention discloses a micro/nanostructure PN junction diode array thin-film solar cell and a method for fabricating the same, wherein a microstructure or sub-microstructure PN junction diode array, such as a nanowire array or a nanocolumns array, is transferred from a source-material wafer to two pieces of transparent substrates,... Agent: Rosenberg, Klein & Lee
20100055825 - Semiconductor device manufacturing method: A method for manufacturing a semiconductor device that includes a semiconductor substrate, the method comprises: a first irradiation step of irradiating a first irradiated region with a focused ion beam so as to selectively remove a first portion corresponding to the first irradiated region of the wiring pattern, the first... Agent: Fitzpatrick Cella Harper & Scinto
20100055826 - Methods of fabrication of solar cells using high power pulsed magnetron sputtering: A method of fabricating a solar cell is provided. The method includes depositing a transparent conductive contact layer on a surface of a substrate, where the transparent conductive contact layer is configured to act as a front electrode for the solar cell, depositing a window layer over the transparent conductive... Agent: General Electric Company Global Research
20100055827 - Apparatus and method for fabricating photovoltaic modules using heated pocket deposition in a vacuum: An apparatus and method for manufacturing thin-film CdS/CdTe photovoltaic modules in a vacuum environment. The apparatus deposits CdS and CdTe layers onto a substrate using heated pocket deposition, a form of physical vapor deposition (PVD) in which a material thermally sublimes from a thermal sublimation source block and is deposited... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20100055828 - Process and paste for contacting metal surfaces: For production of an electrically conductive or thermally conductive connection for contacting two elements, an elemental metal, in particular silver, is formed from a metal compound, in particular a silver compound, between the contact surfaces. In this production, the processing temperature for the use of a silver solder can be... Agent: Panitch Schwarze Belisario & Nadel LLP
20100055829 - Apparatus and methods for forming phase change layer and method of manufacturing phase change memory device: Provided are apparatus and methods for forming phase change layers, and methods of manufacturing a phase change memory device. A source material is supplied to a reaction chamber, and purges from the chamber. A pressure of the chamber is varied according to the supply of the source material and the... Agent: Myers Bigel Sibley & Sajovec
20100055830 - I-shaped phase change memory cell: A memory device includes two electrodes, vertically separated and having mutually opposed contact surfaces, between which lies a phase change cell. The phase change cell includes an upper phase change member, having a contact surface in electrical contact with the first electrode; a lower phase change member, having a contact... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP
20100055831 - Phase changeable memory cell array region and method of forming the same: A phase changeable memory cell array region includes a lower interlayer insulating layer disposed on a semiconductor substrate. The region also includes a plurality of conductive plugs disposed through the lower interlayer insulating layer. The region also includes a phase changeable material pattern operably disposed on the lower interlayer insulating... Agent: Volentine & Whitt PLLC
20100055832 - Method for manufacturing semiconductor device: To provide a method for manufacturing a thin film transistor in which contact resistance between an oxide semiconductor layer and source and drain electrode layers is small, the surfaces of the source and drain electrode layers are subjected to sputtering treatment with plasma and an oxide semiconductor layer containing In,... Agent: Eric Robinson
20100055833 - Method of manufacturing semiconductor device in which functional portion of element is exposed: A method of manufacturing a semiconductor device includes: forming a first resin layer on a wafer having a light receiving portion; patterning the first resin layer into a predetermined shape and forming a first resin film on the light receiving portion; dividing the wafer into light receiving elements; mounting the... Agent: Sughrue Mion, PLLC
20100055835 - Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages: An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages.... Agent: Vierra Magen/sandisk Corporation
20100055836 - Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages: An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages.... Agent: Vierra Magen/sandisk Corporation
20100055837 - Multi-chip module and methods: A substrate includes first and second regions over which first and second semiconductor devices are to be respectively positioned. The first region is located at least partially within the second region. Contact areas are located external to the first region but within the second region. In one embodiment, in which... Agent: Trask Britt, P.C./ Micron Technology
20100055834 - Semiconductor device manufacturing method: An improved method of manufacturing a semiconductor device. The resulting semiconductor device operates properly even when a plurality of semiconductor chips is mounted. One or more semiconductor chips are mounted on the bottom surface of a mounting substrate, the semiconductor chips are fixed to a supporting substrate with adhesive, and... Agent: Volentine & Whitt PLLC
20100055838 - Sensitivity capacitive sensor: A method of creating an improved sensitivity capacitive fingerprint sensor involves forming vias from a first side of a sensor chip having an array of capacitive sensors, making the vias electrically conductive, and attaching a cover plate over the first side of the sensor chip spaced from the sensor chip... Agent: Foley & Lardner LLP
20100055840 - Electronic packaging structure and a manufacturing method thereof: A packaging structure includes a main substrate having a plurality of circuit lines thereon, and an electronic module having at least one conductive pad at the bottom thereof and having a plurality of conductive lines on the sides thereof. The pad and the conductive circuits are connected electrically to the... Agent: Rosenberg, Klein & Lee
20100055839 - Method of manufacturing a semiconductor device: A method of manufacturing a semiconductor device. One embodiment provides a carrier. A semiconductor chip is provided with a first face and a second face opposite to the first face. The semiconductor chip is placed over the carrier with the first face facing the carrier. A voltage is applied between... Agent: Dicke, Billig & Czaja
20100055841 - Semiconductor device and method of producing the same: A method of producing a semiconductor device includes the steps of: preparing a semiconductor wafer having an MEMS (Micro Electro Mechanical Systems) element formed on a surface thereof; forming a groove portion surrounding the MEMS element in the surface of the semiconductor wafer; preparing a sealing wafer having a recess... Agent: Kubotera & Associates, LLC
20100055842 - Thermosetting die-bonding film: The thermosetting die-bonding film of the present invention is used in manufacturing a semiconductor device, has at least an epoxy resin, a phenol resin, and an acrylic copolymer, and the ratio X/Y is 0.7 to 5 when X represents a total weight of the epoxy resin and the phenol resin... Agent: Knobbe Martens Olson & Bear LLP
20100055843 - Chip package module heat sink: A heat sink mechanism including multiple heat passages in the base of a casing of a chip package module penetrating through a substrate packed in the module; a metal material being deposited in each heat passage to become a heat sink conductor connecting the substrate and the surface of the... Agent: Liu & Liu
20100055844 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device, which is capable of easily removing a sealing sheet building up terminal surfaces of leads, includes arranging, on molds, terminal surfaces of leads in a lead frame on which semiconductor elements are mounted so as to come in contact with a sealing sheet,... Agent: Mcginn Intellectual Property Law Group, PLLC
20100055845 - Power semiconductor module and method of manufacturing the same: A power semiconductor module and a method of manufacture thereof includes lead a frame carrying lead having inner and outer lead portions. The outer lead portions, which are connected by soldering to semiconductor chips simultaneously, eliminate the need for using bonding wires. Since no bonding wire is used for connecting... Agent: Rossi, Kimms & Mcdowell LLP.
20100055846 - Semiconductor package structures: A semiconductor structure includes a plurality of solder structures between a first substrate and a second substrate. A first encapsulation material is substantially around a first one of the solder structures and a second encapsulation material is substantially around a second one of the solder structures. The first one and... Agent: Duane Morris LLP (tsmc)IPDepartment
20100055847 - Methods of promoting adhesion between transfer molded ic packages and injection molded plastics for creating over-molded memory cards: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may... Agent: Vierra Magen/sandisk Corporation
20100055848 - Inspection of underfill in integrated circuit package: In inspecting for quality of underfill material dispensed in an IC package, a camera image is captured for the IC package having the underfill material dispensed between an IC die and a package substrate. A data processor analyzes the camera image to determine an occurrence of an unacceptable condition of... Agent: Law Office Of Monica H Choi
20100055849 - Method of encapsulating wire bonds: A method encapsulating wire bonds that extend between a die and conductors on a supporting substrate, by contacting an edge of a profiling blade with the encapsulant material to form a bead of the encapsulant on the edge, positioning the edge such that the bead contacts the die and, moving... Agent: Silverbrook Research Pty Ltd
20100055850 - Methods for fabricating pixel structure, display panel and electro-optical apparatus: A substrate having a switching device and a storage capacitor thereon is provided. A protective layer is formed on the substrate. A patterned organic material layer is formed on the protective layer, wherein bump patterns are formed on a part of the patterned organic material layer and the patterned organic... Agent: Jianq Chyun Intellectual Property Office
20100055853 - Method for manufacturing pixel structure: A method for manufacturing a pixel structure is provided. A gate and a gate insulating layer are sequentially formed on a substrate. A semiconductor layer and a second metal layer are sequentially formed on the gate insulating layer. The semiconductor layer and the second metal layer are patterned to form... Agent: Jianq Chyun Intellectual Property Office
20100055852 - Semiconductor device and method of fabricating the same: There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive interconnects.... Agent: Fish & Richardson P.C.
20100055854 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100055855 - Method of preventing sliding in manufacturing semiconductur device: Unreacted portions of the Ni film are removed, and a Ni silicide layer is formed on the source/drain region. During forming the Ni film or during inducing a reaction of the silicon substrate with the Ni film by heating the silicon substrate, a broken portion, which is provided by breaking... Agent: Mcginn Intellectual Property Law Group, PLLC
20100055856 - Method of forming oxide layer, and method of manufacturing semiconductor device: A method of forming an oxide layer on a trench, a method of forming a semiconductor device, and a semiconductor device, the method of forming an oxide layer on a trench including forming a first trench in a first portion of a substrate and a second trench in a second... Agent: Lee & Morse, P.C.
20100055857 - Method of forming a power device: A method of forming a power device includes providing a substrate, a semiconductor layer having at least a trench and being disposed on the substrate, a gate insulating layer covering the semiconductor layer, and a conductive material disposed in the trench, performing an ion implantation process to from a body... Agent: North America Intellectual Property Corporation
20100055858 - Silicon carbide semiconductor device and method for manufacturing the same: A semiconductor device according to the present invention includes a silicon carbide semiconductor substrate having a silicon carbide semiconductor layer; a p-type impurity region provided in the silicon carbide semiconductor layer and including a p-type impurity; a p-type ohmic electrode electrically connected to the p-type impurity region; an n-type impurity... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP
20100055859 - Semiconductor device and method of manufacturing the same: Disclosed is a method for manufacturing a semiconductor device comprising implanting ions of an impurity element into a semiconductor region, implanting, into the semiconductor region, ions of a predetermined element which is a group IV element or an element having the same conductivity type as the impurity element and larger... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100055860 - Semiconductor process and integrated circuit: In the fabrication of an integrated circuit, a shallow trench for isolation of a vertical bipolar transistor comprised in the circuit is fabricated by providing a semiconductor substrate of a first doping type. A buried collector region of a second doping type for the bipolar transistor is formed in the... Agent: Coats & Bennett/infineon Technologies
20100055861 - Method for fabricating capacitor in semiconductor device: A method for fabricating a capacitor in a semiconductor device includes forming an insulation layer over a substrate, forming a storage node contact plug passing through the insulation layer and coupled to the substrate, recessing the storage node contact plug to a certain depth to obtain a sloped profile, forming... Agent: Ip & T Law Firm PLC
20100055862 - Method for producing an integrated circuit arrangement with capacitor in an interconnect layer: A method produces integrated circuit arrangement that includes an undulating capacitor in a conductive structure layer. The surface area of the capacitor is enlarged in comparison with an even capacitor. The capacitor is interlinked with dielectric regions at its top side and/or its underside, so that it can be produced... Agent: Brinks Hofer Gilson & Lione/infineon Infineon
20100055863 - Method of patterning noble metals for semiconductor devices by electropolishing: An electropolishing process for high resolution patterning of noble metals, such as platinum, for forming various semiconductor devices, such as capacitors or wiring patterns is disclosed.... Agent: Dickstein Shapiro LLP
20100055865 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes forming a hardmask pattern over a substrate, forming a line type first photoresist pattern over the hardmask pattern, etching the hardmask pattern using the first photoresist pattern, removing the first photoresist pattern, forming a line type second photoresist pattern that cross the... Agent: Lowe Hauptman Ham & Berner, LLP
20100055864 - Method of forming isolation structure for semiconductor integrated circuit substrate: Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of... Agent: Patentability Associates
20100055866 - Method of forming transistor in semiconductor device: A method of forming a transistor in a semiconductor device includes forming device isolation structures in a substrate to define an active region. An oxide-based layer and a nitride-based layer are then formed between the active region and the device isolation structures. A predetermined gate region is etched in the... Agent: Lowe Hauptman Ham & Berner, LLP
20100055867 - Structured strained substrate for forming strained transistors with reduced thickness of active layer: In a strained SOI semiconductor layer, the stress relaxation which may typically occur during the patterning of trench isolation structures may be reduced by selecting an appropriate reduced target height of the active regions, thereby enabling the formation of transistor elements on the active region of reduced height, which may... Agent: Williams, Morgan & Amerson
20100055868 - Method of forming insulation layer of semiconductor device and method of forming semiconductor device using the insulation layer: A method of forming an insulating layer of a semiconductor device, the method including preparing a semiconductor substrate having a plurality of structures and gaps between adjacent structures, forming an insulating layer for oxygen supply on the semiconductor substrate, forming an SOG (spin-on-glass) layer on the insulating layer for oxygen... Agent: Lee & Morse, P.C.
20100055869 - Semiconductor device and method of manufacturing same: A method of manufacturing a semiconductor device comprises forming a trench in a semiconductor substrate, forming a first insulating film having a first recessed portion in the trench, forming a coating film so as to fill the first recessed portion therewith, transforming the coating film into a second insulating film,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100055870 - Manufacturing method of semiconductor substrate and manufacturing method of semiconductor device: To provide a manufacturing method of a semiconductor substrate and a manufacturing method of a semiconductor device, which prevent reduction in breakdown voltage of a gate oxide film of a device formed in a semiconductor substrate to improve a reliability of the gate oxide film. A manufacturing method of a... Agent: Young & Thompson
20100055871 - Memory in logic cell: Methods, devices, and systems for a memory in logic cell are provided. One or more embodiments include using a cell structure having a first gate, a second gate, and a third gate, e.g., a control gate, a back gate, and a floating gate, as a memory in logic cell. The... Agent: Brooks, Cameron & Huebsch , PLLC
20100055873 - Led-laser lift-off method: The present invention discloses an LED-laser lift-off method, which applies to lift off a transient substrate from an epitaxial layer grown on the transient substrate after a support substrate having an adhesion metal layer is bonded to the epitaxial layer. Firstly, the epitaxial layer is etched to define separation channels... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20100055872 - Method for manufacturing semiconductor layer and semiconductor device: An object is that a region separated from a semiconductor substrate when a supporting substrate is larger than the semiconductor substrate does not easily move. A method for manufacturing a semiconductor layer includes the steps of: irradiating a plurality of semiconductor substrates with ions to form embrittlement layers in the... Agent: Eric Robinson
20100055874 - Layer transfer of films utilizing controlled propagation: A film of material may be formed by providing a semiconductor substrate having a surface region and a cleave region located at a predetermined depth beneath the surface region. During a process of cleaving the film from the substrate, shear in the cleave region is carefully controlled to achieve controlled... Agent: Townsend And Townsend And Crew, LLP
20100055876 - Laser processing method and laser processing apparatus: A laser beam machining method and a laser beam machining device capable of cutting a work without producing a fusing and a cracking out of a predetermined cutting line on the surface of the work, wherein a pulse laser beam is radiated on the predetermined cut line on the surface... Agent: Drinker Biddle & Reath (dc)
20100055875 - Method for manufacturing semiconductor chip and method for processing semiconductor wafer: In a laser processing step S3, boundary sections among semiconductor elements 2 of a resist film 4 are exposed to a laser beam 13a, to thus form in the resist film 4 boundary grooves 5—which partition the semiconductor elements 2 from each other—and to uncover a surface 1b of a... Agent: Pearne & Gordon LLP
20100055878 - Fabrication method of semiconductor device: A technique with which die bonding can be carried out without forming a void in a bond area is provided. A vacuum supply line that connects to a vacuum chuck hole formed in the bottom face of a vacuuming collet and supplies the vacuuming collet with reduced pressure for vacuum... Agent: Miles & Stockbridge PC
20100055877 - Wafer processing method: Disclosed herein is a wafer processing method for dividing a wafer along a plurality of streets. The wafer processing method includes a back grinding step of grinding the back side of the wafer in an area corresponding to a device area to thereby reduce the thickness of the device area... Agent: Greer, Burns & Crain
20100055879 - Method for manufacturing a semiconductor device: A wafer is mounted on the top surface of the stage having an electrostatic chuck function, and the wafer at 50° C. or more is cooled to a temperature lower than 50° C. In this step, the voltage to be applied to the internal electrode provided in the stage is... Agent: Mattingly & Malur, P.C.
20100055881 - Heat treatment method for compound semiconductor and apparatus therefor: A heat treatment method for compound semiconductors includes a step for placing an object to be treated on a stage in a process chamber, and a step for irradiating the surface of the object with an electromagnetic wave having a specific frequency by introducing the electromagnetic wave into the process... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100055880 - Selective growth of polycrystalline silicon-containing semiconductor material on a silicon-containing semiconductor surface: A method of depositing polycrystalline silicon exclusively on monocrystalline first silicon surface portions of a substrate surface which besides the first surface portions additionally has insulator surface portions, comprising the steps of depositing boron on the first silicon surface portions in an amount which in relation to the first silicon... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP
20100055883 - Group iii-nitride semiconductor thin film, method for fabricating the same, and group iii-nitride semiconductor light emitting device: Disclosed herein is a high-quality group III-nitride semiconductor thin film and group III-nitride semiconductor light emitting device using the same. To obtain the group III-nitride semiconductor thin film, an AlInN buffer layer is formed on a (1-102)-plane (so called r-plane) sapphire substrate by use of a MOCVD apparatus under atmospheric... Agent: Mcdermott Will & Emery LLP
20100055882 - Junction termination extension with controllable doping profile and controllable width for high-voltage electronic devices: Methods for producing a junction termination extension surrounding the edge of a cathode or anode junction in a semiconductor substrate, where the junction termination extension has a controlled arbitrary lateral doping profile and a controlled arbitrary lateral width, are provided. A photosensitive material is illuminated through a photomask having a... Agent: Naval Research Laboratory Associate Counsel (patents)
20100055884 - Manufacturing method for silicon wafer: In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second... Agent: Foley And Lardner LLP Suite 500
20100055885 - Method of making low work function component: A method for fabricating a component is disclosed. The method includes: providing a member having an effective work function of an initial value, disposing a sacrificial layer on a surface of the member, disposing a first agent within the member to obtain a predetermined concentration of the agent at said... Agent: General Electric Company Global Research
20100055886 - Semiconductor manufacturing method and semiconductor device: A method of manufacturing a semiconductor device includes forming a mask layer on a first-conductivity-type semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a projecting semiconductor layer, forming a first insulating layer on the semiconductor substrate to cover a lower portion of the... Agent: Foley And Lardner LLP Suite 500
20100055887 - Laser diffusion fabrication of solar cells: A method of semiconductor junction formation in Laser diffusion process for fabrication of solar cells provides for delivery of inert gases in the vicinity of the Si wafer while dopant species are being diffused form a dopant source into the surface of the wafer irradiated by a laser beam. The... Agent: Ipg Photonics Corporation
20100055888 - Semiconductor device fabrication method: There is provided a semiconductor device fabrication method including: forming a gate electrode film on a substrate; forming an antireflection film on a surface at the opposite side of the gate electrode film to the substrate; forming a resist pattern on a surface at the opposite side of the antireflection... Agent: Rabin & Berdo, PC
20100055889 - Composite charge storage structure formation in non-volatile memory using etch stop technologies: Semiconductor-based non-volatile memory that includes memory cells with composite charge storage elements is fabricated using an etch stop layer during formation of at least a portion of the storage element. One composite charge storage element suitable for memory applications includes a first charge storage region having a larger gate length... Agent: Vierra Magen/sandisk Corporation
20100055890 - Method for fabricating non-volatile memory: A method for fabricating a non-volatile memory is provided. The method includes a stacked structure and a consuming layer are formed in sequence over a substrate. A converting process is performed at a peripheral region of the consuming layer to form a first insulating layer. A conductive layer is formed... Agent: J C Patents
20100055891 - Dual gate structure, fabrication method for the same, semiconductor device having the same, and semiconductor device fabrication method: In one embodiment, a semiconductor device includes at least two stacked gate structures formed on a substrate. The two stacked gate structures each include a semiconductor layer and a metal layer over the semiconductor layer. The two stacked gate structures on the substrate are characterized by differential intermediate layers, one... Agent: F. Chau & Associates, LLC
20100055892 - Method for forming a semiconductor device: A method for forming a semiconductor device. One embodiment provides a semiconductor substrate having a trench with a sidewall isolation. The sidewall isolation is removed in a portion of the trench. A gate dielectric is formed on the laid open sidewall. A gate electrode is formed adjacent to the date... Agent: Dicke, Billig & Czaja
20100055894 - Method for manufacturing semiconductor device: It is an object to form a conductive region between a front surface and a rear surface of an insulating film without forming contact holes in the insulating film. A method for manufacturing a semiconductor device is provided, in which an insulating film is formed over a semiconductor element and... Agent: Cook Alex Ltd
20100055893 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device according to one embodiment includes: forming an interlayer sacrificial film and an insulating film located thereon above a semiconductor substrate having a semiconductor element, the interlayer sacrificial film having a wiring provided therein; etching the insulating film, or, etching the insulating film and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100055895 - Electrically conductive structure on a semiconductor substrate formed from printing: Provided are methods for forming an electrically conductive structure of a desired three-dimensional shape on a substantially planar surface of a substrate, e.g., a semiconductor wafer. Typically, the particulate matter is deposited in a layer-by-layer manner and adhered to selected regions on the substrate surface. The particulate matter may be... Agent: Peters Verny , L.L.P.
20100055896 - Semiconductor device: It is an object of the present invention to provide a volatile organic memory in which data can be written other than during manufacturing and falsification by rewriting can be prevented, and to provide a semiconductor device including such an organic memory. It is a feature of the invention that... Agent: Eric Robinson
20100055897 - Wet cleaning stripping of etch residue after trench and via opening formation in dual damascene process: After trench line pattern openings and via pattern openings are formed in a inter-metal dielectric insulation layer of a semiconductor wafer using trench-first dual damascene process, the wafer is wet cleaned in a single step wet clean process using a novel wet clean solvent composition. The wet clean solvent effectively... Agent: Duane Morris LLP (tsmc)IPDepartment
20100055898 - Method for fabricating an integrated circuit: A method for fabricating an integrated circuit is provided. A substrate having thereon a first conductive wire and a second conductive wire is provided. A liner is formed on the first conductive wire and second conductive wire. An ashable material layer is filled into a gap between the first conductive... Agent: North America Intellectual Property Corporation
20100055899 - Particle reduction in pecvd processes for depositing low-k material by using a plasma assisted post-deposition step: When forming dielectric materials of reduced dielectric constant in sophisticated metallization systems, the creation of defect particles on the dielectric material may be reduced during a plasma enhanced deposition process by inserting an inert plasma step after the actual deposition step.... Agent: Williams, Morgan & Amerson
20100055901 - Laser material removal methods and apparatus: Embodiments of the present invention generally provide methods and apparatus for material removal using lasers in the fabrication of solar cells. In one embodiment, an apparatus is provided that precisely removes portions of a dielectric layer deposited on a solar cell substrate according to a desired pattern and deposits a... Agent: Patterson & Sheridan, LLP - - Appm/tx
20100055900 - Mask and method for fabricating semiconductor device using the same: A mask for forming a metal line and a via contact, and a method for fabricating a semiconductor device using the same, minimizes misalignment. The mask includes a first mask region having a dark tone for light shading, a second mask region having a half tone, being disposed within the... Agent: Sherr & Vaughn, PLLC
20100055903 - Enhancing structural integrity of low-k dielectrics in metallization systems of semiconductor devices by using a crack suppressing material layer: During the formation of metallization layers of sophisticated semiconductor devices, the damaging of sensitive dielectric materials, such as ULK materials, may be significantly reduced during a CMP process by applying a compressive stress level. This may be accomplished, in some illustrative embodiments, by forming a compressively stressed cap layer on... Agent: Williams, Morgan & Amerson
20100055902 - Reducing critical dimensions of vias and contacts above the device level of semiconductor devices: Contact elements may be formed on the basis of a mask layer having openings, the width of which may be reduced by etching or deposition, thereby extending the process margins for a given lithography technique. Consequently, yield losses caused by short circuits in the contact level of sophisticated semiconductor devices... Agent: Williams, Morgan & Amerson
20100055904 - Method for reducing tungsten roughness and improving reflectivity: Methods of producing low resistivity tungsten bulk layers having lower roughness and higher reflectivity are provided. The smooth and highly reflective tungsten layers are easier to photopattern than conventional low resistivity tungsten films. The methods involve CVD deposition of tungsten in the presence of alternating nitrogen gas pulses, such that... Agent: Weaver Austin Villeneuve & Sampson LLP - Novl Attn.: Novellus Systems, Inc.
20100055905 - Method of forming an aluminum oxide layer: Methods of forming aluminum oxide layers on substrates are disclosed. In some embodiments, the method includes depositing an aluminum oxide seed layer on the substrate using a first process having a first deposition rate. The method further includes depositing a bulk aluminum oxide layer atop the seed layer using a... Agent: MoserIPLaw Group / Applied Materials, Inc.
20100055907 - Method for achieving very small feature size in semiconductor device by undertaking silicide sidewall growth and etching: In the present method of fabricating a semiconductor device, initially, a semiconductor substrate is provided. An oxide layer is provided on and in contact with the substrate, and a polysilicon layer is provided on and in contact with the oxide layer. A layer of photoresist is provided on the polysilicon... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP
20100055908 - Method for producing a semiconductor wafer: A method for producing a semiconductor wafer. The method includes placing the semiconductor wafer in a cutout in a carrier. Both sides of the semiconductor wafer are polished between an upper and a lower polishing plate with a polishing agent until the thickness of the center of the semiconductor wafer... Agent: Darby & Darby P.C.
20100055909 - Semiconductor polishing compound, process for its production and polishing method: A semiconductor polishing compound comprising cerium oxide abrasive grains, water and an additive, wherein the additive is a water-soluble organic polymer such as ammonium polyacrylate or an anionic surfactant, the pH at 25° C. is from 3.5 to 6, and the concentration of the additive is from 0.01 to 0.5%... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100055906 - Two-step hardmask fabrication methodology for silicon waveguides: Techniques are disclosed for efficiently fabricating semiconductors including waveguide structures. In particular, a two-step hardmask technology is provided that enables a stable etch base within semiconductor processing environments, such as the CMOS fabrication environment. The process is two-step in that there is deposition of a two-layer hardmask, followed by a... Agent: Bae Systems
20100055910 - Exposure mask and method for forming semiconductor device using the same: Disclosed herein is a method for forming a semiconductor device that stacks an etched layer and a first hard mask layer on a semiconductor substrate, patterns the first hard mask layer in a high density region and a low density region, using a first exposure mask, forms a first spacer... Agent: Ampacc Law Group
20100055911 - Plasma processing method and resist pattern modifying method: A plasma processing method includes modifying a resist pattern of the substrate; and trimming the modified resist pattern through a plasma etching. The modifying includes: supplying the processing gas for modification from the processing gas supply unit to the inside of the processing chamber while the substrate having a surface... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100055912 - Semiconductor fabricating process: A semiconductor fabricating process is provided. First, a substrate is provided. The substrate has thereon a stacked structure and a mask layer disposed on the stacked structure. Thereafter, an oxide layer is formed on a surface of the mask layer and a surface of at least a portion of the... Agent: J C Patents
20100055913 - Methods of forming a photoresist-comprising pattern on a substrate: A method of forming a photoresist-comprising pattern on a substrate includes forming a patterned first photoresist having spaced first masking shields in at least one cross section over a substrate. The first masking shields are exposed to a fluorine-containing plasma effective to form a hydrogen and fluorine-containing organic polymer coating... Agent: Wells St. John P.s.
20100055914 - Methods of forming fine patterns in semiconductor devices: Methods of forming a semiconductor device can be provided by simultaneously forming a plurality of mask patterns using self-aligned reverse patterning, including respective mask pattern elements having different widths.... Agent: Myers Bigel Sibley & Sajovec
20100055916 - Method for decapsulating package: A method for decapsulating a package is provided. The method comprises steps of providing a package having a chip therein, wherein the chip has an active surface and a rear surface. Further, the package further comprises a heat sink, a plurality of solder bumps, a substrate, an underfill and a... Agent: North America Intellectual Property Corporation
20100055915 - Processing apparatus, processing method, and plasma source: [Means for Solving Problems] The processing apparatus has a chamber, a retaining means provided in the chamber for retaining a workpiece, an active atom supplying means for supplying an active atom into the chamber, and a chemical supplying means for supplying a chemical into the chamber. For the surface of... Agent: Quinn Emanuel Koda & Androlia
20100055917 - Method for forming active pillar of vertical channel transistor: A method for forming an active pillar of a vertical channel transistor includes forming a hard mask pattern on a substrate, etching vertically the substrate using the hard mask pattern as an etch barrier to form an active pillar, and etching horizontally to remove by-product remaining on the exposed substrate,... Agent: Ip & T Law Firm PLC
20100055918 - Substrate processing apparatus and method of manufacturing semiconductor device: Metal corrosion and substrate contamination can be suppressed, and process quality and yield can be improved. A substrate processing apparatus comprises: a process chamber; a substrate holder; a cover part closing and opening the process chamber; a substrate holder stage; a rotary mechanism rotating the substrate holder stage; a rotation... Agent: Brundidge & Stanger, P.C.
20100055920 - Apparatus and method for enhancing plasma etch: The present invention discloses a new apparatus and method to enhance the plasma etch rate, etch selectivity and etch uniformity. The present invention will apply sonic waves to the work during plasma etch process. The sonic waves will enhance the plasma etch rate. The applied sonic waves can be of... Agent: Gang Grant Peng
20100055919 - Integration cmos compatible of micro/nano optical gain materials: A method is provided for the integration of an optical gain material into a Complementary metal oxide semiconductor device, the method comprising the steps of: configuring a workpiece from a silicon wafer upon which is disposed an InP wafer bearing an epitaxy layer; mechanically removing the InP substrate; etching the... Agent: Bae Systems
20100055921 - Selective etching of silicon dioxide compositions: A process for selectively etching a material comprising SiO2 over silicon, the method comprising the steps of: placing a silicon substrate comprising a layer of a material comprising SiO2 within a reactor chamber equipped with an energy source; creating a vacuum within the chamber; introducing into the reactor chamber a... Agent: Air Products And Chemicals, Inc. Patent Department
20100055923 - Conformal etch material and process: The present disclosure provides a method for etching a substrate. The method includes forming a resist pattern on the substrate; applying an etching chemical fluid to the substrate, wherein the etching chemical fluid includes a diffusion control material; removing the etching chemical fluid; and removing the resist pattern.... Agent: Haynes And Boone, LLPIPSection
20100055922 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device improves the variation in critical dimensions of neighboring patterns when employing a negative SPT process. The method includes forming an etch stop layer on an etch target layer, forming a first hard mask pattern on the etch stop layer, forming a spacer pattern... Agent: Ip & T Law Firm PLC
20100055924 - Apparatus and method for edge bevel removal of copper from silicon wafers: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems provide the thin layer of pre-rinsing liquid before applying etchant at the edge bevel region of the wafer. The etchant is less diluted... Agent: Weaver Austin Villeneuve & Sampson LLP - Novl Attn.: Novellus Systems, Inc.
20100055925 - Heater, manufacturing apparatus for semiconductor device, and manufacturing method for semiconductor device: A heater for heating a wafer includes elements that are arranged at a distance from one another in a rotationally symmetrical fashion with respect to a shaft extending through a center of the wafer, an electrode being provided to each of the elements to heat the wafer uniformly.... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20100055926 - Manufacturing method of semiconductor device: A manufacturing method of a semiconductor device includes the steps of carrying a substrate in a processing chamber, bringing the processing chamber into a state at a first pressure by supplying a silicon compound gas which contains carbon and hydrogen into the processing chamber, forming a silicon oxide film on... Agent: North Star Intellectual Property Law, PC
20100055927 - Method of manufacturing semiconductor device and substrate processing apparatus: A silicon nitride film including stoichiometrically excessive silicon with respect to nitrogen is formed. The silicon nitride film may be formed by supplying dichlorosilane to a substrate under a condition where CVD (chemical vapor deposition) reaction is caused to form a silicon film including several or less atomic layers on... Agent: Brundidge & Stanger, P.C.Previous industry: Chemistry: analytical and immunological testing
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