Semiconductor device manufacturing: process inventions 09/09

20090239313 - Integrated circuit chip design flow methodology including insertion of on-chip or scribe line wireless process monitoring and feedback circuitry: Disclosed are embodiments of a design and manufacturing system and an associated method that allow for design analysis and for insertion, during wafer manufacture, of intra-process monitoring circuitry. These embodiments use a library of pre-qualified intra-process monitoring circuits and a cross-correlation table that links different monitoring circuits with different IC... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090239314 - Methods of manufacturing a semiconductor device: Methods of manufacturing a semiconductor device and an apparatus for the manufacturing of semiconductor devices are provided. An embodiment regards providing a process which changes the volume of at least one layer of a semiconductor substrate or of at least one layer deposited on the semiconductor substrate, and measuring a... Agent: Slater & Matsil, L.L.P.

20090239315 - Method and system for processing test wafer in photolithography process: A method and a system for processing a test wafer in a photolithography process are provided for processing an ith layer of the test wafer, and i is a positive integer. In the present method, a compensation value is calculated according to historical compensation behaviors of an equipment, relationships between... Agent: Jianq Chyun Intellectual Property Office

20090239316 - Method and system to dynamically compensate for probe tip misalignement when testing integrated circuits: Method for dynamically compensating probe tip misalignment with a semiconductor wafer. The wafer is located on a handler and the wafer is adjusted to a first temperature. Probe tips of an inspection system are moved to a first position centered above pads of a test module on the wafer. The... Agent: Texas Instruments Incorporated

20090239317 - Method and jig structure for positioning bare dice: A method and jig structure for positioning bare dice is disclosed. The jig structure for positioning at least one bare dice includes a trap having at least one positioning groove wherein the depth of the positioning groove is less than the height of the bare dice. Basing on the positioning... Agent: Rosenberg, Klein & Lee

20090239318 - Glass-coated light-emitting element, light-emitting element-attached wiring board, method for producing light-emitting element-attached wiring board, lighting device and projector: A glass-coated light-emitting element 10 of the invention has a semiconductor light-emitting element 2 having a surface on which no electrode is formed is coated with a glass 1, in which a surface of the glass 1 constitutes a part of a spherical surface broader than a hemispherical surface, the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090239319 - Package for a light emitting diode and a process for fabricating the same: A package for an LED, comprises a metal substrate, at least one LED chip, and an insulative housing, wherein the metal substrate has a first terminal and a second terminal, and the first terminal is formed with a recess. The at least one LED chip is arranged in the recess... Agent: Rosenberg, Klein & Lee

20090239320 - Semiconductor device and peeling off method and method of manufacturing semiconductor device: The present invention provides a peeling off method without giving damage to the peeled off layer, and aims at being capable of peeling off not only a peeled off layer having a small area but also a peeled off layer having a large area over the entire surface at excellent... Agent: Eric Robinson

20090239321 - Transistor array substrate and display panel: A transistor array substrate includes a plurality of driving transistors which are arrayed in a matrix on a substrate. The driving transistor has a gate, a source, a drain, and a gate insulating film inserted between the gate, and the source and drain. A plurality of signal lines are patterned... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090239322 - Method of fabricating liquid crystal display: A liquid crystal display device includes a driving circuit provided with a switching device on a liquid crystal display panel, the switching device including a plurality of thin film transistors connected in parallel and commonly interconnected using a gate electrode.... Agent: Mckenna Long & Aldridge LLP

20090239323 - Microresonator systems and methods of fabricating the same: Various embodiments of the present invention are related to microresonator systems and to methods for fabricating the microresonator systems. In one embodiment, a method of fabricating a microresonator system comprises: forming a multilayer system having a bottom layer, a top layer, and an intermediate layer having one or more quantum... Agent: Hewlett Packard Company

20090239324 - Method for manufacturing semiconductor device using separable support body: In a method for manufacturing a semiconductor device, a first conductivity type semiconductor layer and a second conductivity type semiconductor layer are sequentially grown on a growth substrate. Then, an electrode layer is formed on the second conductivity type semiconductor layer. Then, a support body is adhered to the electrode... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090239325 - Method of fabricating a integrated pressure sensor: A method of fabricating a pressure sensor (30) for harsh environments such as vehicle tires, formed from a first wafer substrate (32) having first and second opposing planar surfaces. CMOS circuitry (34) is deposited on the first planar surface and a layer of passivation material is deposited on the circuitry.... Agent: Silverbrook Research Pty Ltd

20090239326 - Method for manufacturing microcrystalline silicon solar cell: A method for manufacturing a microcrystalline silicon solar cell comprises forming a zinc oxide transparent electrode with a textured surface on an insulation substrate by chemical vapor deposition, etching the zinc oxide transparent electrode with acid water solution and depositing a microcrystalline silicon thin film on the zinc oxide transparent... Agent: The Belles Group, P.C.

20090239327 - Cmos image sensor and method of fabricating the same: In a CMOS image sensor and method of fabricating the same, the CMOS image sensor is comprised of a pixel array generating image signals and a peripheral circuit processing the image signals. In the method, a substrate is provided having a pixel region and a peripheral circuit region. A photo-receiving... Agent: Mills & Onello LLP

20090239328 - Photo-detector for detecting image signal of infrared laser radar and method of manufacturing the same: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n... Agent: Ladas & Parry LLP

20090239329 - Method for manufacturing package structure of optical device: A package structure of optical devices has a chip, a sealant, a cover, a substrate, a plurality of bonding wires, and a transparent encapsulant. The chip has at least an optical device and a plurality of chip connection pads. The sealant is disposed around the optical elements. The cover is... Agent: Jianq Chyun Intellectual Property Office

20090239332 - Bifacial cell with extruded gridline metallization: Provided is a bifacial photovoltaic arrangement comprising a bifacial cell which included a semiconductor layer having a first surface and a second surface, a first passivation layer formed on the first surface of the semiconductor layer and a second passivation layer formed on the second surface of the semiconductor layer,... Agent: Bever, Hoffman & Harms, LLP

20090239330 - Methods for forming composite nanoparticle-metal metallization contacts on a substrate: A method for forming a contact to a substrate is disclosed. The method includes providing a substrate, the substrate being doped with a first dopant; and diffusing a second dopant into at least a first side of the substrate to form a second dopant region, the first side further including... Agent: Foley & Lardner LLP

20090239331 - Methods for forming multiple-layer electrode structures for silicon photovoltaic cells: Methods for forming a photovoltaic cell electrode structure, wherein the photovoltaic cell includes a semiconductor substrate having a passivation layer thereon, includes providing a plurality of contact openings through the passivation layer to the semiconductor substrate, selectively plating a contact metal into the plurality of contact openings to deposit the... Agent: Oliff & Berridge, PLC

20090239333 - Organic semiconductor device and method of manufacturing the same: A low-cost and efficient process producing improved organic electronic devices such as transistors that may be used in a variety of applications is described. The applications may include radio frequency identification (RFID) devices, displays and the like. In one embodiment, the improved process is implemented by flash annealing a substrate... Agent: Weyerhaeuser Company Intellectual Property Dept., Ch 1j27

20090239334 - Electrode formed in aperture defined by a copolymer mask: A method of manufacturing a memory device is provided that in one embodiment includes providing an interlevel dielectric layer including a first via containing a memory material; forming at least one insulating layer on an upper surface of the memory material and the interlevel dielectric layer; forming an cavity through... Agent: Scully, Scott, Murphy & Presser, P.C.

20090239335 - Semiconductor device and manufacturing method thereof: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode... Agent: Cook Alex Ltd

20090239337 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side... Agent: Perkins Coie LLP Patent-sea

20090239336 - Semiconductor packages and methods of fabricating the same: A semiconductor package and module, and methods of fabricating the same are provided. A method of fabricating a semiconductor package may include bonding rear surfaces of first and second semiconductor chips to each other, each of the semiconductor chips having chip pads exposed on front surfaces. The method may also... Agent: Harness, Dickey & Pierce, P.L.C

20090239338 - Method of forming an interconnect on a semiconductor substrate: The present invention relates to a method of forming a wire bond-free conductive interconnect area on a semiconductor substrate. A semiconductor substrate with an electrically conductive protrusion, defining a bond pad, is provided as well as a plurality of carbon nanotubes. The plurality of carbon nanotubes is immobilized on the... Agent: Foley & Lardner LLP

20090239339 - Method of stacking dies for die stack package: A method of manufacturing a die stack package includes the steps of providing a wafer having a first surface and a second surface, said first surface having a plurality of cut ways thereon, the second surface being coated with adhesive of a predetermined thickness at a predetermined position thereof, removing... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20090239340 - Methods for a multiple die integrated circuit package: Methods for a multiple die package for integrated circuits are disclosed. An insulator layer is provided and one or more vias are formed within it. The insulator may be provided without vias, and vias formed later. At least one integrated circuit is provided and electrically coupled to at least one... Agent: Vierra Magen/sandisk Corporation

20090239341 - Ic packaging process: An IC packaging process includes the steps of preparing a substrate having a chip-receiving place formed on a front side thereof; creating a dam layer on the front side of the substrate; coating an ultraviolet adhesive layer on the dam layer; removing a part of the ultraviolet adhesive layer that... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20090239342 - Thin film transistor substrate of horizontal electric field type liquid crystal display device and fabricating method thereof: A thin film transistor substrate of horizontal electric field type includes: a gate line and a first common line formed on a substrate to be in parallel to each other; a data line crossing the gate line and the first common line with a gate insulating film therebetween to define... Agent: Morgan Lewis & Bockius LLP

20090239343 - Methods of forming lines of capacitorless one transistor dram cells, methods of patterning substrates, and methods of forming two conductive lines: This invention includes a capacitorless one transistor DRAM cell that includes a pair of spaced source/drain regions received within semiconductive material. An electrically floating body region is disposed between the source/drain regions within the semiconductive material. A first gate spaced is apart from and capacitively coupled to the body region... Agent: Wells St. John P.s.

20090239344 - Methods of forming field effect transistors having silicided source/drain contacts with low contact resistance: Methods of forming integrated circuit devices according to embodiments of the present invention include forming a PMOS transistor having P-type source and drain regions, in a semiconductor substrate, and then forming a diffusion barrier layer on the source and drain regions. A silicon nitride layer is deposited on at least... Agent: Myers Bigel Sibley & Sajovec

20090239345 - Methods of fabricating nonvolatile semiconductor memory devices: A nonvolatile semiconductor memory device includes a plurality of pillars protruding upward from a semiconductor substrate and having respective top surfaces and opposing sidewalls, a bit line on the top surfaces of the pillars and connecting a row of the pillars along a first direction, a pair of word lines... Agent: Myers Bigel Sibley & Sajovec

20090239346 - Semiconductor device with finfet and method of fabricating the same: A FinFET semiconductor device has an active region formed of a semiconductor substrate and projecting from a surface of the substrate. A fin having a first projection and a second projection composed of the active region are arranged in parallel and at each side of a central trench formed in... Agent: Mills & Onello LLP

20090239347 - Method of forming mos device: The present invention provides a method for forming a metal-oxide-semiconductor (MOS) device. The method includes at least the steps of forming a silicon germanium layer by the selective epitaxy growth process and forming a cap layer on the silicon germanium layer by the selective growth process. Hence, the undesirable effects... Agent: J C Patents, Inc.

20090239348 - Semiconductor device and method of manufacturing the same: A semiconductor device formed on a strained silicon layer and a method of manufacturing such a semiconductor device are disclosed. In accordance with this invention, a first silicon germanium layer is formed on a single crystalline silicon substrate; a second silicon germanium layer is formed on the first silicon germanium... Agent: Mills & Onello LLP

20090239349 - Nonvolatile memory devices and methods of forming the same: In a nonvolatile memory device and a method of fabricating the same, a device isolation layer is formed defining an active region in a semiconductor substrate. A gate insulation layer and a first conductive layer are formed on the semiconductor substrate. A pair of stack patterns are formed, each having... Agent: Mills & Onello LLP

20090239350 - High performance tapered varactor: Disclosed is a semiconductor structure, which includes a non-planar varactor having a geometrically designed depletion zone with a taper, as to provide improved Cmax/Cmin with low series resistance. Because of the taper, the narrowest portion of the depletion zone can be designed to be fully depleted, while the remainder of... Agent: Scully, Scott, Murphy & Presser, P.C.

20090239351 - Method for fabricating capacitor structures using the first contact metal: A capacitor structure is fabricated with only slight modifications to a conventional single-poly CMOS process. After front-end processing is completed, grooves are etched through the pre-metal dielectric layer to expose polysilicon structures, which may be salicided or non-salicided. A dielectric layer is formed over the exposed polysilicon structures. A conventional... Agent: Bever Hoffman & Harms, LLP 901 Campisi Way

20090239352 - Method for producing silicon oxide film, control program thereof, recording medium and plasma processing apparatus: A silicon oxide film formation method includes generating plasma inside a process chamber of a plasma processing apparatus, by use of a process gas having an oxygen ratio of 1% or more, and a process pressure of 133.3 Pa or less; and oxidizing by the plasma a silicon surface exposed... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090239353 - Methods for forming multi-layer three-dimensional structures: The embodiments of the present invention are directed to the formation of multi-layer three-dimensional structures by forming and attaching a plurality of individual layers where each of the layers comprises one or more materials forming a desired pattern. In one embodiment, a multi-layer three-dimensional structure is formed by forming a... Agent: Gang Zhang

20090239354 - Method for manufacturing soi substrate: Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate... Agent: Eric Robinson

20090239355 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device includes spraying fluid onto a surface of a treatment target substrate including a semiconductor substrate; forming a protection layer on the surface of the treatment target substrate after spraying the fluid; selectively removing the protection layer and a part of the treatment target... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090239357 - Algan substrate and production method thereof: A substrate is formed of AlxGa1-xN, wherein 0≦x≦1. The substrate is a single crystal and is used producing a Group III nitride semiconductor device. A method for producing a substrate of AlxGa1-xN, wherein 0<x≦1, includes the steps of forming a layer of AlxGa1-xN, wherein 0<x≦1, on a base material and... Agent: Sughrue Mion, PLLC

20090239356 - Device manufacturing method: A device manufacturing method includes a buffer layer forming step of forming a buffer layer on an underlying substrate, a mask pattern forming step of forming, on the buffer layer, a mask pattern which partially covers the buffer layer, a growth step of growing a group III nitride crystal from... Agent: Cowan Liebowitz & Latman P.c

20090239358 - Memory device manufacturing method: A method for making a memory device includes providing a dielectric material, having first and second upwardly and inwardly tapering surfaces and a surface segment connecting the first and second surfaces. First and second electrodes are formed over the first and second surfaces. A memory element is formed over the... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20090239359 - Integrated process system and process sequence for production of thin film transistor arrays using doped or compounded metal oxide semiconductor: The present invention generally relates to an integrated processing system and process sequence that may be used for thin film transistor (TFT) fabrication. In fabricating TFTs, numerous processes may be performed on a substrate to ultimately produce the desired TFT. These processes may be performed in numerous processing chambers that... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090239360 - Semiconductor device manufacturing apparatus and method: A sealing member 21 is lifted to cause its edge 21a to be in contact with a contact surface 17a of a support member 13. In the state where a precision ejection nozzle 5 is isolated, a gas exhaust unit 41 is operated to exhaust the inside of a chamber... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090239361 - Method of manufacturing semiconductor device: An aspect of the invention provides a method of manufacturing a method of manufacturing a semiconductor element comprises the steps of: growing epitaxially a semiconductor layer on top of a semiconductor substrate; forming a patterned portion of the grown semiconductor layer by forming a pattern by a patterning process on... Agent: Mots Law, PLLC

20090239362 - Apparatus for manufacturing semiconductor device and method for manufacturing semiconductor device: An apparatus for manufacturing a semiconductor device, including in a reaction chamber: a rotor provided with a holding member holding a wafer thereon and a heater heating the wafer therein; a rotation drive mechanism; a gas supply mechanism; a gas exhaust mechanism; and a rectifying plate for rectifying the supplied... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090239363 - Methods for forming doped regions in semiconductor substrates using non-contact printing processes and dopant-comprising inks for forming such doped regions using non-contact printing processes: Methods for forming doped regions in semiconductor substrates using non-contact printing processes and dopant-comprising inks for forming such doped regions using non-contact printing processes are provided. In an exemplary embodiment, a method for forming doped regions in a semiconductor substrate is provided. The method comprises providing an ink comprising a... Agent: Honeywell International Inc. Patent Services

20090239364 - Method for forming insulating film and method for manufacturing semiconductor device: Disclosed is a method for forming a gate insulating film comprising an oxidation step wherein a silicon oxide film is formed by having an oxygen-containing plasma act on silicon in the surface of an object to be processed in a processing chamber of a plasma processing apparatus. The processing temperature... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090239365 - Nonvolatile semiconductor memory and fabrication method for the same: A nonvolatile semiconductor memory that allows simultaneous implementation of high performance transistors in a low-voltage circuit region and transistors with high withstand voltages in a high-voltage circuit region. The nonvolatile semiconductor memory includes a cell array region that comprises aligned memory cell transistors, each including a control gate electrode, which... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090239366 - Method of forming a transistor gate of a recessed access device, method of forming a recessed transistor gate and a non-recessed transistor gate, and method of fabricating an integrated circuit: Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the silicon in which one of the metals diffuses more readily in silicon than silicon does in the metal, and another of the metals diffuses less... Agent: Wells St. John P.s.

20090239367 - Nonvolatile memory device and method of fabricating the same: A method of fabricating a nonvolatile memory device includes forming a tunnel insulating layer on a semiconductor substrate, forming a charge storage layer on the tunnel insulating layer, forming a dielectric layer on the charge storage layer, the dielectric layer including a first aluminum oxide layer, a silicon oxide layer,... Agent: Lee & Morse, P.C.

20090239368 - Methods of forming an oxide layer and methods of forming a gate using the same: An oxide layer is selectively formed on a layer including silicon by a plasma process using hydrogen gas and a gas including oxygen. The hydrogen gas is controlled to have a flow rate less than about 50 percent of an overall flow rate by adding helium gas to the plasma... Agent: Myers Bigel Sibley & Sajovec

20090239369 - Method of forming electrical interconnects within insulating layers that form consecutive sidewalls: Methods of forming integrated circuit device having electrical interconnects include forming an electrically insulating layer on a substrate and forming a hard mask on the electrically insulating layer. The hard mask and the electrically insulating layer are selectively etched in sequence using a mask to define an opening therein. This... Agent: Myers Bigel Sibley & Sajovec

20090239370 - Methods of forming an antifuse and a conductive interconnect, and methods of forming dram circuitry: A first via opening is formed to a first conductor and a second via opening is formed to a second conductor. The first and second via openings are formed through insulative material. Then, the first conductor is masked from being exposed through the first via opening and to leave the... Agent: Wells St. John P.s.

20090239371 - Method for applying selectively a layer to a structured substrate by the usage of a temperature gradient in the substrate: A semiconductor wafer (10) is structured such that fine structures (3), such as membranes, bridges or tongues, with a thickness d<<D are formed, wherein D designates the thickness of the semiconductor wafer (10). Then particles of a desired material are applied. A temporal or spatial temperature gradient is generated in... Agent: Richard F. Jaworski C/o Cooper & Dunham

20090239373 - Chemical mechanical polishing method and method of manufacturing semiconductor device: A chemical mechanical polishing method comprises polishing an organic film using a slurry including polymer particles having a surface functional group and a water-soluble polymer.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090239372 - Seed layers for electroplated interconnects: One embodiment of the present invention is a method for depositing two or more seed layers for electroplating metallic interconnects over a substrate, the substrate having a patterned insulating layer which includes at least one opening and a field surrounding the at least one opening, the at least one opening... Agent: Uri Cohen

20090239374 - Methods of forming metal interconnect structures on semiconductor substrates using oxygen-removing plasmas and interconnect structures formed thereby: Methods of forming devices include forming a first electrically insulating layer having a metal interconnection therein, on a substrate and then forming a first electrically insulating barrier layer on an upper surface of the metal interconnection and on the first electrically insulating layer. The first electrically insulating barrier layer is... Agent: Myers Bigel Sibley & Sajovec

20090239375 - Dual damascene process: Structures and methods of forming metallization layers on a semiconductor component are disclosed. The method includes etching a metal line trench using a metal line mask, and etching a via trench using a via mask after etching the metal line trench. The via trench is etched only in regions common... Agent: Slater & Matsil LLP

20090239376 - Method for fabricating semiconductor device with interface barrier: A method for fabricating a semiconductor memory device includes forming a first layer, injecting a tungsten source gas and a silicon source gas simultaneously to form a tungsten silicide layer over the first layer, forming a tungsten nitride layer over the tungsten silicide layer without a post purge process of... Agent: Townsend And Townsend And Crew, LLP

20090239377 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor substrate, a copper-containing metal interconnect over the semiconductor substrate, and a copper-containing connection plug, and the metal interconnect includes metal elements other than copper, and a concentration of different metal elements in a connection portion between the metal interconnect and the connection plug is... Agent: Young & Thompson

20090239378 - Methods for forming a titanium nitride layer: Methods for forming titanium nitride layers are provided herein. In some embodiments, a method of forming a titanium nitride layer on a substrate may include providing a substrate into a processing chamber having a target comprising titanium disposed therein; supplying a nitrogen-containing gas into the processing chamber; sputtering a titanium... Agent: MoserIPLaw Group / Applied Materials, Inc.

20090239379 - Methods of planarization and electro-chemical mechanical polishing processes: A method of removing a material from a surface includes providing a substrate comprising a material having a surface, contacting the surface with a polishing medium, applying a voltage to the substrate to remove material from the surface, and changing the voltage during the removing material from the surface. An... Agent: Wells St. John P.s.

20090239380 - Polishing liquid for metal and polishing method using the same: A liquid for polishing a metal is provided that is used for chemically and mechanically polishing a conductor film including copper or a copper alloy in production of a semiconductor device, and a polishing method using the metal-polishing liquid is also provided. The liquid includes: (a) colloidal silica particles having... Agent: Moss & Burke, PLLC

20090239381 - Porous film: A porous film which is formed using a block copolymer composed of a water-soluble polymer and a water-insoluble polymer, has nanometer-size pores, and in which a desired functional polymer is present on the pore inner walls is provided. The porous film includes a microphase-separated morphology including a continuous phase which... Agent: Birch Stewart Kolasch & Birch

20090239382 - Method for selectively modifying spacing between pitch multiplied structures: Methods for circuit material processing are provided. In at least one such method, a substrate is provided with a plurality of overlying spacers. The spacers have substantially straight inner sidewalls and curved outer sidewalls. An augmentation material is formed on the plurality of spacers such that the inner or the... Agent: Knobbe Martens Olson & Bear LLP

20090239383 - Manufacturing method of semiconductor device: Provided is a semiconductor device manufacturing method by which plasma processing can be performed uniformly on a substrate. A plasma processing apparatus according to one embodiment of the present invention includes an auxiliary electrode provided annularly along a periphery of the lower electrode on a lateral side of the lower... Agent: Mots Law, PLLC

20090239384 - Substrate processing apparatus and substrate processing method: A discharge hole of a lower nozzle is directed at an angle of 5 degrees to 40 degrees slanting inward with respect to a normal to the upper surface of a bottom plate. Thus, the flow pressure of a processing solution discharged through the discharge hole is not excessively reduced.... Agent: Ostrolenk Faber Gerb & Soffen

20090239386 - Producing method of semiconductor device and substrate processing apparatus: Disclosed is a producing method of a semiconductor device, comprising: loading a substrate into a reaction furnace; forming a film on the substrate in the reaction furnace; unloading the substrate from the reaction furnace after the film has been formed; and forcibly cooling an interior of the reaction furnace in... Agent: Birch Stewart Kolasch & Birch

20090239385 - Substrate-supporting device having continuous concavity: A substrate-supporting device has a top surface for placing a substrate thereon composed of a plurality of surfaces separated from each other and defined by a continuous concavity being in gas communication with at least one through-hole passing through the substrate-supporting device in its thickness direction. The continuous concavity is... Agent: Knobbe Martens Olson & Bear LLP

20090239387 - Producing method of semiconductor device and substrate processing apparatus: Disclosed is a producing method of a semiconductor device produced by transferring a plurality of substrates into a processing chamber, supplying oxygen-containing gas and hydrogen-containing gas into the processing chamber which is in a heated state to process the plurality of substrates by oxidation, and transferring the plurality of the... Agent: Birch Stewart Kolasch & Birch

20090239389 - Method of forming a layer of material using an atomic layer deposition process: Disclosed is a method of forming a layer of material using an atomic layer deposition (ALD) process in a process chamber of a process tool. In one illustrative embodiment, the method includes identifying a target characteristic for the layer of material, determining a precursor pulse time for introducing a precursor... Agent: Wells St. John P.s.

20090239388 - Semiconductor device and method for manufacturing the same: A semiconductor light emitting element 2 that emits blue light is mounted face down on the top face of a pedestal 1, and a coating film 3 containing a YAG fluorescent material 6 that emits yellow light is placed so as to cover the top face and side face of... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090239390 - Methods for producing low stress porous and cdo low-k dielectric materials using precursors with organic functional groups: Methods of preparing a carbon doped oxide (CDO) layers having a low dielectric constant are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to one or multiple carbon-doped oxide precursors having molecules with at least one carbon-carbon triple bond, or carbon-carbon double... Agent: Weaver Austin Villeneuve & Sampson LLP - Novl Attn.: Novellus Systems, Inc.

20090233382 - High polarization ferroelectric capacitors for integrated circuits: One aspect of the invention relates to a method of manufacturing an integrated circuit comprising forming an array of ferroelectric memory cells on a semiconductor substrate, heating the substrate to a temperature near a Curie temperature of the ferroelectric cores, and subjecting the substrate to a temperature program, whereby thermally... Agent: Texas Instruments Incorporated

20090233381 - Interconnect for a gmr memory cells and an underlying conductive layer: A conductive plug located in a planar dielectric layer, under GMR memory cells, are used to directly connect the lower ferromagnetic layer of one of the GMR memory cell and a conductive layer under the planar dielectric layer.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090233384 - Method for measuring dopant concentration during plasma ion implantation: Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes positioning a substrate within a process chamber, generating a plasma above the substrate and transmitting a light generated by the plasma through the substrate, wherein... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090233383 - Plasma doping method and apparatus: A prescribed gas is introduced into a vacuum container 1 from a gas supply apparatus 2 while being exhausted by a turbomolecular pump 3 as an exhaust apparatus. The pressure in the vacuum container 1 is kept at a prescribed value by a pressure regulating valve 4. High-frequency electric power... Agent: Mcdermott Will & Emery LLP

20090233385 - Plasma doping method and plasma doping apparatus: Before a plasma doping process is performed, there is generated a plasma of a gas containing an element belonging to the same group in the periodic table as the primary element of a silicon substrate 9, e.g., a monosilane gas, in a vacuum chamber 1. Thus, the inner wall of... Agent: Mcdermott Will & Emery LLP

20090233386 - Method for forming an ink jetting device: A method for forming an ink jetting device includes providing a silicon substrate having a first surface having formed thereon a plurality of electrical heater elements to form a first upper exposed surface; depositing a polymer over the first upper exposed surface to form a sacrificial polymer layer; patterning the... Agent: Lexmark International, Inc. Intellectual Property Law Department

20090233387 - Linear plasma source for dynamic (moving substrate) plasma processing: The present invention generally relates to a method and apparatus for depositing a layer onto a substrate as the substrate is moving through the processing chamber. The substrate may move along a roll to roll system. A roll to roll system is a system where a substrate may be unwound... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090233388 - Manufacturing method of electro line for liquid crystal display device: A manufacturing method of an electro line for a liquid crystal display device includes depositing a barrier layer made of a conducting material on a substrate, depositing a copper layer (Cu) on the barrier layer, wet-etching the Cu layer using a first etchant, and dry-etching the barrier layer using a... Agent: Mckenna Long & Aldridge LLP

20090233389 - Method for manufacturing thin film transistor and method for manufacturing display device: A method for manufacturing a thin film transistor and a display device using a small number of masks is provided. A conductive film is formed, a thin-film stack body having a pattern is formed over the conductive film, an opening portion is formed in the thin-film stack body so as... Agent: Fish & Richardson P.C.

20090233390 - Light emitting device and manufacturing method thereof: The light emitting device according to the present invention is characterized in that a gate electrode comprising a plurality of conductive films is formed, and concentrations of impurity regions in an active layer are adjusted with making use of selectivity of the conductive films in etching and using them as... Agent: Eric Robinson

20090233392 - Liquid crystal display device and fabrication method thereof: Disclosed is a liquid crystal display (LCD) device having gate and data driving elements with improved heat dissipation properties. The driving elements each have the following: a source and a drain electrode, each with contact holes that provide electrical contact with an active area formed on the driving element's substrate;... Agent: Mckenna Long & Aldridge LLP

20090233391 - Liquid crystal display device and method of fabricating the same: A liquid crystal display device includes a plurality of gate lines and data lines crossing each other to define a plurality of pixel regions, a plurality of thin film transistors, each disposed in one of the pixel regions, and a plurality of pixel electrodes, each disposed in one of the... Agent: Morgan Lewis & Bockius LLP

20090233393 - Liquid crystal display with wide viewing angle with overlapping coupling electrodes forming capacitor interconnecting sub-pixel electrodes: A method of manufacturing an active matrix substrate is presented. The method includes forming a transistor having a gate line, a semiconductor layer, an insulating layer between the gate line and the semiconductor layer, a source electrode, and a drain electrode; forming a pixel electrode comprising a first sub-pixel electrode... Agent: Haynes And Boone, LLPIPSection

20090233394 - Led with substrate modifications for enhanced light extraction and method of making same: The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be formed on the emitting surface, prior to the RIE process, by cutting into the surface using a saw... Agent: Koppel, Patrick, Heybl & Dawson

20090233395 - Package of mems device and method for fabricating the same: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array bumps arrayed on an outer side of the bonding bumps, and an MEMS device wafer over which a plurality of first outer pads are... Agent: Morgan Lewis & Bockius LLP

20090233396 - Floating sheet production apparatus and method: This sheet production apparatus comprises a vessel defining a channel configured to hold a melt. The melt is configured to flow from a first point to a second point of the channel. A cooling plate is disposed proximate the melt and is configured to form a sheet on the melt.... Agent: Varian Semiconductor Equipment Assc., Inc.

20090233397 - Method and apparatus for forming the separating lines of a photovoltaic module with series-connected cells: For forming the separating lines, (5, 6, 7) which are produced in the functional layers (2, 3, 4) deposited on a transparent substrate (1) during manufacture of a photovoltaic module with series-connected cells (C1, C2, . . . ), there are used laser scanners (8) whose laser beam (14) produces... Agent: Flynn Thiel Boutell & Tanis, P.C.

20090233399 - Method of manufacturing photoelectric device: In a method of manufacturing a photoelectric device, a transparent conductive layer is formed on a substrate, and the transparent conductive layer is partially etched using an etching solution including hydrofluoric acid. Thus, a transparent electrode having a concavo-convex pattern on its surface is formed. When the transparent conductive layer... Agent: Haynes And Boone, LLPIPSection

20090233398 - Methods for forming particles from single source precursors, methods of forming semiconductor devices, and devices formed using such methods: Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles.... Agent: Traskbritt / Battelle Energy Alliance, LLC

20090233400 - Rigid-flexible printed circuit board manufacturing method for package on package: A manufacturing method for rigid-flexible multi-layer printed circuit board including: a flexible substrate of which circuits are formed on both sides and which is bendable; a rigid substrate which is laminated on the flexible substrate and circuits are formed on both sides and a cavity within which a semiconductor chip... Agent: Staas & Halsey LLP

20090233401 - Thin quad flat package with no leads (qfn) fabrication methods: Embodiments of the present invention include a method of packaging semiconductor devices. The method comprises the steps of molding a surface of a wafer, sawing the wafer into individual devices, attaching the individual semiconductor device to an adhesive surface, molding the exposed surface, and sawing the wafer into individual semiconductor... Agent: Fountainhead Law Group, PC

20090233402 - Wafer level ic assembly method: A wafer level integrated circuit assembly method is conducted as follows. First, a mother device wafer with plural first posts is provided. The first posts are used for electrical connection and are made of copper according to an embodiment. Solder is sequentially formed on the first posts. The solder is... Agent: Connolly Bove Lodge & Hutz LLP

20090233403 - Dual flat non-leaded semiconductor package: A DFN semiconductor package includes a leadframe having a die bonding pad formed integrally with a drain lead, a gate lead and a source lead, a die coupled to the die bonding pad, a die source bonding area coupled to the source lead and a die gate bonding area coupled... Agent: Schein & Cai LLP James Cai

20090233404 - Fabrication method of multi-domain vertical alignment pixel structure: A fabrication method of a multi-domain vertical alignment pixel structure includes providing a substrate, forming a gate on the substrate, and forming an insulating layer on the substrate. A channel layer and a semiconductor layer are formed on the insulating layer. A source, a drain, and a capacitor-coupling electrode are... Agent: Jianq Chyun Intellectual Property Office

20090233405 - Methods of forming nand-type nonvolatile memory devices: Methods of forming a NAND-type nonvolatile memory device include: forming first common drains and first common sources alternatively in an active region which is defined in a semiconductor substrate and extends one direction, forming a first insulating layer covering an entire surface of the semiconductor substrate, patterning the first insulating... Agent: Myers Bigel Sibley & Sajovec

20090233406 - Method for fabricating semiconductor memory device: A method of fabricating a semiconductor memory device to protect a tunneling insulating layer from etching-damage includes the steps of forming sequentially a tunnel insulating layer, a first conductive layer, a dielectric layer and a second conductive layer on a semiconductor substrate; etching the second conductive layer, the dielectric layer... Agent: Lowe Hauptman Ham & Berner, LLP

20090233407 - Method of fabricating a high-voltage transistor with an extended drain structure: A method for fabricating a high-voltage transistor with an extended drain region includes forming in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls; then partially filling each of the trenches with a dielectric material that covers... Agent: The Law Offices Of Bradley J. Bereznak

20090233409 - Method for production of semiconductor device: A method for producing a semiconductor device, the method includes the steps of: forming a hard mask layer with a mask opening on a semiconductor substrate in which is formed a source region; forming a side wall mask on the side wall of the mask opening; forming a trench by... Agent: Sonnenschein Nath & Rosenthal LLP

20090233408 - Semiconductor device manufacturing method: A method of manufacturing a semiconductor device having a polycrystalline silicon layer (5) includes; a step of forming a mask layer (7) on the polycrystalline silicon layer (5); a step of forming a side wall (8) that is provided on a side face of the mask layer (7) and covers... Agent: Foley And Lardner LLP Suite 500

20090233410 - Self-aligned halo/pocket implantation for reducing leakage and source/drain resistance in mos devices: A method of forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate, wherein the semiconductor substrate and a sidewall of the gate dielectric has a joint point; forming a gate electrode over the gate dielectric; forming a mask layer over the semiconductor... Agent: Slater & Matsil, L.L.P.

20090233411 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device includes a side wall spacer formed on the side surface of a gate electrode formed on the upper side of a semiconductor substrate with a gate insulation film therebetween, extension regions built up on the semiconductor substrate, and source/drain regions formed on the extension regions, wherein a... Agent: Sonnenschein Nath & Rosenthal LLP

20090233412 - Method for angular doping of source and drain regions for odd and even nand blocks: Stacked gate structures for a NAND string are created on a substrate. Source implantations are performed at a first implantation angle to areas between the stacked gate structures. Drain implantations are performed at a second implantation angle to areas between the stacked gate structures. The drain implantations create lower doped... Agent: Vierra Magen/sandisk Corporation

20090233413 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device using a SOI substrate, includes the steps of: preparing a SOI substrate, comprises a semiconductor support layer; an insulating layer formed on the semiconductor support layer; and a SOI layer formed on the insulating layer; forming an active region on the SOI layer,... Agent: Rabin & Berdo, PC

20090233414 - Method for fabricating group iii-nitride high electron mobility transistors (hemts): A method of manufacturing a transistor comprises providing a wafer; growing a group III-nitride semiconductor material on a first side of the wafer; creating alignment marks on a second side of the wafer, the second side of the wafer being positioned opposite to the first side of the wafer; etching... Agent: U S Army Research Laboratory Attn: Rdrl-loc-i

20090233415 - Semiconductor devices with sealed, unlined trenches and methods of forming same: A semiconductor device includes unlined and sealed trenches and methods for forming the unlined and sealed trenches. More particularly, a superjunction semiconductor device includes unlined, and sealed trenches. The trench has sidewalls formed of the semiconductor material. The trench is sealed with a sealing material such that the trench is... Agent: Panitch Schwarze Belisario & Nadel LLP

20090233416 - Flash memory devices comprising pillar patterns and methods of fabricating the same: Flash memory devices include pillar patterns formed between selected pairs of floating gates and control gate extensions that penetrate between selected pairs of floating gates are provided. Methods of fabricating the flash memory devices are also provided.... Agent: Volentine & Whitt PLLC

20090233417 - Method for manufacturing semiconductor device: The manufacturing method includes attaching a single crystal semiconductor layer to a supporting substrate, detecting a position of a deficiency region in the single crystal semiconductor layer, forming a non-single-crystal semiconductor layer over the single crystal semiconductor layer, selectively improving crystallinity of a portion of the non-single-crystal semiconductor layer based... Agent: Eric Robinson

20090233418 - Methods of processing semiconductor wafers having silicon carbide power devices thereon: Methods of forming a silicon carbide semiconductor device are disclosed. The methods include forming a semiconductor device at a first surface of a silicon carbide substrate having a first thickness, and mounting a carrier substrate to the first surface of the silicon carbide substrate. The carrier substrate provides mechanical support... Agent: Myers Bigel Sibley & Sajovec, P.A.

20090233419 - Optical device manufacturing method: An optical device manufacturing method including the steps of: forming a groove with a depth corresponding to a finish thickness of the heat sink in a heat sink material at a position corresponding to an associated one of the streets sectioning the plurality of optical devices; joining the optical device... Agent: Greer, Burns & Crain

20090233420 - P-type silicon wafer and method for heat-treating the same: This p-type silicon wafer was subjected to heat treatment to have a resistivity of 10 Ω·cm or more, a BMD density of 5×107 defects/cm3 or more, and an n-type impurity concentration of 1×1014 atoms/cm3 or less at a depth of within 5 μm from a surface of the wafer. This... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20090233421 - Methods of fabricating semiconductor device including phase change layer: Provided are methods of fabricating a semiconductor device including a phase change layer. Methods may include forming a dielectric layer on a substrate, forming an opening in the dielectric layer and depositing, on the substrate having the opening, a phase change layer that contains an element that lowers a process... Agent: Myers Bigel Sibley & Sajovec

20090233422 - Switchable memory diode - a new memory device: Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an... Agent: Turocy & Watson, LLP

20090233423 - Method of manufacturing nitride semiconductor substrate: A method for manufacturing a nitride semiconductor substrate including the steps of: forming a nitride semiconductor layer on a sapphire substrate, and manufacturing a freestanding nitride semiconductor substrate by using the nitride semiconductor layer separated from the sapphire substrate, wherein variability of inclinations of the C-axes, being a difference between... Agent: Fleit Gibbons Gutman Bongini & Bianco Pl

20090233424 - Thin film metal oxynitride semiconductors: The present invention generally relates to a semiconductor film and a method of depositing the semiconductor film. The semiconductor film comprises oxygen, nitrogen, and one or more elements selected from the group consisting of zinc, cadmium, gallium, indium, and tin. Additionally, the semiconductor film may be doped. The semiconductor film... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090233425 - Plasma processing apparatus and method for manufacturing semiconductor device: By an evacuation unit including first and second turbo molecular pumps connected in series, the ultimate pressure in a reaction chamber is reduced to ultra-high vacuum. By a knife-edge-type metal-seal flange, the amount of leakage in the reaction chamber is reduced. A microcrystalline semiconductor film and an amorphous semiconductor film... Agent: Eric Robinson

20090233426 - Method of forming a passivated densified nanoparticle thin film on a substrate: A method for forming a passivated densified nanoparticle thin film on a substrate in a chamber is disclosed. The method includes depositing a nanoparticle ink on a first region on the substrate, the nanoparticle ink including a set of Group IV semiconductor particles and a solvent. The method also includes... Agent: Foley & Lardner LLP

20090233427 - Plasma doping method: An impurity region is formed in a surface of a substrate by exposing the substrate to a plasma generated from a gas containing an impurity in a vacuum chamber. In this process, a plasma doping condition is set with respect to a dose of the impurity to be introduced into... Agent: Mcdermott Will & Emery LLP

20090233428 - Methods for preparing a semiconductor wafer with high thermal conductivity: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer,... Agent: Richard A. Schuth (memc) Armstrong Teasdale LLP

20090233429 - Semiconductor device manufacturing method and substrate processing apparatus: A semiconductor device manufacturing method, includes the steps of: nitriding a high dielectric constant film, formed on a substrate by using plasma, heat treating the nitrided high dielectric constant film, and transferring the heat treated substrate, wherein the nitriding step and the heat treating step are performed consecutively or simultaneously... Agent: Kratz, Quintos & Hanson, LLP

20090233432 - Methods for fabricating flash memory devices: Methods for fabricating flash memory devices are disclosed. A disclosed method comprises: forming a polysilicon layer on a semiconductor substrate; injecting dopants having stepped implantation energy levels into the polysilicon layer; forming a photoresist pattern on the polysilicon layer; and etching the polysilicon layer to form a floating gate.... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090233430 - Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, and semiconductor device manufacturing system: Provided is a method of forming a high-k gate insulating film to reduce nitrogen leakage and suppress gate leakage current. A method of manufacturing a semiconductor device comprises: forming a high-k gate insulating film on a silicon substrate in a first process unit; carrying the silicon substrate to a second... Agent: Brundidge & Stanger, P.C.

20090233431 - Semiconductor integrated circuit device and a method of manufacturing the same: Manufacturing technique for an IC device which includes forming the first conductor film over a memory cell forming region and over a peripheral circuit forming region of a semiconductor substrate, patterning the first conductive film lying over the memory cell forming region to form a first conductive pattern which serves... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090233433 - Semiconductor device having silicon layer in a gate electrode: A method for forming a semiconductor device includes, in order, consecutively depositing a gate insulating film and a silicon layer on a semiconductor substrate, implanting boron into the silicon layer, diffusing the boron by heat-treating the silicon layer, implanting phosphorous into the silicon layer, diffusing at least the phosphorous by... Agent: Mcginn Intellectual Property Law Group, PLLC

20090233434 - Method of manufacturing semiconductor devices: In semiconductor devices and methods of manufacturing semiconductor devices, a zirconium source having zirconium, carbon and nitrogen is provided onto a substrate to form an adsorption layer of the zirconium source on the substrate. A first purging process is performed to remove a non-adsorbed portion of the zirconium source. An... Agent: F. Chau & Associates, LLC

20090233435 - Semiconductor devices and manufacturing method thereof: A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090233436 - Semiconductor device having high-density interconnect array with core pillars formed with osp coating: An interconnect structure for a semiconductor device is made by forming a contact pad on a substrate, forming an under bump metallization layer over the contact pad, forming a photoresist layer over the substrate, removing a portion of the photoresist layer to form an opening which exposes the UBM, depositing... Agent: Robert D. Atkins

20090233437 - Method of manufacturing semiconductor device and semiconductor device manufactured thereby: A method of manufacturing a semiconductor device and a semiconductor device manufactured thereby are provided. The method includes forming a molding layer on a substrate, forming support patterns spaced apart from each other on the molding layer, forming storage node electrodes penetrating the molding layer on sidewalls of the support... Agent: F. Chau & Associates, LLC

20090233438 - Self-ionized and inductively-coupled plasma for sputtering and resputtering: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may... Agent: Konrad Raynes & Victor, LLP Attn: Amat7828

20090233439 - Method of forming an ohmic layer and method of forming a metal wiring of a semiconductor device using the same: A metal organic precursor represented by a formula of R1-CpML is provided onto a substrate having a conductive pattern including silicon. Here, R1 is an alkyl group substituent of Cp, R1 including methyl, ethyl, propyl, pentamethyl, pentaethyl, diethyl, dimethyl or dipropyl, Cp is cyclopentadienyl, M includes nickel (Ni), cobalt (Co),... Agent: Lee & Morse, P.C.

20090233440 - Seed layers for metallic interconnects: One embodiment of the present invention is a method for depositing two or more PVD seed layers for electroplating metallic interconnects over a substrate, the substrate including a patterned insulating layer which includes at least one opening surrounded by a field, the at least one opening having top corners, sidewalls,... Agent: Uri Cohen

20090233441 - Interconnections for integrated circuits: The present invention discloses a method of manufacturing an integrated circuit on a semiconductor substrate having a semiconductor device provided thereon, including the steps of forming a copper layer having an overburden of a desired thickness, forming a layer of inert metal on the copper layer, annealing the copper layer... Agent: HorizonIPPte Ltd

20090233442 - Method and apparatus for production of metal film or the like: In a metal film production apparatus, a copper plate member is etched with a Cl2 gas plasma within a chamber to form a precursor comprising a Cu component and a Cl2 gas; and the temperatures of the copper plate member and a substrate and a difference between their temperatures are... Agent: Fitzpatrick Cella Harper & Scinto

20090233443 - Substrate mounting table, substrate processing apparatus and temperature control method: A substrate mounting table for mounting a substrate in a substrate processing apparatus, includes a table body having a substrate mounting surface. An annular peripheral ridge portion is formed on the substrate mounting surface of the table body. The annular peripheral ridge portion makes contact with a peripheral edge portion... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090233444 - Polishing method with inert gas injection: A polishing process in a semiconductor device fabrication process employs a polishing composition in which a gaseous phase is created within the polishing composition. During a polishing process, the gaseous phase dynamically responds to changes in the surface profile of the material undergoing removal by chemical and abrasive action during... Agent: Brinks Hofer Gilson & Lione

20090233445 - Method of making diamond nanopillars: A method for fabricating diamond nanopillars includes forming a diamond film on a substrate, depositing a metal mask layer on the diamond film, and etching the diamond film coated with the metal mask layer to form diamond nanopillars below the mask layer. The method may also comprise forming diamond nuclei... Agent: Leydig Voit & Mayer, Ltd

20090233446 - Plasma etching method: The present invention is a plasma etching method for etching a surface of a substrate in which a metal nitride film and a silicon film have been respectively formed on a first base film and a second base film that had been side-by-side arranged, with surfaces of the metal nitride... Agent: Smith, Gambrell & Russell

20090233447 - Control wafer reclamation process: A method of recycling a control wafer having a dielectric layer deposited thereon involves removing most of the dielectric layer by plasma etching leaving a residual film of the dielectric and then removing the residual dielectric film by a wet etching process. The combination of the dry and wet etching... Agent: Duane Morris LLP (tsmc)IPDepartment

20090233448 - Lithography resolution improving method: A method of improving lithography resolution on a semiconductor, including the steps of providing a substrate on which a protecting layer, a first etching layer and a photoresist layer are sequentially formed; patterning the photoresist layer to form an opening so as to partially reveal the first etching layer; implanting... Agent: Volpe And Koenig, P.C.

20090233449 - Etching chamber with subchamber: In an apparatus for etching a semiconductor wafer or sample (101), the semiconductor wafer or sample is placed on a sample holder (104) disposed in a first chamber (103). The combination of the semiconductor wafer or sample and the sample holder is enclosed within a second chamber (130) inside the... Agent: The Webb Law Firm, P.C.

20090233450 - Plasma etchimg method and plasma etching apparatus: The present invention is a plasma etching method comprising: a cleaning step (a) in which a cleaning gas is supplied into a processing vessel and the cleaning gas is made plasma, so that a deposit adhering to an inside of the processing vessel is removed by means of the plasma;... Agent: Smith, Gambrell & Russell

20090233451 - Semiconductor device having a gate insulating film structure including an insulating film containing metal, silicon and oxygen and manufacturing method thereof: Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a laminated structure of an amorphous metal oxide film and metal silicate... Agent: Frommer Lawrence & Haug

20090233452 - Producing method of semiconductor device and substrate processing apparatus: Disclosed is a producing method of a semiconductor device produced by transferring a plurality of substrates into a processing chamber, supplying oxygen-containing gas and hydrogen-containing gas into the processing chamber to process the plurality of substrates by oxidation, and transferring the plurality of the oxidation-processed substrates out from the processing... Agent: Birch Stewart Kolasch & Birch

20090233453 - Methods for oxidation of a semiconductor device: Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. The oxide layer may be formed over an entire structure disposed on the substrate, or selectively formed on a non-metal containing layer with little or no oxidation of an exposed metal-containing layer. The methods disclosed herein may... Agent: MoserIPLaw Group / Applied Materials, Inc.

20090233454 - Film formation apparatus for semiconductor process and method for using same: A method for using a film formation apparatus includes, in order to inhibit metal contamination: performing a cleaning process using a cleaning gas on an inner wall of a process container and a surface of a holder with no productive target objects held thereon; and then, performing a coating process... Agent: Smith, Gambrell & Russell

20090233456 - Irradiation optical system, irradiation apparatus and fabrication method for semiconductor device: An irradiation optical system includes: a first projection optical system for mixing a plurality of luminous fluxes outputted from a laser light source having a plurality of linearly arrayed light emitting points with each other and dividing the mixed luminous fluxes into a plurality of luminous fluxes and then projecting,... Agent: Sonnenschein Nath & Rosenthal LLP

20090233455 - Semiconductor devices having tensile and/or compressive stress and methods of manufacturing: A semiconductor device having a tensile and/or compressive strain applied thereto and methods of manufacturing the semiconductor devices to enhance channel strain. The method includes relaxing a gate structure using a low temperature thermal creep process to enhance channel strain. The gate structure undergoes a plastic deformation during the low... Agent: Greenblum & Bernstein, P.L.C

20090227045 - Method of forming a magnetic tunnel junction structure: In a particular illustrative embodiment, a method of forming a magnetic tunnel junction (MTJ) device is disclosed that includes forming a trench in a substrate. The method further includes depositing a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a bottom electrode, a fixed layer, a... Agent: Qualcomm Incorporated

20090227046 - Method of fabricating semiconductor device: An insulating film is formed on a main surface of a substrate. A conductive film is formed on the insulating film. A lower layer resist film, an intermediate layer, an anti-reflection film and an upper layer resist film are formed on the conductive film. A focal point at a time... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090227047 - Method and apparatus for thinning a substrate: A method is provided for controlling substrate thickness. At least one etchant is dispensed from at least one dispenser to a plurality of different locations on a surface of a spinning substrate to perform etching. A thickness of the spinning substrate is monitored at the plurality of locations, so that... Agent: Duane Morris LLP (tsmc)IPDepartment

20090227048 - Method for die bonding having pick-and-probing feature: Disclosed is a die-bonding method having pick-and-probe features after wafer sawing where at least a die is probed and sorted according to different grades during a pick-and-place step performed after wafer sawing. A suction nozzle having a plurality of probes is utilized to probe the electrical terminals of the die.... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090227049 - Methods for discretized processing of regions of a substrate: The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes used in integrated circuit fabrication. A substrate having an array of differentially processed regions thereon is... Agent: Martine Penilla Gencarella, LLP

20090227050 - Light emitting diode package having multi-stepped reflecting surface structure and fabrication method thereof: A high luminance and high output LED package using an LED as a light source and a fabrication method thereof. The LED package includes an Al substrate with a recessed multi-stepped reflecting surface formed therein and a light source composed of LEDs mounted on the reflecting surface and electrically connected... Agent: Mcdermott Will & Emery LLP

20090227052 - Optical device: A method of forming an optical device comprising the steps of: providing a substrate comprising a first electrode capable of injecting or accepting charge carriers of a first type; forming over the first electrode a first layer that is at least partially insoluble in a solvent by depositing a first... Agent: Marshall, Gerstein & Borun LLP

20090227051 - Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof: A light-blocking layer is formed using a first resist mask, and a base film is formed over the light-blocking layer. A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are sequentially formed over the base film, and first etching... Agent: Fish & Richardson P.C.

20090227053 - Method of fabricating array substrate having double-layered patterns: An array substrate having double-layered metal patterns for use in a liquid crystal display device and a manufacturing method thereof are disclosed in the present invention. The array substrate includes a gate electrode and a gate line each having a molybdenum alloy (Mo-alloy) layer and a copper (Cu) layer configured... Agent: Mckenna Long & Aldridge LLP

20090227054 - Pixel structure for flat panel display: A pixel structure of a flat panel display for arrangement on a substrate. The pixel structure comprises a storage capacitor, a thin film transistor (TFT) and a data line formed on the substrate. The storage capacitor is disposed on the substrate, comprising a lower metal layer, an upper metal layer... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090227055 - Method of manufacturing semiconductor optical element: A method of manufacturing a semiconductor optical element, includes successively stacking a first semiconductor layer of a first conductivity type, an active layers and a second semiconductor layer of a second conductivity type; applying a resist to the second semiconductor layer and patterning the resist into stripes by photolithography; forming... Agent: Leydig Voit & Mayer, Ltd

20090227056 - Method of fabricating nitride semiconductor laser: A method of fabricating a nitride semiconductor laser comprises preparing a substrate having a plurality of marker structures and a crystalline mass made of a hexagonal gallium nitride semiconductor. The primary and back surfaces of the substrate intersect with a predetermined axis extending in the direction of a c-axis of... Agent: Venable LLP

20090227057 - Electronic component and display device and a method of manufacturing the same: An electronic component or display device of the present invention can be provided by using a following pattern formation method. On a substrate treated with a first etching with a first resist pattern as a first mask, a second resist pattern is transfer-printed on the first resist patterns so as... Agent: Young & Thompson

20090227058 - Photoresist composition and method of manufacturing array substrate using the same: A photoresist composition includes; a novolac resin prepared from a phenol compound, wherein the m-cresol constitutes about 70% to about 85% by weight of the weight of the phenol compound, a diazide compound, and an organic solvent.... Agent: Cantor Colburn, LLP

20090227059 - Chemical sensor: The application relates to a chemical sensor device comprising a substrate (1), a sensor medium (3) formed on the substrate, the sensor medium comprising one-dimensional nanoparticles, wherein the one-dimensional nanoparticles essentially consist of a semiconducting AxBy compound, e.g. V2O5 and detection means (2) for detecting a change of a physical... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090227060 - Method for fabricating a sealed cavity microstructure: A method for fabricating a sealed cavity microstructure comprises the steps of: forming an insulation layer with a micro-electro-mechanical structure on an upper surface of a silicon substrate, the micro-electro-mechanical structure includes at least one suspended structure and at least one conductive structure between which is disposed a spacer region;... Agent: Dr. Banger Shia

20090227061 - Establishing a high phosphorus concentration in solar cells: Methods of controlling the diffusion of a dopant in a solar cell are disclosed. A second species is used in conjunction with the dopant to modify the diffusion region. For example, phosphorus and boron both diffuse by pairing with interstitial silicon atoms. Thus, by controlling the creation and location of... Agent: Nields, Lemack & Frame, LLC

20090227062 - Patterned assembly for manufacturing a solar cell and a method thereof: Apparatuses and methods for manufacturing a solar cell are disclosed. In a particular embodiment, the solar cell may be manufactured by disposing a solar cell in a chamber having a particle source; disposing a patterned assembly comprising an aperture and an assembly segment between the particle source and the solar... Agent: Varian Semiconductor Equipment Assc., Inc.

20090227063 - Integrated method and system for manufacturing monolithic panels of crystalline solar cells: A method for fabricating a photovoltaic (PV) cell panel wherein all PV cells are formed simultaneously on a two-dimensional array of monocrystalline silicon mother wafers affixed to a susceptor is disclosed. Porous silicon separation layers are anodized in the surfaces of the mother wafers. The porous film is then smoothed... Agent: Law Offices Of Charles Guenzer

20090227064 - X-y address type solid state image pickup device and method of producing the same: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in... Agent: Robert J. Depke Lewis T. Steadman

20090227065 - Method and material for processing iron disilicide for photovoltaic application: A method for providing a semiconductor material for photovoltaic devices, the method includes providing a sample of iron disilicide comprising approximately 90 percent or greater of a beta phase entity. The sample of iron disilicide is characterized by a substantially uniform first particle size ranging from about 1 micron to... Agent: Townsend And Townsend And Crew, LLP

20090227066 - Method of forming ring electrode: The present invention in one embodiment provides a method of forming an electrode that includes the steps of providing at least one metal stud in a layer of an interlevel dielectric material; forming a pillar of a first dielectric material atop the at least one metal stud; depositing an electrically... Agent: Scully, Scott, Murphy & Presser, P.C.

20090227067 - Methods for forming resistive switching memory elements by heating deposited layers: Resistive switching nonvolatile memory elements are provided. A metal-containing layer and an oxide layer for a memory element can be heated using rapid thermal annealing techniques. During heating, the oxide layer may decompose and react with the metal-containing layer. Oxygen from the decomposing oxide layer may form a metal oxide... Agent: Legal Department

20090227068 - Method and apparatus for packaging circuit devices: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are... Agent: Baker Botts LLP

20090227069 - Method and device for fabricating an assembly of at least two microelectronic chips: The method enables an assembly of chips, initially formed on a wafer, to be formed. Each chip comprises two parallel main faces joined by side faces. At least one of the side faces comprises at least one groove for housing a thread element. The wafer is first of all stuck... Agent: Oliff & Berridge, PLC

20090227070 - Semiconductor device and method of manufacturing the same: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes: a casing, a board and a semiconductor chip. The chip includes: an element part; a heat sink bonded to the element part; an insulting layer located on the heat sink so that the heat... Agent: Posz Law Group, PLC

20090227071 - Semiconductor module: A module having a semiconductor chip with a first contact element on a first main surface and a second contact element on a second main surface is disclosed. The semiconductor chip is arranged on a carrier. An insulating layer and a wiring layer cover the second main surface and the... Agent: Dicke, Billig & Czaja

20090227072 - Packaging structure and method: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a... Agent: Robert D. Atkins

20090227073 - Method for manufacturing semiconductor package having improved bump structures: A method for manufacturing a semiconductor package includes the steps of forming first circuit patterns on an upper surface of a carrier substrate. Bumps are formed in recesses defined on the upper surface of the carrier substrate. An insulation layer is formed on the upper surface of the carrier substrate... Agent: Ladas & Parry LLP

20090227074 - Method of manufacturing display device: The present invention relates to a method for manufacturing a display device. In the method, a carrier substrate is prepared, a plastic substrate is formed on the carrier substrate, thin film transistors, pixel electrodes, and contact pads are formed on the plastic substrate, and a driver integrated circuit (IC) chip... Agent: Haynes And Boone, LLPIPSection

20090227075 - Etchant composition, patterning conductive layer and manufacturing flat panel, display device using the same: An etchant composition that allows simplification and optimization of semiconductor manufacturing process is presented, along with a method of patterning a conductive layer using the etchant and a method of manufacturing a flat panel display using the etchant. The etchant includes nitric acid, phosphoric acid, acetic acid, and an acetate... Agent: Haynes And Boone, LLPIPSection

20090227076 - Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof: Disclosed is a manufacturing method of a thin film transistor, which enables the formation of a thin film transistor by using only one photomask. The method includes: over a substrate sequentially forming a first insulating film, a first conductive film, a second insulating film, a semiconductor film, an impurity semiconductor... Agent: Fish & Richardson P.C.

20090227077 - Low-capacitance contact for long gate-length devices with small contacted pitch: Disclosed are planar and non-planar field effect transistor (FET) structures and methods of forming the structures. The structures comprise segmented active devices (e.g., multiple semiconductor fins for a non-planar transistor or multiple semiconductor layer sections for a planar transistor) connected at opposite ends to source/drain bridges. A gate electrode is... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090227078 - Cmos devices having dual high-mobility channels: A method for forming a semiconductor structure includes providing a semiconductor substrate including a first region and a second region; and forming a first and a second metal-oxide-semiconductor (MOS) device. The step of forming the first MOS device includes forming a first silicon germanium layer over the first region of... Agent: Slater & Matsil, L.L.P.

20090227079 - Semiconductor device and manufacturing method thereof: The present invention discloses a semiconductor device and a manufacturing method thereof which improves its characteristics even though it is miniaturized. According to one aspect of the present invention, it is provided a semiconductor device comprising a first semiconductor element device including a pair of first diffusion layers formed in... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090227080 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device, in which although a metal layer is included in a gate pattern, the gap-fill characteristic of contact plugs coupled to junctions can be improved and degradation in the data retention characteristic can also be prevented. According to the method, a semiconductor substrate in... Agent: Marshall, Gerstein & Borun LLP

20090227081 - Semiconductor device doped with sb, ga, or bi and method of manufacturing the same: A semiconductor memory device includes a first dopant area and a second dopant area in a semiconductor substrate, the first dopant area and the second dopant area doped with one selected from the group consisting of Sb, Ga, and Bi. The semiconductor memory device includes an insulating layer disposed in... Agent: Marger Johnson & Mccollom, P.C.

20090227083 - Field-effect transistor with local source/drain insulation and associated method of production: A method for fabricating a field-effect transistor with local source/drain insulation. The method includes forming and patterning a gate stack with a gate layer and a gate dielectric on a semiconductor substrate; forming source and drain depressions at the gate stack in the semiconductor substrate; forming a depression insulation layer... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20090227082 - Methods of manufcturing a semiconductor device: Isolation regions are formed on a substrate to define an active region. A gate electrode is formed on the active region. A spacer structure is formed on a sidewall of the gate electrode. A gate silicide layer is formed on the gate electrode and a source/drain silicide layer is formed... Agent: Mills & Onello LLP

20090227084 - Novel method to enhance channel stress in cmos processes: The invention provides a method of fabricating a semiconductor device that enhances the amount of stress that is transmitted to the channel region for carrier mobility enhancement. In one embodiment an amorphous region is formed at or near the gate dielectric interface prior to source/drain anneal. In a second embodiment... Agent: Texas Instruments Incorporated

20090227085 - Manufacturing method of semiconductor device: A method of manufacturing a semiconductor device, in which an amorphous silicon layer is formed into a shape of a gate electrode of a MOS transistor, and then impurity is implanted to a surface of a silicon substrate from a diagonal direction using the amorphous silicon layer as a mask.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090227086 - Threshold voltage consistency and effective width in same-substrate device groups: The prevention of active area loss in the STI model is disclosed which results in an improved device performance in devices manufactured according to the process flow. The process generally shared among the multiple various embodiments inverts the current conventional STI structure towards a process flow where an insulator is... Agent: Slater & Matsil LLP

20090227087 - Method to improve uniformity of chemical mechanical polishing planarization: Embodiments of this method improve the results of a chemical mechanical polishing (CMP) process. A surface is implanted with a species, such as, for example, Si, Ge, As, B, P, H, He, Ne, Ar, Kr, Xe, and C. The implant of this species will at least affect dishing, erosion, and... Agent: Varian Semiconductor Equipment Assc., Inc.

20090227088 - Semiconductor wafer and manufacturing process for semiconductor device: A semiconductor wafer 1 has first scribe lines 31 in two mutually perpendicular directions which have a first width and divide the semiconductor wafer 1 into a plurality of areas; second scribe lines 32 which have a second width smaller than the first width and divide the area into a... Agent: Young & Thompson

20090227089 - Dicing tape and die attach adhesive with patterned backing: Provided are a tape, apparatus, and method that relate generally to a single layer adhesive which functions as a dicing tape and also as a die attach adhesive for dicing thinned wafers and subsequent die attach operations of the diced chips in semiconductor device fabrication. The tape, apparatus, and method... Agent: 3m Innovative Properties Company

20090227090 - Annealing method of zinc oxide thin film: An annealing method of a zinc oxide thin film, comprises loading a substrate coated with a zinc oxide thin film into a chamber, allowing a hydrogen gas to be flowed into the chamber, fixing pressure in the chamber and annealing the zinc oxide thin film using the hydrogen gas in... Agent: The Belles Group, P.C.

20090227091 - Method of manufacturing a semiconductor device: A method of manufacturing a semiconductor device wherein a laminate structure comprising a sacrificial layer is sandwiched between two etch stop layers (8,11) and which separates a semiconductor membrane (9) from a bulk substrate (1) is used to provide an underetched structure. Access trenches (4) and support trenches (5) are... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090227092 - Temperature and pressure control methods to fill features with programmable resistance and switching devices: A programmable resistance, chalcogenide, switching or phase-change material device includes a substrate with a plurality of stacked layers including a conducting bottom electrode layer, an insulative layer having an opening formed therein, an active material layer deposited over both the insulative layer, within the opening, and over selected portions of... Agent: Ovonyx, Inc

20090227093 - Patterning during film growth: The growing surface of a material such as InGaN is exposed to a small diameter laser beam that is directed to controlled locations, such as by scanning mirrors. Material characteristics may be modified at the points of exposure. In one embodiment, mole fraction of selected material is reduced where laser... Agent: Schwegman, Lundberg & Woessner, P.A.

20090227095 - Counterdoping for solar cells: Methods of counterdoping a solar cell, particularly an IBC solar cell are disclosed. One surface of a solar cell may require portions to be n-doped, while other portions are p-doped. Traditionally, a plurality of lithography and doping steps are required to achieve this desired configuration. In contrast, one lithography step... Agent: Nields, Lemack & Frame, LLC

20090227094 - Use of chained implants in solar cells: The manufacture of solar cells is simplified and cost reduced through by performing successive ion implants, without an intervening thermal cycle. In addition to reducing process time, the use of chained ion implantations may also improve the performance of the solar cell. In another embodiment, two different species are successively... Agent: Nields, Lemack & Frame, LLC

20090227096 - Method of forming a retrograde material profile using ion implantation: A method of forming a retrograde material profile in a substrate includes forming a surface peak profile on the substrate. Ions are then implanted into the substrate to form a retrograde profile from the surface peak profile, at least one of an ion implantation dose and an ion implantation energy... Agent: Rauschenbach Patent Law Group, LLC

20090227097 - Use of dopants with different diffusivities for solar cell manufacture: A method of tailoring the dopant profile of a substrate by utilizing two different dopants, each having a different diffusivity is disclosed. The substrate may be, for example, a solar cell. By introducing two different dopants, such as by ion implantation, furnace diffusion, or paste, it is possible to create... Agent: Nields, Lemack & Frame, LLC

20090227098 - Semiconductor device fabricating method: There is provided a method of fabricating a semiconductor device in which a gate electrode is formed on an oxide film, which is formed by thermal oxidation on a substrate. The fabrication method includes: a first step of forming a first oxide film on the substrate; a second step of... Agent: Rabin & Berdo, PC

20090227100 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes the steps of forming an oxide film on a silicon carbide substrate; forming a gate electrode layer on the oxide film thereafter to pattern the gate electrode layer so as to form a gate electrode, comprising: and performing a thermal treatment to... Agent: Rabin & Berdo, PC

20090227099 - Method of forming a semiconductor device having a stressed electrode and silicide regions: In one embodiment, a method of forming a semiconductor device includes forming a first device region and a second device region over a substrate, wherein the first device region comprises a first region with a first dopant type, the second device region comprises a second region with a second dopant... Agent: Freescale Semiconductor, Inc. Law Department

20090227101 - Method of forming wiring layer of semiconductor device: A method of forming a wiring layer of a semiconductor device, includes forming a first interlayer insulating layer to have a first thickness corresponding to a part of the thickness of an interlayer insulating layer that is to be formed on a support layer and forming a first contact plug... Agent: F. Chau & Associates, LLC

20090227102 - Semiconductor device having trench-type gate and its manufacturing method capable of simplifying manufacturing steps: In a semiconductor device, a gate silicon dioxide layer is formed within a trench of a semiconductor wafer. A first gate electrode is formed on a sidewall of the trench of the semiconductor wafer via the gate silicon dioxide layer. An insulating layer is formed on a bottom of the... Agent: Mcginn Intellectual Property Law Group, PLLC

20090227103 - Method and structure for copper gap fill plating of interconnect structures for semiconductor integrated circuits: A method for forming an integrated circuit device including an interconnect structure, e.g., copper dual damascene. The method includes providing a substrate and forming an interlayer dielectric layer overlying the substrate. The method also includes patterning the interlayer dielectric layer to form a contact structure and forming a barrier metal... Agent: Townsend And Townsend And Crew, LLP

20090227104 - Film deposition method and film deposition apparatus of metal film: The present invention is a film deposition method of a metal film comprising the steps of: placing an object to be processed having a recess formed in a surface thereof, on a stage in a processing vessel; evacuating the processing vessel to create a vacuum therein; ionizing a metal target... Agent: Smith, Gambrell & Russell

20090227105 - Methods of forming a layer for barrier applications in an interconnect structure: Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical vapor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD processing chamber, sputtering a source material from a target disposed in the processing... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090227106 - Method for fabricating semiconductor memory device: Disclosed herein is a method for fabricating a semiconductor memory device that can prevent oxidation of bit lines when forming an interlayer dielectric for isolating the bit lines. The bit line is formed on a semiconductor substrate where an underlying structure is formed. A silicon on dielectric (SOD) layer is... Agent: Marshall, Gerstein & Borun LLP

20090227107 - Nanostructures containing metal semiconductor compounds: A network element (10), such as a Packet Data Serving Node, detects (31) a change in operational status of a mobile station during a communication session and, in response to detecting such a change, automatically increases (32) memory capacity as is available to support additional communication sessions while simultaneously persisting... Agent: Harvard University & Medical School C/o Wolf, Greenfield & Sacks, P.C.

20090227108 - Patterning method in semiconductor manufacturing process: A patterning method in a semiconductor manufacturing process includes the following steps. A base is provided. A target layer and a lining layer are sequentially formed on the surface of the base. The lining layer is patterned to form a plurality of rectangular blocks. A sidewall spacer material layer is... Agent: Rosenberg, Klein & Lee

20090227109 - Method for forming periodic structure: A method for forming a periodic structure is disclosed. A structural layer and an optical modulation element are provided. A light is emitted to pass through the optical modulation element to irradiate interference strips on the structural layer. A photoelectrochemical etching (PEC) is performed to form the periodic structure according... Agent: Quintero Law Office, PC

20090227111 - Barrier film material and pattern formation method using the same: A resist film made of a chemically amplified resist is formed on a substrate. Subsequently, a barrier film for preventing a component of the resist film from eluting into an immersion liquid or preventing the immersion liquid from permeating into the resist film is formed on the resist film. Thereafter,... Agent: Mcdermott Will & Emery LLP

20090227112 - Exposure mask manufacturing method, drawing apparatus, semiconductor device manufacturing method, and mask blanks product: A method of manufacturing an exposure mask includes generating or preparing flatness variation data relating to a mask blanks substrate to be processed into an exposure mask, the flatness variation data being data relating to change of flatness of the mask blank substrate caused when the mask blank substrate is... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090227110 - Method of forming mask pattern: A method of forming a mask pattern provides a resolution below a resolution of a conventional exposure equipment. The method may include a self-align double etching process in which a nipple formed by hard mask layers having different etching selection ratios is utilized, and a micro pattern to be practically... Agent: Marshall, Gerstein & Borun LLP

20090227113 - Method for fabricating opening: The present invention provides a fabrication method of an opening. The method includes providing a substrate having a conductive region therein. Thereafter, a dielectric layer is formed over the substrate and then a stacked layer is formed on the dielectric layer. The stacked layer includes a patterned metal hard mask... Agent: Jianq Chyun Intellectual Property Office

20090227114 - Apparatus and method for etching the surface of a semiconductor substrate: A process for etching the surfaces of semiconductor substrates utilizes a texturing tank which introduces a process fluid through a circulating system. The process fluid is heated to a desired temperature and maintained at a desired concentration prior to entering a processing area where laminar flow is produced to more... Agent: Kelly Lowry & Kelley, LLP

20090227115 - Etching solution for substrate: (wherein T1 and T2 independently represent a hydrogen atom, a hydroxyl group, a carboxyl group or an alkyl group having 1 to 3 carbon atoms, or T1 and T1 together form a bond; and R1 to R4 independently represent a hydrogen atom, a hydroxyl group, a carboxyl group or an... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090227116 - Method for manufacturing non-volatile memory device having charge trap layer: A method for manufacturing a non-volatile memory device having a charge trap layer comprises in one embodiment: forming a first dielectric layer over a semiconductor substrate; forming a second dielectric layer having a higher dielectric constant than that of the first dielectric layer over the first dielectric layer; forming a... Agent: Marshall, Gerstein & Borun LLP

20090227117 - Gate structure and method: A MOSFET structure including silicate gate dielectrics with nitridation treatments of the gate dielectric prior to gate material deposition.... Agent: Texas Instruments Incorporated

20090227118 - Method for removing a pore-generating material from an uncured low-k dielectric film: A method of forming a porous low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The method comprises exposing the low-k dielectric film to infrared (IR) radiation and adjusting a residual... Agent: Tokyo Electron U.s. Holdings, Inc.

20090227119 - Method for curing a porous low dielectric constant dielectric film: A method of curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The method comprises exposing the low-k dielectric film to infrared (IR) radiation and ultraviolet (UV) radiation.... Agent: Tokyo Electron U.s. Holdings, Inc.

20090227120 - Method for forming photoresist layer: A method for forming a photoresist layer is provided. The method includes following steps. A wafer is provided in a semiconductor machine. The wafer is spun at a first spin speed. A pre-wet solvent is dispensed on the spinning wafer by using a nozzle disposed at a fixed position. The... Agent: J C Patents, Inc.

20090227121 - Semiconductor device manufacturing method and semiconductor device manufacturing system: A semiconductor device manufacturing method and a semiconductor device manufacturing system for irradiating a first laser light (50) and a second laser light (52) with a wavelength different from that of the first laser light to a substrate (46) to perform a thermal processing on the substrate are provided. In... Agent: Oliff & Berridge, PLC

20090221103 - Fabrication method of semiconductor integrated circuit device: In the fabrication of a semiconductor integrated circuit device, a 2D-3D inspection technique for solder printed on a substrate is provided which permits easy preparation of data and easy visual confirmation of a defective portion. In a substrate inspecting step, first, a 3D inspection is performed, followed by execution of... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090221104 - Method of manufacturing a semiconductor device: A method of manufacturing a semiconductor device involves the steps of: forming a plurality of product formation areas each having a circuit and a plurality of first electrode pads over a main surface of a semiconductor wafer; arranging a plurality of second electrode pads with larger pitches than the first... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090221105 - Manufacturing method for semiconductor integrated circuit device: In mass production of CMIS integrated circuit devices or the like, electric characteristics, such as Vth (threshold voltage) or the like, disadvantageously vary due to variations in gate length of the MISFET. This problem has become serious because of a short channel effect. In order to solve the problem, various... Agent: Miles & Stockbridge PC

20090221106 - Article and method for color and intensity balanced solid state light sources: Subtractive and/or additive techniques can adjust both color and/or intensity in solid wavelength conversion materials.... Agent: Goldeneye, Inc. Suite 233

20090221107 - Deposition method and manufacturing method of light-emitting device: Part of a material layer is deposited on a deposition target surface of a second substrate by steps of providing a first substrate having a light absorption layer and a material layer in contact with the light absorption layer over one of surfaces; making a surface of the first substrate... Agent: Cook Alex Ltd

20090221108 - Miniature optical element for wireless bonding in an electronic instrument: A method of manufacturing an optical element including the steps of: forming a through hole in a semiconductor element which has an optical section and an electrode electrically connected to the optical section; and forming a conductive layer extending from a first surface of the semiconductor element on which the... Agent: Oliff & Berridge, PLC

20090221109 - Organic light emitting display and method of fabricating the same: An organic light emitting display device includes a first substrate, an array of organic light emitting pixels formed on the substrate, a second substrate opposing the first substrate. A frit seal interconnects the first and second substrates and surrounds the array of organic light emitting pixels. A film structure interposed... Agent: Knobbe Martens Olson & Bear LLP

20090221110 - Vertical light emitting diode and method of manufacturing the same: Provided is a vertical LED including an n-electrode; an n-type GaN layer formed under the n-electrode, the n-type GaN layer having a surface coming in contact with the n-electrode, the surface having a Ga+N layer containing a larger amount of Ga than that of N; an active layer formed under... Agent: Mcdermott Will & Emery LLP

20090221111 - Method and apparatus for fabricating composite substrates for thin film electro-optical devices: A method is provided for producing an electro-optic device having at least one optically transparent conducting layer with low electrical resistance. The method includes providing a composite substrate that includes an optically transparent and electrically insulating base substrate and an electrically conducting grid disposed in grooves located in the base... Agent: Mayer & Williams PC

20090221112 - Method for metallizing semiconductor elements and use thereof: The present invention relates to a method for metallizing semiconductor components in which aluminium is used. In particular in the case of products in which the process costs play a big part, such as e.g. solar cells based on silicon, a cost advantage can be achieved with the invention. In... Agent: Gauthier & Connors, LLP

20090221113 - Method of fabricating organic memory device: A method of fabricating an organic memory device is provided. In the method, a bottom electrode is formed on a substrate. A first surface treatment is performed on the bottom electrode to form a bottom surface treatment layer on a surface thereof. A polymer thin film is formed on the... Agent: Jianq Chyun Intellectual Property Office

20090221114 - Packaging an integrated circuit die using compression molding: A structure (46) for holding an integrated circuit (IC) die (50) during packing includes a flexible structurally reinforced silicone adhesive film (22) and a mold frame (44). The mold frame (44) adheres to an adhesive side (38) of the film (22). A method (20) of packaging the IC die (50)... Agent: Meschkow & Gresham, P.L.C

20090221115 - Reduction of memory instability by local adaptation of re-crystallization conditions in a cache area of a semiconductor device: By appropriately locally controlling the conditions during a re-growth process in a memory region and a speed-critical device region, the creation of dislocation defects may be reduced in the memory region, thereby enhancing overall stability of respective memory cells. On the other hand, enhanced strain levels may be obtained in... Agent: Williams, Morgan & Amerson

20090221116 - Method for manufacturing semiconductor device: Element characteristics disadvantageously fluctuate because the composition of the resultant silicide varies according to the change of the gate length when a full silicide gate electrode is formed by sintering a metal/poly-Si structure. The element characteristics also fluctuate due to element-to-element non-uniformity of the resultant silicide composition. By first forming... Agent: Mcginn Intellectual Property Law Group, PLLC

20090221117 - Integrated circuit system employing resistance altering techniques: An integrated circuit system that includes: providing a substrate including a first region and a second region; forming a first device over the first region and a resistance device over the second region; forming a first dielectric layer and a second dielectric layer over the substrate; removing a portion of... Agent: Law Offices Of Mikio Ishimaru

20090221118 - High voltage semiconductor devices: A transistor suitable for high-voltage applications and a method of manufacture is provided. A first device is formed by depositing a dielectric layer and a conductive layer over a substrate. A hard mask is deposited over the conductive layer and patterned using photolithography techniques. The photoresist material is removed prior... Agent: Slater & Matsil, L.L.P.

20090221119 - Fabrication of a semiconductor device with stressor: In a semiconductor fabrication process, an epitaxial layer is formed overlying a substrate, wherein there is a lattice mismatch between the epitaxial layer and the substrate. A hard mask having an opening is formed overlying the epitaxial layer. A recess is formed through the epitaxial layer and into the substrate.... Agent: Freescale Semiconductor, Inc. Law Department

20090221120 - Method of forming a gate dielectric: A method of forming a semiconductor device includes providing a substrate for the semiconductor device. A base oxide layer is formed overlying the substrate by applying a rapid thermal oxidation (RTO) of the substrate in the presence of oxygen. A nitrogen-rich region is formed within and at a surface of... Agent: Freescale Semiconductor, Inc. Law Department

20090221121 - Method of forming a salicide layer for a semiconductor device: Methods of fabricating semiconductor devices are disclosed. An illustrated example method protects spacers and active areas by performing impurity ion implantation on an oxide layer prior to etching the oxide layer. The illustrated method includes forming a gate on a semiconductor substrate, forming a spacer on a sidewall of the... Agent: Hanley, Flight & Zimmerman, LLC

20090221122 - Mos field effect transistor and manufacture method therefor: An MOS field effect transistor which improves the mobility of electrons and holes of an nMOS and a pMOS by applying larger tensile stress to a stressed Si channel in a lateral direction than that applied to a conventional structure without increasing a Ge composition of a buffer SiGe layer,... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090221123 - Method for increasing penetration depth of drain and source implantation species for a given gate height: The thickness of drain and source areas may be reduced by a cavity etch used for refilling the cavities with an appropriate semiconductor material, wherein, prior to the epitaxial growth, an implantation process may be performed so as to allow the formation of deep drain and source areas without contributing... Agent: Williams, Morgan & Amerson

20090221124 - Manufacturing method of semiconductor device: The method includes the steps of forming a gate insulating film over a first conductivity-type layer surface of a semiconductor substrate, implanting a second conductivity-type impurity into the first conductivity-type layer located on both sides adjacent to a conductive layer forming predetermined region, forming a conductive layer over the gate... Agent: Rabin & Berdo, PC

20090221125 - Bipolar junction transistor and manufacturing method thereof: An improved bipolar junction transistor and a method for manufacturing the same are provided. The bipolar junction transistor includes: a buried layer and a high concentration N-type collector region in a P-type semiconductor substrate; a low concentration P-type base region in the semiconductor substrate above the buried layer; a first... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090221126 - Method of fabricating capacitor of semiconductor device: Disclosed herein is a method of fabricating a capacitor of a semiconductor device that includes sequentially forming an interlayer insulating film defining a contact plug, a lower electrode oxide film, and a hard mask film over a semiconductor substrate; etching the hard mask film with a mask comprising a dummy... Agent: Marshall, Gerstein & Borun LLP

20090221127 - Method of manufacturing a semiconductor device having a stacked capacitor: A stacked capacitor in a memory cell has a bottom electrode made of a metal or metal compound, a capacitor insulation film and a top electrode made of a metal or a metal compound. The capacitor insulation film includes an aluminum oxide film having a thickness of 2 to 4... Agent: Young & Thompson

20090221128 - Nonvolatile semiconductor memory device having element isolating region of trench type: Disclosure is semiconductor device of a selective gate region, comprising a semiconductor layer, a first insulating film formed on the semiconductor layer, a first electrode layer formed on the first insulating layer, an element isolating region comprising an element isolating insulating film formed to extend through the first electrode layer... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090221129 - Semiconductor seal ring and method of manufacture thereof: An improved semiconductor seal ring and method therefore is described. The seal ring comprises a thick layer wherein at least a portion of the thick layer is removed from a singulation street prior to singulation, thereby avoiding damage to the thick layer during the singulation process. A thin moisture-proof barrier... Agent: Lando & Anastasi, LLP S2059

20090221132 - Method for manufacturing semiconductor apparatus and method for manufacturing electro-optical apparatus: A method for manufacturing a semiconductor apparatus includes forming a step layer in a first region on a substrate; forming a first semiconductor thin film on the top surface and sidewalls of the step layer; removing part of the first semiconductor thin film from the top surface while leaving part... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090221131 - Method for preparing substrate having monocrystalline film: Provided is a method for easily preparing a substrate comprising a monocrystalline film thereon or thereabove with almost no crystal defects without using a special substrate. More specifically, provided is a method for preparing a substrate comprising a monocrystalline film formed on or above a handle substrate, the method comprising:... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20090221130 - N-type semiconductor carbon nanomaterial, method for producing n-type semiconductor carbon nanomaterial, and method for manufacturing semiconductor device: An n-Type semiconductor carbon nanomaterial is produced by mixing a substance having a functional group such as an amino or alkyl group with an inert gas and reacting a semiconductor carbon nanomaterial with the mixture under irradiation with VUV to covalently bond the amino or alkyl group to the carbon... Agent: Kratz, Quintos & Hanson, LLP

20090221133 - Methods of fabricating silicon on insulator (soi) wafers: Methods of fabricating SOI wafers are provided including providing a donor wafer and forming a hydrogen ion implantation layer in the donor wafer. A circumference portion of one side of the donor wafer is recessed to form a height difference. The one side of the donor wafer and a handle... Agent: Myers Bigel Sibley & Sajovec

20090221134 - Semiconductor device and method of manufacturing semiconductor device: A method of manufacturing a semiconductor device that includes a first and second device regions on a substrate. The method includes the steps of forming an insulation layer on the substrate, laminating a first semiconductor layer having a plane orientation different from the surface of the substrate on the insulation... Agent: Sonnenschein Nath & Rosenthal LLP

20090221135 - Rapid heating with nanoenergetic materials: The present process for rapidly heating and cooling a target material without damaging the substrate upon which it has been deposited. More specifically, target material is coated onto a first substrate. A self-propagating nanoenergetic material is selected that combusts at temperatures sufficient to change the target material and creates a... Agent: Greer, Burns & Crain

20090221136 - Method of implanting ion species into microstructure products by concurrently cleaning the implanter: By operating an implantation tool with a source gas having a halogen fraction of 66 atomic percent or less relative to the total composition of the source gas, an in situ cleaning effect may be achieved while performing an implantation process.... Agent: Williams, Morgan & Amerson

20090221137 - Semiconductor device and manufacturing method therefor: A silicon substrate having a first silicon oxide film formed via thermal oxidation and a second silicon oxide film formed via chemical vapor deposition and the like is subjected to preprocessing prior to selective epitaxial growth, wherein both the first and second silicon oxide films are etched with the same... Agent: Young & Thompson

20090221138 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device, including forming a plurality of gate structures on a substrate, the gate structures each including a hard mask pattern stacked on a gate conductive pattern, forming an insulating layer pattern between the gate structures at least partially exposing a top surface of the... Agent: Lee & Morse, P.C.

20090221139 - Method of producing semiconductor device: A method of producing a semiconductor device includes the steps of: forming an oxide film on a silicon carbide substrate; forming a gate electrode layer on the oxide film; patterning the gate electrode layer to form a gate electrode; and processing thermally the gate electrode layer or the gate electrode... Agent: Kubotera & Associates, LLC

20090221140 - Method of fabricating non-volatile memory device having separate charge trap patterns: A non-volatile memory device prevents charge spreading. The non-volatile memory device includes an isolation trench in a semiconductor substrate, an isolation layer partially filling the isolation trench between first and second fins defined by the isolation trench, a control gate electrode crossing the first and second fins, a first charge... Agent: Lee & Morse, P.C.

20090221141 - Method for patterning crystalline indium tin oxide using femtosecond laser: A method for patterning crystalline indium tin oxide (ITO) using femtosecond laser is disclosed, which comprises steps of: (a) providing a substrate with an amorphous ITO layer thereon; (b) transferring the amorphous ITO layer in a predetermined area into a crystalline ITO layer by emitting a femtosecond laser beam to... Agent: Wpat, PC

20090221142 - Method of forming a metal bump on a semiconductor device: An uppermost one of multilayered electrode pads, on which a bump and a plating coat will be formed, is made of metal having high ionization tendency, particularly, Al. On the other hand, an uppermost one of multilayered electrode pads, on which none of the bump and the plating coat will... Agent: Steptoe & Johnson LLP

20090221143 - Method of cleaning and process for producing semiconductor device: A method of cleaning for removing metal compounds attached to a surface of a substrate, wherein the cleaning is conducted by supplying a supercritical fluid of carbon dioxide comprising at least one of triallylamine and tris(3-aminopropyl)amine to the surface of the substrate and a process for producing a semiconductor device... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090221144 - Manufacturing method for nano scale ge metal structure: Manufacturing methods for nano scale Ge include: Form dielectric layer on the substrate surface, then etch the dielectric layer to form openings of three different dimensions, then use chemical vapor deposition process to deposit Ge metal layer to cover the substrate, dielectric layer and the openings; then on the opening... Agent: Birch Stewart Kolasch & Birch

20090221145 - Metal polishing slurry and chemical mechanical polishing method: A metal polishing slurry which is capable of simultaneously realizing a high polishing speed and reduced dishing in the polishing of a subject to be polished is provided. The metal polishing slurry includes, an oxidizing agent; and an organic acid; and a compound represented by the following general formula (1):... Agent: Sughrue Mion, PLLC

20090221147 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device according to an embodiment includes: forming a core material on a workpiece material; forming a cover film to cover the upper and side surfaces of the core material; after forming the cover film, removing the core material; after removing the core material, removing... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090221146 - Nonvolatile memory device and manufacturing method for the same: The object of the present invention is to provide a manufacturing method for a nonvolatile memory device including a variable resistance having a constricted shape. The nonvolatile memory device of the present invention has a storage section composed of two electrodes and a variable resistance sandwiched between the electrodes. The... Agent: Mcginn Intellectual Property Law Group, PLLC

20090221148 - Plasma etching method, plasma etching apparatus and computer-readable storage medium: A plasma etching method includes etching a single crystalline silicon layer of a substrate to be processed through a patterned upper layer formed on the single crystalline silicon layer by using a plasma of a processing gas, wherein forming a protection film at a sidewall portion of the upper layer... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090221149 - Multiple port gas injection system utilized in a semiconductor processing system: An apparatus having a multiple gas injection port system for providing a high uniform etching rate across the substrate is provided. In one embodiment, the apparatus includes a nozzle in the semiconductor processing apparatus having a hollow cylindrical body having a first outer diameter defining a hollow cylindrical sleeve and... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090221150 - Etch rate and critical dimension uniformity by selection of focus ring material: A method and apparatus are provided for plasma etching a substrate in a processing chamber. A focus ring assembly circumscribes a substrate support, providing uniform processing conditions near the edge of the substrate. The focus ring assembly comprises two rings, a first ring and a second ring, the first ring... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090221151 - Electrode for plasma processing apparatus, plasma processing apparatus, plasma processing method and storage medium: The present invention provides an upper electrode used in an etching apparatus and the etching apparatus including the upper electrode, both of which can properly reduce intensity of electric field of plasma around a central portion of a substrate to be processed, thus enhancing in-plane uniformity of a plasma process.... Agent: Smith, Gambrell & Russell

20090221152 - Etching solution and method for structuring a ubm layer system: Etching solution for etching a layer system that has at least one layer of aluminum, at least one layer of copper and at least one third layer, selected from nickel vanadium, nickel and alloys thereof, which is arranged between the at least one aluminum layer and the at least one... Agent: Greenblum & Bernstein, P.L.C