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Semiconductor device manufacturing: process August inventions list 08/09

20090215201 - Method for controlling spatial temperature distribution across a semiconductor wafer: A chuck for a plasma processor comprises a temperature-controlled base, a thermal insulator, a flat support, and a heater. The temperature-controlled base is controlled in operation a temperature below the desired temperature of a workpiece. The thermal insulator is disposed over at least a portion of the temperature-controlled base. The... Agent: Buchanan, Ingersoll & Rooney Pc

20090215202 - Controlled edge resistivity in a silicon wafer: An epitaxial silicon wafer is produced with a resistivity in the area adjacent the edge that is greater or less than the resistivity adjacent the center. The wafer may be manufactured by a method wherein one or more process parameters are adjusted during deposition of epitaxial layer to control the... Agent: Kolisch Hartwell, P.c.

20090215203 - Monitoring of temperature variation across wafers during processing: A method of measuring temperature across wafers during semiconductor processing includes the step of providing a correlation between a peak wafer temperature during a processing step and a change in wafer surface charge or surface potential following the processing step. A first wafer to be characterized for its peak temperature... Agent: Texas Instruments Incorporated

20090215204 - Fabrication method of semiconductor device: A technique is provided which can exactly recognize a chip to be picked up when picking up the chip from a wafer sheet in a process of die bonding a thin chip. A camera is coupled to one end of a lens barrel, an objective lens is attached to an... Agent: Miles & Stockbridge Pc

20090215205 - Shower head structure for processing semiconductor: A shower head structure disposed in a device 2 for processing a semiconductor while supplying processing gas to a processing space S for storing a heated processed substrate W, comprising a shower head 12 having a plurality of gas injection holes 20B for supplying the processing gas and a light... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090215207 - Alignment method of two substrates by microcoils: Substrates to be aligned comprise microcoils arranged at the level of their facing surfaces. In an alignment phase, power is supplied to at least the microcoils of the first substrate, whereas the inductance of the microcoils of the second substrate is measured. The microcoils are preferably flat microcoils in the... Agent: Oliff & Berridge, Plc

20090215206 - System and method for controlling a semiconductor manufacturing process: A semiconductor manufacture and testing device is provided, comprising: a process device configured to perform a semiconductor processing operation on a semiconductor wafer; a testing device configured to perform a testing operation on the semiconductor wafer and generate real-time testing metrics relating to the testing operation; a data storage element... Agent: Posz Law Group, Plc

20090215208 - Composition including material, methods of depositing material, articles including same and systems for depositing material: Methods for depositing nanomaterial onto a substrate are disclosed. Also disclosed are compositions useful for depositing nanomaterial, methods of making devices including nanomaterials, and a system and devices useful for depositing nanomaterials.... Agent: Qd Vision, Inc.

20090215209 - Methods of depositing material, methods of making a device, and systems and articles for use in depositing material: Methods for depositing material and/or nanomaterial are disclosed. Also disclosed are methods of making devices including nanomaterials, systems useful for depositing materials and/or nanomaterials, surface treated articles for depositing material and/or nanomaterial onto a substrate, and surface treated transfer surfaces.... Agent: Qd Vision, Inc.

20090215210 - Method of manufacturing light emitting diode device: A method of manufacturing light-emitting diode device has steps of isolating a light-emitting side of an LED chip from a wire-bonding region by disposing partition panels on the wire-bonding region and coating phosphors on the light-emitting side of the LED chip in a phosphor-coating process. The method can be applied... Agent: Patenttm.us

20090215212 - Method for fabricating a flat panel display: The method for fabricating a flat panel display includes performing a first crystallization process to re-crystallize an amorphous silicon layer on a glass substrate to make the amorphous silicon layer become a polysilicon layer, forming a patterned absorbing layer to cover an active area pattern of a driving TFT and... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090215211 - Method of fabricating microchannel plate devices with multiple emissive layers: A method of fabricating a microchannel plate includes defining a plurality of pores extending from a top surface of a substrate to a bottom surface of the substrate where the plurality of pores has a resistive material on an outer surface that forms a first emissive layer. A second emissive... Agent: Rauschenbach Patent Law Group, Llc

20090215213 - Microelectromechanical device having a common ground plane and method for making aspects thereof: The present invention relates to MEM switches. More specifically, the present invention relates to a system and method for making MEM switches having a common ground plane. One method for making MEM switches includes: patterning a common ground plane layer on a substrate; forming a dielectric layer on the common... Agent: Tope-mckay & Associates Cary Tope-mckay

20090215214 - Method of sealing a cavity: Embodiments disclosed herein generally include methods of sealing a cavity in a device structure. The cavity may be opened by etching away sacrificial material that may define the cavity volume. Material from below the cavity may be sputter etched and redeposited over and in passageways leading to the cavity to... Agent: Patterson & Sheridan, L.l.p.

20090215215 - Method and apparatus for manufacturing multi-layered electro-optic devices: A method is provided for producing a hybrid multi-junction photovoltaic device. The method begins by providing a plurality of planar photovoltaic semi-transparent modules. Each of the modules is a fully functional, thin-film, photovoltaic device and includes first and second conductive layers and at least first and second semiconductor layers disposed... Agent: Mayer & Williams Pc

20090215216 - Packaging method of image sensing device: A packaging method for an image sensing device is disclosed. The packaging method includes the steps of a) mounting an image sensing module, having a light-receiving region exposed, on a substrate; b) connecting the image sensing module and the substrate via a plurality of bonding wires; c) forming a protecting... Agent: Bacon & Thomas, Pllc

20090215217 - Solid-state imaging device and method for producing the same: A method for producing a solid-state imaging device, which including: a photoelectric conversion section; a charge transfer section having a charge transfer electrode; and an antireflection film covering a light-receiving region in the photoelectric conversion section, wherein forming the antireflection film includes: forming a sidewall on a lateral wall of... Agent: Birch Stewart Kolasch & Birch

20090215218 - Method for making solar cell having crystalline silicon p-n homojunction and amorphous silicon heterojunctions for surface passivation: A thin silicon solar cell is described. Specifically, the solar cell may be fabricated from a crystalline silicon wafer having a thickness of approximately 50 micrometers to 500 micrometers. The solar cell comprises a first region having a p-n homojunction, a second region that creates heterojunction surface passivation, and a... Agent: Alston & Bird LLP

20090215219 - Method for manufacturing solar cell: A method for manufacturing a solar cell having a single crystal silicon substrate and an amorphous silicon layer provided at least on one side surface of the single crystal silicon substrate is provided. The method includes the steps of: (a) forming an intrinsic amorphous silicon layer by coating a first... Agent: Harness, Dickey & Pierce, P.L.C

20090215220 - Solid-state image capturing device, image capturing device, and manufacturing method of solid-state image capturing device: A solid-state image capturing device, includes a semiconductor board, upon which same semiconductor board are disposed in a predetermined order: a first detecting unit for detecting a first wavelength region component within an electromagnetic wave; and a second detecting unit for detecting a second wavelength region component which is longer... Agent: Robert J. Depke Lewis T. Steadman

20090215221 - Image sensor and method for manufacturing the same: An image sensor may include a photo diode, a transfer transistor configured to transfer a photo charge generated by the photo diode to a floating diffusion region and buried channel transistors electrically coupled to the transfer transistor, wherein each of the transistors have a buried channel. The noise of the... Agent: Harness, Dickey & Pierce, P.L.C

20090215223 - Electroluminescent device: An optical device comprising an anode, a cathode comprising barium, strontium or calcium, and a layer of organic semiconducting material between the anode and the cathode wherein a layer of hole transporting and electron blocking material is located between the anode and the layer of organic semiconducting material.... Agent: Marshall, Gerstein & Borun LLP

20090215222 - Manufacturing method of semiconductor device: When a thin film transistor is manufactured by using a printing method, the precision of alignment between a first electrode and a second electrode becomes a problem. If it is manufactured by using photolithography, a photomask for each layer is necessary, resulting in the cost being increased. The essence of... Agent: Stanley P. Fisher Reed Smith LLP

20090215224 - Coating methods and apparatus for making a cigs solar cell: A method for manufacturing a thin film solar cell involves applying an inductively-coupled-plasma during the deposition of selenium. A precursor thin film is formed. The precursor thin film can include copper, indium, and gallium. The inductively-coupled-plasma is applied to the selenium as the selenium is deposited into the precursor thin... Agent: Kasha Law Llc

20090215225 - Tellurium compounds useful for deposition of tellurium containing materials: Precursors for use in depositing tellurium-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of chalcogenide thin films in the manufacture of nonvolatile Phase... Agent: Intellectual Property / Technology Law

20090215227 - Chip scale package fabrication methods: Embodiments of the present invention includes a method of assembling a chip scale package (CSP). The method comprises adding bumps, sawing the saw streets from the front of a wafer, molding the front of the wafer, grinding the back of the wafer, sawing the saw streets from the back of... Agent: Fountainhead Law Group, Pc

20090215226 - Method of detaching a thin semiconductor circuit from its base: In order to provide a method of detaching a thin semiconductor circuit (1) from its base (2), wherein the semiconductor circuit (1) is provided with terminals (3) for electrical contacting, in particular with gold contacts, by means of which method thin semiconductor circuits (1) can also be mounted without damage... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090215228 - Wafer lever fixture and method for packaging micro-electro-mechanical-system devices: A fixture for packaging MEMS devices includes a base, a first material layer, an insulating layer and a second material layer. The base defines units, each including a notch. The first material layer is disposed on the base and the notches. The insulating layer is disposed on a part of... Agent: Lowe Hauptman Ham & Berner, LLP

20090215229 - Board on chip package and method of manufacturing the same: A ball grid array type board on chip package may include an integrated circuit chip having an active surface that supports a plurality of contact pads. An interposer may be adhered to the active surface of the integrated circuit chip. At least one hole may be provided through the interposer... Agent: Harness, Dickey & Pierce, P.L.C

20090215230 - Manufacturing method of semiconductor device: The radiation performance of a resin sealed semiconductor package is enhanced and further the fabrication yield thereof is enhanced. A drain terminal coupled to the back surface drain electrode of a semiconductor chip is exposed at the back surface of an encapsulation resin section. Part of the following portion and... Agent: Miles & Stockbridge Pc

20090215231 - Method of manufacturing electronic component built-in substrate: In a method of manufacturing an electronic component built-in substrate of the present invention, a mounted body including a first insulating layer, a stopper metal layer formed under the first insulating layer of a portion corresponding to a component mounting region and a second insulating layer formed on a lower... Agent: Kratz, Quintos & Hanson, LLP

20090215232 - Schottky barrier tunnel transistor and method of manufacturing the same: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The... Agent: Ladas & Parry LLP

20090215233 - Photoresist composition and method of manufacturing array substrate using the same: A photoresist composition includes a binder resin, a photo acid generator, an acryl resin having four different types of monomers, and a solvent.... Agent: H.c. Park & Associates, Plc

20090215234 - Semiconductor device, design method and structure: A semiconductor device can include at least a first diffusion region formed by doping a semiconductor substrate and at least a second diffusion region formed by doping the semiconductor substrate that is separated from the first diffusion region by an isolation region. At least a first conductive line can comprise... Agent: Haverstock & Owens LLP

20090215235 - Arrangement with two transistors and method for the production thereof: A transistor and a method for the fabrication of transistors with different gate oxide thicknesses is proposed, in which for the doping of the source, the typical LDD implantation, which is formed after the fabrication of the gate electrode, is replaced by a doping step, which is generated before applying... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090215236 - Relaxed-pitch method of aligning active area to digit line: According to one aspect of the invention, a memory device is disclosed. The memory device comprises a substantially linear active area comprising a source and at least two drains defining a first axis. The memory device further comprises at least two substantially parallel word lines, at least a portion of... Agent: Knobbe Martens Olson & Bear LLP

20090215237 - Method of forming lateral trench mosfet with direct trench polysilicon contact: A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive... Agent: Patentability Associates

20090215239 - Method of manufacturing semiconductor device: A trench gate type power transistor of high performance is provided. A trench gate as a gate electrode is formed in a super junction structure comprising a drain layer and an epitaxial layer. In this case, the gate electrode is formed in such a manner that an upper surface of... Agent: Miles & Stockbridge Pc

20090215238 - Methods of fabricating semiconductor devices with enlarged recessed gate electrodes: A semiconductor device includes a semiconductor substrate having a recess therein. A gate insulator is disposed on the substrate in the recess. The device further includes a gate electrode including a first portion on the gate insulator in the recess and a second reduced-width portion extending from the first portion.... Agent: Myers Bigel Sibley & Sajovec

20090215240 - Semiconductor device with strained transistors and its manufacture: A semiconductor device has: a semiconductor substrate made of a first semiconductor material; an n-channel field effect transistor formed in the semiconductor substrate and having n-type source/drain regions made of a second semiconductor material different from the first semiconductor material; and a p-channel field effect transistor formed in the semiconductor... Agent: Fujitsu Patent Center C/o Cpa Global

20090215241 - Manufacturing method for semiconductor devices: A polysilazane perhydride solution, prepared by dispesing polysilazane perhydride in a solvent containing carbon, is applied on a semiconductor substrate (1), thereby forming a coated film (6), which is heated, volatilizing solvent therein, thereby forming a polysilazane film (7), which is chemical-treated, so the polysilazane film (7) is changed to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090215242 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a semiconductor substrate having a first element isolation trench with a first opening width and a second element isolation trench with a second opening width larger than the first opening width, the first and second element isolation trenches having respective inner surfaces, the second element isolation... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090215243 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film,... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090215244 - Package having exposed integrated circuit device: A package (10) includes an integrated circuit device (12) having an electrically active surface (16) and an opposing backside surface (14). A dielectric molding resin (26) at least partially encapsulates the integrated circuit die and the plurality of electrically conductive leads (20) with the backside surface (14) and the plurality... Agent: Wiggin And Dana LLP Attention: Patent Docketing

20090215246 - Method for breaking adhesive film mounted on back of wafer: A method for breaking an adhesive film mounted on the back of a wafer having a plurality of streets formed in a lattice pattern on the face of the wafer, and having devices formed in a plurality of regions demarcated by the plurality of streets, the devices being divided individually,... Agent: Greenblum & Bernstein, P.L.C

20090215245 - Wafer dividing method: A method of dividing a wafer having a plurality of streets, which are formed in a lattice pattern on the front surface, and having devices, which are formed in a plurality of areas sectioned by the plurality of streets, into individual devices along the streets, comprising: a protective member-affixing step... Agent: Smith, Gambrell & Russell

20090215247 - Manufacturing method of semiconductor device: Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 μm or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced... Agent: Miles & Stockbridge Pc

20090215248 - Alxinyga1-x-yn mixture crystal substrate, method of growing same and method of producing same: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1, 0<x+y≦1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and... Agent: Mcdermott Will & Emery LLP

20090215249 - Method of forming an embedded silicon carbon epitaxial layer: Methods for forming embedded epitaxial layers containing silicon and carbon are disclosed. Specific embodiments pertain to the formation embedded epitaxial layers containing silicon and carbon on silicon wafers. In specific embodiments an epitaxial layer of silicon and carbon is non-selectively formed on a substrate or silicon wafer, portions of this... Agent: Diehl Servilla Llc

20090215251 - Plasma immersion ion implantation process with chamber seasoning and seasoning layer plasma discharging for wafer dechucking: In a plasma immersion ion implantation process, the thickness of a pre-implant chamber seasoning layer is increased (to permit implantation of a succession of wafers without replacing the seasoning layer) without loss of wafer clamping electrostatic force due to increased seasoning layer thickness. This is accomplished by first plasma-discharging residual... Agent: Law Office Of Robert M. Wallace

20090215250 - Plasma immersion ion implantation process with reduced polysilicon gate loss and reduced particle deposition: In plasma immersion ion implantation of a polysilicon gate, a hydride of the dopant is employed as a process gas to avoid etching the polysilicon gate, and sufficient argon gas is added to reduce added particle count to below 50 and to reduce plasma impedance fluctuations to 5% or less.... Agent: Law Office Of Robert M. Wallace

20090215252 - Methods of depositing materials over substrates, and methods of forming layers over substrates: The invention includes methods of utilizing supercritical fluids to introduce precursors into reaction chambers. In some aspects, a supercritical fluid is utilized to introduce at least one precursor into a chamber during ALD, and in particular aspects the supercritical fluid is utilized to introduce multiple precursors into the reaction chamber... Agent: Wells St. John P.s.

20090215254 - Design support system,computer readable medium, semiconductor device designing method and semiconductor device manufacturing method: A design support system which supports designing a semiconductor device is provided. The design support system includes a gate film information acquisition section and a maximum allowable antenna ratio setting section. The gate film information acquisition section acquires information on the thickness of the gate insulating film of a semiconductor... Agent: Mcginn Intellectual Property Law Group, Pllc

20090215253 - Method of forming a nitrogen-enriched region within silicon-oxide-containing masses: The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The... Agent: Wells St. John P.s.

20090215255 - Methods of forming dispersions of nanoparticles, and methods of forming flash memory cells: Some embodiments include methods of forming dispersions of nanoparticles. The nanoparticles are incorporated into first coordination complexes in which the nanoparticles are coordinated to hydrophobic ligands, and the first coordination complexes are dispersed within a non-polar solvent. While the first coordination complexes are within the non-polar solvent, the ligands are... Agent: Wells St. John P.s.

20090215256 - Inverted t-shaped floating gate memory and method for fabricating the same: A memory device having a floating gate with a non-rectangular cross-section is disclosed. The non-rectangular cross-section may be an inverted T shape, a trapezoid shape, or a double inverted T shape. Methods are disclosed for producing a floating gate memory device having an improved coupling ratio due to an increased... Agent: Jianq Chyun Intellectual Property Office

20090215257 - Semiconductor devices having a trench in a side portion of a conducting line pattern and methods of forming the same: A semiconductor device having a trench in the side portion of a conducting line pattern and methods of forming the same. The semiconductor device provides a way of preventing an electrical short between the conducting line pattern and a landing pad adjacent to the conducting line pattern. There are disposed... Agent: Marger Johnson & Mccollom, P.c.

20090215258 - Semiconductor device manufacturing method: There is provide a semiconductor device manufacturing method, including: preparing a substrate; laminating an insulation layer on the substrate; laminating a first underlying metal layer on the insulation layer; forming rewiring on the first underlying metal layer; removing exposed portions of the first underlying metal layer; laminating a second underlying... Agent: Rabin & Berdo, Pc

20090215259 - Semiconductor package and method of manufacturing the same: Disclosed is a semiconductor package and a method of manufacturing the same. The semiconductor package includes a semiconductor chip that includes metal pads provided on a predetermined area of an upper side of a semiconductor substrate, where element structures used to manufacture a semiconductor element are formed, and bump electrodes... Agent: Horizon Ip Pte Ltd

20090215260 - Methods of forming a barrier layer in an interconnect structure: Methods of forming a barrier layer for an interconnection structure are provided. In one embodiment, a method for forming an interconnect structure includes providing a substrate having a first conductive layer disposed thereon, incorporating oxygen into an upper portion of the first conductive layer, depositing a first barrier layer on... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090215261 - Semiconductor device and method for manufacturing the same: A semiconductor device having a through electrode excellent in performance as for an electrode and manufacturing stability is provided. There is provided a through electrode composed of a conductive small diameter plug and a conductive large diameter plug on a semiconductor device. A cross sectional area of the small diameter... Agent: Young & Thompson

20090215262 - Atomic layer deposition systems and methods including silicon-containing tantalum precursor compounds: The present invention provides atomic layer deposition systems and methods that include at least one compound of the formula (Formula I): Ta(NR1)(NR2R3)3, wherein each R1, R2, and R3 is independently hydrogen or an organic group, with the proviso that at least one of R1, R2, and R3 is a silicon-containing... Agent: Mueting, Raasch & Gebhardt, P.a.

20090215263 - Method for increasing etch rate during deep silicon dry etch: A method of increasing etch rate during deep silicon dry etch by altering the geometric shape of the etch mask is presented. By slightly altering the shape of the etch mask, the etch rate is increased in one area where an oval etch mask is used as compared to another... Agent: Dinsmore & Shohl LLP

20090215264 - Process for selective growth of films during ecp plating: Methods of controlling deposition of metal on field regions of a substrate in an electroplating process are provided. In one aspect, a dielectric layer is deposited under plasma on the field region of a patterned substrate, leaving a conductive surface exposed in the openings. Electroplating on the field region is... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090215265 - Low-stain polishing composition: The invention is an aqueous composition useful for chemical mechanical polishing of a patterned semiconductor wafer containing a copper interconnect metal. The aqueous composition includes an oxidizer, an inhibitor for the copper interconnect metal, 0.001 to 15 weight percent of a water soluble modified cellulose, non-saccaride water soluble polymer, 0... Agent: Rohm And Haas Electronic Materials Cmp Holdings, Inc.

20090215267 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device includes: polishing a semiconductor substrate to expose a polysilicon film on the semiconductor substrate using a chemical mechanical polishing method; cleaning the semiconductor substrate using a first acid cleaning solution; cleaning the semiconductor substrate with an ultrasonic wave using a second cleaning solution... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090215266 - Polishing copper-containing patterned wafers: An aspect of the invention provides a method for polishing a patterned semiconductor wafer containing a copper interconnect metal with a polishing pad. The method includes the following: a) providing an aqueous polishing solution, the polishing solution containing an benzotriazole (BTA) inhibitor and a copper complexing compound and water; b)... Agent: Rohm And Haas Electronic Materials Cmp Holdings, Inc.

20090215269 - Integrated chemical mechanical polishing composition and process for single platen processing: Chemical mechanical polishing (CMP) compositions and single CMP platen process for the removal of copper and barrier layer material from a microelectronic device substrate having same thereon. The process includes the in situ transformation of a Step I slurry formulation, which is used to selectively remove and planarize copper, into... Agent: Moore & Van Allen Pllc

20090215271 - Polishing composition and method for high silicon nitride to silicon oxide removal rate ratios: The invention provides a chemical-mechanical polishing composition comprising a cationic abrasive, a cationic polymer, an inorganic halide salt, and an aqueous carrier. The invention further provides a method of chemically-mechanically polishing a substrate with the aforementioned polishing composition. The polishing composition exhibits selectivity for removal of silicon nitride over removal... Agent: Steven Weseman Associate General Counsel, I.p.

20090215270 - Polishing liquid and polishing method: A polishing liquid is provided which has good storage stability and is capable of inhibiting generation of scratching caused by aggregation of solid abrasive grains or the like during use. A polishing method using the polishing liquid is also provided. The polishing liquid includes: (a) an aqueous solution A including... Agent: Moss & Burke, Pllc

20090215268 - Polishing process for producing damage free surfaces on semi-insulating silicon carbide wafers: A polishing mixture and related method of polishing a material wafer surface, such as silicon carbide, are disclosed. The polishing mixture comprises; an abrasive and an oxidizer mixed in an acidic solution. Alumina may be used as the abrasive and the polishing mixture may have a pH less than or... Agent: Gifford, Krass, Sprinkle,anderson & Citkowski, P.c

20090215272 - Double mask self-aligned double patterning technology (sadpt) process: A method for providing features in an etch layer is provided by forming an organic mask layer over the inorganic mask layer, forming a silicon-containing mask layer over the organic mask layer, forming a patterned mask layer over the silicon-containing mask layer, etching the silicon-containing mask layer through the patterned... Agent: Beyer Law Group LLP

20090215273 - Method of fabricating a semiconductor device: In a method of fabricating a semiconductor device, a charge storage layer is etched using an etching gas by which a tunnel insulating layer is less etched than the charge storage layer. Thus, it is possible to prevent the tunnel insulating layer formed below the charge storage layer from being... Agent: Townsend And Townsend And Crew, LLP

20090215274 - Plasma processing apparatus and plasma processing method: The plasma processing apparatus includes a holding table disposed in a processing chamber, for holding thereon a target substrate; a dielectric plate disposed at a position facing the holding table, for introducing a microwave into the processing chamber; a plasma igniting unit for carrying out plasma ignition in a state... Agent: Pearne & Gordon LLP

20090215275 - Defect etching of germanium: The present invention provides an etching solution for revealing defects in a germanium layer, a method for revealing defects in a germanium layer using such an etching solution and to a method for making such an etching solution. The etching solution according to embodiments of the present invention is able... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20090215276 - Photoelectrochemical cell with carbon nanotube-functionalized semiconductor electrode: Photoelectrochemical cells and methods are provided, in particular, to the functionalization of semiconductor surfaces such that its semiconducting and light generating properties are maintained and the surface becomes stable in wet environments. In particular the preferred embodiments relate to unstable semiconductor materials which have photocurrent generating properties, and to methods... Agent: Knobbe Martens Olson & Bear LLP

20090215277 - Dual contact etch stop layer process: A dual CESL process includes: (1) providing a substrate having thereon a first device region, a second device region and a shallow trench isolation (STI) region between the first and second device regions; (2) forming a first-stress imparting film with a first stress over the substrate, wherein the first-stress imparting... Agent: North America Intellectual Property Corporation

20090215278 - Semiconductor device manufacturing method: Prior to a step of providing a stress layer covering a first transistor, a second transistor and a gate structure, another silicon oxide film is formed over the second transistor to form a silicon oxide film with a predetermined thickness over the second transistor. By a step of removing the... Agent: Young & Thompson

20090215279 - Organic/inorganic hybrid thin film passivation layer for blocking moisture/oxygen transmission and improving gas barrier property: The present invention relates to an organic/inorganic hybrid thin film passivation layer comprising an organic polymer passivation layer prepared by a UV/ozone curing process and an inorganic thin film passivation layer for blocking moisture and oxygen transmission of an organic electronic device fabricated on a substrate and improving gas barrier... Agent: Jones Day

20090215280 - Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides: A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the... Agent: Summa, Additon & Ashe, P.a.

20090215281 - Hdp-cvd sion films for gap-fill: The present invention pertains to methods of depositing low stress/high index multi-layer films on a substrate using an HDP-CVD process. The multi-layer films include two lining layers and a bulk gap-fill layer and the HDP-CVD process employs a reduced substrate bias power during deposition of at least the second lining... Agent: Townsend And Townsend And Crew LLP

20090215282 - Processes for curing silicon based low-k dielectric materials: Processes for curing silicon based low k dielectric materials generally includes exposing the exposing the silicon based low k dielectric material to ultraviolet radiation in an inert atmosphere having an oxidant in an amount of about 10 to about 500 parts per million for a period of time and intensity... Agent: Cantor Colburn, LLP

20090209050 - In-situ formed capping layer in mtj devices: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step... Agent: Slater & Matsil, L.L.P.

20090209051 - Nonvolatile ferroelectric perpendicular electrode cell, feram having the cell and method for manufacturing the cell: A nonvolatile ferroelectric perpendicular electrode cell comprises a ferroelectric capacitor and a serial PN diode switch. The ferroelectric capacitor includes a word line perpendicular electrode as a first electrode and a storage perpendicular electrode as a second electrode apart at a predetermined interval from the word line perpendicular electrode to... Agent: Townsend And Townsend And Crew, LLP

20090209052 - Process for the collective fabrication of 3d electronic modules: This step, repeated K times, is followed by a step of stacking the K wafers, of forming metallized holes in the thickness of the stack, which are intended for connecting the dies together, and then of dicing the stack in order to obtain the n 3D modules.... Agent: Lowe Hauptman & Berner, LLP

20090209053 - Connection device and test system: To achieve high speed exchange of electrical signals between a connection device and a tester, a support member is provided for supporting the connection device, a plurality of pointed contact terminals are arrayed in an area on the probing side, a multilayer film is provided having a plurality of lead... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090209054 - Method for manufacturing a liquid crystal display: A method for manufacturing a liquid crystal display, the method includes steps of depositing a transparent conductive layer, forming a pixel electrode, and four bottom layers, depositing a semiconductor insulation layer on the pixel electrode and the four bottom layers, defining the semiconductor insulation layer to form two contact openings... Agent: Kusner & Jaffe Highland Place Suite 310

20090209055 - Method to fabricate semiconductor optical device: A process for the semiconductor laser diode is disclosed, which prevents the abnormal growth occurred at the second growth for the burying region of the buried hetero structure. The ICP (Induction-Coupled Plasma) CVD apparatus forms a silicon oxide file with a thickness of above 2 μm as adjusting the bias... Agent: Smith, Gambrell & Russell

20090209056 - Method for manufacturing solid-state imaging device: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator, the method includes... Agent: Sonnenschein Nath & Rosenthal LLP

20090209057 - Integrated circuit arrangement comprising a pin diode, and production method: An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth and without auto-doping in a central region.... Agent: Brinks Hofer Gilson & Lione

20090209058 - Method of fabricating image sensor: A method of manufacturing an image sensor is provided. In this method, a photoelectric conversion unit may be formed within a semiconductor substrate, wherein the semiconductor substrate includes an active pixel region and an optical black region. An annealing layer may be formed on the active pixel region and the... Agent: Harness, Dickey & Pierce, P.L.C

20090209059 - Method for manufacturing photoelectric conversion device: The purpose is manufacturing a photoelectric conversion device with excellent photoelectric conversion characteristics typified by a solar cell with effective use of a silicon material. A single crystal silicon layer is irradiated with a laser beam through an optical modulator to form an uneven structure on a surface thereof. The... Agent: Eric Robinson

20090209060 - Photoelectric converting film stack type solid-state image pickup device, and method of producing the same: A solid-state image pickup device comprises: a plurality of photoelectric converting films stacked via an insulating layer, the photoelectric converting films being above a semiconductor substrate in which a signal read circuit is formed, in which each of the photoelectric converting films is sandwiched between a pixel electrode film and... Agent: Birch Stewart Kolasch & Birch

20090209061 - Method of manufacturing semiconductor package: Provided is a semiconductor package and method of manufacturing same. The method includes: forming a plurality of semiconductor chips which have the same pattern direction on a semiconductor substrate, each of which includes a memory cell region, a peripheral region and a pad region, and in each of which the... Agent: Mills & Onello LLP

20090209062 - Method of manufacturing semiconductor device and the semiconductor device: A method of manufacturing a semiconductor device which can reduce the number of times of resin-injection, thereby facilitating the miniaturization of the semiconductor device, and the semiconductor device. After resin is injected into a space between at least two second semiconductor chips flip-chip joined to a first semiconductor chip through... Agent: Rabin & Berdo, PC

20090209063 - Chipstack package and manufacturing method thereof: A method for manufacturing chip stack packages may include: providing at least two wafers, each wafer having a plurality of chips, and scribe lanes formed between and separating adjacent chips; forming a plurality of via holes in peripheral portions of the scribe lanes; forming connection vias by filling the via... Agent: Harness, Dickey & Pierce, P.L.C

20090209064 - Lead frame land grid array: A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second... Agent: Haverstock & Owens LLP Attn: Thomas B. Haverstock

20090209065 - Method of manufacturing semiconductor device and ultrasonic bonding apparatus: An example of the invention is a method of manufacturing a semiconductor device including, pressing a part of the connection conductor having a plate-like shape or a belt-like shape against a lead terminal which is formed on a lead frame, is formed into a thin and long plate-like shape, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090209066 - Die bonding method and die bonder: In a die bonding method, a bonding film is stuck to a rear surface of a wafer and to a dicing tape stuck to a dicing frame. The wafer is thus supported by the dicing frame. Predetermined dividing lines are completely cut and the bonding film is incompletely cut to... Agent: Greer, Burns & Crain

20090209067 - Semiconductor device method of manfacturing a quantum well structure and a semiconductor device comprising such a quantum well structure:

20090209068 - Method of manufacturing thin film transistor substrate: In a method of manufacturing a thin film transistor substrate, a gate line and a gate electrode are formed on a substrate. A gate insulating layer is formed to cover the gate line and the gate electrode. A semiconductor layer is formed on the gate insulating layer to overlap with... Agent: H.c. Park & Associates, PLC

20090209069 - Organic semiconductor device and method for manufacturing the same: It is an object of the present invention to provide a method for manufacturing an inexpensive organic TFT which does not depend on an expensive dedicated device and does not expose an organic semiconductor to atmospheric air. Moreover, it is another object of the present invention to provide a method... Agent: Nixon Peabody, LLP

20090209070 - Method for manufacturing a thin film transistor having a micro-crystalline silicon hydrogen feeding layer formed between a metal gate and a gate insulating film.: A TFT (Thin Film Transistor) is provided in which a hydrogen feeding layer is able to be formed in a position where diffusing distance of hydrogen can be made short without causing an increase in photolithography processes. In the TFT, the hydrogen feeding layer to diffuse hydrogen into a dangling... Agent: Mcginn Intellectual Property Law Group, PLLC

20090209071 - Methods of manufacturing semiconductor devices: First nanowires and second nanowires are alternately disposed and spaced apart on a first substrate in a second direction that is parallel to an adjacent major surface of the first substrate. Each of the first and second nanowires extends in a first direction that is perpendicular to the second direction,... Agent: Myers Bigel Sibley & Sajovec

20090209072 - Methods of forming transistor gates, methods of forming memory cells, and methods of forming dram arrays: Some embodiments include methods of forming transistor gates. A gate stack is placed within a reaction chamber and subjected to at least two etches, and to one or more depositions to form a transistor gate. The transistor gate may comprise at least one electrically conductive layer over a semiconductor material-containing... Agent: Wells St. John P.s.

20090209073 - Gate structure in a trench region of a semiconductor device and method for manufacturing the same: Disclosed are a gate structure in a trench region of a semiconductor device and a method for manufacturing the same. The semiconductor device includes a pair of drift regions formed in a semiconductor substrate; a trench region formed between the pair of drift regions; an oxide layer spacer on sidewalls... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090209074 - Method of forming a multi-fin multi-gate field effect transistor with tailored drive current: Disclosed are embodiments of an improved multi-gated field effect transistor (MUGFET) structure and method of forming the MUGFET structure so that it exhibits a more tailored drive current. Specifically, the MUGFET incorporates multiple semiconductor fins in order to increase effective channel width of the device and, thereby, to increase the... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090209075 - Laterally double-diffused metal oxide semiconductor transistor and method for fabricating the same: The present invention discloses a laterally double-diffused metal oxide semiconductor transistor (LDMOS) and a method for fabricating the same. The LDMOS includes a substrate, a first well, a drain, a second well and a source. The substrate includes a first conductive dopant. The first well includes a second conductive dopant... Agent: Birch Stewart Kolasch & Birch

20090209076 - Method for manufacturing sonos flash memory: A method for manufacturing a semiconductor device which includes steps of forming a dummy layer on a semiconductor substrate, forming a groove 12 in the semiconductor substrate while using the dummy layer as a mask, forming a tunnel insulating film and a trap layer to cover an inner surface of... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20090209077 - Semiconductor device channel termination: A semiconductor device has a channel termination region for using a trench 30 filled with field oxide 32 and a channel stopper ring 18 which extends from the first major surface 8 through p-well 6 along the outer edge 36 of the trench 30, under the trench and extends passed... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090209078 - Semiconductor integrated circuit device and method of manufacturing the same: Provided is a manufacturing method of a semiconductor integrated circuit device having a plurality of first MISFETs in a first region and a plurality of second MISFETs in a second region, which comprises forming a first insulating film between two adjacent regions of the first MISFET forming regions in the... Agent: Miles & Stockbridge PC

20090209079 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device includes forming a diffusion layer on a silicon substrate by doping an impurity of a first conductivity type into a region of a second conductivity type opposite to the first conductivity type and performing a heat treatment; implanting nitrogen or fluorine ions into... Agent: Sughrue Mion, PLLC

20090209080 - Methods of forming pluralities of capacitors: The invention includes methods of forming pluralities of capacitors. In one implementation, a method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes within a capacitor array area over a substrate. The capacitor electrodes comprise outer lateral sidewalls. The plurality of capacitor electrodes is supported at... Agent: Wells St. John P.s.

20090209081 - Silicon dioxide thin films by ald: Methods are provided for depositing silicon dioxide containing thin films on a substrate by atomic layer deposition ALD. By using disilane compounds as the silicon source, good deposition rates and uniformity are obtained.... Agent: Knobbe Martens Olson & Bear LLP

20090209082 - Semiconductor device and method for fabricating the same: A semiconductor device and a method for fabricating the same may improve the isolation characteristics without deterioration of the junction diode characteristics and an increase in a threshold voltage of a MOS transistor. The device includes a semiconductor substrate; an STI layer in a predetermined portion of the semiconductor substrate,... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090209083 - Hybrid gap-fill approach for sti formation: A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first... Agent: Slater & Matsil, L.L.P.

20090209084 - Cleave initiation using varying ion implant dose: An approach for providing a cleave initiation using a varying ion implant dose is described. In one embodiment, there is a method of forming a substrate. In this embodiment, a semiconductor material is provided and implanted with a spatially varying dose of one or more ion species. A handler substrate... Agent: Scott Faber, Esq. Varian Semiconductor Equipment Associates, Inc

20090209086 - Method for manufacturing semiconductor device: Highly reliable single crystal semiconductor layers and semiconductor devices can be obtained through a fewer manufacturing steps. A method for manufacturing a semiconductor device is proposed. A single crystal semiconductor substrate provided with an insulating film is irradiated with an ion beam to form a damaged region in the single... Agent: Eric Robinson

20090209085 - Method for reusing delaminated wafer: The present invention provides a method for reusing a delaminated wafer, which is a method for applying reprocessing that is at least polishing to a delaminated wafer 17 byproduced when manufacturing an SOI wafer based on an ion implantation delamination method and thereby again reusing the delaminated wafer 17 as... Agent: Oliff & Berridge, PLC

20090209087 - Manufacturing method of semiconductor devices: In a method of manufacturing semiconductor chips by dicing individual semiconductor devices from a semiconductor wafer, masks formed for plasma dicing in which a semiconductor wafer is divided by conducting plasma etching are removed by mechanical grinding using a grinding head. Accordingly, by removing the masks for plasma dicing using... Agent: Pearne & Gordon LLP

20090209088 - Semiconductor chip fabrication method: A semiconductor chip fabrication method including a modified layer forming step of applying a laser beam having a transmission wavelength to the semiconductor wafer from the back side of the semiconductor wafer along the streets formed on the front side of the semiconductor wafer so that a focal point of... Agent: Greer, Burns & Crain

20090209089 - Dicing die-bonding film: The present invention provides a dicing die-bonding film including a dicing film having a pressure sensitive adhesive layer provided on a base material and a die-bonding film provided on the pressure sensitive adhesive layer, and having excellent storage stability of a product even at room temperature. The dicing die-bonding film... Agent: Knobbe Martens Olson & Bear LLP

20090209090 - Manufacturing method of semiconductor device: A problem in the conventional technique is that metal contamination on a silicon carbide surface is not sufficiently removed in a manufacturing method of a semiconductor device using a monocrystalline silicon carbide substrate. Accordingly, there is a high possibility that the initial characteristics of a manufactured silicon carbide semiconductor device... Agent: Miles & Stockbridge PC

20090209091 - Method of manufacturing group iii nitride crystal: Made available is a Group III nitride crystal manufacturing method whereby incidence of cracking in the III-nitride crystal when the III-nitride substrate is removed is kept to a minimum. III nitride crystal manufacturing method provided with: a step of growing, onto one principal face (10m) of a III-nitride substrate (10),... Agent: Judge Patent Associates

20090209092 - Seimiconductor devices and methods of manufacture thereof: A FinFET and methods for its manufacture are provided. The method of the invention provides an elegant process for manufacturing FinFETs with separated gates. It is compatible with a wide range of dielectric materials and gate electrode materials, providing that the gate electrode material(s) can be deposited conformally. Provision of... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090209093 - Plasma deposition apparatus and method for making polycrystalline silicon: A plasma deposition apparatus for making polycrystalline silicon including a chamber for depositing said polycrystalline silicon, the chamber having an exhaust system for recovering un-deposited gases; a support located within the deposition chamber for holding a target substrate having a deposition surface, the deposition surface defining a deposition zone; at... Agent: Patton Boggs LLP

20090209094 - Semiconductor element manufacturing method: [MEANS FOR SOLVING PROBLEMS] A diffusion control layer (2) composed of a thin film of a substance having a smaller diffusion coefficient than that of a diffusion source (3) is formed between a surface of a substrate (1) and the diffusion source (3), and an element of the diffusion source... Agent: Rader Fishman & Grauer PLLC

20090209095 - Manufacturing method for semiconductor devices and substrate processing apparatus: The throughput in the overall gate stack forming process is improved. When using a cluster apparatus to perform a gate stack forming process including a high dielectric film forming step, a plasma nitriding step, an annealing step and a gate electrode forming step, the final ongoing gate electrode forming step... Agent: Kratz, Quintos & Hanson, LLP

20090209096 - Method for manufacturing semiconductor device having decreased contact resistance: A method for manufacturing a semiconductor device includes the steps of forming an insulation layer having a contact hole, on a semiconductor substrate, forming a Co layer on the insulation layer including a surface of the contact hole, conducting primary annealing to allow the Co layer and a portion of... Agent: Ladas & Parry LLP

20090209097 - Method of forming interconnects: A method of forming interconnects includes etching a first set of openings in a hard mask using a first photo resist layer with a first pattern of openings as a first etch mask, and etching a second set of openings in the hard mask using a second photo resist layer... Agent: Dicke, Billig & Czaja

20090209099 - Forming diffusion barriers by annealing copper alloy layers: A method of forming an interconnect structure of an integrated circuit includes providing a semiconductor substrate; forming a dielectric layer over the semiconductor substrate; forming an opening in the dielectric layer; and forming a copper alloy seed layer in the opening. The copper alloy seed layer physically contacts the dielectric... Agent: Slater & Matsil, L.L.P.

20090209098 - Multi-step cu seed layer formation for improving sidewall coverage: A method of forming an integrated circuit structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a first deposition step to form a seed layer in a first chamber; and performing a first etch step to remove a portion of the seed layer. The method... Agent: Slater & Matsil, L.L.P.

20090209100 - Fabrication method for memory device: The invention provides a method for fabricating a memory device. At first, a substrate having a plurality of gate electrode stacks and a source/drain region is provided, and a barrier layer and a sacrificial layer are sequentially formed on the substrate and cover the gate electrode stacks. A portion of... Agent: Quintero Law Office, PC

20090209101 - Ruthenium alloy film for copper interconnects: A method for forming interconnect wiring, includes: (i) covering a surface of a connection hole penetrating through interconnect dielectric layers formed on a substrate for interconnect wiring, with an underlying alloy layer selected from the group consisting of an alloy film containing ruthenium (Ru) and at least one other metal... Agent: Knobbe Martens Olson & Bear LLP

20090209102 - Use of cmp to contact a mtj structure without forming a via: A process is described for making contact to the buried capping layers of GMR and MTJ devices without the need to form and fill via holes. CMP is applied to the structure in three steps: (1) conventional CMP (2) a Highly Selective Slurry (HSS) is substituted for the conventional slurry... Agent: Saile Ackerman LLC

20090209103 - Barrier slurry compositions and barrier cmp methods: A new barrier slurry composition enables metal and barrier layer material (as well as cap layer material, if necessary) to be removed at a practical rate whilst eliminating, or significantly reducing, the removal of underlying low-k or ultra-low-k dielectric material. The barrier slurry composition comprises: water, an oxidizing agent such... Agent: Freescale Semiconductor, Inc. Law Department

20090209104 - Polishing slurry for cmp, and polishing method: n

20090209105 - Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus: A pattern forming method for forming a pattern serving as a mask, includes a process for forming a first pattern 105, a process for trimming a width of the first pattern 105, a process for forming a boundary layer 106 on a surface of the first pattern 105, a process... Agent: Pearne & Gordon LLP

20090209106 - In situ cu seed layer formation for improving sidewall coverage: A method of forming a seed layer of an interconnect structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a first deposition step to form the seed layer; and in-situ performing a first etch step to remove a portion of the seed layer. The method... Agent: Slater & Matsil, L.L.P.

20090209107 - Method of forming an electronic device including forming features within a mask and a selective removal process: A method of forming an electronic device can include forming a patterned mask layer overlying a underlying layer such that the mask layer has a first feature, a second feature, and a third feature, and the first feature is between the second feature and the third feature. The first feature... Agent: Larson Newman Abel & Polansky, LLP

20090209108 - Substrate processing method: A substrate processing method that can prevent a decrease in the yield of semiconductor devices manufactured from substrates. A gas containing fluorine atoms is supplied into a chamber, and then chlorine gas is supplied into the chamber. Further, a gas containing nitrogen atoms is supplied into the chamber.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090209109 - Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus: Provided is a pattern forming method for forming a pattern serving as a mask, which includes: a process for forming a first pattern 105 made of a photoresist; a process for forming a boundary layer 106 at sidewall portions and top portions of the first pattern 105; a process for... Agent: Pearne & Gordon LLP

20090209110 - Spin etching method for semiconductor wafer: A spin etching method for etching a back-side surface of a semiconductor wafer provided with a plurality of devices on the face side and subjected to back grinding, wherein the semiconductor wafer is held with its back-side surface down, and the back-side surface of the semiconductor wafer is supplied with... Agent: Greer, Burns & Crain

20090209111 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device, according to the present invention includes the steps of: preparing an SOI substrate, which comprises a semiconductor supporting layer, an oxide layer formed on the semiconductor supporting layer and an SOI layer formed on the oxide layer; forming a semiconductor device on the... Agent: Rabin & Berdo, PC

20090209112 - Millisecond annealing (dsa) edge protection: A method and apparatus for thermally processing a substrate is provided. A substrate is disposed within a processing chamber configured for thermal processing by directing electromagnetic energy toward a surface of the substrate. An energy blocker is provided to block at least a portion of the energy directed toward the... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090209113 - Substrate processing apparatus, method of manufacturing semiconductor device, and ceiling insulating part: Provided is a substrate processing apparatus. The substrate processing apparatus comprises a reaction vessel configured to process a substrate, and a heating device. The heating device comprises at least one sidewall insulating part surrounding the reaction vessel, a ceiling insulating part placed on the sidewall insulating part and comprising a... Agent: Brundidge & Stanger, P.C.

20090203156 - Methods for accurately measuring the thickness of an epitaxial layer on a silicon wafer: Methods for measuring thickness of an epitaxial layer of a wafer. An example method applies photoresist over the epitaxial layer, and then portions of the photoresist within a sacrificial region of the wafer are removed. Next, the epitaxial layer is isotropically etched through the removed portions of the photoresist until... Agent: Honeywell International Inc. Patent Services

20090203157 - Display apparatus: A configuration for decreasing the leakage electric current of a transistor for control for controlling an electric potential holding operation of a control electrode of a transistor for drive for flowing an electric current through a display device by adjusting the output electric potential of an electric potential source is... Agent: Fitzpatrick Cella Harper & Scinto

20090203158 - Method for fabricating a photonic crystal or photonic bandgap vertical-cavity surface-emitting laser: The invention relates to fabrication of VCSELs. It provides a method for fabricating a VCSEL that contains a micro/nano-structured mode selective lateral layer, where the micro/nano-structured layer is obtained by well controlled local etching. The invention enables control of the micro/nano-structured layer thickness with very high precision. In particular, the... Agent: Foley And Lardner LLP Suite 500

20090203159 - Method of producing semiconductor optical device: The invention discloses a method of producing on a substrate a semiconductor optical device having a laser diode and an EA optical modulator. An etched side face of a first semiconductor portion is formed. Then, for example, a first optical confinement layer and an active layer both for the EA... Agent: Smith, Gambrell & Russell

20090203160 - System for displaying images including thin film transistor device and method for fabricating the same: A system for displaying images. The system comprises a thin film transistor (TFT) device comprising a substrate comprising a driving circuit region and a pixel region. First and second active layers are disposed on the substrate in the driving circuit region and in the pixel region, respectively. The first active... Agent: Liu & Liu

20090203161 - Semiconductor laser diode with a ridge structure buried by a current blocking layer made of un-doped semiconductor grown at a low temperature and method for producing the same: The present invention provides a laser diode with a current blocking layer without a pn-junction. The laser diode includes a lower cladding layer, an active region and an upper cladding layer on the GaAs substrate in this order. The active region includes first and second regions. The upper cladding layer,... Agent: Smith, Gambrell & Russell

20090203162 - Optical element, method for manufacturing optical element and semiconductor laser device using the optical element: The present invention provides an optical element which can reliably acquire a difference of refractive indices between a member under a photonic crystal layer and the crystal layer without using such a stacking technique as in conventional processes; a method for manufacturing the optical element; and a semiconductor laser device... Agent: Fitzpatrick Cella Harper & Scinto

20090203163 - Method for making a transducer: A method for forming a transducer including the step of providing a semiconductor-on-insulator wafer including first and second semiconductor layers separated by an electrically insulating layer. The method further includes depositing or growing a piezoelectric film or piezoresistive film on the wafer, depositing or growing an electrically conductive material on... Agent: Thompson Hine L.L.P. Intellectual Property Group

20090203164 - Electrolyte composition for dye-sensitized solar cell, dye-sensitized solar cell including same, and method of preparing same: An electrolyte composition for a dye sensitized solar cell according to one embodiment includes a first polymer or a non-volatile liquid compound having a weight average molecular weight of less than or equal to 500, a second polymer having a weight average molecular weight of more than or equal to... Agent: Knobbe Martens Olson & Bear LLP

20090203165 - Method to improve flexible foil substrate for thin film solar cell applications: A thin film solar cell including a Group IBIIIAVIA absorber layer on a defect free base including a stainless steel substrate is provided. The stainless steel substrate of the base is surface treated to remove the surface roughness such as protrusions that cause shunts. Before removing the protrusions, a thin... Agent: Pillsbury Winthrop Shaw Pittman LLP

20090203166 - Zinc oxide materials and methods for their preparation: A method for preparing p-type zinc oxide (ZnO) is described. The p-type ZnO is prepared by implanting low energy acceptor ions into an n-type ZnO substrate and annealing. In an alternative embodiment, the n-type ZnO substrate is pre-doped by implanting low energy donor ions. The p-type ZnO may have application... Agent: Dann, Dorfman, Herrell & Skillman

20090203167 - Method for manufacturing bonded substrate: The present invention provides a method for manufacturing a bonded substrate that is a method for manufacturing a bonded substrate where an active layer wafer is bonded to a support substrate wafer, comprising: a first step of providing a groove on an inner side on a surface of the active... Agent: Oliff & Berridge, PLC

20090203168 - Manufacturing method for a secure-digital (sd) flash card with slanted asymmetric circuit board: A flash-memory device has a printed-circuit board assembly (PCBA) with a PCB with a flash-memory chip and a controller chip. The controller chip includes an input/output interface circuit to an external computer over a Secure-Digital (SD) interface, and a processing unit to read blocks of data from the flash-memory chip.... Agent: Stuart T Auvinen

20090203169 - Flip chip mounting body and method for mounting such flip chip mounting body and bump forming method: In a flip chip mounted body in which a semiconductor chip (20) having a plurality of electrode terminals (21) is disposed so as to be opposed to a wiring board (10) having a plurality of connection terminals (11), with the connection terminals (11) and the electrode terminals (21) being connected... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090203170 - Flip chip mounting method, flip chip mounting apparatus and flip chip mounting body: A flip chip mounting method includes holding a circuit board (213) and a semiconductor chip (206), aligning the circuit board (213) with the semiconductor chip (206) while holding them with a predetermined gap therebetween, heating the circuit board (213) or the semiconductor chip (206) to a temperature at which solder... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090203171 - Semiconductor device fabricating method: A semiconductor device fabricating method includes forming a plurality of semiconductor devices that include one semiconductor chip and a metal plate having an opening portion that surrounds a region where the semiconductor chip is provided, by cutting, at regions where a frame portion exists, a plate-shaped member that includes: a... Agent: Rabin & Berdo, PC

20090203172 - Enhanced die-up ball grid array and method for making the same: Methods of assembling a ball grid array (BGA) package is provided. One method includes providing a tape substrate that has a first surface and a second surface, attaching a first surface of a stiffener to the first substrate surface, mounting an IC die to the second stiffener surface, mounting a... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20090203173 - Mold cleaning sheet and manufacturing method of a semiconductor device using the same: A cleaning sheet with frame for cleaning a molding die comprising a cleaning heat main body that covers the entire mating surface of a molding die and a reinforcing frame which can be disposed along the peripheral edge to the outside of the plural cavities of the mating surface of... Agent: Mattingly & Malur, P.C.

20090203174 - Method for manufacturing semiconductor device: A method for manufacturing an insulating film, which is used as an insulating film used for a semiconductor integrated circuit, whose reliability can be ensured even though it has small thickness, is provided. In particular, a method for manufacturing a high-quality insulating film over a substrate having an insulating surface,... Agent: Eric Robinson

20090203175 - Method of manufacturing a semiconductor device: TFT structures optimal for driving conditions of a pixel portion and driving circuits are obtained using a small number of photo masks. First through third semiconductor films are formed on a first insulating film. First shape first, second, and third electrodes are formed on the first through third semiconductor films.... Agent: Eric Robinson

20090203176 - Manufacturing method of semiconductor device: To suppress generation of dangling bonds, the present invention relates to a method for manufacturing a semiconductor device including the steps of: forming a semiconductor film; forming a gate insulating film and a gate electrode over the semiconductor film; forming an impurity region in the semiconductor film by addition of... Agent: Nixon Peabody, LLP

20090203177 - Thin-film semiconductor device and method for manufacturing the same: A method of manufacturing a thin-film semiconductor device, including forming a crystallized region on a transparent insulating substrate, implanting an impurity into the crystallized region and an amorphous semiconductor layer to form a source diffusion region and a drain diffusion region in the crystallized region, subjecting the resultant structure to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203178 - Memory device and method of manufacturing the same: A example embodiment may provide a memory device that may include an active pattern on a semiconductor substrate, a first charge trapping layer pattern on the active pattern, a first gate electrode on the first charge trapping layer pattern, a second charge trapping layer pattern on a sidewall of the... Agent: Harness, Dickey & Pierce, P.L.C

20090203179 - Semiconductor device and manufacturing method thereof: In this invention, the semiconductor device is provided with a gate electrode formed on a gate insulating film in a region sectioned by an element isolation formed on a semiconductor layer of the first conduction type, and a source region and a drain region of the second conduction type. At... Agent: Mcdermott Will & Emery LLP

20090203180 - Mos transistor having protruded-shape channel and method of fabricating the same: A MOS transistor that has a protruding portion with a favorable vertical profile and a protruded-shape channel that requires no additional photolithography process, and a method of fabricating the same are provided. A first mask that defines an isolation region of a substrate is overall etched to form a second... Agent: Marger Johnson & Mccollom, P.C.

20090203181 - Semiconductor device manufacturing method, wiring and semiconductor device: In an embodiment of the present invention, a semiconductor layer having regions into which a p-type impurity, an n-type impurity and a (p+n) impurity are respectively introduced is formed as a surface layer by being heat-treated. An impurity segregation layer on these regions is removed, and a film of a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090203182 - Method of manufacturing transistor having metal silicide and method of manufacturing a semiconductor device using the same: In a method of manufacturing a transistor and a method of manufacturing a semiconductor device using the same, the method may include forming a preliminary metal silicide pattern on a single-crystalline silicon substrate and on a polysilicon pattern, and partially etching the preliminary metal silicide pattern to form a first... Agent: Harness, Dickey & Pierce, P.L.C

20090203183 - Method for integrating sige npn and vertical pnp devices: According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an... Agent: Michael Farjami, Esq. Farjami & Farjami LLP

20090203184 - Self-aligned epitaxially grown bipolar transistor: The illumination system has a light source (1) with a plurality of light emitters (R, G, B). The light emitters comprise at least a first light-emitting diode of a first primary color and at least a second light-emitting diode of a second primary color, the first and the second primary... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090203185 - Method for fabricating device structures having a variation in electrical conductivity: A method for forming device structures having a variation in electrical conductivity includes forming a device structure and a radiation absorbing layer overlying the device structure. The radiation absorbing layer has a spatial variation and radiation absorbing characteristics, such that upon irradiating the device structure, the radiation absorbing layer attenuates... Agent: Brinks Hofer Gilson & Lione

20090203187 - Method of manufacturing soi substrate: After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the... Agent: Hogan & Hartson L.L.P.

20090203186 - Semiconductor device and method of fabricating the same: A method of fabricating a semiconductor device, including: forming a first well of a second conduction type and a second well of a first conduction type on a semiconductor substrate of the first conduction type, forming a gate oxide corresponding to each element on a surface of the semiconductor substrate,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203188 - Methods of manufacturing semiconductor devices: Methods of manufacturing a semiconductor device, which can reduce hot electron induced punchthrough (HEIP) and/or improve the operating characteristics of the device include selectively forming an oxynitride layer in a device isolation layer according to the characteristics of transistors isolated by the device isolation layer. The methods include forming first... Agent: Myers Bigel Sibley & Sajovec

20090203189 - Methods of manufacturing trench isolation structures using selective plasma ion immersion implantation and deposition (piiid): A semiconductor device is manufactured by forming trenches in a substrate and selectively performing Plasma Ion Immersion Implantation and Deposition (PIIID) on a subset of the trenches in the substrate. The PIIID may be performed on only a portion of a surface of at least one of the trenches in... Agent: Myers Bigel Sibley & Sajovec

20090203190 - Method of forming a mask stack pattern and method of manufacturing a flash memory device including an active area having rounded corners: A method of forming a mask stack pattern and a method of manufacturing a flash memory device including an active area having rounded corners are provided. The method of manufacture including forming a mask stack pattern defining an active region, the mask stack pattern having a pad oxide layer formed... Agent: Harness, Dickey & Pierce, P.L.C

20090203191 - Method for manufacturing soi substrate: A semiconductor substrate and a base substrate made from an insulator are prepared; an oxide film containing a chlorine atom is formed over the semiconductor substrate; the semiconductor substrate is irradiated with accelerated ions through the oxide film to form an embrittled region at a predetermined depth from a surface... Agent: Eric Robinson

20090203192 - Crack stop trenches: Structures and methods of forming crack stop trenches are disclosed. The method includes forming active regions disposed in cell regions of a substrate, the cell regions separated by dicing channels, and forming back end of line (BEOL) layers over the substrate, the BEOL layers being formed over the cell regions... Agent: Slater & Matsil LLP

20090203193 - Laser processing method: A laser processing method including a first step of forming a first groove and a second step of forming a second groove on the workpiece. In the first step, the laser beam is intermittently applied to the first street except the intersections between the first street and the second street,... Agent: Greer, Burns & Crain

20090203196 - Fabrication of metallic hollow nanoparticles: Metal and semiconductor nanoshells, particularly transition metal nanoshells, are fabricated using dendrimer molecules. Metallic colloids, metallic ions or semiconductors are attached to amine groups on the dendrimer surface in stabilized solution for the surface seeding method and the surface seedless method, respectively. Subsequently, the process is repeated with additional metallic... Agent: Kaufman & Canoles C/o Kelly Brown

20090203195 - Hybrid nanocomposite semiconductor material, and method of producing inorganic semiconductor therefor: Hybrid semiconductor materials have an inorganic semiconductor incorporated into a hole-conductive fluorene copolymer film. Nanometer-sized particles of the inorganic semiconductor may be prepared by mixing inorganic semiconductor precursors with a steric-hindering coordinating solvent and heating the mixture with microwaves to a temperature below the boiling point of the solvent.... Agent: National Research Council Of Canada 1200 Montreal Road

20090203194 - Transparent conductive film deposition apparatus, film deposition apparatus for continuous formation of multilayered transparent conductive film, and method of forming the film: A film deposition apparatus for the continuous formation of a multilayered transparent conductive film is provided which comprises a substrate attachment part, a charging part where evacuation is conducted, a multilayer deposition treatment part comprising two or more deposition treatment parts for forming a transparent conductive film on a substrate... Agent: Sughrue-265550

20090203197 - Novel method for conformal plasma immersed ion implantation assisted by atomic layer deposition: Embodiments of the invention provide a novel apparatus and methods for forming a conformal doped layer on the surface of a substrate. A substrate is provided to a process chamber, and a layer of dopant source material is deposited by plasma deposition, atomic layer deposition, or plasma-assisted atomic layer deposition.... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090203198 - Semiconductor manufacturing apparatus and semiconductor manufacturing method using the same: A semiconductor manufacturing apparatus and method are disclosed in which the apparatus comprises a reaction tube configured to hold one or more wafers, a spray pipe coupled to the reaction tube for spraying reaction gas into the reaction tube, and a plurality of electrodes used to convert the reaction gas... Agent: Marger Johnson & Mccollom, P.C.

20090203199 - Ion beam irradiating apparatus, and method of producing semiconductor device: An ion beam irradiating apparatus has a field emission electron source 10 which is disposed in a vicinity of a path of the ion beam 2, and which emits electrons 12. The field emission electron source 10 is placed in a direction along which an incident angle formed by the... Agent: Osha Liang L.L.P.

20090203200 - Gate patterning scheme with self aligned independent gate etch: A method for self-aligned gate patterning is disclosed. Two masks are used to process adjacent semiconductor components, such as an nFET and pFET that are separated by a shallow trench isolation region. The mask materials are chosen to facilitate selective etching. The second mask is applied while the first mask... Agent: International Business Machines Corporation Dept. 18g

20090203201 - Method for fabricating a semiconductor device: A method for fabricating a semiconductor device includes forming a dielectric film containing a porogen material above a substrate; removing a portion of the porogen material contained in the dielectric film so as to make a concentration of the porogen material higher in a part on a lower side of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090203202 - Strained gate electrodes in semiconductor devices: Embodiments of the invention provide a semiconductor device and a method of manufacture. MOS devices along with their polycrystalline or amorphous gate electrodes are fabricated such that the intrinsic stress within the gate electrode creates a stress in the channel region between the MOS source/drain regions. Embodiments include forming an... Agent: Slater & Matsil, L.L.P.

20090203203 - Method for the fabrication of a transistor gate that includes the breakdown of a precursor material into at least one metallic material, using at least one: A microelectronic method for the fabrication of a transistor gate using a precursor material that is suitable for being broken down into at least one metallic material after having been exposed to an electron beam. The invention applies in particular to the fabrication of multi-channel transistors, of the FinFET, suspended-channel,... Agent: Pearne & Gordon LLP

20090203204 - Methods of manufacturing semiconductor device having recess channel array transistor: Methods of manufacturing a semiconductor device having an RCAT are provided. The method includes forming a first recess having a first depth formed in an active region of a semiconductor substrate, and a second recess having a second depth that is less than the first depth formed in an isolation... Agent: Harness, Dickey & Pierce, P.L.C

20090203205 - Method for producing a floating gate with an alternation of lines of first and second materials: A diblock copolymer layer comprising at least two polymers and having a lamellar structure perpendicularly to a substrate is deposited on a first gate insulator formed on the substrate. One of the polymers of the diblock copolymer layer is then eliminated to form parallel grooves in the copolymer layer. The... Agent: Oliff & Berridge, PLC

20090203206 - Fabrication of semiconductor devices using anti-reflective coatings: Techniques are disclosed for fabricating a device using a photolithographic process. The method includes providing a first anti-reflective coating over a surface of a substrate. A layer which is transparent to a wavelength of light used during the photolithographic process is provided over the first anti-reflective coating, and a photosensitive... Agent: Dickstein Shapiro LLP

20090203207 - Method for manufacturing semiconductor device: A contact hole, after hole etching, is subjected to light etching using a process gas containing a fluorocarbon-based gas and oxygen, with the oxygen being enriched, under condition without applying bias. Then, reaction products (5) having C—F bond and adhered to an interior of a hole (3) are removed using... Agent: Mcginn Intellectual Property Law Group, PLLC

20090203208 - Copper alloy for wiring, semiconductor device, method for forming wiring, and method for manufacturing semiconductor device: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of... Agent: Sughrue Mion, PLLC

20090203210 - Manufacturing method of semiconductor device: A method of forming a metal interconnection that has a favorable cross-sectional shape is provided without the fear of side etching, even in a sparse arrangement of metal interconnections. The method, the following structure is employed. A region for placing a dummy metal interconnection is provided close to a region... Agent: Brinks Hofer Gilson & Lione/seiko Instruments Inc.

20090203209 - Semiconductor device and method of manufacturing the same: A semiconductor device which is capable of avoiding an increase in pattern ratio and allowing wiring dummy patterns to improve global steps developed by CMP upon insertion of the dummy patterns which are different from an actual wiring pattern. The semiconductor device has a configuration wherein a gate wiring pattern... Agent: Wenderoth, Lind & Ponack, L.L.P.

20090203211 - Multi-chamber system having compact installation set-up for an etching facility for semiconductor device manufacturing: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a clean room by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and... Agent: Volentine & Whitt PLLC

20090203212 - Surface grinding method and manufacturing method for semiconductor wafer: The present invention provides a surface grinding method for a semiconductor wafer, which performs surface grinding with respect to a semiconductor wafer sliced into a thin plate shape, wherein at least a cleaning process for removing a heavy metal is performed before carrying out surface grinding of the semiconductor wafer,... Agent: Oliff & Berridge, PLC

20090203214 - Semiconductor device, and semiconductor device obtained by such a method: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (1), whereby in the semiconductor body (1) a semiconductor element is formed by means of a mesa-shaped protrusion of the semiconductor body (1), which is formed on the surface of... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090203213 - Slurry composition for chemical-mechanical polishing and method of chemical-mechanical polishing with the same: Provided may be a slurry composition for chemical mechanical polishing (CMP) and a CMP method using the same. For example, the slurry composition may include a first polishing inhibitor including at least one of PO43− or HPO42− and a second polishing inhibitor, which may be a C2-C10 hydrocarbon compound having... Agent: Harness, Dickey & Pierce, P.L.C

20090203215 - Metal polishing slurry and chemical mechanical polishing method: wherein X represents a heterocyclic group containing at least one nitrogen atom, Y represents hydrogen atom, an aliphatic hydrocarbon group, an aryl group, or a —C(═O)Z′ wherein Z′ is as defined for Z, and Z represents hydrogen atom, an optionally substituted aliphatic hydrocarbon group, an optionally substituted aryl group, an... Agent: Sughrue Mion, PLLC

20090203216 - Photolithographic systems and methods for producing sub-diffraction-limited features: Systems and methods for near-field photolithography utilize surface plasmon resonances to enable imaging of pattern features that exceed the diffraction limit. An example near-field photolithography system includes a plasmon superlens template including a plurality of opaque features to be imaged onto photosensitive material and a metal plasmon superlens. The opaque... Agent: Knobbe Martens Olson & Bear LLP

20090203217 - Novel self-aligned etch method for patterning small critical dimensions: A method is disclosed for etching an integrated circuit structure within a trench. A layer to be etched is applied over the structure and within the trench. A CF-based polymer is deposited over the layer to be etched followed by deposition of a capping layer of SiOCl-based polymer. The CF-based... Agent: Duane Morris LLP (tsmc)IPDepartment

20090203218 - Plasma etching method and computer-readable storage medium: A plasma etching method includes etching an etching target layer formed on a substrate to be processed by a plasma of a processing gas by using an ArF photoresist as a mask. The etching target layer is a silicon nitride layer or silicon oxide layer, and the processing gas contains... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203219 - Plasma etching method, plasma etching apparatus and computer-readable storage medium: A plasma etching method includes etching a silicon layer formed on a substrate to be processed through a patterned mask layer by using a plasma of a processing gas. The processing gas contains at least a CF3I gas, and during said etching the silicon layer, a radio frequency power is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203220 - Method for reducing an unevenness of a surface and method for making a semiconductor device: In order to reduce an unevenness of a surface of a body, a sacrificial layer is applied to the surface, a chemical-mechanical polishing of the sacrificial layer and material of said body is performed to reduce the unevenness of the surface, and a remainder of the sacrificial layer, if any,... Agent: Slater & Matsil LLP

20090203221 - Apparatus and method for incorporating composition into substrate using neutral beams: An apparatus and method for incorporating a composition into a substrate using neutral beams are provided to repeatedly process an oxide layer using the neutral beams having low energy to minimize electrical damage to the oxide layer and improve characteristics of the oxide layer. The apparatus is mounted in a... Agent: Ballard Spahr Andrews & Ingersoll, LLP

20090203222 - Method of forming dielectric films, new precursors and their use in semiconductor manufacturing:

20090203223 - Substrate mounting table for plasma processing apparatus, plasma processing apparatus and insulating film forming method: A substrate mounting table includes an electrostatic chuck for attracting and holding a target substrate and a base for holding the electrostatic chuck thereon. The base includes a protruding portion having a large height; and an outer peripheral surface provided around the protruding portion at a position lower than the... Agent: Pearne & Gordon LLP

20090203224 - Si device making method by using a novel material for packing and unpacking process: A method of lithography patterning includes forming a resist pattern on a substrate, the resist pattern including at least one desired opening and at least one padding opening therein on the substrate; forming a patterned photosensitive material layer on the resist pattern and the substrate, wherein the patterned photosensitive material... Agent: Haynes And Boone, LLPIPSection

20090203225 - Sicoh film preparation using precursors with built-in porogen functionality: A method of fabricating a dielectric material that has an ultra low dielectric constant (or ultra low k) using at least one organosilicon precursor is described. The organosilicon precursor employed in the present invention includes a molecule containing both an Si—O structure and a sacrificial organic group, as a leaving... Agent: Scully, Scott, Murphy & Presser, P.C.

20090203227 - Film formation method and apparatus for forming silicon-containing insulating film: A silicon-containing insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including di-iso-propylaminosilane gas and a second process gas including an oxidizing gas or nitriding gas. The film is formed by performing a plurality of times... Agent: Smith, Gambrell & Russell

20090203226 - Neutral beam-assisted atomic layer chemical vapor deposition apparatus and method of processing substrate using the same: A neutral beam-assisted atomic layer chemical vapor deposition (ALCVD) apparatus is provided for uniformly depositing an oxide layer filling a planarization layer or a trench to increase uniformity and density of the oxide layer using neutral beams generated by a neutral beam generator without a seam or void occurring in... Agent: Ballard Spahr Andrews & Ingersoll, LLP

20090203228 - Plasma cvd method, method for forming silicon nitride film, method for manufacturing semiconductor device and plasma cvd method: A plasma processing apparatus includes a process chamber configured to be vacuum-exhausted; a worktable configured to place a target substrate thereon inside the process chamber; a microwave generation source configured to generate microwaves; a planar antenna including a plurality of slots and configured to supply microwaves generated by the microwave... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203231 - Crystallization apparatus, crystallization method, phase modulation element, device and display apparatus: A phase modulation element according to the present invention has a first area having a first phase value based on a phase modulation unit having a predetermined size and a second area having a second phase value based on the phase modulation unit having the predetermined size, and each phase... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203230 - Mask for crystallizing a semiconductor layer and method of crystallizing a semiconductor layer using the same: A mask for crystallizing a semiconductor layer includes a plurality of first main-slit portions, a plurality of second main-slit portions, upper slit portion and lower slit portion. The first main-slit portions extend along an inclined direction with respect to a first direction. The second main-slit portions are spaced apart from... Agent: Haynes And Boone, LLPIPSection

20090203229 - Substrate processing apparatus and semiconductor device manufacturing method: Provided is a substrate processing apparatus comprising: a process chamber for processing a substrate; a heater for heating an interior of the process chamber; a holder for sustaining the substrate in the process chamber; and a substrate transfer plate for transferring the substrate to the holder; wherein the holder has... Agent: Oliff & Berridge, PLC

20090203156 - Methods for accurately measuring the thickness of an epitaxial layer on a silicon wafer: Methods for measuring thickness of an epitaxial layer of a wafer. An example method applies photoresist over the epitaxial layer, and then portions of the photoresist within a sacrificial region of the wafer are removed. Next, the epitaxial layer is isotropically etched through the removed portions of the photoresist until... Agent: Honeywell International Inc. Patent Services

20090203157 - Display apparatus: A configuration for decreasing the leakage electric current of a transistor for control for controlling an electric potential holding operation of a control electrode of a transistor for drive for flowing an electric current through a display device by adjusting the output electric potential of an electric potential source is... Agent: Fitzpatrick Cella Harper & Scinto

20090203158 - Method for fabricating a photonic crystal or photonic bandgap vertical-cavity surface-emitting laser: The invention relates to fabrication of VCSELs. It provides a method for fabricating a VCSEL that contains a micro/nano-structured mode selective lateral layer, where the micro/nano-structured layer is obtained by well controlled local etching. The invention enables control of the micro/nano-structured layer thickness with very high precision. In particular, the... Agent: Foley And Lardner LLP Suite 500

20090203159 - Method of producing semiconductor optical device: The invention discloses a method of producing on a substrate a semiconductor optical device having a laser diode and an EA optical modulator. An etched side face of a first semiconductor portion is formed. Then, for example, a first optical confinement layer and an active layer both for the EA... Agent: Smith, Gambrell & Russell

20090203160 - System for displaying images including thin film transistor device and method for fabricating the same: A system for displaying images. The system comprises a thin film transistor (TFT) device comprising a substrate comprising a driving circuit region and a pixel region. First and second active layers are disposed on the substrate in the driving circuit region and in the pixel region, respectively. The first active... Agent: Liu & Liu

20090203161 - Semiconductor laser diode with a ridge structure buried by a current blocking layer made of un-doped semiconductor grown at a low temperature and method for producing the same: The present invention provides a laser diode with a current blocking layer without a pn-junction. The laser diode includes a lower cladding layer, an active region and an upper cladding layer on the GaAs substrate in this order. The active region includes first and second regions. The upper cladding layer,... Agent: Smith, Gambrell & Russell

20090203162 - Optical element, method for manufacturing optical element and semiconductor laser device using the optical element: The present invention provides an optical element which can reliably acquire a difference of refractive indices between a member under a photonic crystal layer and the crystal layer without using such a stacking technique as in conventional processes; a method for manufacturing the optical element; and a semiconductor laser device... Agent: Fitzpatrick Cella Harper & Scinto

20090203163 - Method for making a transducer: A method for forming a transducer including the step of providing a semiconductor-on-insulator wafer including first and second semiconductor layers separated by an electrically insulating layer. The method further includes depositing or growing a piezoelectric film or piezoresistive film on the wafer, depositing or growing an electrically conductive material on... Agent: Thompson Hine L.L.P. Intellectual Property Group

20090203164 - Electrolyte composition for dye-sensitized solar cell, dye-sensitized solar cell including same, and method of preparing same: An electrolyte composition for a dye sensitized solar cell according to one embodiment includes a first polymer or a non-volatile liquid compound having a weight average molecular weight of less than or equal to 500, a second polymer having a weight average molecular weight of more than or equal to... Agent: Knobbe Martens Olson & Bear LLP

20090203165 - Method to improve flexible foil substrate for thin film solar cell applications: A thin film solar cell including a Group IBIIIAVIA absorber layer on a defect free base including a stainless steel substrate is provided. The stainless steel substrate of the base is surface treated to remove the surface roughness such as protrusions that cause shunts. Before removing the protrusions, a thin... Agent: Pillsbury Winthrop Shaw Pittman LLP

20090203166 - Zinc oxide materials and methods for their preparation: A method for preparing p-type zinc oxide (ZnO) is described. The p-type ZnO is prepared by implanting low energy acceptor ions into an n-type ZnO substrate and annealing. In an alternative embodiment, the n-type ZnO substrate is pre-doped by implanting low energy donor ions. The p-type ZnO may have application... Agent: Dann, Dorfman, Herrell & Skillman

20090203167 - Method for manufacturing bonded substrate: The present invention provides a method for manufacturing a bonded substrate that is a method for manufacturing a bonded substrate where an active layer wafer is bonded to a support substrate wafer, comprising: a first step of providing a groove on an inner side on a surface of the active... Agent: Oliff & Berridge, PLC

20090203168 - Manufacturing method for a secure-digital (sd) flash card with slanted asymmetric circuit board: A flash-memory device has a printed-circuit board assembly (PCBA) with a PCB with a flash-memory chip and a controller chip. The controller chip includes an input/output interface circuit to an external computer over a Secure-Digital (SD) interface, and a processing unit to read blocks of data from the flash-memory chip.... Agent: Stuart T Auvinen

20090203169 - Flip chip mounting body and method for mounting such flip chip mounting body and bump forming method: In a flip chip mounted body in which a semiconductor chip (20) having a plurality of electrode terminals (21) is disposed so as to be opposed to a wiring board (10) having a plurality of connection terminals (11), with the connection terminals (11) and the electrode terminals (21) being connected... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090203170 - Flip chip mounting method, flip chip mounting apparatus and flip chip mounting body: A flip chip mounting method includes holding a circuit board (213) and a semiconductor chip (206), aligning the circuit board (213) with the semiconductor chip (206) while holding them with a predetermined gap therebetween, heating the circuit board (213) or the semiconductor chip (206) to a temperature at which solder... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090203171 - Semiconductor device fabricating method: A semiconductor device fabricating method includes forming a plurality of semiconductor devices that include one semiconductor chip and a metal plate having an opening portion that surrounds a region where the semiconductor chip is provided, by cutting, at regions where a frame portion exists, a plate-shaped member that includes: a... Agent: Rabin & Berdo, PC

20090203172 - Enhanced die-up ball grid array and method for making the same: Methods of assembling a ball grid array (BGA) package is provided. One method includes providing a tape substrate that has a first surface and a second surface, attaching a first surface of a stiffener to the first substrate surface, mounting an IC die to the second stiffener surface, mounting a... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20090203173 - Mold cleaning sheet and manufacturing method of a semiconductor device using the same: A cleaning sheet with frame for cleaning a molding die comprising a cleaning heat main body that covers the entire mating surface of a molding die and a reinforcing frame which can be disposed along the peripheral edge to the outside of the plural cavities of the mating surface of... Agent: Mattingly & Malur, P.C.

20090203174 - Method for manufacturing semiconductor device: A method for manufacturing an insulating film, which is used as an insulating film used for a semiconductor integrated circuit, whose reliability can be ensured even though it has small thickness, is provided. In particular, a method for manufacturing a high-quality insulating film over a substrate having an insulating surface,... Agent: Eric Robinson

20090203175 - Method of manufacturing a semiconductor device: TFT structures optimal for driving conditions of a pixel portion and driving circuits are obtained using a small number of photo masks. First through third semiconductor films are formed on a first insulating film. First shape first, second, and third electrodes are formed on the first through third semiconductor films.... Agent: Eric Robinson

20090203176 - Manufacturing method of semiconductor device: To suppress generation of dangling bonds, the present invention relates to a method for manufacturing a semiconductor device including the steps of: forming a semiconductor film; forming a gate insulating film and a gate electrode over the semiconductor film; forming an impurity region in the semiconductor film by addition of... Agent: Nixon Peabody, LLP

20090203177 - Thin-film semiconductor device and method for manufacturing the same: A method of manufacturing a thin-film semiconductor device, including forming a crystallized region on a transparent insulating substrate, implanting an impurity into the crystallized region and an amorphous semiconductor layer to form a source diffusion region and a drain diffusion region in the crystallized region, subjecting the resultant structure to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203178 - Memory device and method of manufacturing the same: A example embodiment may provide a memory device that may include an active pattern on a semiconductor substrate, a first charge trapping layer pattern on the active pattern, a first gate electrode on the first charge trapping layer pattern, a second charge trapping layer pattern on a sidewall of the... Agent: Harness, Dickey & Pierce, P.L.C

20090203179 - Semiconductor device and manufacturing method thereof: In this invention, the semiconductor device is provided with a gate electrode formed on a gate insulating film in a region sectioned by an element isolation formed on a semiconductor layer of the first conduction type, and a source region and a drain region of the second conduction type. At... Agent: Mcdermott Will & Emery LLP

20090203180 - Mos transistor having protruded-shape channel and method of fabricating the same: A MOS transistor that has a protruding portion with a favorable vertical profile and a protruded-shape channel that requires no additional photolithography process, and a method of fabricating the same are provided. A first mask that defines an isolation region of a substrate is overall etched to form a second... Agent: Marger Johnson & Mccollom, P.C.

20090203181 - Semiconductor device manufacturing method, wiring and semiconductor device: In an embodiment of the present invention, a semiconductor layer having regions into which a p-type impurity, an n-type impurity and a (p+n) impurity are respectively introduced is formed as a surface layer by being heat-treated. An impurity segregation layer on these regions is removed, and a film of a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090203182 - Method of manufacturing transistor having metal silicide and method of manufacturing a semiconductor device using the same: In a method of manufacturing a transistor and a method of manufacturing a semiconductor device using the same, the method may include forming a preliminary metal silicide pattern on a single-crystalline silicon substrate and on a polysilicon pattern, and partially etching the preliminary metal silicide pattern to form a first... Agent: Harness, Dickey & Pierce, P.L.C

20090203183 - Method for integrating sige npn and vertical pnp devices: According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an... Agent: Michael Farjami, Esq. Farjami & Farjami LLP

20090203184 - Self-aligned epitaxially grown bipolar transistor: The illumination system has a light source (1) with a plurality of light emitters (R, G, B). The light emitters comprise at least a first light-emitting diode of a first primary color and at least a second light-emitting diode of a second primary color, the first and the second primary... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090203185 - Method for fabricating device structures having a variation in electrical conductivity: A method for forming device structures having a variation in electrical conductivity includes forming a device structure and a radiation absorbing layer overlying the device structure. The radiation absorbing layer has a spatial variation and radiation absorbing characteristics, such that upon irradiating the device structure, the radiation absorbing layer attenuates... Agent: Brinks Hofer Gilson & Lione

20090203187 - Method of manufacturing soi substrate: After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the... Agent: Hogan & Hartson L.L.P.

20090203186 - Semiconductor device and method of fabricating the same: A method of fabricating a semiconductor device, including: forming a first well of a second conduction type and a second well of a first conduction type on a semiconductor substrate of the first conduction type, forming a gate oxide corresponding to each element on a surface of the semiconductor substrate,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203188 - Methods of manufacturing semiconductor devices: Methods of manufacturing a semiconductor device, which can reduce hot electron induced punchthrough (HEIP) and/or improve the operating characteristics of the device include selectively forming an oxynitride layer in a device isolation layer according to the characteristics of transistors isolated by the device isolation layer. The methods include forming first... Agent: Myers Bigel Sibley & Sajovec

20090203189 - Methods of manufacturing trench isolation structures using selective plasma ion immersion implantation and deposition (piiid): A semiconductor device is manufactured by forming trenches in a substrate and selectively performing Plasma Ion Immersion Implantation and Deposition (PIIID) on a subset of the trenches in the substrate. The PIIID may be performed on only a portion of a surface of at least one of the trenches in... Agent: Myers Bigel Sibley & Sajovec

20090203190 - Method of forming a mask stack pattern and method of manufacturing a flash memory device including an active area having rounded corners: A method of forming a mask stack pattern and a method of manufacturing a flash memory device including an active area having rounded corners are provided. The method of manufacture including forming a mask stack pattern defining an active region, the mask stack pattern having a pad oxide layer formed... Agent: Harness, Dickey & Pierce, P.L.C

20090203191 - Method for manufacturing soi substrate: A semiconductor substrate and a base substrate made from an insulator are prepared; an oxide film containing a chlorine atom is formed over the semiconductor substrate; the semiconductor substrate is irradiated with accelerated ions through the oxide film to form an embrittled region at a predetermined depth from a surface... Agent: Eric Robinson

20090203192 - Crack stop trenches: Structures and methods of forming crack stop trenches are disclosed. The method includes forming active regions disposed in cell regions of a substrate, the cell regions separated by dicing channels, and forming back end of line (BEOL) layers over the substrate, the BEOL layers being formed over the cell regions... Agent: Slater & Matsil LLP

20090203193 - Laser processing method: A laser processing method including a first step of forming a first groove and a second step of forming a second groove on the workpiece. In the first step, the laser beam is intermittently applied to the first street except the intersections between the first street and the second street,... Agent: Greer, Burns & Crain

20090203196 - Fabrication of metallic hollow nanoparticles: Metal and semiconductor nanoshells, particularly transition metal nanoshells, are fabricated using dendrimer molecules. Metallic colloids, metallic ions or semiconductors are attached to amine groups on the dendrimer surface in stabilized solution for the surface seeding method and the surface seedless method, respectively. Subsequently, the process is repeated with additional metallic... Agent: Kaufman & Canoles C/o Kelly Brown

20090203195 - Hybrid nanocomposite semiconductor material, and method of producing inorganic semiconductor therefor: Hybrid semiconductor materials have an inorganic semiconductor incorporated into a hole-conductive fluorene copolymer film. Nanometer-sized particles of the inorganic semiconductor may be prepared by mixing inorganic semiconductor precursors with a steric-hindering coordinating solvent and heating the mixture with microwaves to a temperature below the boiling point of the solvent.... Agent: National Research Council Of Canada 1200 Montreal Road

20090203194 - Transparent conductive film deposition apparatus, film deposition apparatus for continuous formation of multilayered transparent conductive film, and method of forming the film: A film deposition apparatus for the continuous formation of a multilayered transparent conductive film is provided which comprises a substrate attachment part, a charging part where evacuation is conducted, a multilayer deposition treatment part comprising two or more deposition treatment parts for forming a transparent conductive film on a substrate... Agent: Sughrue-265550

20090203197 - Novel method for conformal plasma immersed ion implantation assisted by atomic layer deposition: Embodiments of the invention provide a novel apparatus and methods for forming a conformal doped layer on the surface of a substrate. A substrate is provided to a process chamber, and a layer of dopant source material is deposited by plasma deposition, atomic layer deposition, or plasma-assisted atomic layer deposition.... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090203198 - Semiconductor manufacturing apparatus and semiconductor manufacturing method using the same: A semiconductor manufacturing apparatus and method are disclosed in which the apparatus comprises a reaction tube configured to hold one or more wafers, a spray pipe coupled to the reaction tube for spraying reaction gas into the reaction tube, and a plurality of electrodes used to convert the reaction gas... Agent: Marger Johnson & Mccollom, P.C.

20090203199 - Ion beam irradiating apparatus, and method of producing semiconductor device: An ion beam irradiating apparatus has a field emission electron source 10 which is disposed in a vicinity of a path of the ion beam 2, and which emits electrons 12. The field emission electron source 10 is placed in a direction along which an incident angle formed by the... Agent: Osha Liang L.L.P.

20090203200 - Gate patterning scheme with self aligned independent gate etch: A method for self-aligned gate patterning is disclosed. Two masks are used to process adjacent semiconductor components, such as an nFET and pFET that are separated by a shallow trench isolation region. The mask materials are chosen to facilitate selective etching. The second mask is applied while the first mask... Agent: International Business Machines Corporation Dept. 18g

20090203201 - Method for fabricating a semiconductor device: A method for fabricating a semiconductor device includes forming a dielectric film containing a porogen material above a substrate; removing a portion of the porogen material contained in the dielectric film so as to make a concentration of the porogen material higher in a part on a lower side of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090203202 - Strained gate electrodes in semiconductor devices: Embodiments of the invention provide a semiconductor device and a method of manufacture. MOS devices along with their polycrystalline or amorphous gate electrodes are fabricated such that the intrinsic stress within the gate electrode creates a stress in the channel region between the MOS source/drain regions. Embodiments include forming an... Agent: Slater & Matsil, L.L.P.

20090203203 - Method for the fabrication of a transistor gate that includes the breakdown of a precursor material into at least one metallic material, using at least one: A microelectronic method for the fabrication of a transistor gate using a precursor material that is suitable for being broken down into at least one metallic material after having been exposed to an electron beam. The invention applies in particular to the fabrication of multi-channel transistors, of the FinFET, suspended-channel,... Agent: Pearne & Gordon LLP

20090203204 - Methods of manufacturing semiconductor device having recess channel array transistor: Methods of manufacturing a semiconductor device having an RCAT are provided. The method includes forming a first recess having a first depth formed in an active region of a semiconductor substrate, and a second recess having a second depth that is less than the first depth formed in an isolation... Agent: Harness, Dickey & Pierce, P.L.C

20090203205 - Method for producing a floating gate with an alternation of lines of first and second materials: A diblock copolymer layer comprising at least two polymers and having a lamellar structure perpendicularly to a substrate is deposited on a first gate insulator formed on the substrate. One of the polymers of the diblock copolymer layer is then eliminated to form parallel grooves in the copolymer layer. The... Agent: Oliff & Berridge, PLC

20090203206 - Fabrication of semiconductor devices using anti-reflective coatings: Techniques are disclosed for fabricating a device using a photolithographic process. The method includes providing a first anti-reflective coating over a surface of a substrate. A layer which is transparent to a wavelength of light used during the photolithographic process is provided over the first anti-reflective coating, and a photosensitive... Agent: Dickstein Shapiro LLP

20090203207 - Method for manufacturing semiconductor device: A contact hole, after hole etching, is subjected to light etching using a process gas containing a fluorocarbon-based gas and oxygen, with the oxygen being enriched, under condition without applying bias. Then, reaction products (5) having C—F bond and adhered to an interior of a hole (3) are removed using... Agent: Mcginn Intellectual Property Law Group, PLLC

20090203208 - Copper alloy for wiring, semiconductor device, method for forming wiring, and method for manufacturing semiconductor device: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of... Agent: Sughrue Mion, PLLC

20090203210 - Manufacturing method of semiconductor device: A method of forming a metal interconnection that has a favorable cross-sectional shape is provided without the fear of side etching, even in a sparse arrangement of metal interconnections. The method, the following structure is employed. A region for placing a dummy metal interconnection is provided close to a region... Agent: Brinks Hofer Gilson & Lione/seiko Instruments Inc.

20090203209 - Semiconductor device and method of manufacturing the same: A semiconductor device which is capable of avoiding an increase in pattern ratio and allowing wiring dummy patterns to improve global steps developed by CMP upon insertion of the dummy patterns which are different from an actual wiring pattern. The semiconductor device has a configuration wherein a gate wiring pattern... Agent: Wenderoth, Lind & Ponack, L.L.P.

20090203211 - Multi-chamber system having compact installation set-up for an etching facility for semiconductor device manufacturing: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a clean room by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and... Agent: Volentine & Whitt PLLC

20090203212 - Surface grinding method and manufacturing method for semiconductor wafer: The present invention provides a surface grinding method for a semiconductor wafer, which performs surface grinding with respect to a semiconductor wafer sliced into a thin plate shape, wherein at least a cleaning process for removing a heavy metal is performed before carrying out surface grinding of the semiconductor wafer,... Agent: Oliff & Berridge, PLC

20090203214 - Semiconductor device, and semiconductor device obtained by such a method: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (1), whereby in the semiconductor body (1) a semiconductor element is formed by means of a mesa-shaped protrusion of the semiconductor body (1), which is formed on the surface of... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090203213 - Slurry composition for chemical-mechanical polishing and method of chemical-mechanical polishing with the same: Provided may be a slurry composition for chemical mechanical polishing (CMP) and a CMP method using the same. For example, the slurry composition may include a first polishing inhibitor including at least one of PO43− or HPO42− and a second polishing inhibitor, which may be a C2-C10 hydrocarbon compound having... Agent: Harness, Dickey & Pierce, P.L.C

20090203215 - Metal polishing slurry and chemical mechanical polishing method: wherein X represents a heterocyclic group containing at least one nitrogen atom, Y represents hydrogen atom, an aliphatic hydrocarbon group, an aryl group, or a —C(═O)Z′ wherein Z′ is as defined for Z, and Z represents hydrogen atom, an optionally substituted aliphatic hydrocarbon group, an optionally substituted aryl group, an... Agent: Sughrue Mion, PLLC

20090203216 - Photolithographic systems and methods for producing sub-diffraction-limited features: Systems and methods for near-field photolithography utilize surface plasmon resonances to enable imaging of pattern features that exceed the diffraction limit. An example near-field photolithography system includes a plasmon superlens template including a plurality of opaque features to be imaged onto photosensitive material and a metal plasmon superlens. The opaque... Agent: Knobbe Martens Olson & Bear LLP

20090203217 - Novel self-aligned etch method for patterning small critical dimensions: A method is disclosed for etching an integrated circuit structure within a trench. A layer to be etched is applied over the structure and within the trench. A CF-based polymer is deposited over the layer to be etched followed by deposition of a capping layer of SiOCl-based polymer. The CF-based... Agent: Duane Morris LLP (tsmc)IPDepartment

20090203218 - Plasma etching method and computer-readable storage medium: A plasma etching method includes etching an etching target layer formed on a substrate to be processed by a plasma of a processing gas by using an ArF photoresist as a mask. The etching target layer is a silicon nitride layer or silicon oxide layer, and the processing gas contains... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203219 - Plasma etching method, plasma etching apparatus and computer-readable storage medium: A plasma etching method includes etching a silicon layer formed on a substrate to be processed through a patterned mask layer by using a plasma of a processing gas. The processing gas contains at least a CF3I gas, and during said etching the silicon layer, a radio frequency power is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203220 - Method for reducing an unevenness of a surface and method for making a semiconductor device: In order to reduce an unevenness of a surface of a body, a sacrificial layer is applied to the surface, a chemical-mechanical polishing of the sacrificial layer and material of said body is performed to reduce the unevenness of the surface, and a remainder of the sacrificial layer, if any,... Agent: Slater & Matsil LLP

20090203221 - Apparatus and method for incorporating composition into substrate using neutral beams: An apparatus and method for incorporating a composition into a substrate using neutral beams are provided to repeatedly process an oxide layer using the neutral beams having low energy to minimize electrical damage to the oxide layer and improve characteristics of the oxide layer. The apparatus is mounted in a... Agent: Ballard Spahr Andrews & Ingersoll, LLP

20090203222 - Method of forming dielectric films, new precursors and their use in semiconductor manufacturing:

20090203223 - Substrate mounting table for plasma processing apparatus, plasma processing apparatus and insulating film forming method: A substrate mounting table includes an electrostatic chuck for attracting and holding a target substrate and a base for holding the electrostatic chuck thereon. The base includes a protruding portion having a large height; and an outer peripheral surface provided around the protruding portion at a position lower than the... Agent: Pearne & Gordon LLP

20090203224 - Si device making method by using a novel material for packing and unpacking process: A method of lithography patterning includes forming a resist pattern on a substrate, the resist pattern including at least one desired opening and at least one padding opening therein on the substrate; forming a patterned photosensitive material layer on the resist pattern and the substrate, wherein the patterned photosensitive material... Agent: Haynes And Boone, LLPIPSection

20090203225 - Sicoh film preparation using precursors with built-in porogen functionality: A method of fabricating a dielectric material that has an ultra low dielectric constant (or ultra low k) using at least one organosilicon precursor is described. The organosilicon precursor employed in the present invention includes a molecule containing both an Si—O structure and a sacrificial organic group, as a leaving... Agent: Scully, Scott, Murphy & Presser, P.C.

20090203227 - Film formation method and apparatus for forming silicon-containing insulating film: A silicon-containing insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including di-iso-propylaminosilane gas and a second process gas including an oxidizing gas or nitriding gas. The film is formed by performing a plurality of times... Agent: Smith, Gambrell & Russell

20090203226 - Neutral beam-assisted atomic layer chemical vapor deposition apparatus and method of processing substrate using the same: A neutral beam-assisted atomic layer chemical vapor deposition (ALCVD) apparatus is provided for uniformly depositing an oxide layer filling a planarization layer or a trench to increase uniformity and density of the oxide layer using neutral beams generated by a neutral beam generator without a seam or void occurring in... Agent: Ballard Spahr Andrews & Ingersoll, LLP

20090203228 - Plasma cvd method, method for forming silicon nitride film, method for manufacturing semiconductor device and plasma cvd method: A plasma processing apparatus includes a process chamber configured to be vacuum-exhausted; a worktable configured to place a target substrate thereon inside the process chamber; a microwave generation source configured to generate microwaves; a planar antenna including a plurality of slots and configured to supply microwaves generated by the microwave... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203231 - Crystallization apparatus, crystallization method, phase modulation element, device and display apparatus: A phase modulation element according to the present invention has a first area having a first phase value based on a phase modulation unit having a predetermined size and a second area having a second phase value based on the phase modulation unit having the predetermined size, and each phase... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090203230 - Mask for crystallizing a semiconductor layer and method of crystallizing a semiconductor layer using the same: A mask for crystallizing a semiconductor layer includes a plurality of first main-slit portions, a plurality of second main-slit portions, upper slit portion and lower slit portion. The first main-slit portions extend along an inclined direction with respect to a first direction. The second main-slit portions are spaced apart from... Agent: Haynes And Boone, LLPIPSection

20090203229 - Substrate processing apparatus and semiconductor device manufacturing method: Provided is a substrate processing apparatus comprising: a process chamber for processing a substrate; a heater for heating an interior of the process chamber; a holder for sustaining the substrate in the process chamber; and a substrate transfer plate for transferring the substrate to the holder; wherein the holder has... Agent: Oliff & Berridge, PLC

20090197350 - Magnetic memory device and method: An exemplary embodiment of a magnetic random access memory (MRAM) device includes a magnetic tunnel junction having a free layer, a first electrode (first magnetic field generating means) having a first portion that covers a surface of the free layer, and an electric power source connected to the first electrode... Agent: Buchanan, Ingersoll & Rooney PC

20090197351 - Laser processing method: In a laser beam processing method, when a laser beam is emitted along a second predetermined dividing line to form a second groove intersecting a first groove previously formed, the power output of the laser beam is allowed to be a first power output in a first interval, that is,... Agent: Greer, Burns & Crain

20090197352 - Substrate processing method and film forming method: A substrate processing method in a processing chamber, has: accommodating a substrate into a processing chamber; and processing the substrate in the processing chamber on the basis of a correlation of a preset temperature of a heating device, a flow rate of fluid supplied by a cooling device and a... Agent: Oliff & Berridge, PLC

20090197353 - Method of manufacturing material to be etched: Patterning (a method of manufacturing a material to be etched) of a substrate 100, which is manufactured by performing etching through an opened region 10 by an etching mask M1, is performed by a first etching process and a second etching process that is performed after the first etching process.... Agent: Sughrue Mion, PLLC

20090197357 - High-temperature ion implantation apparatus and methods of fabricating semiconductor devices using high-temperature ion implantation: A semiconductor device fabrication apparatus includes a load lock chamber, a loading assembly in the load lock chamber, and an ion implantation target chamber that is hermetically connected to the load lock chamber. The load lock chamber is configured to store a plurality of wafer plates. Each wafer plate respectively... Agent: Myers Bigel Sibley & Sajovec, P.A.

20090197355 - Method for manufacturing semiconductor device and semiconductor device manufacturing system: A method for manufacturing a semiconductor device that controls the influence of a thickness of a stopper film even if there is a change in the thickness of the stopper film by measuring the thickness prior to etching to a predetermined thickness.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090197356 - Substrate positioning on a vacuum chuck: We have discovered a method of using the vacuum chuck/heater upon which a substrate wafer is positioned to determine whether the wafer is properly placed on the vacuum chuck. The method employs measurement of a rate of increase in pressure in a confined space beneath the substrate. Because the substrate... Agent: Shirley L. Church, Esq.

20090197354 - System and method for monitoring manufacturing process: A system and method for monitoring a manufacturing process are provided. A wafer is provided. Process parameters of a manufacturing machine are in-situ measured and recorded if the wafer is processed in the manufacturing machine. A wafer measured value of the wafer is measured after the wafer has been processed.... Agent: Quintero Law Office, PC

20090197358 - Method for making cop evaluation on single-crystal silicon wafer: An evaluation area of an evaluation object wafer is concentrically divided in a radial direction, an upper limit value to the number of COPs is set in each divided evaluation segment, and an acceptance determination of the single-crystal silicon wafer is made using the upper limit value as a criterion.... Agent: Clark & Brody

20090197359 - Methods for evaluating and manufacturing semiconductor wafer: A method for evaluating a shape change of a semiconductor wafer is provided. The method comprises acquiring unconstrained shape data of shape data of the semiconductor wafer being placed on a reference surface in a unconstrained state; acquiring constrained shape data of shape data of the semiconductor wafer being constrained... Agent: Alston & Bird LLP

20090197360 - Light emitting diode package and fabrication method thereof: An LED package and a fabrication method therefor. The LED package includes first and second lead frames made of heat and electric conductors, each of the lead frames comprising a planar base and extensions extending in opposed directions and upward directions from the base. The package also includes a package... Agent: Mcdermott Will & Emery LLP

20090197361 - Method for producing an led light source comprising a luminescence conversion element: The invention describes a method for producing a light-emitting-diode (LED) light source, particularly comprising mixed-color LEDs, wherein at least a portion of primary radiation emitted by a chip is transformed by luminescence conversion. Said chip comprises a front-side (i.e., the side facing in the direction of radiation) electrical contact to... Agent: Fish & Richardson PC

20090197362 - Array substrate for liquid crystal display device and method of manufacturing the same: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad and a gate electrode on a substrate through a first mask process, forming a data line, a data pad, a source electrode, a drain electrode and an active layer... Agent: Mckenna Long & Aldridge LLP

20090197363 - Method for manufacturing semiconductor optical device: A method for manufacturing a semiconductor optical device comprises forming a groove on a first semiconductor layer; forming a second semiconductor layer containing aluminum in the groove; forming a third semiconductor layer on the first semiconductor layer and the second semiconductor layer; forming an insulating layer on the third semiconductor... Agent: Leydig Voit & Mayer, Ltd

20090197364 - Method of fabricating substrate: A method of fabricating a substrate includes following steps. First, a metallic panel having a first surface and a second surface is provided. A first half-etching process is carried out to etch the first surface of the metallic panel to a first depth so that a first patterned metallic layer... Agent: J C Patents, Inc.

20090197366 - Solid-state image sensor, manufacturing method for solid-state image sensor, and camera: A solid-state image sensor includes a plurality of light-receiving elements arranged in a light-receiving area, and a plurality of micro-lenses corresponding to the light-receiving elements, and has a flattening film formed on the plurality of the micro-lenses. At a center of the light-receiving area, the micro-lenses are placed in positions... Agent: Wenderoth, Lind & Ponack L.L.P.

20090197365 - Treatment method for surface of substrate, method of fabricating image sensor by using the treatment method, and image sensor fabricated by the same: Provided may be a treatment method to remove defects created on the surface of a substrate, a method of fabricating an image sensor by using the treatment method, and an image sensor fabricated by the same. The treatment method may include providing a semiconductor substrate including a surface defect, providing... Agent: Harness, Dickey & Pierce, P.L.C

20090197367 - Method to form a photovoltaic cell comprising a thin lamina: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or... Agent: The Mueller Law Office, P.C.

20090197368 - Method to form a photovoltaic cell comprising a thin lamina: A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or... Agent: The Mueller Law Office, P.C.

20090197369 - Multilayer substrate manufacturing method: A method for producing a multilayer substrate includes stacking a first substrate, the first substrate having a circuit pattern; stacking a connector, the connector coupling onto said first substrate, the connector having a ring structure, the ring structure having a plurality of holes separated a predetermined distance from one another;... Agent: Staas & Halsey LLP

20090197371 - Integrated circuit packaging using electrochemically fabricated structures: Embodiments of the invention provide methods for packaging integrated circuits and/or other electronic components with electrochemically fabricated structures which include conductive interconnection elements. In some embodiments the electrochemically produced structures are fabricated on substrates that include conductive vias while in other embodiments, the substrates are solid blocks of conductive material,... Agent: Microfabrica Inc. Att: Dennis R. Smalley

20090197370 - Method and apparatus for manufacturing semiconductor device: There is provided a method and an apparatus for manufacturing a semiconductor device having a lidless and highly reliable flip-chip structure. The method for manufacturing a semiconductor device wherein an underfill resin is filled in a space between a substrate and a semiconductor chip includes injecting a first underfill resin... Agent: Mcginn Intellectual Property Law Group, PLLC

20090197372 - Method for manufacturing stack package using through-electrodes: Manufacturing a wafer level stack package includes the steps of back-grinding a lower surface of a wafer including a plurality of first semiconductor chips. A support member is attached to a lower surface of the back-grinded wafer. One or more second semiconductor chips are stacked on the respective first semiconductor... Agent: Ladas & Parry LLP

20090197373 - Semiconductor device singulation method: The objective of the invention is to provide a semiconductor device manufacturing method with which the generation of burrs can be suppressed while increasing the singulation speed of the package. In a manufacturing method of a QFN package of the present invention, a molding prepared by sealing a lead frame... Agent: Texas Instruments Incorporated

20090197374 - Method of fabricating chip package structure: A chip package structure includes a chip, a lead frame, first and second bonding wires, an upper encapsulant, a first lower encapsulant, and a second lower encapsulant. The chip has an active surface, a back surface, and chip bonding pads disposed on the active surface. The lead frame having an... Agent: Jianq Chyun Intellectual Property Office

20090197375 - Metal-resin-boned structured body and resin-encapsulated semiconductor device, and fabrication method for them: A fabrication method for a metal-base/polymer-resin bonded structured body according to the present invention includes the steps of: (1) applying, to a surface of the metal base, a solution containing an organometallic compound decomposable at 350° C. or lower; (2) baking the applied solution in an oxidizing atmosphere to form,... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090197376 - Plasma cvd method, method for forming silicon nitride film and method for manufacturing semiconductor device: A plasma processing apparatus generates plasma by introducing microwaves into a processing chamber by using a planar antenna having a plurality of slots. By using the plasma processing apparatus, a nitrogen containing gas and a silicon containing gas introduced into the processing chamber are brought into the plasma state, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090197377 - Esd power clamp with stable power start up function: A selective stress memorization technique is disclosed in which the creation of tensile strain may be accomplished without additional photolithography steps by using an implantation mask or any other mask required during a standard manufacturing flow, or by providing a patterned cap layer for a strained re-crystallization of respective drain... Agent: Williams, Morgan & Amerson

20090197378 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes a first step of forming a defect suppression film suppressing increase in a defect due to implantation of an impurity on a semiconductor substrate, a second step of forming an active region on a surface of the semiconductor substrate by implanting the... Agent: Ditthavong Mori & Steiner, P.C.

20090197379 - Selective epitaxy vertical integrated circuit components and methods: Integrated circuit components are described that are formed using selective epitaxy such that the integrated circuit components, such as transistors, are vertically oriented. These structures have regions that are doped in situ during selective epitaxial growth of the component body.... Agent: Schwegman, Lundberg & Woessner/micron

20090197380 - Method for manufacturing a recessed gate transistor: A method of manufacturing a recessed gate transistor includes forming a hard mask pattern over a substrate; and then forming a trench in the substrate by performing an etching process using the hard mask pattern as an etch mask; and then performing a pullback-etching process on the hard mask pattern... Agent: Sherr & Vaughn, PLLC

20090197381 - Method for selectively forming strain in a transistor by a stress memorization technique without adding additional lithography steps: A selective stress memorization technique is disclosed in which the creation of tensile strain may be accomplished without additional photolithography steps by using an implantation mask or any other mask required during a standard manufacturing flow, or by providing a patterned cap layer for a strained re-crystallization of respective drain... Agent: Williams, Morgan & Amerson

20090197382 - Multi-gated, high-mobility, density improved devices: Disclosed herein are embodiments of an improved method of forming p-type and n-type MUGFETs with high mobility crystalline planes in high-density, chevron-patterned, CMOS devices. Specifically, semiconductor fins are formed in a chevron layout oriented along the centerline of a wafer. Gates are formed adjacent to the semiconductor fins such that... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090197383 - Method of fabricating a semiconductor device: A method of fabricating a semiconductor device forms a micro-sized gate, and mitigates short channel effects. The method includes a pull-back process to form the gate on a substrate. The method also includes forming inner and outer spacers on the gate that are asymmetric to one another with respect to... Agent: Volentine & Whitt PLLC

20090197384 - Semiconductor memory device and method for manufacturing semiconductor memory device: According to an aspect of the present invention, there is provided a semiconductor memory device. The semiconductor memory device is provided with an insulator and a capacitor. The capacitor is provided with a lower electrode provided with an inner portion and an outer portion, a dielectric portion on the lower... Agent: Mcdermott Will & Emery LLP

20090197386 - Methods of forming an interconnect between a substrate bit line contact and a bit line in dram, and methods of forming dram memory cells: The invention includes methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit line contact and a bit line in DRAM, and methods of forming DRAM memory cells. In one implementation, a method of electrically interconnecting different elevation conductive... Agent: Wells St. John P.s.

20090197385 - Semiconductor device and method of fabricating the same: The present invention discloses a semiconductor device and a method of manufacture thereof. The present invention prevents from leaning or collapsing in the subsequent dip-out process by making the bottom plate of adjacent capacitors to be connected each other and supported each other in patterning the conductive layer for the... Agent: Townsend And Townsend And Crew, LLP

20090197387 - Method of forming a gate stack structure: A method of forming an integrated circuit structure on a substrate, the substrate includes a primary region and a secondary region. A first layer of a first material of a first thickness is formed over the substrate. A portion of the first layer is removed over the primary region to... Agent: HorizonIPPte Ltd

20090197388 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device including at leasty one of the following steps: sequentially forming a first oxide layer, a nitride layer, a second oxide layer, a bottom anti-reflect coating and a photo-resist pattern over a semiconductor substrate; exposing the uppermost surface of the semiconductor substrate by performing... Agent: Sherr & Vaughn, PLLC

20090197389 - Method for manufacturing semiconductor device: The present invention provides a method for manufacturing a semiconductor device, comprising the steps of preparing a substrate having a quartz support substrate and a silicon layer, forming a base or substrate silicon oxide film over the entire upper surface of the silicon layer, forming a silicon nitride film over... Agent: Rabin & Berdo, PC

20090197390 - Lock and key structure for three-dimentional chip connection and process thereof: A method positions a first wafer with respect to a second wafer such that key studs on the first wafer are fit (positioned) within lock openings in the second wafer. The key studs contact conductors within the second wafer. The edges of the first wafer are tacked to the edges... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090197392 - Manufacturing method of soi substrate: An SOI substrate is manufactured by a method in which a first insulating film is formed over a first substrate over which a plurality of first single crystal semiconductor films is formed; the first insulating film is planarized; heat treatment is performed on a single crystal semiconductor substrate attached to... Agent: Eric Robinson

20090197391 - Method for manufacturing soi substrate: A method for manufacturing an SOI substrate is provided in which adhesiveness between a single crystal semiconductor substrate and a semiconductor substrate is improved; bonding defects are reduced; and sufficient bonding strength is provided in a bonding step and also in a process of manufacturing a semiconductor device. An insulating... Agent: Eric Robinson

20090197393 - Method for dividing semiconductor wafer and manufacturing method for semiconductor devices: In a semiconductor wafer including a plurality of imaginary-divided-regions which are partitioned by imaginary-dividing-lines that are respectively arranged in a grid-like arrangement on the semiconductor wafer and a circumferential line that is the outer periphery outline of the semiconductor wafer, a mask is placed so as to expose an entirety... Agent: Wenderoth, Lind & Ponack L.L.P.

20090197394 - Wafer processing: Methods for processing semiconductor wafers are described herein. One embodiment includes removing portions of a first side of the semiconductor wafer to form a number of trenches of a particular depth in rows and columns. The method further includes forming a passivation layer on side walls of the number of... Agent: Brooks, Cameron & Huebsch , PLLC

20090197395 - Method of manufacturing device: A method of manufacturing a device includes: a laser beam-machined groove forming step of irradiating a wafer with a laser beam from the back side of the wafer along planned dividing lines so as to form laser beam-machined grooves along the planned dividing lines; an etching step of etching a... Agent: Greer, Burns & Crain

20090197396 - Method for producing silicon wafer: The present invention provides a method for producing a silicon wafer at least including a step of performing RTA heat treatment with respect to a silicon wafer in an atmospheric gas, wherein nitrogen gas is used as the atmospheric gas, which is mixed with oxygen at a concentration of less... Agent: Oliff & Berridge, PLC

20090197398 - Iii nitride single crystal and method of manufacturing semiconductor device incorporating the iii nitride single crystal: A III nitride single-crystal manufacturing method in which a liquid layer (3) of 200 μm or less thickness is formed in between a substrate (1) and a III nitride source-material baseplate (2), and III nitride single crystal (4) is grown onto the face (1s) on the liquid-layer side of the... Agent: Judge Patent Associates

20090197397 - Method of manufacturing semiconductor device: The present invention discloses a method of manufacturing a semiconductor device including a plurality of semiconductor layers grown on a substrate and removing the substrate from the plurality of semiconductor layers. The method of manufacturing the semiconductor device comprises a first step for growing a III-nitride compound semiconductor layer between... Agent: Harness, Dickey, & Pierce, P.l.c

20090197399 - Method of growing group iii-v compound semiconductor, and method of manufacturing light-emitting device and electron device: e

20090197400 - Method for recycling of ion implantation monitor wafers: A method of recycling monitor wafers. The method includes: (a) providing a semiconductor wafer which includes a dopant layer extending from a top surface of the wafer into the wafer a distance less than a thickness of the wafer, the dopant layer containing dopant species; after (a), (b) attaching an... Agent: Schmeiser, Olsen & Watts

20090197401 - Plasma immersion ion implantation method using a pure or nearly pure silicon seasoning layer on the chamber interior surfaces: Plasma immersion ion implantation employing a very high RF bias voltage on an electrostatic chuck to attain a requisite implant depth profile is carried out by first depositing a partially conductive silicon-containing seasoning layer over the interior chamber surfaces prior to wafer introduction.... Agent: Law Office Of Robert M. Wallace

20090197402 - Substrate processing apparatus, method for manufacturing semiconductor device, and process tube: In a substrate processing apparatus, a process vessel is configured to accommodate and process a substrate held at a horizontal position. A gas introduction port is installed at a periphery of a first side of the process vessel and configured to introduce gas into the process vessel from a lateral... Agent: Brundidge & Stanger, P.C.

20090197403 - Method for forming insulating film and method for manufacturing semiconductor device: A method for forming an insulating film includes forming a silicon nitride film on a silicon surface by subjecting a target substrate wherein silicon is exposed in the surface to a treatment for nitriding the silicon, forming a silicon oxynitride film by heating the target substrate provided with the silicon... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090197404 - High yield and high throughput method for the manufacture of integrated circuit devices of improved integrity, performance and reliability: The present invention provides a method of forming a contact opening, such as a via hole, in which a sacrificial layer is deposited prior to exposing a conductor formed in a substrate at a bottom side of the opening to prevent damage and contamination to the materials constituting an integrated... Agent: Tue Nguyen

20090197405 - Method of forming a layer over a surface of a first material embedded in a second material in a structure for a semiconductor device: There is described a method of forming a barrier layer (6, 110) over a surface of a copper line (3, 107) embedded in a dielectric material (2, 100) in an interconnect structure for a semiconductor device. The barrier layer (6, 110) is selectively deposited over the surface of the copper... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20090197406 - Sequential deposition of tantalum nitride using a tantalum-containing precursor and a nitrogen-containing precursor: Embodiments of the invention provide a method for forming tantalum nitride materials on a substrate by employing an atomic layer deposition (ALD) process. The method includes heating a tantalum precursor within an ampoule to a predetermined temperature to form a tantalum precursor gas and sequentially exposing a substrate to the... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090197407 - Process for manufacturing rounded polysilicon electrodes on semiconductor components: A polysilicon layer provided for a polysilicon electrode (8) is patterned by means of a resist mask (5) and an auxiliary layer (4) made of a material that is suitable as an antireflection layer, the auxiliary layer (4) being provided with lateral hollowed-out recesses in such a way that the... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090197408 - Increasing electromigration resistance in an interconnect structure of a semiconductor device by forming an alloy: By introducing a metallic species into an exposed surface area of a copper region, the electromigration behavior of this surface area may be significantly enhanced. The incorporation of the metallic species may be accomplished in a highly selective manner so as to not unduly affect dielectric material positioned adjacent to... Agent: Williams, Morgan & Amerson

20090197409 - Substrate processing apparatus and method of manufacturing semiconductor device: Provided is a substrate processing apparatus. The substrate processing apparatus comprises a reaction tube; a heating device configured to heat the reaction tube; and a manifold installed outward as compared with the heating device and made of a nonmetallic material. A first thickness of the manifold defined in a direction... Agent: Mattingly & Malur, P.C.

20090197410 - Method of forming tasin film: A substrate is disposed in a processing chamber. An organic Ta compound gas having Ta═N bond, a Si-containing gas and a N-containing gas are introduced into the processing chamber to form a TaSiN film on the substrate by CVD. In this film formation, at least one of a partial pressure... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090197411 - New metal precursors containing beta-diketiminato ligands: s

20090197412 - Chemical mechanical polishing composition and process: To provide a polishing slurry composition which effectively reduces the occurrence of scratches, and a method of polishing which reduces the occurrence of scratches while realizing an economical polishing step. The aforementioned object is attained by using a polishing slurry composition for polishing a semiconductor substrate containing a metal oxide... Agent: Morgan Lewis & Bockius LLP

20090197413 - Polishing composition and polishing method using the same: The present invention provides a polishing composition that can be suitably used in polishing of polysilicon, and a polishing method using the polishing composition. The polishing composition contains abrasive grains and an anionic surfactant having a monooxyethylene group or a polyoxyethylene group and has a pH of 9 to 12.... Agent: Vidas, Arrett & Steinkraus, P.A.

20090197414 - Polishing composition and polishing method using the same: The present invention provides a polishing composition that can be suitably used in polishing of polysilicon, and a polishing method using the polishing composition. The polishing composition contains a nitrogen-containing nonionic surfactant and abrasive grains and has a pH of 9 to 12. The content of the nitrogen-containing nonionic surfactant... Agent: Vidas, Arrett & Steinkraus, P.A.

20090197415 - Polishing fluid composition: To provide a polishing composition capable of increasing polishing rate and reducing surface roughness, without causing surface defects on a surface of an object to be polished; and a polishing process for a substrate to be polished. [1] a polishing composition comprising water, an abrasive, an intermediate alumina, and a... Agent: Birch Stewart Kolasch & Birch

20090197416 - Silicon nano wire having a silicon-nitride shell and mthod of manufacturing the same: Silicon nano wires having silicon nitride shells and a method of manufacturing the same are provided. Each silicon nano wire has a core portion formed of silicon, and a shell portion formed of silicon nitride surrounding the core portion. The method includes removing silicon oxide formed on the shell of... Agent: Buchanan, Ingersoll & Rooney PC

20090197417 - Method for forming spacers of different sizes: A method for forming spacers of different sizes includes the following steps. First a substrate is provided, which has a first element, a second element, a first material layer and a second material layer thereon. A first dry etching is performed to remove part of the second material layer to... Agent: North America Intellectual Property Corporation

20090197419 - Process for removing high stressed film using lf or hf bias power and capacitively coupled vhf source power with enhanced residue capture: A method of fabricating multilayer interconnect structures on a semiconductor wafer uses an interior surface of a metal lid that has been roughed to a surface roughness in excess of RA 2000 with a reentrant surface profile. The metal lid is installed as the ceiling of a plasma clean reactor... Agent: Law Office Of Robert M. Wallace

20090197418 - Substrate processing apparatus: A method of using a heat exchanger efficiently and uniformly to cool or heats portions to be controlled to a prescribed temperature, and then continuously carry out stable processing. The heat exchanger is constructed by arranging partition walls between two plates to form a fluid channel and a fin parallel... Agent: Buchanan, Ingersoll & Rooney PC

20090197420 - Method for etching a silicon-containing arc layer to reduce roughness and cd: A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in... Agent: Tokyo Electron U.s. Holdings, Inc.

20090197421 - Chemistry and compositions for manufacturing integrated circuits: Methods of removing metal-containing materials during the manufacture of integrated circuits are disclosed. Generally, the methods include providing a substrate assembly that includes a metal-containing material, contacting the metal-containing material with a reactive composition that includes a chlorocarbon material under conditions effective to form a reaction product, and removing the... Agent: Mueting, Raasch & Gebhardt, P.A.

20090197422 - Reducing damage to low-k materials during photoresist stripping: A method of forming features in a porous low-k dielectric layer disposed below a patterned organic mask is provided. Features are etched into the porous low-k dielectric layer through the patterned organic mask, and then the patterned organic mask is stripped. The stripping of the patterned organic mask includes providing... Agent: Beyer Law Group LLP

20090197423 - Substrate processing method and substrate processing apparatus: A substrate processing method that can eliminate unevenness in the distribution of plasma. The method is for a substrate processing apparatus that has a processing chamber in which a substrate is housed, a mounting stage that is disposed in the processing chamber and on which the substrate is mounted, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090197424 - Substrate processing method and substrate processing apparatus: A substrate processing apparatus according to the present invention promotes supplying gases to spaces between adjacent substrates without reducing the number of substrates which can be collectively processed. The substrate processing apparatus includes: a processing chamber for storing and processing substrates stacked in multiple stages in horizontal posture; at least... Agent: Oliff & Berridge, PLC

20090197425 - Substrate processing apparatus: An ALD apparatus comprises: a process chamber (32) configured to accommodate a boat (25) charged with a plurality of wafers (1); gas supply systems (38, 50) configured to supply process gases to the wafers (1); a pair of electrodes (57, 57) arranged in a stacked direction of the wafers (1);... Agent: Brundidge & Stanger, P.C.

20090197426 - Process for preparing a dielectric interlayer film containing silicon beta zeolite: A process for forming a zeolite beta dielectric layer onto a substrate such as a silicon wafer has been developed. The zeolite beta is characterized in that it has an aluminum concentration from about 0.1 to about 2.0 wt. %, and has crystallites from about 5 to about 40 nanometers.... Agent: Honeywell/uop Patent Services

20090197427 - Impurity-activating thermal process method and thermal process appartus: A thermal cycle includes: increasing a temperature from an initial temperature to a temperature T1 at an arbitrary rate R1 (° C./sec); holding the temperature at the temperature T1 for an arbitrary period t1 (sec); increasing the temperature from the temperature T1 to a temperature T2 at a rate R2... Agent: Mcdermott Will & Emery LLP

20090197428 - Impurity-activating thermal process method and thermal process apparatus: An impurity-activating thermal process is performed after a target is subjected to an impurity introduction step. In this thermal process, while a spike RTA process including a holding period for holding a temperature at a predetermined temperature is performed, at least one iteration of millisecond annealing at a temperature higher... Agent: Mcdermott Will & Emery LLP