Semiconductor device manufacturing: process inventions 05/09

20090137067 - Method for forming an inductor: A spiral inductor fabricated above a semiconductor substrate provides a large inductance while occupying only a small surface area. Including a layer of magnetic material above and below the inductor increases the inductance of the inductor. The magnetic material also acts as barrier that confines electronic noise generated in the... Agent: Schwegman, Lundberg & Woessner/micron

20090137065 - Method for manufacturing memory device: A method for manufacturing a memory device including a ferroelectric memory array region and a logic circuit region is provided. The method includes the steps of: forming, above a base substrate, a plurality of ferroelectric capacitors in the ferroelectric memory array region; forming a wiring layer above the base substrate... Agent: Harness, Dickey & Pierce, P.L.C

20090137066 - Sensor for a magnetic memory device and method of manufacturing the same: The invention encompasses fabrication methods including the steps of preparing a silicon substrate, forming an amorphous III-V material layer on the silicon substrate, heating the amorphous III-V material layer, and epitaxially growing III-V material on the amorphous III-V material layer.... Agent: Morgan Lewis & Bockius LLP

20090137068 - Method and computer program product for wafer manufacturing process abnormalities detection: A method for wafer manufacturing process abnormalities detection, the method includes: generating a classifier in response to compression based similarities between relevant wafer manufacturing process information of pairs of wafers; and utilizing the classifier to detect wafer manufacturing process abnormalities.... Agent: Ibm Corporation, T.j. Watson Research Center

20090137069 - Chip packaging process including simpification and mergence of burn-in test and high temperature test: A chip packaging process integrates a burn-in test or a high temperature test to simplify overall packaging and testing process flow. One or more chips are disposed on one or more units of a substrate strip where the substrate strip has a plurality of electrical open sections at the plating... Agent: Joe Mckinney Muncy

20090137070 - Manufacturing method for partially-good memory modules with defect table in eeprom: A manufacturing method makes memory modules from partially-good DRAM chips soldered to its substrate. The partially-good DRAM chips have a number of defective memory cells that is below a test threshold, such as 10%. Packaged DRAM chips are optionally pre-screened and considered to pass when the number of defects found... Agent: Stuart T Auvinen

20090137071 - High reliability surveillance and/or identification tag/devices and methods of making and using the same: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090137072 - Light emitting device methods: Light-emitting device methods are disclosed.... Agent: Luminus Devices , Inc. C/o Wolf, Greenfield & Sacks , P.C.

20090137073 - Light emitting diode package and fabrication method thereof: The present invention provides an LED package and the fabrication method thereof. The present invention provides an LED package including a submount silicon substrate and insulating film and electrode patterns formed on the submount silicon substrate. The LED package also includes a spacer having a through hole, formed on the... Agent: Mcdermott Will & Emery LLP

20090137074 - Method of manufacturing display device: A method of manufacturing a display device includes: preparing a substrate including a first area and a second area, forming a first layer on the first area and the second area, forming a second layer on the first layer of the first area, respectively forming a first electrode layer on... Agent: Robert E. Bushnell & Law Firm

20090137075 - Method of manufacturing vertical light emitting diode: Provided is a method of manufacturing a vertical LED, the method including the steps of: preparing a sapphire substrate; forming a light emitting structure in which an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer are sequentially laminated on the sapphire substrate; forming a p-electrode... Agent: Mcdermott Will & Emery LLP

20090137076 - Surface emitting semiconductor laser, its manufacturing method, and manufacturing method of electron device: A surface emitting semiconductor laser which can perform laser oscillation in a single peak beam like that in a single lateral mode and a manufacturing method which can easily manufacture such a laser at a high yield are provided. When a surface emitting semiconductor laser having a post type mesa... Agent: Sonnenschein Nath & Rosenthal LLP

20090137077 - Thin film transistor array substrate and fabricating method thereof: A liquid crystal display and a fabricating method thereof for improving an aperture ratio are disclosed. A liquid crystal display (LCD) according to the present invention includes a gate line, a data line and a common line on the thin film transistor array substrate, the gate line crossing the data... Agent: Mckenna Long & Aldridge LLP

20090137078 - Semiconductro laser device: This semiconductor laser device has the same structure as the conventional broad-area type semiconductor laser device, except that both side regions of light emission areas of active and clad layers are two-dimensional-photonic-crystallized. The two-dimensional photonic crystal formed on both side regions of the light emission area is the crystal having... Agent: Rader Fishman & Grauer PLLC

20090137079 - Method for manufacturing a microelectromechanical component, and a microelectromechanical component: The invention relates to microelectromechanical components, like microelectromechanical gauges used in measuring e.g. acceleration, angular acceleration, angular velocity, or other physical quantities. The microelectromechanical component, according to the invention, comprises a microelectromechanical chip part, sealed by means of a cover part, and an electronic circuit part, suitably bonded to each... Agent: Squire, Sanders & Dempsey L.L.P.

20090137080 - Phase change memory device and method for manufacturing the same: A phase change memory device reduces the current necessary to cause a phase change of a phase change layer. The phase change memory device includes a first oxide layer formed on a semiconductor substrate; a lower electrode formed inside the first oxide layer; a second oxide layer formed on the... Agent: Ladas & Parry LLP

20090137081 - Phase change ram device and method for manufacturing the same: A phase change RAM device includes a semiconductor substrate having a phase change cell area and a voltage application area; a first oxide layer, a nitride layer and a second oxide layer sequentially formed on the semiconductor substrate; a first plug formed in the first oxide layer, the nitride layer... Agent: Ladas & Parry LLP

20090137082 - Manufacturing method for electronic devices: A manufacturing method for manufacturing an electronic device includes a first electronic component and a second electronic component; and a bond part for the first electronic component joined to another bond part for the second electronic component. In a first process of this manufacturing method, the metallic bond part for... Agent: Mcginn Intellectual Property Law Group, PLLC

20090137083 - Assembling of doubled-side stacking pulral chips: Disclosed is a method for assembling a semiconductor device, especially to dispose a plurality of chips on double sides of a chip carrier, such as a lead frame. At least a first chip is disposed on one surface of the chip carrier. Then, a protecting spacer is disposed on the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090137084 - Method and apparatus for manufacturing semiconductor module: Disclosed herewith is a semiconductor module manufacturing apparatus capable of reducing occurrence of warping of the wiring substrate, etc., as well as occurrence of failures of bonding between the wiring substrate and semiconductor chips, etc. without lowering the productivity. The semiconductor module manufacturing apparatus employs a batch reflowing process that... Agent: Mcginn Intellectual Property Law Group, PLLC

20090137085 - Method of manufacturing a wiring substrate and semiconductor device: A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating... Agent: Young & Thompson

20090137086 - Method for making a device including placing a semiconductor chip on a substrate: A method for making a device is disclosed. One embodiment provides a substrate having a first element protruding from the substrate. A semiconductor chip has a first electrode on a first surface and a second electrode on a second surface opposite to the first surface. The semiconductor chip is placed... Agent: Dicke, Billig & Czaja

20090137087 - Method of manufacturing semiconductor device, film deposition method, and film deposition apparatus: An object is to provide a film deposition apparatus in which the amount of leakage from the outside of the chamber to the inside of the chamber is reduced. Even if leakage occurs from the outside of the chamber to the inside of the chamber, oxygen and nitrogen included in... Agent: Fish & Richardson P.C.

20090137088 - Jfet having a step channel doping profile and method of fabrication: A junction field effect transistor comprises a semiconductor substrate, a source region formed in the substrate, a drain region formed in the substrate and spaced apart from the source region, and a gate region formed in the substrate. The transistor further comprises a first channel region formed in the substrate... Agent: Baker Botts L.L.P.

20090137089 - Semiconductor mos transistor device and method for making the same: A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A gate dielectric layer is formed on an active area of a substrate. A gate electrode is patterned on the gate dielectric layer. The gate electrode has vertical sidewalls and a top surface. A liner is formed on the... Agent: North America Intellectual Property Corporation

20090137090 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device is provided. A first active region and a second active region are defined in a substrate. An electrode covering the first active region and the second active region is formed on the substrate. A first sacrificial layer is formed on the second active... Agent: Quintero Law Office, PC

20090137091 - Methods of manufacturing semiconductor devices: A plurality of nanowires is grown on a first substrate in a first direction perpendicular to the first substrate. An insulation layer covering the nanowires is formed on the first substrate to define a nanowire block including the nanowires and the insulation layer. The nanowire block is moved so that... Agent: Mills & Onello LLP

20090137092 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device includes forming a plurality of trenches for element isolation and a plurality of trenches for alignment mark on a substrate. The substrate has an active region. The method also includes laminating an oxide film on the substrate and over both of the trenches.... Agent: Rabin & Berdo, PC

20090137093 - Method of forming finfet device: A method of forming a FINFET device includes providing a substrate with a plurality of trench devices arranged in array therein, each of the trench devices comprising a plug protruding above the substrate; forming a plurality of isolation structures along a first direction in the substrate adjacent to the trench... Agent: Ingrassia Fisher & Lorenz, P.C.

20090137094 - Method of filling a trench in a substrate: A method of filling a trench includes: providing a substrate having an upper surface, and a trench extending therein from the upper surface; forming a deposition layer on the substrate in a manner in which the layer partially fills the trench and has a portion which overhangs the trench at... Agent: Volentine & Whitt PLLC

20090137096 - Clamp ring for wafer and method of manufacturing semiconductor apparatus: A clamp ring includes an abutting part abutting on the entire outer periphery of the main surface of a wafer when the wafer is fixed, and a brim part extending from the upper part of the abutting part to the inside of the wafer and provided so as not to... Agent: Mcginn Intellectual Property Law Group, PLLC

20090137095 - Method for manufacturing semiconductor substrate and semiconductor substrate manufacturing apparatus: An object is to provide a uniform semiconductor substrate in which defective bonding is reduced. A further object is to manufacture the semiconductor substrate with a high yield. A first substrate and a second substrate are bonded in a reduced-pressure atmosphere by placing the first substrate at a certain region... Agent: Fish & Richardson P.C.

20090137097 - Method for dicing wafer: A method for dicing a wafer including the following steps is provided. First, a carrier tape is attached to a first side of the wafer. Then, a patterned photoresist layer exposing a scribe line region of the wafer is formed on a second side of the wafer, in which the... Agent: J C Patents, Inc.

20090137098 - Method of manufacturing semiconductor element: A step of forming a first auxiliary groove in a semiconductor element structure provided on a semiconductor substrate, a step of forming a second auxiliary groove in the semiconductor element structure, and a step of dividing the semiconductor substrate and the semiconductor element structure in a direction along the first... Agent: Birch Stewart Kolasch & Birch

20090137099 - Mbe device and method for the operation thereof: A molecular beam epitaxy (MBE) device (100) which is designed for the reactive deposition of a group III nitride compound semiconductor comprises a vacuum chamber (10) which comprises at least one molecular beam source (11) and at least one injector (12) designed to inject ammonia into the vacuum chamber (10),... Agent: Schnader Harrison Segal & Lewis, LLP

20090137100 - Tellurium precursors for gst films in an ald or cvd process: The present invention is a process of making a germanium-antimony-tellurium alloy film using a process selected from the group consisting of atomic layer deposition and chemical vapor deposition, wherein a silyltellurium precursor is used as a source of tellurium for the alloy film and is reacted with an alcohol during... Agent: Air Products And Chemicals, Inc. Patent Department

20090137102 - Method for making quantum dots: A method for forming at least one quantum dot at least one predetermined location on a substrate is disclosed. In one aspect, the method comprises providing a layer of semiconductor material on an insulating layer on the substrate. The layer of semiconductor material is patterned so as to provide at... Agent: Knobbe Martens Olson & Bear LLP

20090137103 - Method for manufacturing semiconductor device: In order to improve the quality of a microcrystalline semiconductor film which is formed at an early stage of deposition, a microcrystalline semiconductor film near an interface with a base insulating film is formed under a deposition condition in which a deposition rate is low but the quality of a... Agent: Fish & Richardson P.C.

20090137101 - Method for manufacturing soi substrate and semiconductor device: To provide a method for manufacturing an SOI substrate provided with a semiconductor layer which can be used practically even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like is used. The semiconductor layer is transferred to a supporting substrate by the steps... Agent: Eric Robinson

20090137104 - Method of fabricating polycrystalline semiconductor: Disclosed is a method of providing a poly-Si layer used in fabricating poly-Si TFT's or devices containing poly-Si layers. Particularly, a method utilizing at least one metal plate covering the amorphous silicon layer or the substrate, and applying RTA (Rapid Thermal Annealing) for light illuminating process, then the light converted... Agent: Bacon & Thomas, PLLC

20090137105 - Systems and methods for preparing epitaxially textured polycrystalline films: The disclosed subject matter relates to systems and methods for preparing epitaxially textured polycrystalline films. In one or more embodiments, the method for making a textured thin film includes providing a precursor film on a substrate, the film includes crystal grains having a surface texture and a non-uniform degree of... Agent: Wilmerhale/columbia University

20090137106 - Using ion implantation to control trench depth and alter optical properties of a substrate: A method for using ion implantation to create a precision trench in a mask or semiconductor substrate and to alter the optical properties of a mask or semiconductor substrate. In one embodiment, the method may include providing a semiconductor substrate or a mask, forming a damage layer in semiconductor substrate... Agent: Scott Faber, Esq. Varian Semiconductor Equipment Associates, Inc

20090137107 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device according to an embodiment of the invention includes forming patterns on a substrate, depositing a light absorption layer on the patterns, processing the light absorption layer to form a first region which includes a first type of pattern included in the patterns and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090137109 - Compressive nitride film and method of manufacturing thereof: Embodiments of the invention provide a method of forming a compressive stress nitride film overlying a plurality of p-type field effect transistor gate structures produced on a substrate through a high-density plasma deposition process. Embodiments include generating an environment filled with high-density plasma using source gases of at least silane,... Agent: International Business Machines Corporation Dept. 18g

20090137108 - Semiconductor device, semiconductor wafer, and methods of producing the same device and wafer: A method of forming a multi-layered insulation film includes forming a first insulation layer using a first feed gas, the first insulation layer including methyl silsesquioxane (MSQ), forming a second insulation layer using a second feed gas, the second insulation layer including a polysiloxane compound having an Si—H group such... Agent: Mcginn Intellectual Property Law Group, PLLC

20090137110 - Low fabrication cost, high performance, high reliability chip scale package: The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is... Agent: Megica Corporation

20090137111 - Method of fabricating metal interconnection and method of fabricating image sensor using the same: A method of fabricating a metal interconnection and a method of fabricating image sensor using the same are provided. The method of fabricating a metal interconnection including forming a interlayer dielectric layer on a substrate, forming an interconnection formation region in the interlayer dielectric layer, performing an ultraviolet (UV) treatment... Agent: F. Chau & Associates, LLC

20090137112 - Method of manufacturing nonvolatile semiconductor memory devices: A method of manufacturing nonvolatile semiconductor memory devices comprises forming a first wiring material; and stacking memory cell materials on the first wiring material, which configure memory cells each including a variable resistor operative to nonvolatilely store information in accordance with variation in resistance. The method also comprises forming a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090137113 - Method for fabricating a microstructure: A method for fabricating a microstructure is to form at least one insulation layer including a micro-electro-mechanical structure therein over an upper surface of a silicon substrate. The micro-electro-mechanical structure includes at least one microstructure and a metal sacrificial structure that are independent with each other. In the metal sacrificial... Agent: Dr. Banger Shia

20090137114 - Method of making semiconductor device: A semiconductor device is manufactured by a method including forming a first interlayer insulating film. A first etching stopper film is formed on the first interlayer insulating film. A conductive layer is formed on the first etching stopper film. A second etching stopper film is formed to cover the conductive... Agent: Mcdermott Will & Emery LLP

20090137115 - Method of manufacturing metal interconnection: A method of manufacturing a metal interconnection that includes forming a via hole and a trench in an insulating layer, and then filling the via hole and the trench with a first metal layer using a first base metal having an oxidation potential higher than a standard hydrogen potential, and... Agent: Sherr & Vaughn, PLLC

20090137116 - Isolating chip-to-chip contact: An apparatus has two slabs of substrate material joined to each other, the two slabs including a pair of contacts joined to each other having a shape separating a first area from a second area.... Agent: Foley & Lardner LLP

20090137117 - Method forming contact plug for semiconductor device using h2 remote plasma treatment: Provided are methods of forming a contact plug of a semiconductor device. Methods of forming a contact plug of a semiconductor device may include forming an interlayer insulating layer on a semiconductor substrate on which a lower structure is formed, forming a contact hole in the interlayer insulating layer, the... Agent: Myers Bigel Sibley & Sajovec

20090137118 - Method of manufacturing semiconductor device: Initially, an interconnection 5w that contains copper is formed on a semiconductor substrate 1 (step (A)). On the interconnection 5w, an etching stopper film 6es is formed (step (B)). On the etching stopper film 6es, an insulating layer 6 is formed (step (C)). In the insulating layer 6, a via... Agent: Mcdermott Will & Emery LLP

20090137119 - Novel seal isolation liner for use in contact hole formation: A method is disclosed for etching a contact hole in a stack of dielectric layers. The method minimizes bridging defects between the contact hole and adjacent conductive structures. A substrate has a conductive material layer and an active device disposed thereon. An etch stop layer covers the device and the... Agent: Duane Morris LLP (tsmc)IPDepartment

20090137120 - Damping polyurethane cmp pads with microfillers: A system for preparing a microcellular polyurethane material, includes a froth, prepared, for instance, by inert gas frothing a urethane prepolymer, preferably an aliphatic isocyanate polyether prepolymer, in the presence of a surfactant; a filler soluble in a CMP slurry; and a curative, preferably including an aromatic diamine and a... Agent: Praxair, Inc. Law Department - M1 557

20090137121 - Three-dimensional network in cmp pad: The present disclosure is directed at a chemical-mechanical planarization polishing pad comprising interconnecting elements and a polymer filler material, wherein the interconnecting elements include interconnecting junction points that are present at a density of 1 interconnecting junction point/cm3 to 1000 interconnecting junction points/cm3, and wherein the interconnecting elements have a... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC

20090137122 - Method of passivating chemical mechanical polishing compositions for copper film planarization processes: A method of passivating a CMP composition by dilution and determining the relationship between the extent of dilution and the static etch rate of copper. Such relationship may be used to control the CMP composition during the CMP polish to minimize the occurrence of dishing or other adverse planarization deficiencies... Agent: Moore & Van Allen PLLC

20090137124 - Polishing composition and method for high silicon nitride to silicon oxide removal rate ratios: The invention provides a chemical-mechanical polishing composition comprising a cationic abrasive, a cationic polymer, a carboxylic acid, and water. The invention further provides a method of chemically-mechanically polishing a substrate with the aforementioned polishing composition. The polishing composition exhibits selectivity for removal of silicon nitride over removal of silicon oxide.... Agent: Steven Weseman Associate General Counsel, I.p.

20090137123 - Polishing composition and polishing method: A polishing composition contains at least one water soluble polymer selected from the group consisting of polyvinylpyrrolidone and poly(N-vinylformamide), and an alkali, and preferably further contains at least one of a chelating agent and an abrasive grain. The water soluble polymer preferably has a weight average molecular weight of 6,000... Agent: Vidas, Arrett & Steinkraus, P.A.

20090137125 - Etching method and etching apparatus: Disclosed is an etching method for etching a target layer formed on a surface of a target object, including: a resist forming step for forming a resist layer uniformly on the surface of the target object; a mask forming step for forming a patterned etching mask by forming an etching... Agent: Pearne & Gordon LLP

20090137126 - Method of forming a spacer: A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover... Agent: Volentine & Whitt PLLC

20090137127 - Plasma etching method and storage medium: A plasma etching method that can increase the selection ratio of a stop layer to an interlayer insulation film. The plasma etching method is carried out on a substrate that has the interlayer insulation film formed of CwFx (x and w are predetermined natural numbers) and a stop layer that... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090137128 - Substrate processing apparatus and semiconductor device producing method: Disclosed is a substrate processing apparatus including: a reaction tube to accommodate at least one substrate; at least a pair of electrodes disposed outside the reaction tube; and a dielectric member, wherein a plasma generation region is formed at least in a space between an inner wall of the reaction... Agent: Birch Stewart Kolasch & Birch

20090137129 - Method for manufacturing semiconductor device: A method is provided for manufacturing a semiconductor device having a heat-resistant resin film with flip-chip connection structure using a solder bump or a gold bump and an epoxy resin compound laminated thereon, in which adhesiveness is improved particularly after exposure to high temperature and high humidity environments for a... Agent: Griffin & Szipl, PC

20090137130 - Method for forming a multiple layer passivation film and a device incorporating the same: A method of forming a multiple layer passivation film on a semiconductor device surface comprises placing a semiconductor device in a chemical vapor deposition reactor, introducing a nitrogen source into the reactor, introducing a carbon source into the reactor, depositing a layer of carbon nitrogen on the semiconductor device surface,... Agent: Agilent Technologies Inc.

20090137131 - Thin film transistor, method of manufacturing same, display device, method of modifying an oxide film, method of forming an oxide film, semiconductor device, method of manufacturing semiconductor device, and apparatus for manufacturing semiconductor devic: In a manufacturing method of a thin film transistor (1), the oxide film forming step is performed whereby: a process-target substrate (2) having a surface on which a gate oxide film (4) should be formed is immersed in an oxidizing solution containing an active oxidizing species; and a gate oxide... Agent: Nixon & Vanderhye, PC

20090137132 - Decreasing the etch rate of silicon nitride by carbon addition: Methods for forming silicon nitride hard masks are provided. The silicon nitride hard masks include carbon-doped silicon nitride layers and undoped silicon nitride layers. Carbon-doped silicon nitride layers that are deposited from a mixture comprising a carbon source compound, a silicon source compound, and a nitrogen source in the presence... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090130779 - Method of forming a magnetic tunnel junction structure: In a particular embodiment, a method is disclosed that includes forming a magnetic tunnel junction (MTJ) structure including a conductive layer on a substrate. The method also includes depositing a sacrificial layer on the conductive layer before depositing a patterning film layer.... Agent: Qualcomm Incorporated

20090130781 - Method for simultaneously producing multiple wafers during a single epitaxial growth run and semiconductor structure grown thereby: HVPE method for simultaneously fabricating multiple Group III nitride semiconductor structures during a single reactor run. A HVPE reactor includes a reactor tube, a growth zone, a heating element and a plurality of gas blocks. A substrate holder is capable of holding multiple substrates and can be a single or... Agent: Dr. Allan C. Entis, Intellectual Property Ltd.

20090130780 - Semiconductor processing system and method of processing a semiconductor wafer: A method of processing semiconductor wafers includes applying reactive gas through a plurality of inlets to the semiconductor wafers. The method further includes removing exhaust gas resulting from the step of applying reactive gas. The removing of the exhaust gas is through a plurality of outlets coupled to a manifold.... Agent: Freescale Semiconductor, Inc. Law Department

20090130782 - Method and line for manufacturing semiconductor device: A method is provided for manufacturing a semiconductor device that includes a multilayer wiring structure in which insulating layers and wiring layers each with a plurality of conductor lines are alternately stacked on each other. The method includes steps of forming a first wiring layer on a first insulating layer,... Agent: Fitzpatrick Cella Harper & Scinto

20090130783 - Method of fabricating an ultra-small condenser microphone: In the present invention, a semiconductor substrate wherein a plurality of MEMS microphones is formed is disposed opposed to a discharge electrode in a state of being stuck on a sheet. Electretization of a dielectric film provided in the MEMS microphone is performed by irradiating the dielectric film between a... Agent: Mcdermott Will & Emery LLP

20090130784 - Method for determining the position of the edge bead removal line of a disk-like object: A method for determining the position of an edge bead removal line of a disk-like object having an edge area and an alignment mark on the edge area is disclosed, wherein the edge area including the edge bead removal line is imaged on a line-by-line basis, an intensity profile I... Agent: Davidson, Davidson & Kappel, LLC

20090130785 - Manufacturing method of semiconductor integrated circuit device: As the thickness of the card holder for preventing warping of a multilayered wiring substrate 1 is increased, there occurs a problem that a thin film sheet 2 is buried in a card holder and secure contact between probes 7 and test pads cannot be realized. For its prevention, the... Agent: Miles & Stockbridge PC

20090130786 - Organic electroluminescent display device and method of fabricating the same: An organic electroluminescent display device includes an array element layer formed on a substrate, the array element layer including a switching element, a driving element, a first electrode, an organic luminescent layer, and a second electrode, and a ground line formed on the substrate, the ground line directly contacting the... Agent: Morgan Lewis & Bockius LLP

20090130788 - Flat panel display device and fabricating method thereof: A top-emitting organic light-emitting device can prevent a voltage drop by electrically coupling a cathode bus line to a cathode electrode. A method for fabricating the same is also disclosed. The flat panel display device comprises an insulating substrate having a pixel region and a non-pixel region, a first electrode... Agent: H.c. Park & Associates, PLC

20090130787 - Method for fabricating a plurality of electromagnetic radiation emitting semiconductor chips: Method for fabricating a semiconductor chip which emits electromagnetic radiation, wherein to improve the light yield of semiconductor chips which emit electromagnetic radiation, a textured reflection surface is integrated on the p-side of a semiconductor chip. The semiconductor chip has an epitaxially produced semiconductor layer stack based on GaN, which... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090130789 - Signal line for display device and thin film transistor array panel including the signal line: A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a... Agent: Haynes And Boone, LLPIPSection

20090130790 - Method for manufacturing nitride semiconductor light-emitting element: A method for manufacturing a nitride semiconductor light-emitting element comprises: forming a semiconductor laminated structure wherein an n-type nitride semiconductor epitaxial layer, an active layer, and a p-type nitride semiconductor epitaxial layer are laminated on a substrate; forming a p-type electrode having a first electrode layer containing Pd and a... Agent: Leydig Voit & Mayer, Ltd

20090130791 - Camera modules and methods of fabricating the same: Provided are camera modules capable of effectively shielding electromagnetic (EM) waves and methods of fabricating the same. A method of fabricating a camera module includes, preparing a first wafer including an array of lens units. Then, a second wafer including an array of image sensor CSPs (chip-scale packages) is prepared.... Agent: Marger Johnson & Mccollom, P.C.

20090130792 - Method of fabricating image sensor: A method of fabricating an image sensor includes forming a photoelectric transformation device on a substrate and forming a dielectric layer structure on the substrate. The dielectric layer structure includes multi-layer interlayer dielectric layers and multi-layer metal interconnections which are located between the multi-layer interlayer dielectric layers. A cavity which... Agent: Mills & Onello LLP

20090130793 - Photo diode and method for manufacturing the same: A method of fabricating a photo diode includes sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a semiconductor substrate; forming a doped oxide film, including impurities of the... Agent: Volentine & Whitt PLLC

20090130794 - Thermal evaporation apparatus, use and method of depositing a material: Thermal evaporation apparatus for depositing of a material on a substrate, comprising material storage means; heating means to generate a vapour of the material in the material storage means; vapour outlet means comprising a vapour receiving pipe having vapour outlet passages, and emission reducing means arranged such that an external... Agent: Shell Oil Company

20090130795 - Systems and methods for preparation of epitaxially textured thick films: The disclosed subject matter relates to the use of laser crystallization of thin films to create epitaxially textured crystalline thick films. In one or more embodiments, a method for preparing a thick crystalline film includes providing a film for crystallization on a substrate, wherein at least a portion of the... Agent: Wilmerhale/columbia University

20090130796 - Sulfurization and selenization of electrodeposited cigs films by thermal annealing: The invention relates to a method for production of thin layers of semiconductor alloys of the I-III-VI2 type, including sulphur, for photovoltaic applications, whereby a heterostructure is firstly deposited on a substrate comprising a thin layer of precursor I-III-VI2 which is essentially amorphous and a thin layer, including at least... Agent: Marshall, Gerstein & Borun LLP

20090130797 - Methods of forming phase-changeable memory devices using growth-enhancing and growth-inhibiting layers for phase-changeable materials: Methods of forming phase-changeable memory devices include techniques to inhibit void formation in phase-changeable materials in order to increase device reliability. These techniques to inhibit void formation use an electrically insulating growth-inhibiting layer to guide the formation of a phase-changeable material region within a memory cell (e.g., PRAM cell). In... Agent: Myers Bigel Sibley & Sajovec

20090130798 - Process for making a semiconductor system: Multiple devices, including a first device and a second device, have operational circuitry and opposing first and second surfaces. First and second electrical contacts are formed at the first surface, while a third electrical contact is formed at the second surface opposite the first electrical contact. The first electrical contact... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20090130799 - Stacked dual mosfet package: A method of fabricating a stacked dual MOSFET die package is disclosed. The method includes the steps of (a) forming a first conductive tab, (b) stacking a high side MOSFET die on the first conductive tab such that a drain contact of the high side MOSFET die is coupled to... Agent: Schein & Cai LLP

20090130800 - Manufacturing method of semiconductor device: A method of manufacturing a semiconductor device includes the steps of bonding a semiconductor chip to a first side of a circuit board, bonding a metal base for dissipating heat produced by the semiconductor chip to a second side of the circuit board, and forming a dam on the metal... Agent: Kanesaka Berner And Partners LLP

20090130801 - Resin-encapsulated semiconductor device and lead frame, and method for manufacturing the same: There are provided a lead frame including a plurality of first external terminal portions 5 provided on a plane, inner lead portions 6 formed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20090130802 - Substrate based unmolded package: A semiconductor die package is disclosed. In one embodiment, the semiconductor die package has a substrate. It includes (i) a lead frame structure including a die attach region with a die attach surface and a lead having a lead surface, and (ii) a molding material. The die attach surface and... Agent: Townsend And Townsend And Crew, LLP

20090130803 - Stressed field effect transistor and methods for its fabrication: A stressed field effect transistor and methods for its fabrication are provided. The field effect transistor comprises a silicon substrate with a gate insulator overlying the silicon substrate. A gate electrode overlies the gate insulator and defines a channel region in the silicon substrate underlying the gate electrode. A first... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20090130805 - Advanced cmos using super steep retrograde wells: The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer (110) beneath the gate dielectric (50) and source and drain regions (80) of a MOS transistor. The carbon containing layer (110) will prevent the diffusion of... Agent: Texas Instruments Incorporated

20090130804 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes first providing an insulation substrate. A patterned conductive layer is formed over the insulation substrate, and the patterned conductive layer includes a channel region and a number of protruding regions. A gate structure layer is formed over the insulation substrate. The gate... Agent: Jianq Chyun Intellectual Property Office

20090130806 - Power semiconductor component with charge compensation structure and method for the fabrication thereof: A semiconductor component with charge compensation structure has a semiconductor body having a drift path between two electrodes. The drift path has drift zones of a first conduction type, which provide a current path between the electrodes in the drift path, while charge compensation zones of a complementary conduction type... Agent: Eschweiler & Associates LLC

20090130807 - Trench dram cell with vertical device and buried word lines: A DRAM array having trench capacitor cells of potentially 4F2 surface area (F being the photolithographic minimum feature width), and a process for fabricating such an array. The array has a cross-point cell layout in which a memory cell is located at the intersection of each bit line and each... Agent: Wells St. John P.s.

20090130808 - Method of fabricating flash memory: A method of fabricating a flash memory includes successively forming a floating gate insulating layer, a floating gate material layer, a dielectric layer, a control gate material layer, a silicide layer, and a hard mask layer on a semiconductor substrate, patterning the hard mask layer, removing portions of the silicide... Agent: North America Intellectual Property Corporation

20090130809 - Semiconductor memory device and method of manufacturing the same: A semiconductor memory device includes first and second element isolation insulating films, first and second gate insulating films, first and second gate wiring and first and second mask layer. First and second upper surfaces of the first and second element isolation insulating films are higher than an upper surface of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090130810 - Fabrication method: A process and an architecture related to a vertical MOSFET device and a capacitor for use in integrated circuits. The integrated circuit structure includes a semiconductor layer with a major surface and further including a first doped region formed in the surface. A second doped region of a different conductivity... Agent: Agere Lerner, David Et Al.

20090130811 - Method for manufacturing semiconductor device with uniform concentration ion doping in recess gate channel region: A semiconductor device is manufactured by defining a groove in a semiconductor substrate, where the groove includes an upper portion and a lower portion, among other steps. A sacrificial layer is then formed to selectively fill the lower portion of the groove. Impurity ions are implanted into the semiconductor substrate... Agent: Ladas & Parry LLP

20090130812 - Creating high voltage fets with low voltage process: An integrated circuit (IC) includes a high voltage first-conductivity type field effect transistor (HV-first-conductivity FET) and a high voltage second-type field effect transistor (HV-second-conductivity FET). The HV first-conductivity FET has a second-conductivity-well and a field oxide formed over the second-conductivity-well to define an active area. A first-conductivity-well is formed in... Agent: Hewlett Packard Company

20090130813 - Method and system to provide a polysilicon capacitor with improved oxide integrity: A system and method in accordance with the present invention allows for an improved oxide integrity of a polysilicon capacitor compared to capacitors manufactured using conventional semiconductor processing techniques. This is accomplished by moving the capacitor implant step to a time after the deposition of the polysilicon. As an additional... Agent: Sawyer Law Group LLP

20090130814 - Semiconductor methods: A method includes forming an amorphous carbon layer over a first dielectric layer formed over a substrate, forming a second dielectric layer over the amorphous carbon layer; and forming an opening within the amorphous carbon layer and second dielectric layer by a first etch process to partially expose a top... Agent: Duane Morris LLP (tsmc)IPDepartment

20090130815 - Semiconductor device and method for fabricating the same: The semiconductor device comprises a capacitor formed over a semiconductor substrate 10 and including a lower electrode 32, a dielectric film 34 formed over the lower electrode and an upper electrode 36 formed over the dielectric film, a first insulation film 42 formed over the semiconductor substrate and the capacitor,... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090130816 - Method for manufacturing simox wafer and simox wafer manufactured thereby: This method for manufacturing a SIMOX wafer, includes: implanting oxygen ions in a silicon wafer; cleaning said silicon wafer into which said oxygen ions are implanted; and forming a buried oxide film within an interior of said silicon wafer by subjecting said cleaned silicon wafer to a heat treatment, wherein... Agent: Greenblum & Bernstein, P.L.C

20090130818 - Method for forming shallow trench isolation structure and method for preparing recessed gate structure using the same: A method for preparing a recessed gate structure comprises the steps of: forming a shallow trench isolation structure surrounding an active area in a silicon substrate, wherein an etching barrier layer is formed on the surface of the shallow trench isolation structure; forming a plurality of gate trenches in the... Agent: Wpat, PC Intellectual Property Attorneys

20090130819 - Method for manufacturing semiconductor device: A method of manufacturing a semiconductor device includes a device isolation layer. In the method, a hard mask may be formed on a semiconductor substrate, and the semiconductor substrate may be etched using the hard mask as a mask to form a trench. The hard mask may be removed, and... Agent: Sherr & Vaughn, PLLC

20090130817 - Method to eliminate re-crystallization border defects generated during solid phase epitaxy of a dsb substrate: A method for semiconductor processing provides a DSB semiconductor body having a first crystal orientation, a second crystal orientation, and a border region disposed between the first and second crystal orientations. The border region further has a defect associated with an interface of the first crystal orientation and second the... Agent: Texas Instruments Incorporated

20090130820 - Method for manufacturing a semiconductor device: A method for manufacturing a semiconductor device includes forming a shallow trench isolation trench in a semiconductor substrate, and then forming a first oxide layer over the semiconductor substrate including the trench by exposing the semiconductor substrate including the shallow trench isolation trench to oxygen, and then implanting boron ions... Agent: Sherr & Vaughn, PLLC

20090130821 - Three dimensional packaging with wafer-level bonding and chip-level repair: A method, a system and a computer readable medium for three dimensional packaging with wafer-level bonding and chip-level repair. A first wafer is provided having a first plurality of chips. A second wafer is provided having a second plurality of chips. At least one chip is removed from the second... Agent: Applied Materials/bstz Blakely Sokoloff Taylor & Zafman LLP

20090130822 - Process for collective manufacturing of small volume high precision membranes and cavities: m

20090130824 - Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering: A process for the preparation of low resistivity arsenic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates.... Agent: Richard A. Schuth (memc) Armstrong Teasdale LLP

20090130823 - Method of forming semiconductor device including trench gate structure: A method of forming a semiconductor device is provided, which may include, but is not limited to, the following processes. Grooves may be formed in an insulating region and in a semiconductor region, while forming burrs near the boundary between the insulating region and the semiconductor region. Protection films may... Agent: Young & Thompson

20090130825 - Joined assembly, wafer holding assembly, attaching structure thereof and method for processing wafer: The joined assembly, according to the present invention, comprises a plate-shaped ceramic body; a ring-shaped member; and a hollow metal cylinder with one end thereof joined to the bottom surface of the plate-shaped ceramic body via a metal joint and the other end thereof joined to the ring-shaped member; wherein,... Agent: Hogan & Hartson L.L.P.

20090130826 - Method of forming a semiconductor device having a strained silicon layer on a silicon-germanium layer: A method of forming a semiconductor device having a strained silicon (Si) layer on a silicon germanium (SiGe) layer is provided. The method includes preparing a silicon substrate. A SiGe layer is formed on the silicon substrate. At least a part of the SiGe layer has a first dislocation density.... Agent: Myers Bigel Sibley & Sajovec

20090130827 - Intrinsic amorphous silicon layer: Embodiments of the present invention may include an improved thin film solar cell device that is formed by sequentially depositing an intrinsic amorphous silicon layer and an intrinsic microcrystalline silicon layer during the p-i-n or n-i-p junction formation process. Embodiments of the invention also generally provide a method and apparatus... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090130828 - Method for forming voltage sustaining layer with opposite-doped islands for semiconductor power devices: A semiconductor high-voltage device comprising a voltage sustaining layer between a n+-region and a p+-region is provided, which is a uniformly doped n (or p)-layer containing a plurality of floating p (or n)-islands. The effect of the floating islands is to absorb a large part of the electric flux when... Agent: Panitch Schwarze Belisario & Nadel LLP

20090130829 - Manufacturing method of semiconductor device and substrate processing apparatus: Provided are a manufacturing method of a semiconductor device and a substrate processing apparatus. The manufacturing method of the semiconductor device includes: loading a plurality of substrates into a reaction vessel, which is configured by a process tube and a manifold that supports the process tube, and arranging the loaded... Agent: Brundidge & Stanger, P.C.

20090130830 - Method for fabricating optical semiconductor device: In the method of fabricating an optical semiconductor device, a semiconductor layer is formed on an InP region, and includes semiconductor films. A first etching mask is formed on the semiconductor layer. The semiconductor layer is etched through the first etching mask to form a semiconductor mesa and a first... Agent: Smith, Gambrell & Russell

20090130831 - Semiconductor device and method of fabricating the same: A method for fabricating a semiconductor device having a CMOS transistor including a gate electrode with low resistance. In the CMOS transistor in accordance with embodiments, the impurities implanted into the gate electrode have a higher density than the impurities implanted into the source/drain region. Embodiments also reduce the amount... Agent: Sherr & Vaughn, PLLC

20090130832 - Silicon surface structuring method: A method for the structuring of multicrystalline silicon substrate surfaces and emitter diffusion into said surfaces comprises the following steps: providing a texturing solution which comprises at least a portion of phosphoric acid, providing a semiconductor substrate with a surface to be structured, coating the surface to be structured with... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20090130833 - Insulating buffer film and high dielectric constant semiconductor device and method for fabricating the same: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including... Agent: Mcdermott Will & Emery LLP

20090130834 - Methods of forming impurity containing insulating films and flash memory devices including the same: Methods of forming an insulating film include forming an insulating film on a substrate. A first impurity is injected into the insulating film using a thermal process under a first set of processing conditions to form a first impurity concentration peak in a lower portion of the insulating film. A... Agent: Myers Bigel Sibley & Sajovec

20090130836 - Method of fabricating flash cell: A method of fabricating a flash cell of a semiconductor device includes depositing a damage-prevention film on and/or over a hard mask pattern to prevent damage to an ONO film of a gate pattern when removing the hard mask using a vapor process chamber (VPC) process.... Agent: Sherr & Vaughn, PLLC

20090130835 - Method of manufacturing inverted t-shaped floating gate memory: A memory device having a floating gate with a non-rectangular cross-section is disclosed. The non-rectangular cross-section may be an inverted T-shape, a U-shape, a trapezoid shape, or a double inverted T-shape. Methods are disclosed for producing a floating gate memory device having an improved coupling ratio due to an increased... Agent: Jianq Chyun Intellectual Property Office

20090130837 - In situ deposition of a low k dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application: The present invention provides a SiC material, formed according to certain process regimes, useful as a barrier layer, etch stop, and/or an ARC, in multiple levels, including the pre-metal dielectric (PMD) level, in IC applications and provides a dielectric layer deposited in situ with the SiC material for the barrier... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090130839 - Manufacturing method of redistribution circuit structure: A method of manufacturing a redistribution circuit structure is provided. First, a substrate is provided. The substrate has a plurality of pads and a passivation layer. The passivation layer has a plurality of first openings exposing a portion of each of the pads, respectively. A first patterned photoresist layer is... Agent: Jianq Chyun Intellectual Property Office

20090130838 - Method of forming conductive bumps: A method of forming a conductive bump of the present invention, includes the steps of, preparing a substrate including a connection pad and a protection insulating layer, in which an opening portion is provided on the connection pad, on a surface layer side, arranging a first conductive ball, at least... Agent: Kratz, Quintos & Hanson, LLP

20090130840 - Protected solder ball joints in wafer level chip-scale packaging: Protection of a solder ball joint is disclosed in which the solder ball joint is located below the surface level of the encapsulating buffer layer. The buffering layer is etched to expose one or more electrode posts, each of which may be made up of a single column or multiple... Agent: Slater & Matsil, L.L.P.

20090130841 - Method for forming contact in semiconductor device: A method for forming a contact in a semiconductor device, comprises providing a substrate, forming a plurality of conductive patterns and a passivation layer surrounding the conductive patterns over the substrate, forming an insulation layer covering the conductive patterns and passivation layer, forming a mask pattern for a contact over... Agent: Townsend And Townsend And Crew, LLP

20090130842 - Method of forming contact hole and method of manufacturing semiconductor memory device using the same: A contact hole forming method and a method of manufacturing semiconductor device using the same may include forming a layer on a substrate; anisotropically etching the layer to form a dummy contact hole exposing the substrate; isotropically etching a sidewall of the dummy contact hole to form a contact hole... Agent: Harness, Dickey & Pierce, P.L.C

20090130843 - Method of forming low-resistivity recessed features in copper metallization: A method is provided for forming low-resistivity recessed features containing a ruthenium (Ru) film integrated with bulk copper (Cu) metal. The method includes providing a patterned substrate containing a recessed feature, depositing a barrier film in the recessed feature in a barrier film deposition chamber, transferring the patterned substrate from... Agent: Wood, Herron & Evans, LLP (tokyo Electron)

20090130844 - Method of forming metal line of semiconductor device: A method of forming metal lines of a semiconductor device, comprising providing a semiconductor substrate in which a plurality of gates and junctions formed between the gates are included in a cell area and a peripheral area; forming an insulating layer over the semiconductor substrate including the gates; forming an... Agent: Marshall, Gerstein & Borun LLP

20090130845 - Direct electrodeposition of copper onto ta-alloy barriers: A method of depositing copper directly onto a tantalum alloy layer of an on-chip copper interconnect structure, which includes electrodepositing copper from a neutral or basic electrolyte onto a surface of a tantalum alloy layer, in which the tantalum alloy layer is deposited on a substrate of the on-chip copper... Agent: Connolly Bove Lodge & Hutz LLP

20090130846 - Semiconductor device fabrication method: Methods of fabricating a semiconductor device including a through-silicon via that is electrically insulated from the semiconductor substrate. An exemplary method includes preparing a semiconductor wafer including a semiconductor substrate, a semiconductor element, an interlayer insulating, pads that are electrically connected to the semiconductor element, and a protective film; forming... Agent: Taft, Stettinius & Hollister LLP

20090130847 - Method of fabricating metal pattern without damaging insulation layer: Provided is a method of fabricating a metal pattern so that an insulation layer between a wafer and the metal pattern can be prevented from being damaged in a planarization procedure when the metal pattern having a trench structure is fabricated on the wafer. The method includes operations of forming... Agent: Sughrue Mion, PLLC

20090130848 - Semiconductor device and method for production thereof: A semiconductor device having a silicon substrate, an element isolating film, an active region, a gate electrode provided via a gate insulating film, a diffusion layer provided on the active region on opposite sides of the gate electrode, an interlayer insulating film, and a plug filled in a hole formed... Agent: Sughrue Mion, PLLC

20090130849 - Chemical mechanical polishing and wafer cleaning composition comprising amidoxime compounds and associated method for use: A composition and associated method for chemical mechanical planarization (or other polishing) is described. The composition contains an amidoxime compound and water. The composition may also contain an abrasive and a compound with oxidation and reduction potential. The composition is useful for attaining improved removal rates for metal, including copper,... Agent: Morgan Lewis & Bockius LLP

20090130851 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device, comprises forming a first film above a pattern forming material, patterning the first film to form a core material pattern, forming a second film above the pattern forming material so as to cover a side surface and an upper surface of the core... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090130852 - Process for improving critical dimension uniformity of integrated circuit arrays: Methods for patterning integrated circuit (IC) device arrays employing an additional mask process for improving center-to-edge CD uniformity are disclosed. In one embodiment, a repeating pattern of features is formed in a masking layer over a first region of a substrate. Then, a blocking mask is applied over the features... Agent: Knobbe Martens Olson & Bear LLP

20090130850 - Semiconductor devices and method of fabricating the same: A method of fabricating a semiconductor device is provided. A contact hole with a finer width can be formed by solving an exposure limit of KrF exposure apparatuses. The fabrication method includes forming a first insulation layer on a substrate; forming a photoresist pattern on the first insulation layer; forming... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090130853 - Method for fabricating a deep trench in a substrate: The invention provides a method for forming a deep trench in a substrate. A sacrificial layer and a liner layer are first used to define the deep trench pattern. The sacrificial layer is then replaced with a silicon glass layer. A thick mask layer includes the silicon glass layer, the... Agent: North America Intellectual Property Corporation

20090130854 - Patterning structure and method for semiconductor devices: Methods for forming a pattern layer over a target layer are disclosed. The methods use a novel low temperature spacer structure which results in a pattern layer having a decreased pattern pitch versus conventional patterning using photolithography. The decreased pattern pitch allows the target layer to be divided into multiple... Agent: Jianq Chyun Intellectual Property Office

20090130856 - Method for monitoring process drift using plasma characteristics: Methods for monitoring process drift using plasma characteristics are provided. In one embodiment, a method for monitoring process drift using plasma characteristics includes obtaining metrics of current and voltage information of a first waveform coupled to a plasma during a plasma process formed on a substrate, obtaining metrics of current... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090130855 - Phase change alloy etch: A method of forming devices is provided. A phase change layer is provided. The phase change layer is etched by providing an etch gas comprising a bromine containing compound and forming a plasma from the etch gas. The phase change layer is of a material that may be heated by... Agent: Beyer Law Group LLP

20090130857 - Method of manufacturing a structure based on anisotropic etching, and silicon substrate with etching mask: A method of manufacturing a structure includes a first step of forming, on a monocrystal silicon substrate having a (100) surface as a principal surface, a basic etching mask corresponding to a target shape and having at least a first structure with a projecting corner and a second structure adjoining... Agent: Fitzpatrick Cella Harper & Scinto

20090130858 - Deposition system and method using a delivery head separated from a substrate by gas pressure: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at... Agent: Patent Legal Staff Eastman Kodak Company

20090130861 - Dual damascene integration structures and method of forming improved dual damascene integration structures: Methods of densifying a porous ultra-low-k (ULK) dielectric material by using gas-cluster ion-beam processing are disclosed. Methods for gas-cluster ion-beam etching, densification, pore sealing and ashing are described that allow simultaneous removal of material and densification of the ULK interfaces. A novel ULK dual damascene structure is disclosed with densified... Agent: Burns & Levinson, LLP

20090130860 - Method of manufacturing a semiconductor device and processing apparatus: To remove the deposit including a high dielectric constant film deposited on an inside of a processing chamber, by using a cleaning gas activated only by heat. The method includes the steps of: loading a substrate or a plurality of substrates into the processing chamber; performing processing to deposit the... Agent: Oliff & Berridge, PLC

20090130859 - Semiconductor device manufacturing method and substrate processing apparatus: Productivity and product yield, as well as the step coverage and the adhesion are improved. A film forming process includes an initial film forming step, and a main film forming step. In the initial film forming step, a step of supplying a material gas into a processing chamber to adsorb... Agent: Kratz, Quintos & Hanson, LLP

20090130862 - Multi-functional cyclic silicate compound, siloxane-based polymer prepared from the compound and process of producing insulating film using the polymer: A multi-functional cyclic silicate compound, a siloxane-based polymer prepared from the silicate compound and a process of producing an insulating film using the siloxane-based polymer. The silicate compound of the present invention is highly compatible with conventional pore-generating substances and hardly hygroscopic, so it is useful for the preparation of... Agent: Harness, Dickey & Pierce, P.L.C

20090130863 - Method and system for forming an air gap structure: A method for forming an air gap structure on a substrate is described. The method comprises forming a sacrificial layer on a substrate, wherein the sacrificial layer comprises a decomposable material that thermally decomposes at a thermal decomposition temperature above approximately 350 degrees C. Thereafter, a cap layer is formed... Agent: Tokyo Electron U.s. Holdings, Inc.

20090130865 - Method of patterning a layer using a pellicle: A method for patterning a layer on a semiconductor substrate includes forming a layer of a semiconductor substrate and exposing the layer to light. The light travels through a second pellicle that is manufactured by a method that includes determining a first transmission of a first light through a first... Agent: Freescale Semiconductor, Inc. Law Department

20090130864 - Systems and methods for flash annealing of semiconductor devices: An embodiment generally relates a method of processing semiconductor devices. The method includes forming a semiconductor device and exposing the semiconductor device to a temperature substantially between 1175 to 1375 degrees Celsius after the formation of a gate dielectric layer. The method also includes annealing the semiconductor device for a... Agent: Texas Instruments Incorporated

20090124027 - Structure and method for placement, sizing and shaping of dummy structures: A material layer on a substrate being processed, e.g. to form chips, includes one or more functional structures. In order to control pattern density during fabrication of the chip, dummy fill structures of different sizes and shapes are added to the chip at different distances from the functional structures of... Agent: Slater & Matsil LLP

20090124028 - Imaging device and method for a bonding apparatus: An imaging device and method of a bonding apparatus in which the imaging device includes: a high-magnification optical system having first and second high-magnification optical paths that extend to multiple imaging planes through a high-magnification lens and have different optical path lengths from the high-magnification lens to the respective imaging... Agent: Quinn Emanuel Koda & Androlia

20090124029 - Method of fabricating resistor and proximate drive transistor for a printhead: A method of fabricating a resistor-drive transistor architecture for a printhead of a printer, by depositing printer communication and drive electronics on the printhead. The drive electronics are positioned within a range of one to sixty microns from correlated resistors.... Agent: Silverbrook Research Pty Ltd

20090124030 - Nitride-based light-emitting device and method of manufacturing the same: A nitride-based light-emitting device and a method of manufacturing the same. The light-emitting device includes a substrate, and an n-cladding layer, an active layer, a p-cladding layer, a grid cell layer and an ohmic contact layer sequentially formed on the substrate. The grid cell layer has separated, conducting particle type... Agent: Buchanan, Ingersoll & Rooney PC

20090124031 - Flip-chip packaging structure for light emitting diode and method thereof: A packaging structure and method for a light emitting diode is provided. The present invention uses flip-chip and eutectic bonding technology to attach a LED to a thermal and electrical conducting substrate. The flip-chip packaging structure comprises a thermal and electrical conducting substrate having an insulating layer formed in an... Agent: Lin & Associates Intellectual Property, Inc.

20090124032 - Penetrating hole type led chip package structure using a ceramic material as a substrate and method for manufacturing the same: An LED chip package structure includes a ceramic substrate, a conductive unit, a hollow ceramic casing, many LED chips, and a package colloid. The ceramic substrate has a main body, many protrusions extended from the main body, many penetrating holes respectively penetrating through the protrusions, and many half through holes... Agent: Rosenberg, Klein & Lee

20090124033 - Process for producing organiclight-emitting display device: A position displacement between a substrate and a mask which is caused when the substrate and the mask are brought into close contact with each other is suppressed by a magnetic force. In a step of forming an organic compound layer (organic EL element film) included in an organic light-emitting... Agent: Fitzpatrick Cella Harper & Scinto

20090124034 - Nanostructured thin films and their uses: The present invention generally discloses the use of a nanostructured non-silicon thin film (such as an alumina or aluminum thin film) on a supporting substrate which is subsequently coated with an active layer of a material such as silicon or tungsten. The base, underlying non-silicon material generates enhanced surface area... Agent: Nanosys Inc.

20090124035 - Method of producing a suspended membrane device: e

20090124036 - Method of production of semiconductor device and method of production of solid-state imaging device: A method of production of a semiconductor device includes: forming a pattern having open element isolation regions on a first insulating film situated on a semiconductor substrate; forming trenches at the element isolation regions on the semiconductor substrate; forming a second insulating film on the first insulating film and inside... Agent: Mcdermott Will & Emery LLP

20090124038 - Imager device, camera, and method of manufacturing a back side illuminated imager: A method of manufacturing a back side illuminated imager device comprises providing a substrate having a front side, a back side, and an edge extending from the front side to the back side; creating a defect layer in the substrate; defining an image array proximate the front side after creating... Agent: Deepak Malhotra

20090124037 - Method of preventing color striation in fabricating process of image sensor and fabricating process of image sensor: A fabricating process of an image sensor is provided. A substrate having thereon a circuit of the image sensor and an insulating layer is provided, wherein the insulating layer has therein a pad opening exposing a metal pad of the circuit. A filling layer is formed in the pad opening,... Agent: J C Patents, Inc.

20090124040 - Field effect transistor, method of producing the same, and method of producing laminated member: There is provided a field effect transistor having an organic semiconductor layer, including: an organic semiconductor layer containing at least porphyrin; and a layer composed of at least a polysiloxane compound, the layer being laminated on the organic semiconductor layer so as to be in intimate contact with the organic... Agent: Fitzpatrick Cella Harper & Scinto

20090124039 - Low temperature deposition of phase change memory materials: A system and method for forming a phase change memory material on a substrate, in which the substrate is contacted with precursors for a phase change memory chalcogenide alloy under conditions producing deposition of the chalcogenide alloy on the substrate, at temperature below 350° C. with the contacting being carried... Agent: Intellectual Property / Technology Law

20090124041 - Resistance variable memory device with nanoparticle electrode and method of fabrication: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.... Agent: Dickstein Shapiro LLP

20090124042 - Zno based semiconductor device manufacture method: A manufacture method for a ZnO based semiconductor device includes the steps of: (a) preparing a ZnO based semiconductor wafer including a ZnO based semiconductor substrate having a wurzeit structure with a +C plane on one surface and a −C plane on an opposite surface, a first ZnO based semiconductor... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090124043 - Method of manufacturing a package board: A method of manufacturing a package board is disclosed. The method is for manufacturing a package board that has a pad electrically connected with a component, and includes: forming an indentation, which is in correspondence with the pad, in one side of a first insulating layer; filling a metal paste... Agent: Staas & Halsey LLP

20090124045 - Low profile stacking system and method: The present invention provides a system and method that mounts integrated circuit devices onto substrates and a system and method for employing the method in stacked modules. The contact pads of a packaged integrated circuit device are substantially exposed. A solder paste that includes higher temperature solder paste alloy is... Agent: Fish & Richardson P.C.

20090124044 - Method for removing bubbles from adhesive layer of semiconductor chip package: In a method for removing bubbles from adhesive layer of semiconductor chip package, one or more semiconductor chips are attached to or stacked on a base plate using an adhesive material. The base plate is selected from a substrate, a lead frame, and other carrier for carrying the semiconductor chips... Agent: Rosenberg, Klein & Lee

20090124046 - Method of manufacturing semiconductor package: A method of manufacturing a semiconductor package, including at least a step A that forms a first transforming portion by irradiating a laser beam on at least a portion of a first substrate; a step B that joins together the first substrate and a second substrate in which a functional... Agent: Sughrue Mion, PLLC

20090124047 - Stacked image method: An imaging system for use in a digital camera or cell phone utilizes one chip for logic and one chip for image processing. The chips are interconnected using around-the-edge or through via conductors extending from bond pads on the active surface of the imaging chip to backside metallurgy on the... Agent: John A. Jordan, Esq.

20090124048 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device is configured of a semiconductor chip which is sandwiched by first and second resin films having a wiring pattern. Plural semiconductor chips can be fabricated collectively by sandwiching the semiconductor chips by the first and second resin films, and productivity can be improved.... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090124049 - Deletable nanotube circuit: Carbon nanotube template arrays may be edited to form connections between proximate nanotubes and/or to delete undesired nanotubes or nanotube junctions.... Agent: Searete LLC Clarence T. Tegreene

20090124050 - Method of manufacturing nanowires parallel to the supporting substrate: r

20090124051 - Thin-filmed field effect transistor and making method: In a thin-film field effect transistor with a MIS structure, the materials of which the semiconductor and insulating layers are made are polymers which are dissolvable in organic solvents and have a weight average molecular weight of more than 2,000 to 1,000,000. Use of polymers for both the semiconductor layer... Agent: Birch Stewart Kolasch & Birch

20090124052 - Method of fabricating memory cell: A method of fabricating a memory cell includes following steps. First, a substrate is provided, and a control gate is formed on the substrate. Then, a dielectric layer is formed to cover the control gate and the substrate. Afterward, an α-SiGe layer is formed on the dielectric layer. After that,... Agent: Jianq Chyun Intellectual Property Office

20090124053 - Fabrication of nanowires and nanodevices: Methods of fabricating nanowire structures and nanodevices are provided. The methods involve photolithographically depositing a nucleation center on a crystalline surface of a substrate, generating a nanoscale seed from the nucleation center, and epitaxially growing a nanowire across at least a portion of the crystalline surface starting at a nucleation... Agent: Berenato, White & Stavish, LLC

20090124054 - Method of making integrated circuit embedded with non-volatile programmable memory having variable coupling: A programmable non-volatile device is made with a floating gate that functions as a FET gate that overlaps a portion of a source/drain region and allows for variable coupling through geometry and/or biasing conditions. This allows a programming voltage for the device to be imparted to the floating gate through... Agent: J. Nicholas Gross, Attorney

20090124055 - Transistor structure and method for making same: A gate structure in a transistor and method for fabricating the structure are disclosed. A gate structure is formed on a substrate. The gate structure includes three layers: an oxide layer, a nitride layer and a polysilicon layer. The oxide layer is located on the substrate, the nitride layer is... Agent: Stmicroelectronics, Inc.

20090124056 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device is provided. A gate structure is formed on a substrate and then a first spacer is formed at a sidewall of the gate structure. Next, recesses are respectively formed in the substrate at two sides of the first spacer. Thereafter, a buffer layer... Agent: J C Patents, Inc.

20090124057 - Damascene gate field effect transistor with an internal spacer structure: A MOSFET is disclosed that comprises a channel between a source extension and a drain extension, a dielectric layer over the channel, a gate spacer structure formed on a peripheral portion of the dielectric layer, and a gate formed on a non-peripheral portion of the dielectric layer, with at least... Agent: Scully, Scott, Murphy & Presser, P.C.

20090124058 - Method of providing electrical separation in integrated devices and related devices: An integrated device includes two sections (A, B), such as a DFB laser (A) and an EAM modulator (B), having a semi-insulating (SI) separation region therebetween. The separation region (24) is of a material acting as a trap on electrons and configured to impede current flow between the two sections... Agent: Kathy Manke Avago Technologies Limited

20090124059 - Method for forming a semiconductor device: A method for forming a semiconductor device, includes the steps of providing a substrate; forming a patterned stack on the substrate including a first dielectric layer on the substrate, a first conductive layer on the first dielectric layer and a mask layer on the first conductive layer, wherein a width... Agent: Ingrassia Fisher & Lorenz, P.C.

20090124060 - Method for manufacturing silicon carbide semiconductor apparatus: A method for manufacturing a silicon carbide semiconductor apparatus is disclosed. According to the method, an element structure is formed on a front surface side of a semiconductor substrate. A rear surface of the semiconductor substrate is grinded or polished in a direction parallel to a flat surface of a... Agent: Posz Law Group, PLC

20090124061 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device, comprises forming an isolation trench on a semiconductor substrate, exposing a silicon surface of the isolation trench formed on the semiconductor substrate, filling a first insulating film into the semiconductor substrate by means of TEOS/O3/H2O CVD, filling a second insulating film into the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090124062 - Display device having a curved surface: The object of the invention is to provide a method for fabricating a semiconductor device having a peeled layer bonded to a base material with curvature. Particularly, the object is to provide a method for fabricating a display with curvature, more specifically, a light emitting device having an OLED bonded... Agent: Fish & Richardson P.C.

20090124063 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device by which a wafer with devices formed in a plurality of regions demarcated by a plurality of streets formed in a grid pattern in the face-side surface of the wafer is divided along the streets into individual devices, and an adhesive film for... Agent: Greer, Burns & Crain

20090124064 - Particle beam assisted modification of thin film materials: Several examples of a method for processing a substrate are disclosed. In a particular embodiment, the method may include: disposing a substrate having an upper surface and a lower surface on a platen contained in a chamber; generating a plasma containing a plurality of charged particles above the upper surface... Agent: Varian Semiconductor Equipment Assc., Inc.

20090124065 - Particle beam assisted modification of thin film materials: Several examples of a method for processing a substrate are disclosed. In a particular embodiment, the method may include: disposing a substrate having an upper surface and a lower surface on a platen contained in a chamber; generating a plasma containing a plurality of charged particles above the upper surface... Agent: Varian Semiconductor Equipment Assc., Inc.

20090124066 - Particle beam assisted modification of thin film materials: Several examples of a method for processing a substrate are disclosed. In a particular embodiment, the method may include: disposing a substrate having an upper surface and a lower surface on a platen contained in a chamber; generating a plasma containing a plurality of charged particles above the upper surface... Agent: Varian Semiconductor Equipment Assc., Inc.

20090124067 - Method to decrease thin film tensile stresses resulting from physical vapor deposition: A method and apparatus for a backside metallization of a wafer is provided. The wafer comprised of a first substance is bent by creating tension on a backside and creating compression on a front side prior to deposition of a thin film of a second substance. After deposition, the wafer... Agent: Cool Patent, P.C. C/o Cpa Global

20090124068 - Non-uniformly doped high voltage drain-extended transistor and method of manufacture thereof: The present invention provides, in one embodiment, a transistor (100). The transistor (100) comprises a doped semiconductor substrate (105) and a gate structure (110) over the semiconductor substrate (105), the gate structure (110) having a gate corner (125). The transistor (100) also includes a drain-extended well (115) surrounded by the... Agent: Texas Instruments Incorporated

20090124069 - Methods of changing threshold voltages of semiconductor transistors by ion implantation: A method for forming a semiconductor structure. The method includes providing a semiconductor structure including a semiconductor substrate. The semiconductor substrate includes (i) a top substrate surface which defines a reference direction perpendicular to the top substrate surface and (ii) a semiconductor body region. The method further includes implanting an... Agent: Schmeiser, Olsen & Watts

20090124070 - Methods of manufacturing semiconductor devices including metal oxide layers: Methods of manufacturing a semiconductor device are provided including forming a charge storage layer on a gate insulating layer that is on a semiconductor substrate. A blocking insulating layer is formed on the charge storage layer and an electrode layer is formed on the blocking insulating layer. The blocking insulating... Agent: Myers Bigel Sibley & Sajovec

20090124071 - Method of manufacturing semiconductor device: Provided is a method of manufacturing a semiconductor device. The method includes: forming a charge storage layer on a substrate on which a gate insulating layer is formed; forming a first metal oxide layer on the charge storage layer using a first reaction source including a metal oxide layer precursor... Agent: Myers Bigel Sibley & Sajovec

20090124072 - Semiconductor device having through electrode and method of fabricating the same: A semiconductor device includes a substrate, and a through electrode passing through the substrate. The semiconductor device has a pad region and a through electrode region. A pad covers the pad region, extends into the through electrode region, and delimits an opening in the through electrode region. A through electrode... Agent: Volentine & Whitt PLLC

20090124073 - Semiconductor device with bonding pad: A method for forming a semiconductor device with a bonding pad is disclosed. A first substrate having a device area and a bonding area is provided, wherein the first substrate has an upper surface and a bottom surface. Semiconductor elements are formed on the upper surface of the first substrate... Agent: Thomas, Kayden, Horstemeyer & Risley LLP

20090124074 - Wafer level sensing package and manufacturing process thereof: A wafer level sensing package and manufacturing process thereof are described. The process includes providing a wafer having sensing chips, in which each sensing chip has a sensing area and pads; forming a stress release layer on a wafer surface; cladding a photoresist layer on the stress release layer; patterning... Agent: Rabin & Berdo, PC

20090124075 - Method of manufacturing a wafer level package: A method of manufacturing a wafer level package is disclosed, which may include: coating an insulation layer over one side of a semiconductor chip, on one side of which an electrode pad is formed, such that the electrode pad is open; forming a seed layer by depositing a conductive metal... Agent: Staas & Halsey LLP

20090124076 - Method of manufacturing semiconductor device: A method for manufacturing a semiconductor device is provided, the method includes forming a coated film by coating a solution containing a solvent and an organic component above an insulating film located above a semiconductor substrate and having a recess, baking the coated film at a first temperature which does... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090124077 - Method for forming poly-silicon film: A poly-silicon film formation method for forming a poly-silicon film doped with phosphorous or boron includes heating a target substrate placed in a vacuum atmosphere inside a reaction container, and supplying into the reaction container a silicon film formation gas, a doping gas for doping a film with phosphorous or... Agent: Smith, Gambrell & Russell

20090124078 - Method of manufacturing semiconductor device with through hole: A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a pad electrode formed on a semiconductor substrate through a first insulation layer, and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor... Agent: Morrison & Foerster LLP

20090124079 - Method for fabricating a conductive plug: A method for fabricating a conductive plug includes the steps of providing a substrate having at least a gate structure thereon, a first dielectric layer covering a surface of the substrate, a second dielectric layer disposed on the first dielectric layer, and at least a metal line formed within the... Agent: North America Intellectual Property Corporation

20090124080 - Semiconductor device that is advantageous in microfabrication and method of manufacturing the same: A semiconductor device includes a semiconductor substrate, a first memory cell transistor, a first select gate transistor, a second memory cell transistor, a second select gate transistor, a contact plug, silicon oxide films, and plasma films which are formed as the same layer as the silicon oxide films and are... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090124081 - Techniques to improve characteristics of processed semiconductor substrates: Techniques to improve characteristics of processed semiconductor substrates are described, including cleaning a substrate using a preclean process, the substrate comprising a dielectric region and a conductive region, introducing a hydroquinone to the substrate after cleaning the substrate using the preclean operation, and forming a capping layer over the conductive... Agent: Intermolecular, Inc

20090124082 - Slurry for polishing ruthenium and method for polishing using the same: A slurry for polishing a ruthenium layer comprises distilled water, sodium periodate (NaIO4), an abrasive and a pH controlling agent.... Agent: Townsend And Townsend And Crew, LLP

20090124083 - Film formation apparatus and method for using same: A method for using a film formation apparatus for a semiconductor process to form a thin film on a target substrate while supplying a film formation reactive gas from a first nozzle inside a reaction chamber includes performing a cleaning process to remove a by-product film deposited inside the reaction... Agent: Smith, Gambrell & Russell

20090124084 - Fabrication of sub-resolution features for an integrated circuit: A method for fabricating sub-resolution features on an integrated circuit comprises depositing a hard mask layer on a dielectric layer of a semiconductor substrate, patterning the hard mask layer to form hard mask structures that define trenches, etching trenches in the dielectric layer through the hard mask structures, thereby forming... Agent: Intel Corporation C/o Cpa Global

20090124085 - Method for forming a semiconductor device has a lengthened channel length: The present invention discloses a method for forming a semiconductor device. The method includes providing a substrate; forming at least one first opening in the substrate to a predetermined depth and exposing a sidewall of the substrate in the first opening; forming a spacer on the sidewall and exposing a... Agent: Ingrassia Fisher & Lorenz, P.C.

20090124086 - Method of fabricating a flash memory device: A method of fabricating a flash memory device, in which a pre-metal dielectric layer, a hard mask layer, and a first etch mask pattern are sequentially formed over a semiconductor substrate; an auxiliary layer is formed along a surface of the first etch mask pattern and the hard mask layer;... Agent: Marshall, Gerstein & Borun LLP

20090124087 - Vertical plasma processing apparatus and method for using same: A vertical plasma processing apparatus for a semiconductor process for performing a plasma process on target substrates all together includes an exciting mechanism configured to turn at least part of a process gas into plasma. The exciting mechanism includes first and second electrodes provided to a plasma generation box and... Agent: Smith, Gambrell & Russell

20090124088 - Method for etching a sacrificial layer for a micro-machined structure: A method of etching a sacrificial layer for a micro-machined structure, the sacrificial layer positioned between a layer of a first material and a layer of a second material, the etching being carried out by an etching agent. The method includes: providing at least one species having an affinity for... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090124089 - Device and method for stopping an etching process: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The... Agent: Slater & Matsil LLP

20090124090 - Conductive polymer electrodes: A known method of forming organic semiconductor devices employs the deposition of a conductive polymer onto a substrate to form electrodes or conductive tracks and then to apply an electrical material such as an organic semiconductor on top of these tracks. Although the conductive polymer serves as a highly efficient... Agent: Fleit Gibbons Gutman Bongini & Bianco Pl

20090124091 - Etching solution composition for metal films: The present invention aims to provide an etching solution composition which enables to etch a metal film in a controllable manner, form a desired definite tapered shape, and obtain a smooth surface without causing etching solution exudation trace. Said problems have been solved by the present invention, which is an... Agent: Wolf Greenfield & Sacks, P.C.

20090124092 - Methods of selective deposition of fine particles onto selected regions of a substrate: A method for depositing fine particles from a suspension on selected regions of a substrate is disclosed. The particles are deposited on selected regions of a clean hydrophobic semiconductor surface that are surrounded by a wetting boundary which includes a mesa formed by etching through a silicon-on-insulator (SOI) film and... Agent: Scully, Scott, Murphy & Presser, P.C.

20090124093 - Methods of forming cmos integrated circuits that utilize insulating layers with high stress characteristics to improve nmos and pmos transistor carrier mobilities: A CMOS integrated circuit has NMOS and PMOS transistors therein and an insulating layer extending on the NMOS transistors. The insulating layer is provided to impart a relatively large tensile stress to the NMOS transistors. In particular, the insulating layer is formed to have a sufficiently high internal stress characteristic... Agent: Myers Bigel Sibley & Sajovec

20090124094 - Method for manufacturing semiconductor device to prevent defects due to insulation layer volume change: A semiconductor device is made by forming patterns on a semiconductor substrate. After forming the patterns, sequentially forming a spacer layer, an oxidation promotion layer and a buffer layer on the semiconductor substrate including the surfaces of the patterns previously formed. An insulation layer is then formed on the buffer... Agent: Ladas & Parry LLP

20090124095 - Method for forming patterned photoresist layer: A method for forming a patterned photoresist is provided, which is applicable to a substrate. The method includes: performing an implantation process over the substrate; next, performing a surface treatment process; then, forming a photoresist layer over the substrate; and thereafter, patterning the photoresist layer.... Agent: J C Patents, Inc.

20090124096 - Method of fabricating flash memory device: The present invention relates to a method of fabricating a flash memory device, the method of the present invention comprises the steps of forming a tunnel insulating layer on a semiconductor substrate through a plasma oxidation process and performing a nitridation treatment to a surface of the tunnel insulating layer.... Agent: Townsend And Townsend And Crew, LLP

20090124097 - Method of forming narrow fins in finfet devices with reduced spacing therebetween: A method of forming narrow fins in a substrate includes forming a sacrificial mandrel layer over the substrate; using a photolithographic process to pattern the mandrel layer so as to perform a plurality of mandrel features having an initial width greater than or equal to F and spacing therebetween of... Agent: Cantor Colburn LLP - IBM Fishkill

20090117671 - Method for manufacturing semiconductor device including ferreoelectric capacitor: A method for manufacturing a semiconductor device includes the step of conducting an acceptance/rejection judgment about the semiconductor device. The acceptance/rejection judgment is conducted by using a hysteresis loop that indicates the relationship between the applied voltage and the polarization quantity of the ferroelectric capacitor.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090117672 - Light emitting devices with phosphor wavelength conversion and methods of fabrication thereof: A method of fabricating a light emitting device having a specific target color, CIE xy, of emitted light is described. The device comprises a light emitting diode that is operable to emit light of a first wavelength range and at least one phosphor material which converts at least a part... Agent: Fliesler Meyer LLP

20090117673 - Failure detecting method, failure detecting apparatus, and semiconductor device manufacturing method: A failure detecting method has inputting a foreign substance inspection map created by foreign substance inspection for a wafer surface after each processing process in a wafer processing process, inputting a die sort map created by a die sort test after the wafer processing process, setting a plurality of region... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090117674 - Method for manufacturing field emission electron source having carbon nanotubes: A method for manufacturing a field emission electron source includes: providing a CNT array; drawing a bundle of CNTs from the CNT array to form a CNT yarn; soaking the CNT yarn into an organic solvent, and shrinking the CNT yarn into a CNT string after the organic solvent volatilizing;... Agent: PCe Industry, Inc. Att. Steven Reiss

20090117675 - Method for producing group 3-5 nitride semiconductor and method for producing light-emitting device: The present invention provides a method for producing a group 3-5 nitride semiconductor and a method for producing a light emitting device. The method for producing a group 3-5 nitride semiconductor, comprises the steps of (i), (ii), (iii) and (iv) in this order: (i) placing inorganic particles on a substrate,... Agent: Fitch, Even, Tabin & Flannery

20090117676 - Semiconductor optical device: A method of fabricating a semiconductor optical device is disclosed. This semiconductor optical device includes first and second optical semiconductor elements. This method comprises the steps of: growing, in a metal-organic vapor phase deposition reactor, plural semiconductor layers for the first semiconductor optical element on a primary surface of a... Agent: Smith, Gambrell & Russell

20090117677 - Rubbing system for alignment layer of lcd and method thereof: A rubbing system for an alignment layer of a liquid crystal display (LCD) device, comprises: a rubbing table on which a substrate having an alignment layer thereon is positioned; a rubbing roll on which a rubbing material is wound, substantially positioned on the rubbing table thus to substantially contact the... Agent: Mckenna Long & Aldridge LLP

20090117678 - Semiconductor laser with a weakly coupled grating: A semiconductor laser with a semiconductor substrate, a laser layer arranged on the semiconductor substrate, a waveguide arranged parallel to the laser layer and a strip shaped grating structure is disclosed. The laser layer, the waveguide and the grating are arranged in a configuration which results in weak coupling between... Agent: Michaelson & Associates

20090117679 - Methods for forming crystalline thin-film photovoltaic structures: Methods for forming semiconductor devices include providing a textured template, forming a buffer layer over the textured template, forming a substrate layer over the buffer layer, removing the textured template, thereby exposing a surface of the buffer layer, and forming a semiconductor layer over the exposed surface of the buffer... Agent: Goodwin Procter LLP Patent Administrator

20090117680 - Method for manufacturing photoelectric conversion device: A photoelectric conversion device which is excellent in photoelectric conversion characteristics is provided by effectively utilizing silicon semiconductor materials. The present invention relates to a method for manufacturing a photoelectric conversion device using a solar cell, in which a plurality of single crystal semiconductor substrates in each of which a... Agent: Eric Robinson

20090117681 - Semiconductor device and manufacturing method thereof: In the present invention, higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active... Agent: Fish & Richardson P.C.

20090117682 - Method for manufacturing image sensor: A method for manufacturing an image sensor is provided. The method can include forming an oxide layer on a color filter layer, forming a first oxide layer microlens by etching the oxide layer, forming a second oxide layer microlens on the first oxide layer microlens, and forming a third oxide... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090117683 - Method of manufacturing single crystal substate and method of manufacturing solar cell using the same: In accordance with the present invention, a method for manufacturing a single-crystal substrate comprising the steps of: preparing a square-shaped frame; pouring polycrystalline molten silicon into the prepared frame; cooling and crystallizing the molten silicon; and forming the single-crystal silicon substrate by transferring a heating element from one corner of... Agent: Mcdermott Will & Emery LLP

20090117684 - Method and apparatus for forming copper indium gallium chalcogenide layers: A multilayer structure to form absorber layers for solar cells. The multilayer structure includes a base comprising a contact layer on a substrate layer, a first layer on the contact layer, and a metallic layer on the first layer. The first layer includes an indium-gallium-selenide film and the gallium to... Agent: Pillsbury Winthrop Shaw Pittman LLP

20090117685 - Thin film solar cell and its fabrication: A method for producing a solar cell including the steps of forming a p-type microcrystalline silicon oxide layer on a glass substrate using a PECVD method and raw gases comprising Silane gas, Diborane gas, Hydrogen gas and Carbon Dioxide gas. The method may employ a frequency of between about 13.56-60... Agent: Baker & Daniels LLP

20090117686 - Method of fabricating organic semiconductor device: A method of fabricating an organic semiconductor device includes following steps. A gate conductive layer is formed on a substrate, and then a gate dielectric layer is formed. Next, patterned metal layers are formed on the gate dielectric layer beside the gate conductive layer. An electrode modified layer is then... Agent: Jianq Chyun Intellectual Property Office

20090117687 - Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument: A method of manufacturing a semiconductor device forms a penetrating hole in a substrate so that the penetrating hole extends from a first surface of the substrate to a second surface of the substrate being opposite to the first surface. An internal wall surface of the penetrating hole has a... Agent: Oliff & Berridge, PLC

20090117688 - Flip chip mounting method and bump forming method: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to... Agent: Mcdermott Will & Emery LLP

20090117689 - Packaged integrated circuits: A packaged, optically active integrated circuit device is shown is manufactured by mounting the integrated circuit (201) onto a first part of a lead frame (206) using epoxy (209). Electrical connections (207) are made using conventional wire bonding techniques between the integrated circuit (201) and peripheral parts (205) of the... Agent: Townsend And Townsend And Crew, LLP

20090117690 - Integrated transistor module and method of fabricating same: An integrated transistor module includes a lead frame that defines at least one low-side land and at least one high-side land. A stepped portion of the lead frame mechanically and electrically interconnects the low-side and high-side lands. A low-side transistor is mounted upon the low-side land with its drain electrically... Agent: Hiscock & Barclay, LLP

20090117691 - Method of manufacturing semiconductor device: To achieve electro-optical devices typified by active matrix liquid crystal display devices with higher productivity and yield and lower manufacturing cost by reducing the number of steps of manufacturing a terminal portion and a pixel portion having an inverted staggered thin film transistor, specifically by reducing the number of photomasks... Agent: John F. Hayden Fish & Richardson P.c

20090117692 - Manufacturing method of semiconductor device: A single crystal semiconductor substrate bonded over a supporting substrate with a buffer layer interposed therebetween and having a separation layer is heated to separate the single crystal semiconductor substrate using the separation layer or a region near the separation layer as a separation plane, thereby forming a single crystal... Agent: Fish & Richardson P.C.

20090117693 - Method for manufacturing semiconductor device: In a semiconductor device having a raised source and drain structure, in forming a raised region by etching, etching of an island-like semiconductor film which is an active layer is inhibited. In a method for manufacturing a semiconductor device, an insulating film is formed by oxidizing or nitriding the surface... Agent: Nixon Peabody, LLP

20090117694 - Nanowire based non-volatile floating-gate memory: A non-volatile memory transistor with a nanocrystal-containing floating gate formed by nanowires is disclosed. The nanocrystals are formed by the growth of short nanowires over a crystalline program oxide. As a result, the nanocrystals are single-crystals of uniform size and single-crystal orientation.... Agent: Scully, Scott, Murphy & Presser, P.C.

20090117695 - Bicmos performance enhancement by mechanical uniaxial strain and methods of manufacture: A BiCMOS device with enhanced performance by mechanical uniaxial strain is provided. A first embodiment of the present invention includes an NMOS transistor, a PMOS transistor, and a bipolar transistor formed on different areas of the substrate. A first contact etch stop layer with tensile stress is formed over the... Agent: Slater & Matsil, L.L.P.

20090117696 - Fully logic process compatible non-volatile memory cell with a high coupling ratio and process of making the same: A fully logic process compatible non-volatile memory cell has a well on a substrate, a pair of source and drain outside the well, a channel between the source and drain, a control gate in the well, and a floating gate having a first portion above the channel, and a second... Agent: Rosenberg, Klein & Lee

20090117697 - Nonvolatile memory device including nano dot and method of fabricating the same: A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example... Agent: Harness, Dickey & Pierce, P.L.C

20090117698 - Eeprom and method of manufacturing the same: An EEPROM includes a substrate, a first semiconductor layer and a second semiconductor layer formed on the substrate. The first semiconductor layer is isolated from the second semiconductor layer by a trench. A first source and a first drain are located at two opposing sides of the first semiconductor layer.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090117700 - Method for manufacturing a trench power transistor: A method for manufacturing a trench power transistor includes providing a substrate, forming an epitaxy layer on the substrate, performing a dry etching process on the epitaxy layer for generating a first trench, forming a gate oxide layer in the first trench and depositing poly-Si on the gate oxide layer... Agent: North America Intellectual Property Corporation

20090117699 - Method for preparing a recessed transistor structure: A method for preparing a recessed transistor structure comprises the steps of performing an implanting process to form a doped layer in a substrate, forming a plurality of gate-isolation blocks on the substrate, forming a plurality of first spacers on sidewalls of the gate-isolation blocks, removing a portion of the... Agent: Wpat, PC Intellectual Property Attorneys

20090117701 - Method for manufacturing a mos transistor: A method for manufacturing a MOS transistor includes performing a thermal treatment to repair damaged substrate before forming source/drain extension regions, accordingly negative bias temperature instability (NBTI) is reduced. Since the thermal treatment is performed before forming the source/drain extension regions, heat budget for forming the source/drain extension regions and... Agent: North America Intellectual Property Corporation

20090117702 - Method of forming an inductor on a semiconductor wafer: A semiconductor device has a substrate with an inductor formed on its surface. First and second contact pads are formed on the substrate. A passivation layer is formed over the substrate and first and second contact pads. An insulating layer is formed over the passivation layer. The insulating layer is... Agent: Robert D. Atkins

20090117704 - Method for manufacturing semiconductor device: As a base substrate, a substrate having an insulating surface such as a glass substrate is used. Then, a single crystal semiconductor layer is formed over the base substrate with the use of a large-sized semiconductor substrate. Note that, it is preferable that the base substrate be provided with a... Agent: Fish & Richardson P.C.

20090117703 - Method for manufacturing semiconductor substrate: A method for manufacturing a semiconductor substrate is provided, which includes a step of forming a buffer layer over a first semiconductor substrate, a step of forming a damaged region in the first semiconductor substrate by irradiating the first semiconductor substrate with ions, a step of bonding the first semiconductor... Agent: Eric Robinson

20090117705 - Method of forming isolation layer of semiconductor memory device: The present invention relates to a method of forming isolation layers of a semiconductor device. According to a method of forming isolation layers of a semiconductor device in accordance with an aspect of the present invention, a tunnel insulating layer, a charge trap layer, and a hard mask layer are... Agent: Townsend And Townsend And Crew, LLP

20090117706 - Manufacturing method of soi wafer and soi wafer manufactured by this method: There is provided a method of manufacturing an SOI wafer by an ion implantation delamination method, comprising at least: forming an oxide film on a surface of at least one of a base wafer and a bond wafer functioning as an SOI layer; implanting at least one of a hydrogen... Agent: Oliff & Berridge, PLC

20090117707 - Method for manufacturing soi substrate and semiconductor device: An object is to provide a method for manufacturing an SOI substrate provided with a single crystal semiconductor layer which can be used practically even when a substrate having a low heat resistant temperature, such as a glass substrate or the like, is used. Another object is to manufacture a... Agent: Fish & Richardson P.C.

20090117708 - Method for manufacturing soi substrate: A method for manufacturing an SOI substrate includes steps of forming a first oxide film on a surface of a first silicon substrate; implanting hydrogen ions into the surface of the first silicon substrate on which the first oxide film is formed to form an ion implant region inside the... Agent: Duane Morris LLP - Ny Patent Department

20090117709 - Manufacturing method of semiconductor integrated circuit device: When reducing the thickness of a semiconductor wafer, so that a crushing layer which is relatively thin and has gettering function of, for example, less than 0.5 μm, less than 0.3 μm or less than 0.1 μm in thickness may be formed at the back surface, and the die strength... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090117710 - Method of cutting semiconductor wafer, semiconductor chip apparatus, and chamber to cut wafer: A method of cutting a semiconductor wafer includes preparing a semiconductor wafer including a scribe region and a chip region, forming a groove in the scribe region, loading the semiconductor wafer with the groove formed therein in a chamber, and cutting the semiconductor wafer into a plurality of chips through... Agent: Stanzione & Kim, LLP

20090117712 - Laser processing method: A laser processing method for preventing particles from occurring from cut sections of chips obtained by cutting a silicon wafer is provided. An irradiation condition of laser light L for forming modified regions 77 to 712 is made different from an irradiation condition of laser light L for forming the... Agent: Drinker Biddle & Reath (dc)

20090117711 - Method for laterally cutting through a semiconductor wafer and optoelectronic component: In a method for laterally dividing a semiconductor wafer (1), a growth substrate (2) is provided, onto which is grown a semiconductor layer sequence (3) comprising a layer provided as a separating layer (4) and at least one functional semiconductor layer (5) which succeeds the separating layer (4) in the... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090117713 - Reduction of attraction forces between silicon wafers: The present invention is related to a method for reducing attraction forces between wafers (4). This method is characterized in that it comprises the step of, after sawing and before dissolution of the adhesive (5), introducing spacers (6) between wafers (4). The invention comprises also a wafer singulation method and... Agent: Birch Stewart Kolasch & Birch

20090117714 - Method of producing semiconductor device, and substrate processing apparatus: Disclosed is a method of producing a semiconductor device, comprising the steps of carrying a substrate with an insulating film formed on its surface into a processing chamber; processing the substrate to form silicon grains on the insulating film formed on the surface of the substrate by introducing at least... Agent: Oliff & Berridge, PLC

20090117715 - Semiconductor device fabricated by selective epitaxial growth method: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090117716 - Method for manufacturing semiconductor device, and semiconductor device and electronic device: To provide a high-performance semiconductor device using an SOI substrate in which a substrate having low heat resistance is used as a base substrate, to provide a high-performance semiconductor device without performing mechanical polishing, and to provide an electronic device using the semiconductor device, planarity of a semiconductor layer is... Agent: Fish & Richardson P.C.

20090117717 - Methods of selectively depositing silicon-containing films: An embodiment provides a method for selectively depositing a single crystalline film. The method includes providing a substrate, which includes a first surface having a first surface morphology and a second surface having a second surface morphology different from the first surface morphology. A silicon precursor and BCl3 are intermixed... Agent: Knobbe, Martens, Olson & Bear LLP

20090117718 - Methods for infusing one or more materials into nano-voids if nanoporous or nanostructured materials: A method of forming composite nanostructures using one or more nanomaterials. The method provides a nanostructure material having a surface region and one or more nano void regions within a first thickness in the surface region. The method subjects the surface region of the nanostructure material with a fluid. An... Agent: Townsend And Townsend And Crew, LLP

20090117719 - High frequency diode and method for producing same: A high frequency diode comprising: a P type region, a N type region, and an I layer as a high resistivity layer interposed between the P type region and the N type region, wherein the I layer is made of a silicon wafer that has a carbon concentration of 5×1015... Agent: Kolisch Hartwell, P.C.

20090117720 - Strained semiconductor-on-insulator by si:c combined with porous process: A method of fabricating a strained semiconductor-on-insulator (SSOI) substrate is provided. The method includes first providing a structure that includes a substrate, a doped and relaxed semiconductor layer on the substrate, and a strained semiconductor layer on the doped and relaxed semiconductor layer. In the invention, the doped and relaxed... Agent: Scully, Scott, Murphy & Presser, P.C.

20090117721 - Vapor phase growth apparatus: A method of cooling a complex electronic system includes preventing system air from passing through a front side and a rear side of a server system main board, organizing a plurality of electronic segments of the server system main board, providing cool air horizontally to the server system main board... Agent: Mcginn Intellectual Property Law Group, PLLC

20090117722 - Methods for fabricating semiconductor structures: A method for fabricating a semiconductor structure includes forming a carbon masking layer on a semiconductor layer, forming a protective layer on the carbon masking layer. The method further includes forming an opening in the protective layer and the carbon masking layer and processing the semiconductor layer through the opening... Agent: General Electric Company Global Research

20090117723 - Methods of forming a conductive pattern in semiconductor devices and methods of manufacturing semiconductor devices having a conductive pattern: In a method of forming a conductive pattern in a semiconductor device, a conductive layer including a metal is formed on a substrate. A mask including carbon is provided on the conductive layer, and the conductive pattern is formed on the substrate by etching the conductive layer using the mask... Agent: Mills & Onello LLP

20090117724 - Manufacturing method of a semiconductor device: A manufacturing method of a semiconductor device includes the steps of forming an insulating film having a prescribed repetition pattern on one surface of a semiconductor substrate and then depositing semiconductor layers on the one surface of the semiconductor substrate; forming trenches from the other surface of the semiconductor substrate... Agent: Rossi, Kimms & Mcdowell LLP.

20090117725 - Method of manufacturing flash memory device: A method of manufacturing a flash memory device includes forming a line pattern over a semiconductor substrate, and then forming a first dielectric spacer having a vertically extending portion formed on sidewalls of the line pattern and a horizontally extending portion formed over and contacting the semiconductor substrate, and then... Agent: Sherr & Vaughn, PLLC

20090117726 - Integration scheme for an nmos metal gate: A method for making an NMOS transistor on a semiconductor substrate includes reducing the thickness of the PMD layer to expose the polysilicon gate electrode of the NMOS transistor and the polysilicon gate electrode of the PMOS transistor, and then removing the gate electrode of the NMOS transistor. The method... Agent: Texas Instruments Incorporated

20090117727 - Method of forming a flash memory: A method of forming a flash memory is provided. The method includes the steps of providing a substrate; forming a plurality of floating gates on the substrate; forming a first conformal dielectric layer to cover the substrate and the plurality of floating gates; forming a second conformal dielectric layer to... Agent: Ingrassia Fisher & Lorenz, P.C.

20090117728 - Method for fabricating nonvolatile memory device: A method for fabricating a nonvolatile memory device includes forming a tunneling insulation layer and a conductive layer for a floating gate over a substrate, partially etching the conductive layer, the tunneling insulation layer, and the substrate to form a trench, forming an isolation layer filling a portion of the... Agent: Lowe Hauptman Ham & Berner, LLP

20090117729 - Electrostatic discharge (esd) protection structure: A semiconductor device has a substrate with a plurality of active devices formed thereon. A contact pad is formed on the substrate. A solder bump is formed on the contact pad. An electrostatic discharge (ESD) bump electrode is formed on the contact pad. The ESD bump electrode has a tip.... Agent: Robert D. Atkins

20090117730 - Manufacturing method of semiconductor integrated device: Manufacture of semiconductor products such as LCD driver requires a bump plating step for forming a gold bump electrode having a size of from about 15 to 20 μm. This bump plating step is performed by electroplating with a predetermined plating solution, but projections intermittently appear on the bump electrode... Agent: Miles & Stockbridge PC

20090117731 - Semiconductor interconnection structure and method for making the same: A semiconductor interconnection structure is manufactured as follows. First, a substrate with a first dielectric layer and a second dielectric layer is formed. Subsequently, an opening is formed in the second dielectric layer. A thin metal layer and a seed layer are formed in sequence on the surface of the... Agent: Wpat, PC Intellectual Property Attorneys

20090117732 - Method of fabricating semicondcutor device: A method of fabricating a semiconductor device that may include forming an insulating interlayer on and/or over a semiconductor substrate, and then forming a damascene structure by patterning the insulating interlayer, and then forming a metal layer on and/or over the insulating interlayer and filling the damascene structure, and then... Agent: Sherr & Vaughn, PLLC

20090117733 - Protection of seedlayer for electroplating: The present invention further includes a structure having a substrate, the substrate having a device; an insulator disposed over the substrate, the insulator having an opening, the opening disposed over the device; a barrier layer disposed over the opening; a seed layer disposed over the barrier layer; and a protection... Agent: Intel Corporation C/o Cpa Global

20090117734 - Processes for forming electronic devices including polishing metal-containing layers: A process of forming an electronic device can include providing a workpiece. The workpiece can include a substrate, an interlevel dielectric overlying the substrate, a refractory-metal-containing layer over the interlevel dielectric, and a first metal-containing layer over the refractory-metal-containing layer. The first metal-containing layer can include a metal element other... Agent: Larson Newman Abel Polansky & White, LLP

20090117735 - Implantation of multiple species to address copper reliability: A first species and a second species are implanted into a conductor of a substrate, which may be copper. The first species and second species may be implanted sequentially or at least partly simultaneously. Diffusion of the first species within the conductor of the substrate is prevented by the presence... Agent: Varian Semiconductor Equipment Assc., Inc.

20090117736 - Ammonia-based plasma treatment for metal fill in narrow features: A method for fabricating a semiconductor device is described. A substrate is provided having a patterned dielectric layer disposed thereon. A trench is formed in the dielectric layer. The surfaces of the trench are treated with an ammonia-based plasma process. A metal layer is then formed in the trench.... Agent: Applied Materials/bstz Blakely Sokoloff Taylor & Zafman LLP

20090117737 - Polyconductor line end formation and related mask: Methods of forming adjacent polyconductor line ends and a mask therefor are disclosed. In one embodiment, the method includes forming a polyconductor layer over an isolation region; forming a mask over the polyconductor layer, the mask including shapes to create the polyconductor line ends and a correction element to ensure... Agent: Hoffman Warnick LLC

20090117738 - Method for producing substrate: A metallic film 43 that becomes the matrix of pad 32 is formed on semiconductor substrate 41. Next, through hole 31 is formed in the semiconductor substrate 41 facing the metallic film 43 at the portion corresponding to an area where the pad 32 is formed. Thereafter, penetration electrode 17... Agent: Drinker Biddle & Reath (dc)

20090117739 - Method for forming pattern in semiconductor device: A method for forming a pattern in a semiconductor device includes forming an etch-target layer over a substrate, wherein the substrate includes a first region having a smaller pattern than the first region, forming a sacrificial layer and a passivation layer over the etch-target layer, etching the passivation layer and... Agent: Townsend And Townsend And Crew, LLP

20090117740 - Fluid-confining apparatus and method of operating the same: The fluid-confining apparatus includes at least a substrate holder, at least a confining fluid supplying tube, at least a confining fluid recovering tube, at least a process fluid supplying tube, and at least a process fluid recovering tube. The process fluid supplying tube supplies at least a process fluid, and... Agent: North America Intellectual Property Corporation

20090117743 - Film formation apparatus and method for using same: A method for using a film formation apparatus for a semiconductor process to form a thin film on a target substrate inside a reaction chamber includes performing a cleaning process to remove a by-product film deposited on a predetermined region in a gas route from a film formation gas supply... Agent: Smith, Gambrell & Russell

20090117744 - Ion implantation mask forming method: A method of forming an ion implantation mask includes forming a field area on a semiconductor substrate, forming an amorphous carbon layer on the semiconductor substrate, forming a hard mask layer on the amorphous carbon layer, forming an etching mask pattern on the hard mask layer, and etching the hard... Agent: Lee & Morse, P.C.

20090117742 - Method for fabricating fine pattern in semiconductor device: A method for fabricating a pattern in a semiconductor device includes a single polysilicon hard mask by appropriately selecting spacer material in an SPT, thereby decreasing the number of fabrication processes. Furthermore, since the spacers are easily removed, it is possible to prevent the formation of a step between patterns... Agent: Townsend And Townsend And Crew, LLP

20090117741 - Method for fabricating monolithic two-dimensional nanostructures: A patterning method for the creation of two-dimensional nanowire structures. Nanowire patterning methods are used with lithographical patterning approaches to form patterns in a layer of epoxy and resist material. These patterns are then transferred to an underlying thin film to produce a two-dimensional structure with desired characteristics.... Agent: Steinfl & Bruno

20090117746 - Gas supply device, substrate processing apparatus and substrate processing method: A gas supply mechanism includes a gas introduction member having gas inlet portions through which a gas is introduced into a processing chamber, a processing gas supply unit, a processing gas supply path, branch paths, an additional gas supply unit and an additional gas supply path. The gas inlet portions... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090117745 - Methods for selectively etching a barrier layer in dual damascene applications: Methods for etching a dielectric barrier layer with high selectivity to a dielectric bulk insulating layer and/or a hardmask layer in a dual damascene structure are provided. In one embodiment, the method includes providing a substrate having a portion of a dielectric barrier layer exposed through a dielectric bulk insulating... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090117747 - Method for surface treating semiconductor: t

20090117748 - Method for manufacturing a phase change memory device capable of improving thermal efficiency of phase change material: A method for manufacturing a phase change memory device, capable of improving reset current characteristics of a phase change layer by preventing thermal loss of the phase change layer. An interlayer dielectric layer having a lower electrode contact is formed on a semiconductor substrate. A phase change layer and an... Agent: Baker & Mckenzie LLP Patent Department

20090117749 - Etching method of single wafer: There is provided an etching method of a single wafer which supplies an etchant onto a wafer front surface in a state where a single wafer having flattened front and rear surfaces is held, and etches the wafer front surface and a front surface side end portion by using a... Agent: Buckley, Maschoff & Talwalkar LLC

20090117750 - Methods of forming a semiconductor device: The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20090117751 - Method for forming radical oxide layer and method for forming dual gate oxide layer using the same: A method for fabricating a radical oxide layer includes providing a substrate, forming an oxide layer over the substrate through a radical oxidation process, and performing a thermal treatment on the oxide layer by using oxygen (O2).... Agent: Townsend And Townsend And Crew, LLP

20090117752 - Semiconductor device manufacturing method and substrate processing apparatus: A high quality interface is formed at a low oxygen-carbon density between a substrate and a thin film while preventing heat damage on the substrate and increase of thermal budget. This method includes a step of loading a wafer into a reaction furnace, a step of pretreating the wafer in... Agent: Kratz, Quintos & Hanson, LLP