Semiconductor device manufacturing: process inventions 03/09

20090081811 - Distributed power arrangements for localizing power delivery: A distributed power arrangement to provide local power delivery in a plasma processing system during substrate processing is provided. The distributed power arrangement includes a set of direct current (DC) power supply units. The distributed power arrangement also includes a plurality of power generators, which is configured to receive power... Agent: Ipsg, P.C.

20090081810 - Substrate processing apparatus and substrate processing method: A substrate processing apparatus has a fluid supply means 20 for supplying fluid to a substrate W and a fluid collection means 21 for collecting the fluid in the vicinity of the substrate W, the fluid supply means 20 having a fluid spurt section 20a, the fluid collection means 21... Agent: Wenderoth, Lind & Ponack, L.L.P.

20090081812 - Production method for semiconductor device: The present invention is a production method for a semiconductor device equipped with a conductive film with predetermined film thickness on a sidewall of a concave portion formed in an insulating film, and comprises a step of forming the concave portion in the insulation film formed on a semiconductor substrate.... Agent: Mcdermott Will & Emery LLP

20090081814 - Integrated manufacturing system with transistor drive current control: An integrated manufacturing system comprising: providing a substrate; forming a gate over the substrate; measuring a gate length of the gate; forming a first spacer adjacent the gate; measuring a spacer critical dimension of the spacer; and adjusting a dose of an implant based on the gate length and the... Agent: Law Offices Of Mikio Ishimaru

20090081813 - Method and apparatus for measurement and control of photomask to substrate alignment: A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror... Agent: Schmeiser, Olsen & Watts

20090081815 - Method and apparatus for spacer-optimization (s-o): The invention can provide a method of processing a substrate using S-O processing sequences and evaluation libraries that can include one or more optimized spacer creation and evaluation procedures.... Agent: Tokyo Electron U.s. Holdings, Inc.

20090081816 - Light emitting device and production system of the same: To provide a light emitting device without nonuniformity of luminance, a correcting circuit for correcting a video signal supplied to each pixel to a light emitting device. The correcting circuit is stored with data of a dispersion of a characteristic of a driving TFT among pixels and data of a... Agent: Nixon Peabody, LLP

20090081817 - Patterning method: A patterning method is provided. In the patterning method, a film is formed on a substrate and a pre-layer information is measured. Next, an etching process is performed to etch the film. The etching process includes a main etching step, an etching endpoint detection step, an extension etching step and... Agent: J C Patents, Inc.

20090081818 - Method of wire bond encapsulation profiling: A method for profiling a bead of encapsulant extending along an edge of a die mounted to a supporting structure, by depositing a bead of encapsulant onto wire bonds along the edge of the die, positioning a profiling surface over the die at a predetermined spacing from the die, moving... Agent: Silverbrook Research Pty Ltd

20090081819 - Method and apparatus for managing manufacturing equipment, method for manufacturing device thereby: Provided is a method for managing manufacturing apparatuses used in a managed production line including a plurality of manufacturing processes for manufacturing an electronic device, each of the apparatuses being used in each of the processes, the method including: acquiring a property of a reference device manufactured in a predetermined... Agent: Jianq Chyun Intellectual Property Office

20090081820 - Method for manufacturing liquid crystal display device: A method for manufacturing a liquid crystal display device is disclosed. The method includes forming a gate electrode, a gate pad, a gate line on a substrate by using a first mask; forming a gate insulating film, an active layer, an ohmic contact layer and a conductive layer in sequence... Agent: Morgan Lewis & Bockius LLP

20090081821 - Method of manufacturing semiconductor light-emitting element: A semiconductor layer is provided on a surface of a sapphire substrate, the sapphire substrate having smooth surfaces. A support substrate is mounted on an electrode formation surface of the semiconductor layer. A surface portion of the semiconductor layer is melted, and the sapphire substrate is separated from the semiconductor... Agent: Brinks Hofer Gilson & Lione

20090081822 - Optical enhancement of integrated circuit photodetectors: A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable though the... Agent: Ratnerprestia

20090081823 - Electroformed stencils for solar cell front side metallization: A method for providing metallization upon a semiconductor substrate utilizing a stencil having at least one aperture extending from the contact side to the fill side, the contact side of the stencil being substantially flat and forming a sharp edge with a wall of the at least one aperture, the... Agent: Lowrie, Lando & Anastasi, LLP

20090081824 - Stacked organic memory devices and methods of operating and fabricating: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the... Agent: Amin, Turocy & Calvin, LLP

20090081825 - Phase change memory device and method for fabricating: A phase change memory device is provided. The phase change memory device includes a substrate with a first electrode layer formed thereon. A first phase change memory structure is on the first electrode layer and electrically connected to the first electrode layer. A second phase change memory structure is on... Agent: Birch Stewart Kolasch & Birch

20090081826 - Process for making doped zinc oxide: The present invention relates to a process of making a zinc-oxide-based thin film semiconductor, for use in a transistor, comprising thin film deposition onto a substrate comprising providing a plurality of gaseous materials comprising first, second, and third gaseous materials, wherein the first gaseous material is a zinc-containing volatile material... Agent: Andrew J. Anderson Patent Legal Staff

20090081827 - Process for selective area deposition of inorganic materials: An atomic-layer-deposition process for forming a patterned thin film comprising providing a substrate, applying a deposition inhibitor material to the substrate, wherein the deposition inhibitor material is an organic compound or polymer; and patterning the deposition inhibitor material either after step (b) or simultaneously with applying the deposition inhibitor material... Agent: Andrew J. Anderson Patent Legal Staff

20090081828 - Mems fabrication method: The present invention provides methods for singulating microelectromechanical systems (MEMS) die from a wafer. A plurality of MEMS devices are formed on the top surface of a wafer, and a plurality of intersecting scribe lanes are then formed, on the bottom surface of the wafer, to define a plurality of... Agent: Rothwell, Figg, Ernst & Manbeck, P.C.

20090081829 - Method of adhering wire bond loops to reduce loop height: A method of reducing wire bond loop heights in wire bonds electrically connecting an integrated circuit die with a contact pad to a printed circuit board with a conductor, by mounting the integrated circuit die such that the contact pad is spaced from the conductor, positioning an adhesive surface between... Agent: Silverbrook Research Pty Ltd

20090081830 - Semiconductor device and method of laser-marking wafers with tape applied to its active surface: A method of laser-marking a semiconductor device involves providing a semiconductor wafer having a plurality of solder bumps formed on contact pads disposed on its active surface. The solder bumps have a diameter of about 250-280 μm. A backgrinding tape is applied over the solder bumps. The tape is translucent... Agent: Quarles & Brady LLP

20090081834 - Method of applying encapsulant to wire bonds: A method of applying encapsulant to wire bonds between a die and conductors on a supporting substrate, by forming a bead of the encapsulant on a profiling surface, positioning the profiling surface such that the bead contacts the die and, moving the profiling surface relative to the die to cover... Agent: Silverbrook Research Pty Ltd

20090081832 - Method of reducing wire bond profile height in integrated circuits mounted to circuit boards: A method of profiling a wire bond between a contact pad on a die, and a conductor on a supporting structure, by electrically connecting the contact pad on the die to the conductor on the supporting structure with a wire bond, the wire bond extending in an arc from the... Agent: Silverbrook Research Pty Ltd

20090081831 - Warpage control using a package carrier assembly: A method for curing an encapsulant that surrounds a plurality of integrated circuits on a strip that forms a strip assembly is provided. The strip assembly is composed of units for packaging and the units each have edges defining a perimeter of the unit. The strip assembly is placed on... Agent: Freescale Semiconductor, Inc. Law Department

20090081833 - Wire bond encapsulant application control: A method of applying encapsulant to a die mounted to a support structure by providing a die mounted to the support structure, the die having a back surface in contact with the support structure and an active surface opposing the back surface, the active surface having electrical contact pads, positioning... Agent: Silverbrook Research Pty Ltd

20090081835 - Non-volatile memory devices and methods of forming the same: A non-volatile memory device includes an upwardly protruding fin disposed on a substrate and a control gate electrode crossing the fin. A floating gate is interposed between the control gate electrode and the fin and includes a first storage gate and a second storage gate. The first storage gate is... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20090081836 - Method of forming cmos with si:c source/drain by laser melting and recrystallization: A method of forming crystalline Si:C in source and drain regions is provided. After formation of shallow trench isolation and gate electrodes of field effect transistors, gate spacers are formed on gate electrodes. Preamorphization implantation is performed in the source and drain regions, followed by carbon implantation. The upper portion... Agent: Scully, Scott, Murphy & Presser, P.C.

20090081837 - Method for fabricating a semiconductor device having an extended stress liner: The techniques and technologies described herein relate to the automatic creation of photoresist masks for stress liners used with semiconductor based transistor devices. The stress liner masks are generated with automated design tools that leverage layout data corresponding to features, devices, and structures on the wafer. A resulting stress liner... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20090081838 - Semiconductor memory and fabrication method for the same: A semiconductor memory includes memory cell transistors including a tunnel insulating film, a floating gate electrode, a first insulating film, a control gate electrode, and a first metal salicide film; low-voltage transistors having a first p-type source region and a first p-type drain region, a first gate insulating film, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090081839 - High speed ge channel heterostructures for field effect devices: A method and a layered heterostructure for forming high mobility Ge channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate, and a channel structure of a compressively strained epitaxial Ge layer having a higher barrier or a deeper confining quantum well and having... Agent: Scully, Scott, Murphy & Presser, P.C.

20090081840 - Method of forming field effect transistors using diluted hydrofluoric acid to remove sacrificial nitride spacers: Methods of forming integrated circuit devices include forming a field effect transistor having a gate electrode, sacrificial nitride spacers on opposing sidewalls of the gate electrode and source/drain regions, which are self-aligned to the sacrificial nitride spacers, on a semiconductor substrate. The sacrificial nitride spacers are selectively removed using a... Agent: Myers Bigel Sibley & Sajovec

20090081841 - Non-volatile memory device and manufacturing method thereof: A non-volatile memory device having a Polysilicon Oxide Nitride Oxide Semiconductor (SONOS) structure in which a charge trap layer is separated physically in a horizontal direction, and a method of manufacturing the same. The charge trap layer that traps electric charges toward the source and the drain is physically divided.... Agent: Marshall, Gerstein & Borun LLP

20090081842 - Process for atomic layer deposition: The present invention relates to a process of making thin film electronic components and devices, such as thin film transistors, environmental barrier layers, capacitors, insulators and bus lines, where most or all of the layers are made by an atmospheric atomic layer deposition process.... Agent: Eastman Kodak Company Patent Legal Staff

20090081843 - Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same: A gate insulating film (13) and a gate electrode (14) of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate (10). Using the gate electrode (14) as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090081845 - Manufacturing method of substrate provided with semiconductor films: A plurality of rectangular single crystal semiconductor substrates are prepared. Each of the single crystal semiconductor substrates is doped with hydrogen ions and a damaged region is formed at a desired depth, and a bonding layer is formed on a surface thereof. The plurality of single crystal substrates with the... Agent: Eric Robinson

20090081844 - Method for manufacturing semiconductor substrate and semiconductor device: A plurality of single crystal semiconductor substrates are arranged and then the plurality of single crystal semiconductor substrates which have been arranged are overlapped with a base substrate, so that the base substrate and the plurality of single crystal semiconductor substrates are bonded to each other. Then, each of the... Agent: Eric Robinson

20090081846 - Method of fabricating semiconductor memory device: A method of fabricating a semiconductor device includes applying a coating oxide film to a surface of a substrate including a semiconductor substrate so that a recess formed in the surface is filled with the coating oxide film, applying a steam oxidation treatment to the substrate at a first temperature,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090081847 - Method of manufacturing nonvolatile semiconductor memory device: A method of manufacturing a nonvolatile semiconductor memory device comprising: forming a trench in a silicon substrate; forming a silicon dioxide film along an internal surface of the trench of the silicon substrate; removing the silicon dioxide film formed on a bottom surface of the trench of the silicon substrate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090081848 - Wafer bonding activated by ion implantation: A method for wafer bonding two substrates activated by ion implantation is disclosed. An in situ ion bonding chamber allows ion activation and bonding to occur within an existing process tool utilized in a manufacturing process line. Ion activation of at least one of the substrates is performed at low... Agent: Varian Semiconductor Equipment Assc., Inc.

20090081849 - Method for manufacturing semiconductor wafer: To provide a method for manufacturing an SOI substrate having a single crystal semiconductor layer having a small and uniform thickness over an insulating film. Further, time of adding hydrogen ions is reduced and time of manufacture per SOI substrate is reduced. A bond layer is formed over a surface... Agent: Eric Robinson

20090081850 - Method for manufacturing soi substrate: The method includes steps of adding first ions to a predetermined depth from a main surface of a semiconductor substrate by irradiation of the semiconductor substrate with a planar, linear, or rectangular ion beam, so that a separation layer is formed; adding second ions to part of the separation layer... Agent: Eric Robinson

20090081851 - Laser processing method: In a state where a protective tape 22 is attached to the front face 16a of a multilayer part 16, a substrate 4 is irradiated with laser light L while using its rear face 4b as a laser light entrance surface, so as to form a modified region 7 within... Agent: Drinker Biddle & Reath (dc)

20090081852 - Holding jig, semiconductor wafer grinding method, semiconductor wafer protecting structure and semiconductor wafer grinding method and semiconductor chip fabrication method using the structure: A backgrinding machine 10 of a semiconductor wafer W includes: a table 13 set on the working plane of a mount 11; a multiple number of holding jigs 20 arranged via check tables 15 on table 13; a grinding machine 30 for performing a grinding process of the rear side... Agent: Buchanan, Ingersoll & Rooney PC

20090081854 - Method of forming nanowire and method of manufacturing semiconductor device comprising the nanowire: A method of forming a nanowire and a semiconductor device comprising the nanowire are provided. The method of forming a nanowire includes forming a patterned SiyGe1-y layer (where, y is a real number that satisfies 0≦y<1) on a base layer, and forming a first oxide layer and at least one... Agent: Harness, Dickey & Pierce, P.L.C

20090081853 - Process for depositing layers containing silicon and germanium: The invention relates to a method for depositing at least one semiconductor layer on at least one substrate in a processing chamber (2). Said semiconductor layer is composed of several components which are evaporated by non-continuously injecting a liquid starting material (3) or a starting material (3) dissolved in a... Agent: Sonnenschein Nath & Rosenthal LLP

20090081855 - Fabrication method of polysilicon layer: A fabrication method of a polysilicon layer is provided. First, a substrate is provided. Then, an amorphous silicon layer is formed on the substrate. After that, a patterned photomask having a light transmitting area and a light shielding area is provided, and the amorphous silicon layer is irradiated with a... Agent: Jianq Chyun Intellectual Property Office

20090081856 - Single crystal silicon wafer for insulated gate bipolar transistors and process for producing the same: A single crystal silicon wafer for use in the production of insulated gate bipolar transistors is made of single crystal silicon grown by the Czochralski method and has a gate oxide with a film thickness of from 50 to 150 nm. The wafer has an interstitial oxygen concentration of at... Agent: Kolisch Hartwell, P.C.

20090081857 - Non-polar and semi-polar gan substrates, devices, and methods for making them: Non-polar or semi-polar (Al, Ga, In)N substrates are fabricated by re-growth of (Al, Ga, In)N crystal on (Al, Ga, In)N seed crystals, wherein the size of the seed crystal expands or is increased in the lateral and vertical directions, resulting in larger sizes of non-polar and semi-polar substrates useful for... Agent: The Eclipse Group LLP

20090081858 - Sputtering-less ultra-low energy ion implantation: Methods of implanting dopants into a silicon substrate using a predeposited sacrificial material layer with a defined thickness that is removed by sputtering effect is provided.... Agent: Whyte Hirschboeck Dudek S.c. Intellectual Property Department

20090081859 - Metallization process: A metallization process is provided. The metallization process comprises the following steps. First, a semiconductor base having at least a silicon-containing conductive region is provided. Afterwards, nitrogen ions are implanted into the silicon-containing conductive region. Next, a first thermal process is performed on the semiconductor base for repairing the surface... Agent: Bacon & Thomas, PLLC

20090081860 - Method of forming transistor devices with different threshold voltages using halo implant shadowing: The halo implant technique described herein employs a halo implant mask that creates a halo implant shadowing effect during halo dopant bombardment. A first transistor device structure and a second transistor device structure are formed on a wafer such that they are orthogonally oriented to each other. A common halo... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20090081861 - Manufacturing method of solder ball disposing surface structure of package substrate: A manufacturing method of a solder ball disposing surface structure on a core board including: providing a core board with a first metal layer and an opposing metal bump-equipped second metal layer; forming resists on the first and second metal layers respectively; forming third, fourth and fifth openings in the... Agent: Fulbright And Jaworski LLP

20090081862 - Air gap structure design for advanced integrated circuit technology: A method for forming air gaps between interconnect structures in semiconductor devices provides a sacrificial layer formed over a dielectric and within openings formed therein. The sacrificial layer is a blanket layer that is converted to a material that is consumable in an etchant composition that the dielectric material and... Agent: Duane Morris LLP (tsmc)IPDepartment

20090081863 - Method of forming metal wiring layer of semiconductor device: A method of forming a metal wiring layer of a semiconductor device produces metal wiring that is free of defects. The method includes forming an insulating layer pattern defining a recess on a substrate, forming a conformal first barrier metal layer on the insulating layer pattern, and forming a second... Agent: Volentine & Whitt PLLC

20090081864 - Sic film for semiconductor processing: A silicon carbide (SiC) film for use in backend processing of integrated circuit manufacturing, is generated by including hydrogen in the reaction gas mixture. This SiC containing film is suitable for integration into etch stop layers, dielectric cap layers and hard mask layers in interconnects of integrated circuits.... Agent: Texas Instruments Incorporated

20090081865 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes the steps of: (a) forming a first insulating film having moisture absorbency on a substrate; (b) forming a dummy contact hole and a contact hole in the first insulating film; (c) heat-treating the substrate, thereby removing water contained in the first insulating... Agent: Mcdermott Will & Emery LLP

20090081866 - Vapor deposition of tungsten materials: Embodiments of the invention provide an improved process for depositing tungsten-containing materials. The process utilizes soak processes and vapor deposition processes to provide tungsten films having significantly improved surface uniformity while increasing the production level throughput. In one embodiment, a method is provided which includes depositing a tungsten silicide layer... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090081867 - Method of manufacturing substrate: The present disclosure relates to a method of manufacturing a substrate. The method includes: (a) forming through holes by applying an anisotropic etching to a silicon substrate from a first surface of the silicon substrate; (b) forming a first insulating film to cover the first surface of the silicon substrate,... Agent: Drinker Biddle & Reath (dc)

20090081868 - Vapor deposition processes for tantalum carbide nitride materials: Embodiments of the invention generally provide methods for depositing and compositions of tantalum carbide nitride materials. The methods include deposition processes that form predetermined compositions of the tantalum carbide nitride material by controlling the deposition temperature and the flow rate of a nitrogen-containing gas during a vapor deposition process, including... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090081869 - Process for producing silicon compound: A process for producing a silicon compound can minimize the number of steps and can form a desired compound in a low-temperature environment. The process comprises: allowing a radical of a halogen gas to act on a member 11 to be etched, which is disposed within a chamber 1 and... Agent: Birch Stewart Kolasch & Birch

20090081870 - Method of forming a semiconductor device featuring copper wiring layers of different widths having metal capping layers of different thicknesses formed thereon: In a semiconductor device, an insulating interlayer is provided above a semiconductor substrate, and a plurality of first wiring layers and a plurality of second wiring layers are formed in the insulating interlayer. The first wiring layers are substantially composed of copper, and are arranged in parallel at a large... Agent: Young & Thompson

20090081871 - Polishing composition and method utilizing abrasive particles treated with an aminosilane: The inventive method comprises chemically-mechanically polishing a substrate with an inventive polishing composition comprising a liquid carrier, a cationic polymer, an acid, and abrasive particles that have been treated with an aminosilane compound.... Agent: Steven Weseman Associate General Counsel, I.p.

20090081872 - Plasma etching method for etching sample: The invention provides an etching method having selectivity of a high-K material such as Al2O3 to polysilicon or hard mask. The present invention provides a method for manufacturing a semiconductor device by etching, using a plasma etching apparatus, a sample including an interlayer insulating layer 14 formed of a high-K... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090081873 - Methods of patterning insulating layers using etching techniques that compensate for etch rate variations: Methods of forming integrated circuit devices include forming an integrated circuit substrate having an electrically insulating layer thereon and forming a mask layer pattern having at least first and second openings of different size therein, on the electrically insulating layer. First and second portions of the electrically insulating layer extending... Agent: Myers Bigel Sibley & Sajovec

20090081875 - Chemical removal of oxide layer from chip pads: Methods are provided for removing an oxide layer from a metal pad on an integrated circuit in order to reduce contact resistance. In one embodiment, aluminum oxide, on the surface of a bond pad substantially comprised of aluminum, is reacted with a first chemical agent to form an inorganic salt,... Agent: Raymond J. Werner

20090081874 - Method for extending equipment uptime in ion implantation: The invention features in-situ cleaning process for an ion source and associated extraction electrodes and similar components of the ion-beam producing system, which chemically removes carbon deposits, increasing service lifetime and performance, without the need to disassemble the system. In particular, an aspect of the invention is directed to an... Agent: Katten Muchin Rosenman LLP (c/o Patent Administrator)

20090081876 - Method of preventing etch profile bending and bowing in high aspect ratio openings by treating a polymer formed on the opening sidewalls: High aspect ratio contact openings are etched while preventing bowing or bending of the etch profile by forming a highly conductive thin film on the side wall of each contact opening. The conductivity of the thin film on the side wall is enhanced by ion bombardment carried out periodically during... Agent: Law Office Of Robert M. Wallace

20090081877 - Method of controlling striations and cd loss in contact oxide etch: A method for controlling striations and CD loss in a plasma etching method is disclosed. During the etching process, the substrate of semiconductor material to be etched is exposed first to plasma under a low power strike and subsequently to a conventional high power strike. CD loss has been found... Agent: Dickstein Shapiro LLP

20090081878 - Temperature control modules for showerhead electrode assemblies for plasma processing apparatuses: A temperature control module for a showerhead electrode assembly for a semiconductor material plasma processing chamber includes a heater plate adapted to be secured to a top surface of a top electrode of the showerhead electrode assembly, and which supplies heat to the top electrode to control the temperature of... Agent: Buchanan, Ingersoll & Rooney PC

20090081879 - Method for manufacturing semiconductor device: There is provided a method for manufacturing a semiconductor device including processing a substrate to be processed by using an amorphous carbon hard mask that includes processing an amorphous carbon film formed on the substrate to be processed to provide a hard mask, and forming a protective film comprising a... Agent: Young & Thompson

20090081880 - Method for manufacturing semiconductor device: The present invention provides a method for manufacturing a semiconductor device includes: a immersion process of immersing, in a fluoronitric acid solution, a lamination substrate, in which an SiC substrate formed of a silicon carbide (SiC) single crystal is applied to a silicon substrate or a quarts substrate with a... Agent: Rabin & Berdo, PC

20090081881 - Substrate processing apparatus and substrate processing method for performing etching process with phosphoric acid solution: An additive containing a hexafluorosilicic acid solution (H2SiF6+H2O) is sequentially inputted into a phosphoric acid solution pooled in an immersion bath from an additive input mechanism. Further, a trap agent containing a fluoroboric acid solution (HBF4+H2O) is inputted into the phosphoric acid solution from a trap agent input mechanism. F−... Agent: Ostrolenk Faber Gerb & Soffen

20090081882 - Method for manufacturing semiconductor device and method for designing photomask pattern: A method for designing a photomask pattern is provided. First, all line ends of object patterns are determined with reference to layout data. Then, object patterns, front edge portions, and joints, which are aligned on the same line extending along the Y-axis, are connected to form first reticle data. Reticle... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090081883 - Process for depositing organic materials: A process of making an organic thin film on a substrate by atomic layer deposition is disclosed, the process comprising simultaneously directing a series of gas flows along substantially parallel elongated channels, and wherein the series of gas flows comprises, in order, at least a first reactive gaseous material, an... Agent: Andrew J. Anderson Patent Legal Staff

20090081884 - Method of improving oxide growth rate of selective oxidation processes: A method for selective oxidation of silicon containing materials in a semiconductor device is disclosed and claimed. In one aspect, a rapid thermal processing apparatus is used to selectively oxidize a substrate by in-situ steam generation at high pressure in a hydrogen rich atmosphere. Other materials, such as metals and... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090081885 - Deposition system for thin film formation: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at... Agent: Andrew J. Anderson Patent Legal Staff

20090081886 - System for thin film deposition utilizing compensating forces: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at... Agent: Andrew J. Anderson Patent Legal Staff

20090081887 - Heat treatment method and heat treatment apparatus: The number of substrates held by a substrate holder is increased compared with conventional techniques while uniformity of a heat treatment is ensured. The substrate holder holds a plurality of substrates at predetermined vertical intervals. The substrate holder is carried into a heat treating furnace. A predetermined heat treatment is... Agent: Smith, Gambrell & Russell

20090075401 - Method for manufacturing ferroelectric capacitor and method for manufacturing ferroelectric memory device: A method for manufacturing a ferroelectric capacitor having a ferroelectric film interposed between a first electrode and a second electrode is provided. The method includes the steps of: forming an electrode film above a substrate; thermally oxidizing a surface layer of the electrode film to form an oxidized electrode layer... Agent: Harness, Dickey & Pierce, P.L.C

20090075400 - Method for manufacturing ferroelectric memory: A method for manufacturing a ferroelectric memory includes the steps of: forming an iridium film above a substrate; forming an iridium oxide layer on the iridium film; changing the iridium oxide layer into an amorphous iridium layer; oxidizing the amorphous iridium layer to form an iridium oxide portion; forming a... Agent: Harness, Dickey & Pierce, P.L.C

20090075399 - Method for manufacturing ferroelectric memory device: A method for manufacturing a ferroelectric memory device includes the steps of: forming a ferroelectric capacitor on a substrate; forming a hydrogen barrier film that covers the ferroelectric capacitor; forming a dielectric film that covers the hydrogen barrier film; and forming a through hole that penetrates the dielectric film and... Agent: Harness, Dickey & Pierce, P.L.C

20090075402 - Manipulation of focused heating source based on in situ optical measurements: A method, system or the like which may, for example, be exploited as part of known methods, systems and/or apparatii which manipulate (i.e. tune, modify, change, create, etc.) the impedance of (integrated) semiconductor components or devices by exploiting a focused heating source. The method, system or the like exploits in... Agent: Ronald S. Kosie Bcf LLP

20090075403 - Method and apparatus for chemical monitoring: The present invention relates to monitoring chemicals in a process chamber using a spectrometer having a plasma generator, based on patterns over time of chemical consumption. The relevant patterns may include a change in consumption, reaching a consumption plateau, absence of consumption, or presence of consumption. In some embodiments, advancing... Agent: Haynes Beffel & Wolfeld LLP

20090075404 - Ball film for integrated circuit fabrication and testing: According to one embodiment of the invention, a method of testing ball grid array packages includes providing a substrate, providing a ball film that includes a plurality of metal balls movably contained within respective slots of a thin film, coupling the metal balls to the substrate, and removing the thin... Agent: Texas Instruments Incorporated

20090075405 - Imaging apparatus, radiation imaging apparatus, and manufacturing methods therefor: An imaging apparatus is provided in which a plurality of pixels, each having a conversion element and a thin-film transistor, are arranged in a two-dimensional fashion on an insulating substrate; the photoelectric conversion element is arranged over the thin-film transistor, with an insulating film, which serves as an interlayer insulating... Agent: Fitzpatrick Cella Harper & Scinto

20090075406 - Integration manufacturing process for mems device: A method for manufacturing an MEMS device is provided. The method includes steps of a) providing a first substrate having a concavity located thereon, b) providing a second substrate having a connecting area and an actuating area respectively located thereon, c) forming plural microstructures in the actuating area, d) mounting... Agent: Volpe And Koenig, P.C.

20090075407 - Electronic device and method for producing the same: A microelectronic device and a method for producing the device can overcome the disadvantages of known electronic devices composed of carbon molecules, and can deliver performance superior to the known devices. An insulated-gate field-effect transistor includes a multi-walled carbon nanotube (10) having an outer semiconductive carbon nanotube layer (1) and... Agent: Wolf Greenfield & Sacks, P.C.

20090075409 - Fabrication apparatus and fabrication method of semiconductor device produced by heating substrate: A fabrication apparatus and fabrication method of a semiconductor device are provided, allowing the temperature distribution of a substrate to be rendered uniform. The fabrication apparatus for a semiconductor device includes a susceptor holding the substrate, a heater arranged at a back side of the susceptor, a support member located... Agent: Drinker Biddle & Reath (dc)

20090075410 - Light sensor located above an integrated circuit: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20090075408 - Method for manufacturing soi substrate and method for manufacturing semiconductor device: A nitrogen-containing layer is formed over a semiconductor substrate; ions are added at a predetermined depth in the semiconductor substrate through the nitrogen-containing layer to form a separation layer; an insulating layer is formed over the nitrogen-containing layer; a surface of the insulating layer and a surface of a base... Agent: Eric Robinson

20090075411 - Manufacturing apparatus: A manufacturing apparatus is provided, which can improve a utilization efficiency of an evaporation material, reduce manufacturing costs of a light emitting device having an organic light emitting element, and shorten manufacturing time necessary to manufacture a light emitting device. According to the present invention, a multi-chamber manufacturing apparatus having... Agent: Nixon Peabody, LLP

20090075412 - Vertical group iii-nitride light emitting device and method for manufacturing the same: A vertical group III-nitride light emitting device and a manufacturing method thereof are provided. The light emitting device comprises: a conductive substrate; a p-type clad layer stacked on the conductive substrate; an active layer stacked on the p-type clad layer; an n-doped AlxGayIn1-x-yN layer stacked on the active layer; an... Agent: Mcdermott Will & Emery LLP

20090075413 - Nitride semiconductor light emitting device, method of manufacturing nitride semiconductor light emitting device, and nitride semiconductor transistor device: Provided are a nitride semiconductor light emitting device including a coat film formed at a light emitting portion and including an aluminum nitride crystal or an aluminum oxynitride crystal, and a method of manufacturing the nitride semiconductor light emitting device. Also provided is a nitride semiconductor transistor device including a... Agent: Harness, Dickey & Pierce, P.L.C

20090075414 - Biochip and method of fabrication: A method of fabricating a biochip and a biochip fabricated by the method are provided. The method can include providing a substrate including a plurality of first areas separated from each other by a second area, forming a plurality of activation patterns on each of the first areas, coupling a... Agent: Marger Johnson & Mccollom, P.C.

20090075415 - Method for manufacturing semiconductor device: The present invention provides a method for manufacturing a semiconductor device which has an integrated circuit provided on a semiconductor substrate and a movable part which is movable relative to the substrate. This manufacturing method includes: a step of covering the movable part with a sacrificial film; a step of... Agent: Rabin & Berdo, PC

20090075416 - Semiconductor imaging device and fabrication process thereof: A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090075418 - Solid-state imaging device and method for manufacturing thereof as well as driving method of solid-state imaging device: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving... Agent: Sonnenschein Nath & Rosenthal LLP

20090075417 - Solid-state imaging device and method for producing the same: In the solid-state imaging device of the present invention having a photoelectric conversion section and a charge transfer section equipped with a charge transfer electrode for transferring an electric charge generated in the photoelectric conversion section, the charge transfer electrode has an alternate arrangement of a first layer electrode comprising... Agent: Birch Stewart Kolasch & Birch

20090075419 - Solid-state imaging device and manufacturing method for the same: A solid-state imaging device includes a semiconductor substrate including: a plurality of light-receptive portions that are arranged one-dimensionally or two-dimensionally; a vertical transfer portion that transfers signal electric charge read out from the light-receptive portions in a vertical direction; a horizontal transfer portion that transfers the signal electric charge transferred... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090075420 - Method of forming chalcogenide layer including te and method of fabricating phase-change memory device: The method of forming a Te-containing chalcogenide layer includes radicalizing a first source that contains Te to form a radicalized Te source, and forming a Te-containing chalcogenide layer by supplying the radicalized Te source into a reaction chamber. A method fabricating a phase change memory device includes loading a substrate... Agent: Volentine & Whitt PLLC

20090075421 - Wet etching of zinc tin oxide thin films: A method of wet etching semiconductor zinc tin oxide includes submerging a semiconductor zinc tin oxide film in a bath solution. The film is partially covered with a pattern of protective material, and the bath solution etches semiconductor zinc tin oxide film not covered by the protective material. A system... Agent: Hewlett Packard Company

20090075422 - Method of manufacturing semiconductor device: An internal connecting terminal 12 is formed on electrode pads 23 of a plurality of semiconductor chips 11 formed on a semiconductor substrate 35, and there is formed a resin member 13 having a resin member body 13-1 and a protruded portion 13-2 and covering the semiconductor chips 11 on... Agent: Rankin, Hill & Clark LLP

20090075423 - Method of bonding chips on a strained substrate and method of placing under strain a semiconductor reading circuit:

20090075424 - Process for making microelectronic element chips: Apparatus including a chip substrate having a first chip surface facing away from a second chip surface; an array of microelectronic elements on the first chip surface; and an array of conductors each in communication with one of the microelectronic elements, the conductors passing through the chip substrate and fully... Agent: Jay M. Brown

20090075425 - Manufacturing method of semiconductor device: The adhesive property of the mold resin exposed to the ball face side of a semiconductor package and under-filling resin is improved, and the manufacturing method of the semiconductor device which can prevent peeling at both interface is obtained. The sputtering step which does sputtering of the ball face side... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090075426 - Method for fabricating multi-chip stacked package: A multi-chips stacked package method which includes providing a lead frame includes a top surface and a reverse surface formed by a plurality of inner leads and a plurality of outer leads; fixing a first chip on the reverse surface of the lead frame and the active surface of the... Agent: Sinorica, LLC

20090075427 - Method of manufacturing a semiconductor device: The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural leads having respective to-be-connected surfaces exposed to outer... Agent: Miles & Stockbridge PC

20090075428 - Electromagnetic shield formation for integrated circuit die package: Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is... Agent: Freescale Semiconductor, Inc. Law Department

20090075429 - Sheet-like underfill material and semiconductor device manufacturing method: A sheet-like underfill material includes a base and adhesive layer provided peelably on the base for use in a flip chip mounting process in the manufacture of a semiconductor device. The process includes laminating a sheet-like underfill material onto a circuit face of a semiconductor wafer having bumps on its... Agent: The Webb Law Firm, P.C.

20090075430 - Thermal intermediate apparatus, systems, and methods: Apparatus and system, as well as fabrication methods therefor, may include a thermal intermediate structure comprised of a plurality of carbon nanotubes some of which have organic moieties attached thereto to tether the nanotubes to at least one of a die and a heat sink. The organic moieties include thiol... Agent: Schwegman, Lundberg & Woessner/intel

20090075431 - Wafer level package with cavities for active devices: According to one exemplary embodiment, a method for forming a wafer level package includes fabricating an active device on a substrate in a semiconductor wafer, forming polymer walls around the active device, and applying a blanket film over the semiconductor wafer and the polymer walls to house the active device... Agent: Lowrie, Lando & Anastasi, LLP S2059

20090075432 - Semiconductor memory device: In a multiport SRAM memory cell of the present invention, an access transistor of a first port is disposed in a p-type well, and an access transistor of a second port is disposed in a p-type well. The gates of all of transistors disposed in a memory cell extend in... Agent: Mcdermott Will & Emery LLP

20090075433 - Manufacturing method of semiconductor device: A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090075434 - Method of removing defects from a dielectric material in a semiconductor: A method of forming a semiconductor device includes forming a high dielectric constant material over a semiconductor substrate, forming a conductive material over the high dielectric constant material, and performing an anneal in a non-oxidizing ambient using ultraviolet radiation to remove defects in the high dielectric constant material. Examples of... Agent: Freescale Semiconductor, Inc. Law Department

20090075435 - Jfet with built in back gate in either soi or bulk silicon: A process for manufacturing a Junction Field-Effect Transistor, comprises doping a semiconductor material formed on an insulating substrate with impurities of a first conductivity type to form a well region. The process continues by implanting impurities of a second conductivity type into said well region to form a channel region,... Agent: Baker Botts L.L.P.

20090075436 - Method of manufacturing a thin-film transistor: A method of manufacturing a thin-film transistor (TFT) includes forming an amorphous silicon layer on a substrate, crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a laser beam, and selectively etching a protrusion formed at a grain boundary in the polycrystalline silicon layer using a hydroxide etchant.... Agent: F. Chau & Associates, LLC

20090075437 - Thin film transistor manufacturing method and substrate structure: A method of TFT (Thin Film Transistor) manufacturing and a substrate structure are provided. The structure includes a substrate and a self-alignment mask. A self-alignment mask on a substrate is first manufactured and then the self-alignment mask may synchronously extend with the substrate during the thermal process. When an exposure... Agent: Rabin & Berdo, PC

20090075438 - Method of fabricating organic light emitting diode display device: In a method of fabricating organic light emitting diode display, a planarization layer is annealed, cured, provided with an ashing treatment, and surface-treated to reduce roughness of the planarization layer. Therefore, it is possible to improve reduce problems such as a decrease in reflectivity and variation of color coordinates of... Agent: Stein, Mcewen & Bui, LLP

20090075439 - Microelectronic structure by selective deposition: A finFET structure includes a semiconductor fin located over a substrate. A gate electrode is located traversing the semiconductor fin. The gate electrode has a spacer layer located adjoining a sidewall thereof. The spacer layer does not cover completely a sidewall of the semiconductor fin. The gate electrode and the... Agent: Scully, Scott, Murphy & Presser, P.C.

20090075440 - Display and manufacturing method thereof: A display includes a substrate, a control electrode formed on the substrate, input and output electrodes formed on the substrate having facing sides facing each other with respect to the control electrode, a semiconductor layer contacting the input and the output electrodes, and an insulating layer formed between the control... Agent: Cantor Colburn, LLP

20090075441 - Method of removing a spacer, method of manufacturing a metal-oxide-semiconductor transistor device, and metal-oxide-semiconductor transistor device: A method of removing a spacer, a method of manufacturing a metal-oxide-semiconductor transistor device, and a metal-oxide-semiconductor transistor device, in which, before the spacer is removed, a protective layer is deposited on a spacer and on a material layer (such as a salicide layer) formed on the source/drain region and... Agent: North America Intellectual Property Corporation

20090075442 - Metal stress memorization technology: A semiconductor device and method for manufacturing a tensile strained NMOS and a compressive strained PMOS transistor pair, wherein a stressor material is sacrificial is disclosed. The method provides for a substrate, which includes a source/drain for an NMOS transistor, and a PMOS transistor. A first barrier layer is formed... Agent: Slater & Matsil, L.L.P.

20090075443 - Method of fabricating flash memory: A method of fabricating a flash memory includes providing a substrate with a mask layer thereon, forming pluralities of shallow trenches in the substrate, forming a first oxide layer on the substrate and in the shallow trenches, removing a portion of the first oxide layer above the mask layer, forming... Agent: North America Intellectual Property Corporation

20090075444 - Method of forming semiconductor device having three-dimensional channel structure: A method of forming a semiconductor device is provided. A hollowed portion is formed over an active region of a semiconductor substrate. The bottom of the hollowed portion is lowered in level than the surface of an isolation region of the substrate. A first mask is formed in the hollowed... Agent: Mcginn Intellectual Property Law Group, PLLC

20090075445 - Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress: A transistor may be formed of different layers of silicon germanium, a lowest layer having a graded germanium concentration and upper layers having constant germanium concentrations such that the lowest layer is of the form Si1-xGex. The highest layer may be of the form Si1-yGey on the PMOS side. A... Agent: Trop, Pruner & Hu, P.C.

20090075446 - Method of fabricating a heterojunction bipolar transistor: The invention provides a method for fabricating a heterojunction bipolar transistor with a base connecting region (23), which is formed self-aligned to a base region (7) without applying photolithographic techniques. Further, a collector connecting region (31) and an emitter region (29) are formed simultaneously and self-aligned to the base connecting... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090075447 - Method and fabricating a mono-crystalline emitter: Fabrication of a mono-crystalline emitter using a combination of selective and differential growth modes. The steps include providing a trench (14) formed on a silicon substrate (16) having opposed silicon oxide side walls (12); selectively growing a highly doped mono-crystalline layer (18) on the silicon substrate in the trench; and... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090075448 - Method of forming inside rough and outside smooth hsg electrodes and capacitor structure: A container capacitor and method of forming the container capacitor are provided. The container capacitor comprises a lower electrode fabricated by forming a layer of doped polysilicon within a container in an insulative layer disposed on a substrate; forming a barrier layer over the polysilicon layer within the container; removing... Agent: Whyte Hirschboeck Dudek S.c. Intellectual Property Department

20090075449 - Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor: The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The integrated high voltage capacitor, among other features, includes a first capacitor plate (120) located over or in a semiconductor substrate (105), and an insulator (130) located over... Agent: Texas Instruments Incorporated

20090075450 - Method of manufacturing stack-type capacitor and semiconductor memory device having the stack-type capacitor: A stack-type capacitor includes a lower electrode, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, wherein the lower electrode includes a first metal layer having a cylindrical shape and a second metal layer filled in the first metal layer. In the... Agent: Lee & Morse, P.C.

20090075451 - Method for manufacturing semiconductor substrate: The present invention provides a method for manufacturing a semiconductor substrate in which a semiconductor wafer, formed of a material less likely to increase the hole diameter, is processed to a semiconductor substrate actually applicable to an existing manufacture line. An SiC wafer 12 is temporarily fixed to a Si... Agent: Rabin & Berdo, PC

20090075452 - Substrate provided with an alignment mark in a substantially transmissive process layer, mask for exposing said mark, device manufacturing method, and device manufactured thereby: A substrate provided with an alignment mark in a substantially transmissive process layer overlying the substrate, said mark comprising high reflectance areas for reflecting radiation of an alignment beam of radiation, and low reflectance areas for reflecting less radiation of the alignment beam, wherein the high reflectance areas comprise at... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20090075453 - Method of producing semiconductor substrate: There is provided a method for suppressing the occurrence of defects such as voids or blisters even in the laminated wafer having an oxide film of a thickness thinner than the conventional one, wherein hydrogen ions are implanted into a wafer for active layer having an oxide film of not... Agent: Sughrue Mion, PLLC

20090075454 - Method and high gapfill capability for semiconductor devices: A method of performing an STI gapfill process for semiconductor devices is provided. In a specific embodiment of the invention, the method includes forming an stop layer overlying a substrate. In addition, the method includes forming a trench within the substrate, with the trench having sidewalls, a bottom, and a... Agent: Townsend And Townsend And Crew, LLP

20090075455 - Growing n-polar iii-nitride structures: Methods of forming a stable N-polar III-nitride structure are described. A Ga-polar device can be formed on a substrate. A carrier wafer is attached to the Ga-polar surface. The substrate is removed from the assembly. The N-polar surface that remains is offcut and, optionally, subsequent layers are formed on the... Agent: Fish & Richardson P.C.

20090075456 - Method for manufacturing soi substrate and method for manufacturing semiconductor device: A highly reliable semiconductor device capable of high speed operation is manufactured over a flexible substrate at a high yield. A separation layer is formed over an insulating substrate by a sputtering method; the separation layer is flattened by a reverse sputtering method; an insulating film is formed over the... Agent: Eric Robinson

20090075457 - Manufacturing method of semiconductor apparatus: Alignment patterns are formed in scribe regions of a semiconductor substrate, and through grooves for exposing the scribe regions are disposed in an insulating layer formed on the semiconductor substrate. Formation positions of wiring patterns are aligned based on the alignment patterns, and a metal layer is patterned and the... Agent: Rankin, Hill & Clark LLP

20090075459 - Apparatus and method for picking-up semiconductor dies: A die pick-up apparatus and method using a die stage having an adherence surface, a suction window formed in the adherence surface and larger than a semiconductor die to be picked up, and a cover plate that slides along the adherence surface and opens and closes the suction window. When... Agent: Quinn Emanuel Koda & Androlia

20090075458 - Method of manufacturing device having adhesive film on back-side surface thereof: A method of manufacturing a device, including: an adhesive film attaching step of attaching an adhesive film to a back-side surface of a wafer in which devices are formed respectively in a plurality of regions demarcated by planned dividing lines formed in a grid pattern in a face-side surface of... Agent: Greer, Burns & Crain

20090075460 - Process for fabricating semiconductor device: A process for fabricating a semiconductor device comprising the steps of introducing into an amorphous silicon film, a metallic element which accelerates the crystallization of the amorphous silicon film; applying heat treatment to the amorphous silicon film to obtain a crystalline silicon film; irradiating a laser beam or an intense... Agent: Nixon Peabody, LLP

20090075461 - Method of processing semiconductor wafer: Formation and etching of an n type epitaxial layer and formation and etching of a p type epitaxial layer are alternately performed on the semiconductor substrate for at least three times to form all semiconductor layers, of the epitaxial layers. Thereby, impurity concentration profiles of the semiconductor layers can be... Agent: Morrison & Foerster LLP

20090075462 - Method of fabricating a semiconductor device: The invention relates to a method of fabricating an integrated circuit, including the steps of providing at least one layer; performing a first implantation step, wherein particles are implanted into the layer under a first direction of incidence; performing a second implantation step, wherein particles are implanted into the layer... Agent: Slater & Matsil, L.L.P.

20090075463 - Method of fabricating t-gate: A method of fabricating a T-gate is provided. The method includes the steps of: forming a photoresist layer on a substrate; patterning the photoresist layer formed on the substrate and forming a first opening; forming a first insulating layer on the photoresist layer and the substrate; removing the first insulating... Agent: Ladas & Parry LLP

20090075464 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090075465 - Methods of forming a conductive interconnect in a pixel of an imager and in other integrated circuitry: A method of forming conductive interconnects includes forming a node of a circuit component on a substrate. A conductive metal line is formed at a first metal routing level that is elevationally outward of the circuit component. Insulative material is deposited above the first metal routing level over the conductive... Agent: Wells St. John P.s.

20090075466 - Method of manufacturing a non-volatile memory device: A method of manufacturing a non-volatile semiconductor memory device includes forming a sub-gate without an additional mask. A low word-line resistance is formed by a metal silicide layer on a main gate of the memory device. In operation, application of a voltage to the sub-gate forms a transient state inversion... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090075467 - Method for manufacturing a flash memory device: A method for forming a semiconductor device includes providing a substrate and forming conductor patterns and openings on the substrate. Next the openings are filled with a mask layer and upper portions of the conductor patterns are etched to form cavities. Following, a portion of the mask layer is removed... Agent: Quintero Law Office, PC

20090075468 - System and process for producing nanowire composites and electronic substrates therefrom: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite... Agent: Nanosys Inc.

20090075469 - Thermo-compression bonded electrical interconnect structure and method: An electrical structure and method for forming electrical interconnects. The method includes positioning a sacrificial carrier substrate such that a first surface of a non-solder metallic core structure within the sacrificial carrier substrate is in contact with a first electrically conductive pad. The first surface is thermo-compression bonded to the... Agent: Schmeiser, Olsen & Watts

20090075470 - Method for manufacturing interconnect structures incorporating air-gap spacers: Methods for manufacturing air-gap (e.g., side wall air-gap) containing metal/insulator interconnect structures for Very Large Scale Integrated (VLSI) and Ultra Large Scale Integrated (ULSI) devices and packaging comprise forming the air-gap spacers by deviating from a conventional dual-damascene etch process in order to avoid damage to the dielectric, and instead... Agent: The Law Offices Of Robert J. Eichelburg

20090075471 - Method of manufacturing semiconductor memory device: A nonvolatile semiconductor memory device includes a semiconductor substrate, a first floating gate formed on a main surface of the semiconductor substrate, a second floating gate formed on the main surface of the semiconductor substrate, a first control gate formed on the first floating gate, a second control gate formed... Agent: Mcdermott Will & Emery LLP

20090075472 - Methods to mitigate plasma damage in organosilicate dielectrics: Methods of minimizing or eliminating plasma damage to low k and ultra low k organosilicate intermetal dielectric layers are provided. The reduction of the plasma damage is effected by interrupting the etch and strip process flow at a suitable point to add an inventive treatment which protects the intermetal dielectric... Agent: Scully, Scott, Murphy & Presser, P.C.

20090075473 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device capable of improving electrical junction capability between a pad metal line and an upper metal line by removing a foreign substance present on the surface of the pad metal line prior to formation of the upper metal line.... Agent: Sherr & Vaughn, PLLC

20090075474 - Methods for forming dual damascene wiring using porogen containing sacrificial via filler material: Methods for fabricating dual damascene interconnect structures are provided in which a sacrificial material containing porogen (a pore forming agent) is used for filling via holes in an interlayer dielectric layer such that the sacrificial material can be transformed to porous material that can be quickly and efficiently removed from... Agent: Frank Chau Esq_ F. Chau & Associates, LLC

20090075475 - Method of substrate treatment, process for producing semiconductor device, substrate treating apparatus, and recording medium: Substrate processing apparatus 100 includes supporting table 103 for not only supporting a target substrate W but also heating the target substrate W; processing chamber 101 having the supporting table disposed therein; and gas supply unit 102 for supplying a processing gas into the processing chamber 101. The processing gas... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090075476 - Manufacturing method of substrate having conductive layer and manufacturing method of semiconductor device: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on... Agent: Nixon Peabody, LLP

20090075477 - Method of manufacturing semiconductor device: According to an aspect of an embodiment, a method of manufacturing a semiconductor device has forming a silicon-containing layer over a semiconductor substrate, forming a metal layer over the semiconductor substrate and the silicon-containing layer, forming a silicide-containing layer over the semiconductor substrate and the silicon-containing layer by heat treatment... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090075478 - Semiconductor device,having a through electrode, semiconductor module employing thereof and method for manufacturing semiconductor device having a through electrode: The layout density of the through electrodes in the horizontal plane of the substrate is enhanced. Through holes 103 extending through the silicon substrate 101 is provided. An insulating film 105 is buried within the through hole 103. A plurality of columnar through plugs 107 are provided in the insulating... Agent: Young & Thompson

20090075479 - Method of manufacturing semiconductor device: A substrate having a copper wiring is prepared. An insulating film is formed on the copper wiring. The insulating film is etched with a gas containing fluorine to form an opening reaching the copper wiring. A plasma treatment is carried out on a surface of copper exposed at a bottom... Agent: Leydig Voit & Mayer, Ltd

20090075481 - Method of fabricating semiconductor substrate by use of heterogeneous substrate and recycling heterogeneous substrate during fabrication thereof: The invention discloses a method of fabricating a first substrate and a method of recycling a second substrate during fabrication of the first substrate. The second substrate is heterogeneous for the first substrate. First, the fabricating method according to the invention is to prepare the second substrate. Subsequently, the fabricating... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090075482 - Process for forming a pattern including on a semiconductor device: An objective of this invention is to prevent resist poisoning and sensitivity deterioration in a chemically amplified resist. The chemically amplified resist comprises a base resin, a photoacid generator and a salt exhibiting buffer effect in the base resin.... Agent: Young & Thompson

20090075480 - Silicon carbide doped oxide hardmask for single and dual damascene integration: Interconnects of integrated circuits (ICs) utilize low-k dielectrics, copper metal lines, dual damascene processing and amplified photoresist chemistry to build ICs with features smaller than 100 nm. Photolithographic processing of interconnects with these elements are subject to resist poisoning from nitrogen in etch stop and hard mask dielectric layers. Attempts... Agent: Texas Instruments Incorporated

20090075483 - Ultra lightweight photovoltaic device and method for its manufacture: An ultra lightweight semiconductor device such as a photovoltaic device is fabricated on a non-etchable barrier layer which is disposed upon an etchable substrate. The device is contacted with an appropriate etchant for a period of time sufficient to remove at least a portion of the thickness of the substrate.... Agent: Glifford, Krass, Sprinkle, Anderson & Citkowski, P.C.

20090075484 - Method of processing a substrate, spin unit for supplying processing materials to a substrate, and apparatus for processing a substrate having the same: In a spin unit for rotating a substrate and a method of processing the substrate, the substrate is secured on a support and is rotated on the support. Processing materials including drying gases, etching solutions and cleaning solutions are selectively supplied onto a bottom surface of the rotating substrate. The... Agent: Daly, Crowley, Mofford & Durkee, LLP

20090075485 - Method for forming pattern of semiconductor device: A method for forming a fine pattern of a semiconductor device comprises: forming a first hard mask film and an etch barrier film over a semiconductor substrate; forming a sacrificial pattern over the etch barrier film; forming a spacer on sidewalls of the sacrificial pattern; removing the sacrificial pattern; etching... Agent: Townsend And Townsend And Crew, LLP

20090075486 - Surface treatment solution for the fine surface processing of a glass substrate containing multiple ingredients: A surface treatment solution for finely processing a glass substrate containing multiple ingredients is used for the construction of liquid crystal-based or organic electroluminescence-based flat panel display devices without invoking crystal precipitation and/or increasing surface roughness. An etching solution of the invention contains, in addition to hydrofluoric acid (HF) and... Agent: Young & Thompson

20090075487 - Method of manufacturing semiconductor device: Disclosed is a method of manufacturing a semiconductor device, which includes forming an insulating film above a semiconductor substrate having a recess and stopper film formed above the semiconductor substrate excluding the recess, thereby filling the recess with the insulating film, performing a first polishing by polishing the insulating film... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090075488 - Beta-diketiminate ligand sources and metal-containing compounds thereof, and systems and methods including same: The present invention provides metal-containing compounds that include at least one β-diketiminate ligand, and methods of making and using the same. In certain embodiments, the metal-containing compounds include at least one β-diketiminate ligand with at least one fluorine-containing organic group as substituent. In other certain embodiments, the metal-containing compounds include... Agent: Mueting, Raasch & Gebhardt, P.A.

20090075490 - Method of forming silicon-containing films: A method of forming a silicon-containing film comprising providing a substrate in a reaction chamber, injecting into the reaction chamber at least one silicon-containing compound; injecting into the reaction chamber at least one co-reactant in the gaseous form; and reacting the substrate, silicon-containing compound, and co-reactant in the gaseous form... Agent: Air Liquide Intellectual Property

20090075489 - Reduction of etch-rate drift in hdp processes: A processing chamber is seasoned by providing a flow of season precursors to the processing chamber. A high-density plasma is formed from the season precursors by applying at least 7500 W of source power distributed with greater than 70% of the source power at a top of the processing chamber.... Agent: Townsend And Townsend And Crew LLP

20090075491 - Method for curing a dielectric film: A method of curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The method comprises exposing the low-k dielectric film to ultraviolet (UV) radiation. Following the UV exposure, the... Agent: Tokyo Electron U.s. Holdings, Inc.

20090068763 - Method for manufacturing semiconductor device and its manufacturing method: A method for manufacturing a semiconductor device includes the steps of: forming a ferroelectric capacitor having a first electrode, a ferroelectric film and a second electrode successively laminated on a base substrate; forming a first interlayer dielectric film that covers the ferroelectric capacitor and the base substrate; forming a material... Agent: Harness, Dickey & Pierce, P.L.C

20090068761 - Method of forming a micromagnetic device: A method of forming a micromagnetic device on a substrate including forming a first insulating layer above the substrate, a first seed layer above the first insulating layer, a first conductive winding layer above the first seed layer, and a second insulating layer above the first conductive winding layer. The... Agent: Slater & Matsil, L.L.P.

20090068762 - Methods of processing a substrate and forming a micromagnetic device: A method of processing a substrate with a conductive film formed thereover and method of forming a micromagnetic device. In one embodiment, the method of processing the substrate includes reducing a temperature of the substrate to a stress-compensating temperature, and maintaining the temperature of the substrate at the stress-compensating temperature... Agent: Slater & Matsil, L.L.P.

20090068764 - Semiconductor device and method of manufacturing the same: According to the present invention, contact plugs are formed by a CVD method without deteriorating the properties of the ferroelectric capacitor in a semiconductor device having a fine ferroelectric capacitor. Adhesive film is formed in a contact hole, which exposes an upper electrode of the ferroelectric capacitor after conducting heat... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090068765 - Method of manufacturing semiconductor device and apparatus for manufacturing semiconductor device: A method of manufacturing a semiconductor device includes performing positioning between a transfer position of a pattern forming surface of a transfer original plate on which a pattern to be transferred is formed and a transferred position of a transferred surface of a transferred substrate to which the pattern is... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090068766 - Optical element mounting method and optical element mounting device: An optical element mounting method includes: illuminating ultraviolet light onto a polymer optical waveguide device; under the ultraviolet light illumination, capturing, by an image pickup device, the polymer optical waveguide device including a light incident/exiting position of a waveguide core; and judging, from a difference between bright and dark in... Agent: Sughrue Mion, PLLC

20090068767 - Tuning via facet with minimal rie lag: A method for designing an etch recipe is provided. An etch is performed, comprising providing an etch gas with a set halogen to carbon ratio, forming a plasma from the etch gas, and etching trenches over via. Via faceting is measured. The halogen to carbon ratio is reset according to... Agent: Beyer Law Group LLP

20090068768 - Quantification of hydrophobic and hydrophilic properties of materials: A non-destructive and simple analytical method is provided which allows in situ monitoring of plasma damage during the plasma processing such as resist stripping. If a low-k film is damaged during plasma processing, one of the reaction products is water, which is remained adsorbed onto the low-k film (into pores),... Agent: Knobbe Martens Olson & Bear LLP

20090068769 - Method and apparatus for plasma processing: Predetermined gas is exhausted via an exhaust port 11 by a turbo-molecular pump 3 while introducing the gas within the vacuum chamber 1 from a gas supply device 2, and the pressure within the vacuum chamber 1 is kept at a predetermined value by a pressure regulating valve 4. A... Agent: Mcdermott Will & Emery LLP

20090068770 - Tactile surface inspection during device fabrication or assembly: Processes for inspecting a surface during device fabrication include contacting the surface with a tactile sensor. The tactile sensor is an electroluminescent tactile sensor array or a current electrode sensor array or a capacitive sensor array. The sensor is configured to convert local stress resulting from contact with the surface... Agent: Cantor Colburn LLP - IBM Fishkill

20090068771 - Electro chemical deposition systems and methods of manufacturing using the same: An electro chemical deposition system is described for forming a feature on a semiconductor wafer. The electro chemical deposition is performed by powering electrodes that includes a cathode, an anode and a plurality of electrically independent auxiliary electrodes.... Agent: Slater & Matsil LLP

20090068772 - Across reticle variation modeling and related reticle: Methods of modeling across reticle variations and a related reticle are disclosed. One embodiment of the method includes defining a test for determination across a multiple chip wafer; identifying a measurement structure for performing the test; implementing the measurement structure on the multiple chip wafer using a reticle including the... Agent: Hoffman Warnick LLC

20090068773 - Method for fabricating pixel structure of active matrix organic light-emitting diode: A method for fabricating an AMOLED pixel includes forming a transparent semiconductor layer on a substrate and forming a first channel layer of the switch TFT, a lower electrode of a storage capacitor and a second channel layer of a driving TFT. A first dielectric layer is formed over the... Agent: Jianq Chyun Intellectual Property Office

20090068774 - Led bonding structures and methods of fabricating led bonding structures: A method is disclosed for fabricating an LED The method includes providing an LED chip having an epitaxial region comprising at least a p-type layer and an n-type layer, an ohmic contact formed on at least one of the p-type layer or the n-type layer, and a bond pad formed... Agent: Summa, Additon & Ashe, P.A.

20090068775 - Method for fabricating micro-lens and micro-lens integrated optoelectronic devices using selective etch of compound semiconductor: Provided are a method of fabricating a microlens using selective etching of a compound semi-conductor and a method of fabricating a photoelectric device having the microlens. The formation of the microlens includes patterning a compound semiconductor layer and removing a lateral surface of the compound semiconductor layer to form a... Agent: Harness, Dickey & Pierce, P.L.C

20090068776 - Method for fabricating semiconductor substrate for optoelectronic components: Presented is a method for fabricating a semiconductor substrate. The method includes implanting impurity material into the semiconductor substrate, and forming a reflective layer-like zone in the semiconductor substrate that includes the impurity material.... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090068777 - Method for manufacturing pixel structure: A method for manufacturing a pixel structure is provided. First, a substrate with a gate formed thereon is provided. Next, a gate dielectric layer covering the gate is formed on the substrate. Then, a channel layer, a source and a drain are formed on the gate dielectric layer over the... Agent: Jianq Chyun Intellectual Property Office

20090068778 - Buried heterostructure device having integrated waveguide grating fabricated by single step mocvd: The device is an optoelectronic device or transparent waveguide device that comprises a growth surface, a growth mask, an optical waveguide core mesa and a cladding layer. The growth mask is located on the semiconductor surface and defines an elongate growth window having a periodic grating profile. The optical waveguide... Agent: Kathy Manke Avago Technologies Limited

20090068779 - Method for manufacturing nitride semiconductor device: There is provided a method for manufacturing a nitride semiconductor device which has a p-type nitride semiconductor layer having a high carrier concentration (low resistance) by activating an acceptor without raising a problem of forming nitrogen vacancies which are generated when a high temperature annealing is carried out over an... Agent: Rabin & Berdo, PC

20090068780 - Method of fabricating semiconductor optoelectronic device and recycling substrate during fabrication thereof: The invention discloses a method of fabricating a semiconductor optoelectronic device. First, a substrate is prepared. Subsequently, a buffer layer is deposited on the substrate. Then, a multi-layer structure is deposited on the buffer layer, wherein the multi-layer structure includes an active region. The buffer layer assists the epitaxial growth... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090068781 - Method of manufacture for microelectromechanical devices: A method of manufacturing a microelectromechanical device includes forming at least two conductive layers on a substrate. An isolation layer is formed between the two conductive layers. The conductive layers are electrically coupled together and then the isolation layer is removed to form a gap between the conductive layers. The... Agent: Knobbe, Martens, Olson & Bear, LLP

20090068782 - Nano-elastic memory device and method of manufacturing the same: A nano-elastic memory device and a method of manufacturing the same. The nano-elastic memory device may include a substrate, a plurality of lower electrodes arranged in parallel on the substrate, a support unit formed of an insulating material to a desired or predetermined thickness on the substrate having cavities that... Agent: Harness, Dickey & Pierce, P.L.C

20090068783 - Methods of emitter formation in solar cells: Embodiments of the invention contemplate high efficiency emitters in solar cells and novel methods for forming the same. One embodiment of the improved emitter structure, called a high-low type emitter, optimizes the solar cell performance by equally providing low contact resistance to minimize ohmic losses and isolation of the high... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090068785 - Manufacturing method of image sensor device: A manufacturing method of image sensor device is provided. The image sensor device is suitable for a substrate having at least one bonding pad. A plurality of photodiode sensing areas is formed on the substrate, at least a dielectric layer is formed over the substrate and the bonding pad is... Agent: J C Patents, Inc.

20090068784 - Method for manufacturing of the image sensor: Methods for manufacturing an image sensor are provided. A semiconductor substrate having a transistor can be prepared, and a proton layer can be formed in the substrate. A hydrogen gas layer can be formed by performing a heat treatment process on the semiconductor substrate, and a bottom portion of the... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090068786 - Fabricating method of image sensor: A method for fabricating an image sensor includes following steps. First, a substrate having semiconductor devices formed thereon is provided. Interlayer insulating films and Interlayer conductive films are formed on the substrate alternately, wherein the interlayer conductive films are electrically connected to the semiconductor devices. Next, isolated photo-diodes are formed... Agent: Jianq Chyun Intellectual Property Office

20090068787 - Solid state image pickup device and method for manufacturing the same: A method for manufacturing a solid state image pickup device in which a semiconductor substrate includes a pixel region where a plurality of pixels are arranged, each pixel including a signal charge accumulating portion and a transistor, and a pixel well of a first conductive type shared by the respective... Agent: Sonnenschein Nath & Rosenthal LLP

20090068788 - Method and device for producing electronic components: The invention relates to a method for producing electronic components in a vacuum. The aim of the invention is to create flexible electronic components that have an optimum action, are cost-effective, and easy to produce in a single working cycle. To this end, a carrier film (12) is partially and/or... Agent: K.f. Ross P.C.

20090068789 - Manufacturing process for a chip package structure: A manufacturing process for a chip package structure is provided. First, a patterned conductive layer and a patterned solder resist layer on the patterned conductive layer are provided. A plurality of chips are bonded onto the patterned conductive layer such that the chips and the patterned solder resist layer are... Agent: J C Patents, Inc.

20090068790 - Electrical interconnect formed by pulsed dispense: Methods for depositing interconnect material at a target for electrical interconnection include pulsed dispense of the material. In some embodiments droplets of interconnect material are deposited in a projectile fashion. In some embodiments the droplets are shaped by movement of the deposition tool following a deposition pulse and prior to... Agent: Haynes Beffel & Wolfeld LLP

20090068791 - Method for fabricating stacked semiconductor components: A semiconductor component includes a carrier and multiple semiconductor substrates stacked and interconnected on the carrier. The carrier includes conductive members bonded to corresponding conductive openings on the semiconductor substrates. The component can also include terminal contacts on the carrier in electrical communication with the conductive members, and an outer... Agent: Stephen A Gratton The Law Office Of Steve Gratton

20090068792 - Manufacturing process for a chip package structure: A manufacturing process for a chip package structure is provided. First, a patterned conductive layer having a plurality of first openings and a patterned solder resist layer on the patterned conductive layer are provided. A plurality of chips are bonded onto the patterned conductive layer such that the chips and... Agent: J C Patents, Inc.

20090068793 - Manufacturing process for a chip package structure: A manufacturing process for a chip package structure is provided. First, a patterned conductive layer having a plurality of first openings and a first patterned solder resist layer on the patterned conductive layer are provided. A second patterned solder resist layer is formed on the patterned conductive layer such that... Agent: J C Patents, Inc.

20090068794 - Manufacturing process for a quad flat non-leaded chip package structure: A manufacturing process for a Quad Flat Non-leaded (QFN) chip package structure is provided. First, a conductive layer having recesses and a patterned solder resist layer on the conductive layer are provided, wherein the patterned solder resist layer covers the recesses of the conductive layer. A part of the conductive... Agent: J C Patents, Inc.

20090068795 - Production methods of electronic devices: A method of producing an electronic device having mounted thereon a microelectromechanical system element. The method includes forming a micromachine component and electronic component for operation of the micromachine component on a substrate to form the system element, and bonding to the substrate a lid covering an active surface of... Agent: Staas & Halsey LLP

20090068796 - Semiconductor connection component: There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090068797 - Manufacturing process for a quad flat non-leaded chip package structure: A manufacturing process for a Quad Flat Non-leaded (QFN) chip package structure is provided. First, a conductive layer having a plurality of recesses and a patterned solder resist layer on the conductive layer are provided, wherein the patterned solder resist layer covers the recesses of the conductive layer. A plurality... Agent: J C Patents, Inc.

20090068798 - Imager die package and methods of packaging an imager die on a temporary carrier: Methods for fabricating an imager die package and resulting die packages are disclosed. An imager die packaging process may include dicing through a fabrication substrate comprising a plurality of imager die. Thereafter, known good die (KGD) qualified from the imager die are repopulated, face down on a high temperature-compatible temporary... Agent: Trask Britt, P.C./ Micron Technology

20090068799 - Manufacturing process for a quad flat non-leaded chip package structure: A manufacturing process for a Quad Flat Non-leaded (QFN) chip package structure is provided. First, a conductive layer having a plurality of recesses and a patterned solder resist layer on the conductive layer are provided, wherein the patterned solder resist layer covers the recesses of the conductive layer. A plurality... Agent: J C Patents, Inc.

20090068800 - Method and/or system for forming a thin film: Embodiments of methods, apparatuses, devices, and/or systems for forming a thin film are described.... Agent: Hewlett Packard Company

20090068801 - Method of manufacturing array substrate of liquid crystal display device: The embodiment of the invention discloses an exemplary method, in which a gate line, a gate electrode, and a pixel electrode are formed in a first step; a multilayer structure is formed on the gate line and the gate electrode in a second step; and a data line and source/drain... Agent: Ladas & Parry

20090068802 - Beam homogenizer and laser irradiation apparatus: The present invention provides a beam homogenizer for homogenizing energy distribution by making the distance between lenses small to shorten the optical path length with the use of an array lens of an optical path shortened type, and a laser irradiation apparatus using the beam homogenizer. The beam homogenizer is... Agent: Eric Robinson

20090068803 - Method for making an integrated circuit including vertical junction field effect transistors: A method for making an integrated circuit including vertical junction field effect transistors is disclosed. One embodiment creates a vertical junction field effect transistor using a fault-tolerant or alignment-tolerant production process. The device performance is not harmed, even if misalignments in consecutive semiconductor processing steps occur.... Agent: Dicke, Billig & Czaja

20090068804 - Drain extended pmos transistors and methods for making the same: Semiconductor devices (102) and drain extended PMOS transistors (CT1a) are provided, as well as fabrication methods (202) therefor, in which a p-type separation region (130) is formed between an n-buried layer (108) and the transistor backgate (126) to increase breakdown voltage performance without increasing epitaxial thickness.... Agent: Texas Instruments Incorporated

20090068805 - Method of forming metal-oxide-semiconductor transistors: A method of manufacturing a MOS transistor device is provided. First, a semiconductor substrate having a gate structure is prepared. The gate structure has two sidewalls and a liner on the sidewalls. Subsequently, a stressed cap layer is formed on the semiconductor substrate, and covers the gate structure and the... Agent: North America Intellectual Property Corporation

20090068806 - Field effect transistor: A field effect transistor is provided. The field effect transistor includes a channel region, electrically conductive channel connection regions, and a control region. The electrically conductive channel connection regions adjoin the channel region along with a transistor dielectric. The control region is separated from the channel region by the transistor... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20090068807 - Dual gate oxide device integration: A method of forming devices including forming a first region and a second region in a semiconductor substrate is provided. The method further includes forming a semiconductive material over the first region, wherein the semiconductive material has a different electrical property than the first semiconductor substrate, forming a first dielectric... Agent: Freescale Semiconductor, Inc. Law Department

20090068808 - Method of manufacturing a nonvolatile semiconductor memory device having a gate stack: A nonvolatile semiconductor memory device includes a semiconductor substrate having a source region and a drain region, and a gate stack formed on the semiconductor substrate between and in contact with the source and drain regions. The gate stack includes, in sequential order from the substrate: a tunneling film; a... Agent: Lee & Morse, P.C.

20090068809 - Semiconductor memory device having local etch stopper and method of manufacturing the same: A semiconductor memory device includes a semiconductor substrate in which a cell region and a core and peripheral region are defined. The device further comprises isolation layers formed in the semiconductor substrate to define active regions, a first gate electrode structure formed in the cell region and a second gate... Agent: Volentine & Whitt PLLC

20090068810 - Method of fabrication of metal oxide semiconductor field effect transistor: A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain... Agent: Jianq Chyun Intellectual Property Office

20090068811 - Semiconductor device and method of manufacturing the same: A semiconductor device is disclosed that comprises a high breakdown voltage MOSFET. The MOSFET includes a source region of a second conductivity type and a drain region of the second conductivity type formed apart from each other in a well region of a first conductivity type, a channel region formed... Agent: Cooper & Dunham, LLP

20090068812 - Method of forming memory devices by performing halogen ion implantation and diffusion processes: Disclosed is a method of forming memory devices employing halogen ion implantation and diffusion processes. In one illustrative embodiment, the method includes forming a plurality of word line structures above a semiconducting substrate, each of the word line structures comprising a gate insulation layer, performing an LDD ion implantation process... Agent: Williams, Morgan & Amerson

20090068813 - Method for fabricating a semiconductor device: A method for fabricating the semiconductor device comprises providing a semiconductor substrate having a device region and a testkey region. A first trench is formed in the device region and a second trench is formed in the testkey region. A conductive layer with a first etching selectivity is formed in... Agent: Quintero Law Office, PC

20090068814 - Semiconductor devices including capacitor support pads and related methods: A semiconductor device may include a semiconductor substrate and a plurality of first capacitor electrodes arranged in a plurality of parallel lines on the semiconductor substrate with each of the first capacitor electrodes extending away from the semiconductor substrate. A plurality of capacitor support pads may be provided with each... Agent: Myers Bigel Sibley & Sajovec

20090068815 - Semiconductor device and manufacturing method thereof: A semiconductor device in which a main current flows in a direction of the thickness of a semiconductor substrate, to attain desirable electric characteristics. P type semiconductor regions and N type semiconductor regions are alternately provided with an interval therebetween, both regions in a surface of a second main surface... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090068816 - Method for forming isolation layer in semiconductor device: Provided is a method for forming an isolation layer in a semiconductor device. In the method, a trench is formed in a semiconductor substrate, and a liner layer is formed on an exposed surface of the trench. A flowable insulation layer is formed to fill the trench. The flowable insulation... Agent: Townsend And Townsend And Crew, LLP

20090068817 - Method for forming isolation layer in semiconductor device: A method for forming an isolation layer in a semiconductor device includes forming a trench in a semiconductor substrate. A flowable insulation layer is formed to fill the trench. The flowable insulation layer is recessed. A buried insulation layer is deposited on the flowable insulation layer while keeping a deposition... Agent: Townsend And Townsend And Crew, LLP

20090068818 - Method of forming an isolation layer of a semiconductor device: In a method of forming an isolation layer of a semiconductor device, a gate insulating layer, a first conductive layer, and a hard mask are formed in an active region of a semiconductor substrate and a trench is formed in an isolation region. The trench is partially gap-filled by forming... Agent: Townsend And Townsend And Crew, LLP

20090068819 - Tape structures, and methods and apparatuses for separating a wafer using the same: Example embodiments provide tape structures including a base layer, a neutralizing layer and an adhesive layer. The base layer may support an object. The neutralizing layer may be arranged on the base layer. The neutralizing layer may be grounded to neutralize charges between the base layer and the object. The... Agent: Harness, Dickey & Pierce, P.L.C

20090068820 - Microspheres including nanoparticles: A microparticle can include a central region and a peripheral region. The peripheral region can include a nanoparticle, such as a metal nanoparticle, a metal oxide nanoparticle, or a semiconductor nanocrystal. The microparticle can be a member of a monodisperse population of particles.... Agent: Steptoe & Johnson LLP

20090068821 - Charge-free low-temperature method of forming thin film-based nanoscale materials and structures on a substrate: A method of forming a nanostructure at low temperatures. A substrate that is reactive with one of atomic oxygen and nitrogen is provided. A flux of neutral atoms of least one of nitrogen and oxygen is generated within a laser-sustained-discharge plasma source and a collimated beam of energetic neutral atoms... Agent: Los Alamos National Security, LLC

20090068822 - Method for preparing substrate for growing gallium nitride and method for preparing gallium nitride substrate: Provided is a method for preparing a substrate for growing gallium nitride and a gallium nitride substrate. The method includes performing thermal cleaning on a surface of a silicon substrate, forming a silicon nitride (Si3N4) micro-mask on the surface of the silicon substrate in an in situ manner, and growing... Agent: Ladas & Parry LLP

20090068823 - Plasma ion doping method and apparatus: In plasma ion doping operations, a wafer is positioned on a susceptor within a reaction chamber and an ion doping source gas is plasmalyzed in an upper part of the reaction chamber above a major surface of the wafer while supplying a control gas into the reaction chamber in a... Agent: Myers Bigel Sibley & Sajovec

20090068824 - Fabricating method of semiconductor device: A method for fabricating a semiconductor substrate is provided. A substrate having a region adjacent to a surface of the substrate as a channel region is provided. An ion implantation process is performed to form an amorphized silicon layer in the substrate below the channel region. A thermal treatment process... Agent: J C Patents, Inc.

20090068825 - Implementation of temperature-dependent phase switch layer for improved temperature uniformity during annealing: The present invention provides a method of annealing a semiconductor by applying a temperature-dependant phase switch layer to a semiconductor structure. The temperature-dependant phase switch layer changes phase from amorphous to crystalline at a predetermined temperature. When the semiconductor structure is annealed, electromagnetic radiation passes through the temperature-dependant phase switch... Agent: Shimokaji & Associates, P.C.

20090068826 - Method of fabricating semiconductor device: The present invention includes the steps of: forming an device isolation region in a substrate to divide the device isolation region into a first and a second diffusion regions; forming a target film to be processed on the substrate; forming a hard mask layer and a first resist layer on... Agent: Young & Thompson

20090068827 - Method for fabricating semiconductor device: A semiconductor device provided with: a channel region formed in a surface of a semiconductor substrate in a predetermined depth range, a trench being formed in the surface as penetrating the channel region in a depthwise direction; a gate insulating film formed on an inside wall of the trench, the... Agent: Rabin & Berdo, PC

20090068828 - Dual work function cmos devices utilizing carbide based electrodes: Concurrently forming different metal gate transistors having respective work functions is disclosed. In one example, a metal carbide, which has a relatively low work function, is formed over a semiconductor substrate. Oxygen and/or nitrogen are then added to the metal carbide in a second region to establish a second work... Agent: Texas Instruments Incorporated

20090068829 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device comprising forming a conductive layer on a semiconductor substrate; forming a metal layer on the conductive layer; performing a first etching process for patterning the metal layer on a first area to form first metal layer patterns at relatively wide intervals until the... Agent: Marshall, Gerstein & Borun LLP

20090068830 - Microelectronic package interconnect and method of fabrication thereof: A method of interconnecting and an interconnect is provided to connect a first component and a second component of an integrated circuit. The interconnect includes a plurality of Carbon Nanotubes (CNTs), which provide a conducting path between the first component and the second component. The interconnect further includes a passivation... Agent: Intel Corporation C/o Intellevate, LLC

20090068831 - 3d ic method and device: A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090068832 - Thin films: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric... Agent: Knobbe Martens Olson & Bear LLP

20090068834 - Method of forming a contact plug of a semiconductor device: In a method of forming a contact plug of a semiconductor device, a nitride layer is prevented from being broken by forming a passivation layer over the nitride layer when contact holes are formed by etching an insulating layer between select lines formed over a semiconductor substrate. In an etch... Agent: Townsend And Townsend And Crew, LLP

20090068833 - Method of forming contact hole of semiconductor device: The present invention relates to a method of forming a contact hole of a semiconductor device. According to the method of forming a contact hole of a semiconductor device, a semiconductor substrate in which gates and junctions are formed is provided. A self-aligned contact (SAC) nitride layer is formed on... Agent: Townsend And Townsend And Crew, LLP

20090068835 - Method of fabricating ultra-deep vias and three-dimensional integrated circuits using ultra-deep vias: A method of forming a high aspect ratio via opening through multiple dielectric layers, a high aspect ratio electrically conductive via, methods of forming three-dimension integrated circuits, and three-dimensional integrated circuits. The methods include forming a stack of at least four dielectric layers and etching the first and third dielectric... Agent: Schmeiser, Olsen & Watts

20090068836 - Method of forming contact plug of semiconductor device: The present invention relates to a method of forming contact plugs of a semiconductor device. According to the method, a first insulating layer is formed over a semiconductor substrate in which a cell region and a peri region are defined and a first contact plug is formed in the peri... Agent: Townsend And Townsend And Crew, LLP

20090068837 - Line ends forming: Methods of forming line ends and a related memory cell including the line ends are disclosed. In one embodiment, the method includes forming a first device element and a second device element separated from the first device element by a space; and forming a first line extending from the first... Agent: Hoffman Warnick LLC

20090068838 - Method for forming micropatterns in semiconductor device: A method for forming micropatterns in a semiconductor device includes forming a first etch stop layer over a etch target layer, forming a second etch stop layer over the first etch stop layer, forming a first sacrificial layer over the second etch stop layer, etching portions of the first sacrificial... Agent: Townsend And Townsend And Crew, LLP

20090068839 - Slurry, chemical mechanical polishing method using the slurry, and method of forming metal wiring using the slurry: A slurry, chemical mechanical polishing (CMP) method using the slurry, and method of forming metal wiring using the slurry. The slurry may include a polishing agent, an oxidant, and at least one defect inhibitor to protect the metal film. The CMP method and method of forming metal wiring may employ... Agent: Harness, Dickey & Pierce, P.L.C

20090068841 - Chemical mechanical polishing method of organic film and method of manufacturing semiconductor device: There is disclosed a chemical mechanical polishing method of an organic film comprising forming the organic film above a semiconductor substrate, contacting the organic film formed above the semiconductor substrate with a polishing pad attached to a turntable, and dropping a slurry onto the polishing pad to polish the organic... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090068840 - Polishing liquid and method for manufacturing semiconductor device: e

20090068842 - Method for forming micropatterns in semiconductor device: A method for forming a semiconductor device includes forming an etch target layer over a substrate, forming a first etch stop layer over the etch target layer, forming a second etch stop layer over the first etch stop layer, forming a first sacrificial layer over the second etch stop layer,... Agent: Townsend And Townsend And Crew, LLP

20090068843 - Method of forming mark in ic-fabricating process: A method of forming a mark in an IC fabricating process is described. Two parts of the mark each including a plurality of linear patterns are respectively defined by two exposure steps that either belong to two lithography processes respectively or constitute a double-exposure process including X-dipole and Y-dipole exposure... Agent: J C Patents, Inc.

20090068844 - Etching process: Mixtures of fluorine and inert gases like nitrogen and/or argon can be used for etching of semiconductors, solar panels and flat panels (TFTs and LCDs), and for cleaning of semiconductor surfaces and plasma chambers. Preferably, fluorine is comprised in an amount of 15 to 25 vol.-% in binary mixtures. The... Agent: Solvay C/o B. Ortego - Iam-nafta

20090068845 - Low contamination components for semiconductor processing apparatus and methods for making components: Components of semiconductor processing apparatus are formed at least partially of erosion, corrosion and/or corrosion-erosion resistant ceramic materials. Exemplary ceramic materials can include at least one oxide, nitride, boride, carbide and/or fluoride of hafnium, strontium, lanthanum oxide and/or dysprosium. The ceramic materials can be applied as coatings over substrates to... Agent: Buchanan, Ingersoll & Rooney PC

20090068846 - Compositions and method for treating a copper surface: The present invention is directed to compositions for copper passivation and methods of use of such compositions.... Agent: Morgan Lewis & Bockius LLP

20090068847 - Methods for removing contaminants from aluminum-comprising bond pads and integrated circuits therefrom: Methods for removing contaminants from a semiconductor device that includes a plurality of aluminum-comprising bond pads on a semiconductor surface of a substrate. A plurality of aluminum-including bond pads are formed on the semiconductor surface of the substrate. A patterned passivation layer is then formed on the semiconductor surface, wherein... Agent: Texas Instruments Incorporated

20090068848 - Systems and methods for manipulating liquid films on semiconductor substrates: A semiconductor substrate undergoing processing to fabricate integrated circuit devices thereon is spun about a rotational axis while introducing liquid onto a surface of the substrate. An annular-shaped sheet of liquid is formed on the surface, the sheet of liquid having an inner diameter defining a liquid-free void. The size... Agent: Trask Britt, P.C./ Micron Technology

20090068849 - Multi-region processing system and heads: The various embodiments of the invention provide for relative movement of the substrate and a process head to access the entire wafer in a minimal space to conduct combinatorial processing on various regions of the substrate. The heads enable site isolated processing within the chamber described and method of using... Agent: Martine Penilla Gencarella, LLP

20090068850 - Method of fabricating flash memory device: The present invention relates generally to a method of fabricating a flash memory device. The method includes forming a tunnel dielectric layer on a semiconductor substrate using a plasma oxidization process. The tunnel dielectric layer is formed using the plasma oxidation process employing Ar and O2 gases, therefore, defect charges... Agent: Marshall, Gerstein & Borun LLP

20090068851 - Susceptor, manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device: A susceptor of the present invention includes an inner susceptor having a diameter smaller than a diameter of a wafer w and a protruding part for placing the wafer w on a surface thereof, and an outer susceptor having an opening in the central portion thereof, a first step section... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090068852 - Method of forming a carbon polymer film using plasma cvd: A method forms a hydrocarbon-containing polymer film on a semiconductor substrate by a capacitively-coupled plasma CVD apparatus. The method includes the steps of: vaporizing a hydrocarbon-containing liquid monomer (CαHβXγ, wherein α and β are natural numbers of 5 or more; γ is an integer including zero; X is O, N... Agent: Knobbe Martens Olson & Bear LLP

20090068853 - Impurity control in hdp-cvd dep/etch/dep processes: Methods are disclosed of depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A first portion of the silicon oxide film is deposited over the substrate and within the gap using a high-density plasma process.... Agent: Townsend And Townsend And Crew LLP

20090068854 - Silicon nitride gap-filling layer and method of fabricating the same: A method for fabricating a silicon nitride gap-filling layer is provided. A pre-multi-step formation process is performed to form a stacked layer constituting as a dense film on a substrate. Then, a post-single step deposition process is conducted to form a cap layer constituting as a sparse film on the... Agent: J C Patents, Inc.

20090061537 - Method of manufacturing oscillator device: A method of manufacturing oscillator devices each having an oscillator and a resilient supporting member for supporting the oscillator for oscillatory motion, includes a step of processing one and the same substrate to form oscillators and resilient supporting members of oscillator devices so that oscillators of adjacent oscillator devices are... Agent: Fitzpatrick Cella Harper & Scinto

20090061538 - Methods of forming ferroelectric capacitors and methods of manufacturing semiconductor devices using the same: In a method of forming a ferroelectric capacitor, a lower electrode layer is formed on a substrate. A first crystalline layer is formed on the lower electrode layer. A ferroelectric layer is formed on the first crystalline layer. The first crystalline layer one of prevents a component of the ferroelectric... Agent: Harness, Dickey & Pierce, P.L.C

20090061539 - Substrate holding structure and method of producing semiconductor device using the same: A substrate holding structure includes a wafer stage having a first main surface and a second main surface opposite to the first main surface. A substrate placing area is defined on the first main surface. The substrate holding structure further includes a static capacity measurement electrode having a center circular... Agent: Kubotera & Associates, LLC

20090061540 - Plasma process detecting sensor: The present invention provides a plasma process detecting sensor. In the plasma process detecting sensor, a hole diameter of an insulating film is spread with almost no spread of a hole diameter of an upper electrode. Therefore, when the plasma process detecting sensor is exposed to a plasma, positive ions... Agent: Rabin & Berdo, PC

20090061542 - Method and apparatus for diagnosing status of parts in real time in plasma processing equipment: Apparatus and methods for diagnosing status of a consumable part of a plasma reaction chamber, the consumable part including at least one conductive element embedded therein. The method includes the steps of: coupling the conductive element to a power supply so that a bias potential relative to the ground is... Agent: Buchanan, Ingersoll & Rooney PC

20090061541 - Semiconductor fabrication system, and flow rate correction method and program for semiconductor fabrication system: Zero point shift based on thermal siphon effect occurring actually when a substrate is processed is detected accurately and corrected suitably. The semiconductor fabrication system comprises a gas supply passage (210) for supplying gas into a heat treatment unit (110), an MFC (240) for comparing an output voltage from a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090061543 - Method for calibrating an inspection tool: Provided is a method for manufacturing a semiconductor device. The method, in one embodiment, includes calibrating an inspection tool configured to obtain a measurement of a semiconductor feature, including: 1) providing a test structure comprising a substrate having a trench therein, and a post feature located over the substrate adjacent... Agent: Texas Instruments Incorporated

20090061544 - Trajectory based control of plasma processing: A method of controlling a plasma processing according to trajectories connecting start and stop values of parameters controlling the plasma processing, for example, gas flow and power supplied to generate the plasma. The trajectories maybe based on equations including at least time as a variable. At set times within the... Agent: Law Offices Of Charles Guenzer Attn: Applied Materials, Inc.

20090061545 - Edge removal of silicon-on-insulator transfer wafer: A silicon-on-insulator transfer wafer having a front surface with a circumferential lip around a circular recess is polished. In one version, the circular recess on the front surface of the wafer is masked by filling the recess with spin-on-glass. The front surface of the wafer is exposed to an etchant... Agent: Townsend And Townsend And Crew LLP

20090061547 - Landing pad for use as a contact to a conductive spacer: A landing pad for use as a contact to a conductive spacer adjacent a structure in a semiconductor device comprises two islands, each of which is substantially rectangularly shaped and is spaced apart from one another and from the structure. Conductive spacers are adjacent to each island and overlapping each... Agent: Dla Piper LLP (us )

20090061546 - Method for setting predefinable parameters: A method for setting predefinable parameters is described, in which for an electronic component, for example a voltage regulator having at least one integrated circuit, the latter has an external connection, via which it is connectable to a programming device. For the latter, a so-called zero programming is provided in... Agent: Kenyon & Kenyon LLP

20090061548 - Method for fabricating pixel structure: A method for fabricating a pixel structure is provided. First, a substrate having an active device formed thereon is provided. The active device has a gate, a gate dielectric layer, and a semiconductor layer having a channel, a source, and a drain region. Then, a dielectric layer is formed to... Agent: Jianq Chyun Intellectual Property Office

20090061549 - Process for producing optical semiconductor device: The present invention relates to a process for producing an optical semiconductor device, the process including: disposing a sheet for optical-semiconductor-element encapsulation including a resin sheet A and a plurality of resin layers B discontinuously embedded in the resin sheet A and a plurality of optical semiconductor elements mounted on... Agent: Sughrue-265550

20090061550 - Led package and fabricating method thereof: The invention provides an LED package capable of effectively releasing heat emitted from an LED chip out of the package and a fabrication method thereof. For this purpose, at least one groove is formed on an underside surface of the substrate to package the LED chip and the groove is... Agent: Mcdermott Will & Emery LLP

20090061552 - Light emitting apparatus and method for the same: A light emitting apparatus includes a patterned conductive layer, a light emitting component, and a first light diffusion layer, wherein the light emitting component is disposed on the patterned conductive layer and the light emitting component and the patterned conductive layer are embedded into the first light diffusion layer. The... Agent: Snell & Wilmer L.L.P. (main)

20090061551 - Light emitting apparatus and method of fabricating the same: Although an ink jet method known as a method of selectively forming a film of a high molecular species organic compound, can coat to divide an organic compound for emitting three kinds (R, G, B) of light in one step, film forming accuracy is poor, it is difficult to control... Agent: Cook Alex Ltd

20090061553 - Maunfacturing method of thin film transistor array substrate: A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a number of scan lines and a number of source lines are... Agent: Jianq Chyun Intellectual Property Office

20090061554 - Resinous hollow package and producing method thereof: The present invention provides a resinous hollow package that includes a moisture-proof island that is a planar structure disposed below a semiconductor element mounting surface of the resinous hollow package, the semiconductor element mounting surface having an area of 200 mm2 or more and the maximum wave height of a... Agent: Buchanan, Ingersoll & Rooney PC

20090061555 - Radiation detecting apparatus and method for manufacturing the same: An underlayer of a phosphor layer is disposed on a sensor panel including two-dimensionally arranged photoelectric conversion devices. The surface of the underlayer is subjected to atmospheric pressure plasma treatment. The phosphor layer is formed on the surface-treated underlayer. Then, the phosphor layer is covered with a moisture-resistant protective layer,... Agent: Fitzpatrick Cella Harper & Scinto

20090061556 - Method for manufacturing image sensor: A method for manufacturing an image sensor according to an embodiment includes performing a plasma surface treatment on an oxide film microlens to mitigate high surface morphology. The image sensor can include a passivation layer on a substrate having a pad region and a pixel region and a color filter... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090061557 - Method for manufacturing substrate for photoelectric conversion element: A silicon layer having a conductivity type opposite to that of a bulk is provided on the surface of a silicon substrate and hydrogen ions are implanted to a predetermined depth into the surface region of the silicon substrate through the silicon layer to form a hydrogen ion-implanted layer. Then,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090061558 - Method of fabricating organic electronic device: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a patterned spacing layer on the flexible substrate with a spacing material deposition source and a mask; and arranging a cover substrate on... Agent: Jianq Chyun Intellectual Property Office

20090061559 - Manufacture method for zno-containing compound semiconductor layer: A manufacture method for a ZnO-containing compound semiconductor layer has the steps of: (a) preparing a substrate; and (b) growing a ZnO-containing semiconductor layer above the substrate by supplying at the same time at least Zn and O as source gases and S as surfactant. There is provided the manufacture... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090061560 - Method of fabricating organic electronic device: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a spacing material layer on the flexible substrate; patterning the spacing material layer to form a patterned spacing layer; and arranging a cover... Agent: Jianq Chyun Intellectual Property Office

20090061562 - Method of fabricating microelectromechanical systems devices: A method of fabricating microelectromechanical systems devices is disclosed. A silicon substrate having a plurality of microelectromechanical systems elements formed on a first surface thereof is provided. A guard layer defining a plurality of recesses is applied to the silicon substrate such that respective microelectromechanical systems elements are located within... Agent: Silverbrook Research Pty Ltd

20090061561 - Method of producing electronic apparatus: To provide a method of producing an electronic apparatus that is inexpensive, contributes to high productivity, and can achieve good communication characteristics. A method of producing an electronic apparatus composed of an IC chip (100) having an external electrode formed on each of a set of opposing surfaces of the... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090061563 - Method of manufacturing a semiconductor device including plural semiconductor chips: A method for manufacturing a semiconductor device includes mounting a first chip over a first area of a chip mounting section of a lead frame and mounting a second chip over a second area of the chip mounting section, wherein the second area is adjacent to the first area via... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090061564 - Method of packaging an integrated circuit die: A structure (40) for holding an integrated circuit die (38) during packaging includes a support substrate (42), a release film (44) attached to the substrate (42), and a swelling agent (60). A method (34) of packaging the die (38) includes placing the die (38) on the substrate (42) with its... Agent: Meschkow & Gresham, P.L.C

20090061565 - Structure combining an ic integrated substrate and a carrier, and method of manufacturing such structure: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The interface between the IC integrated substrate and the carrier has a specific area at which the interface adhesion is different from that... Agent: Austin Rapp & Hardman

20090061566 - Semiconductor package having a grid array of pin-attached balls: Semiconductor chip (1101) of a ball grid array device (1100) is mounted onto tape substrate (1102) using attach adhesive (1103). The metal layer on the top surface of substrate (1102) uses between about 30% to 90% of its area for connecting lines (1104), and only the remainder for members/rings (1105)... Agent: Texas Instruments Incorporated

20090061567 - Via configurable architecture for customization of analog circuitry in a semiconductor device: A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include... Agent: Womble Carlyle Sandridge & Rice, PLLC

20090061569 - Contact structure: There is disclosed a contact structure for electrically connecting conducting lines formed on a first substrate of an electrooptical device such as a liquid crystal display with conducting lines formed on a second substrate via conducting spacers while assuring a uniform cell gap among different cells if the interlayer dielectric... Agent: Eric Robinson

20090061570 - Semiconductor device and ltps-tft within and method of making the same: A thin film transistor (TFT) formed on a substrate includes a polycrystalline film, a gate insulator, a hydrogen-supplying film and a gate electrode. The polycrystalline film is formed on the substrate. Two sides of the polycrystalline film serve as the source and the drain of the semiconductor device, and the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090061568 - Techniques for fabricating nanowire field-effect transistors: Techniques for the fabrication of field-effect transistors (FETs) having nanowire channels are provided. In one aspect, a method of fabricating a FET is provided comprising the following steps. A substrate is provided having a silicon-on-insulator (SOI) layer. At least one nanowire is deposited over the SOI layer. A sacrificial gate... Agent: Michael J. Chang, LLC

20090061571 - Method for manufacturing a pixel structure of a liquid crystal display: A method for manufacturing the pixel structure of a liquid crystal display is provided. In comparison to using seven masks in the conventional lithographic processes for the pixel structure, only four masks are required in the manufacturing method of the present invention. Therefore, the cost of manufacturing is reduced. Furthermore,... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090061572 - Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication: A nonplanar semiconductor device and its method of fabrication is described. The nonplanar semiconductor device includes a semiconductor body having a top surface opposite a bottom surface formed above an insulating substrate wherein the semiconductor body has a pair laterally opposite sidewalls. A gate dielectric is formed on the top... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090061573 - Methods for manufacturing thin film transistor and display device: The present invention provides a method for manufacturing a highly reliable semiconductor device with a small amount of leakage current. In a method for manufacturing a thin film transistor, etching is conducted using a resist mask to form a back channel portion in the thin film transistor, the resist mask... Agent: Eric Robinson

20090061574 - Semiconductor device and method of manufacturing the semiconductor device: In a semiconductor device, a first interlayer insulating layer made of an inorganic material and formed on inverse stagger type TFTs, a second interlayer insulating layer made of an organic material and formed on the first interlayer insulating layer, and a pixel electrode formed in contact with the second interlayer... Agent: Cook Alex Ltd

20090061575 - Display device and fabrication method thereof: The present invention provides a display device which forms thin film transistor circuits differing in characteristics from each other on a substrate in mixture and a fabrication method of the display device. On a glass substrate having a background layer which is formed by stacking an SiN film and an... Agent: Stanley P. Fisher Reed Smith LLP

20090061576 - Manufacturing method for compound semiconductor device and etching solution: After an n-type AlGaN barrier layer (3) is formed over a substrate (1), an n-type GaN contact layer (4) is formed over the n-type AlGaN barrier layer (3). Next, the n-type GaN contact layer (4) is wet-etched with using an etching solution containing an organic alkali agent and an oxidizer... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090061577 - Method of producing product including silicon wires: A product including a plurality of wires, in which longitudinal directions of the wires are arranged in one direction so that each one of the wires is positioned end to end to one another, and a method of producing the same are disclosed. The longitudinal directions of the plurality of... Agent: Morgan & Finnegan, L.L.P.

20090061578 - Method of manufacturing a semiconductor microstructure: A method of manufacturing a semiconductor microstructure comprises: forming a standard CMOS wafer with at least one micro-electro-mechanical structure on a top surface of a silicon substrate, forming at least one sacrificial layer and one resist layer sequentially on the top surface of the CMOS wafer; forming an etching resist... Agent: Dr. Banger Shia

20090061579 - Layout method of semiconductor device with junction diode for preventing damage due to plasma charge: Provided is a layout method of junction diodes for preventing damage caused by plasma charge. The layout method includes operations of forming an active layer so as to form a plurality of active regions in a unit layout pattern; forming a gate layer so as to form a plurality of... Agent: Marger Johnson & Mccollom, P.C.

20090061580 - Method of forming finfet device: The invention discloses a method of forming a finFET device. A hard mask layer is formed on an active area of a semiconductor substrate. A portion of the hard mask layer is etched to form a recess. A conformal gate defining layer is deposited on the recess and a tilt... Agent: North America Intellectual Property Corporation

20090061581 - Method for manufacturing trench isolation structure and non-volatile memory: A method for manufacturing a non-volatile memory is provided. An isolation structure is formed in a trench formed in a substrate. A portion of the isolation structure is removed to form a recess. A first dielectric layer and a first conductive layer are formed sequentially on the substrate. Bar-shaped cap... Agent: Jianq Chyun Intellectual Property Office

20090061582 - Manufacturing method of non-volatile memory: A manufacturing method of a non-volatile memory includes first providing a substrate for defining multiple pairs of active regions; forming a control gate in one of each pair of the active regions of the substrate; sequentially forming a gate oxide layer, a conductor layer, and a patterned mask layer on... Agent: Jianq Chyun Intellectual Property Office

20090061583 - Method for preparing dynamic random access memory structure: A method for preparing a dynamic random access memory structure, comprising steps of forming a bottom conductive region in a substrate, removing a predetermined portion of the substrate to form a plurality of pillars having a bottom end lower than a bottom surface of the bottom conductive region, forming a... Agent: Wpat, PC Intellectual Property Attorneys

20090061585 - High-voltage vertical transistor with a multi-gradient drain doping profile: A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being separated from the mesa by a dielectric layer.... Agent: The Law Offices Of Bradley J. Bereznak

20090061584 - Semiconductor process for trench power mosfet: The present invention provides a semiconductor process for a trench power MOSFET. The semiconductor process includes providing a substrate, forming an EPI wafer on the surface, performing trench dry etching, performing HTP hard mask oxide deposition and channel self- align implant, performing boron (B) implant and completing the P-body region... Agent: North America Intellectual Property Corporation

20090061586 - Strained channel transistor: A semiconductor device, such as a PMOS or an NMOS transistor, having a stressed channel region is provided. The semiconductor device is formed by recessing the source/drain regions after forming a gate stack. The substrate is removed under the gate stack. Thereafter, an epitaxial layer is formed under the gate... Agent: Slater & Matsil, L.L.P.

20090061587 - Method for fabricating capacitor in semiconductor device: A method for fabricating a capacitor includes providing a substrate having a capacitor region is employed, forming a first Ru1-xOx layer over the substrate, forming a Ru layer for a lower electrode over the first Ru1-xOx layer and deoxidizing the first Ru1-xOx layer, forming a dielectric layer over the Ru... Agent: Townsend And Townsend And Crew, LLP

20090061588 - Method for fabricating dynamic random access memory: A method for fabricating a dynamic random access memory is provided. A substrate having two trench capacitors therein is provided, an isolation structure protruding from a surface of the substrate is formed on each trench capacitor, a spacer is formed on the substrate at two sides of each of the... Agent: Jianq Chyun Intellectual Property Office

20090061589 - Method of manufacturing semiconductor device having cylinder-type capacitor structure: A method of manufacturing a semiconductor device includes forming an inter-layer insulating film; arranging a plurality of grooves in a surface layer of the inter-layer insulating film; forming embedded insulating films which are embedded in the grooves; arranging a plurality of holes in the inter-layer insulating film and between the... Agent: Scully Scott Murphy & Presser, PC

20090061590 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device capable of eliminating additional processes for forming an alignment key, thereby shortening the manufacturing process and lowering the manufacturing costs. The method includes forming an insulating layer including wiring regions and an alignment key region over a substrate; forming a first trench and... Agent: Sherr & Vaughn, PLLC

20090061591 - Method for manufacturing soi substrate: A hydrogen ion-implanted layer is formed on the surface side of a first substrate which is a single-crystal silicon substrate. At least one of the surface of a second substrate, which is a transparent insulating substrate, and the surface of the first substrate is subjected to surface activation treatment, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090061592 - Semiconductor device and manufacturing method thereof: A method of manufacturing the semiconductor device includes forming a first polysilicon film on an active region and an element isolation region made of a dielectric material provided in a semiconductor substrate; forming a hard mask on the first polysilicon film; etching the first polysilicon film, the semiconductor substrate in... Agent: Scully Scott Murphy & Presser, PC

20090061594 - Method of detaching a thin film by melting precipitates: A method of fabricating a thin film from a substrate includes implantation into the substrate, for example made of silicon, of ions of a non-gaseous species, for example gallium, the implantation conditions and this species being chosen, according to the material of the substrate, so as to allow the formation... Agent: Brinks Hofer Gilson & Lione

20090061593 - Semiconductor wafer re-use in an exfoliation process using heat treatment: Methods and apparatus for re-using a semiconductor donor wafer in a semiconductor-on-insulator (SOI) fabrication process provide for: (a) subjecting a first implantation surface of a donor semiconductor wafer to an ion implantation process to create a first exfoliation layer of the donor semiconductor wafer; (b) bonding the first implantation surface... Agent: Corning Incorporated

20090061596 - Expanding tool, expanding method, and manufacturing method of unit elements: There is provided an expanding tool used for dividing a wafer on an expanding tape by applying a radial tensile force to the expanding tape. The expanding tool includes a dividing frame having a first opening, an outer expanding ring having a contact portion that can be made contact with... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090061595 - Method for dividing a semiconductor substrate and a method for producing a semiconductor circuit arrangement: A method for dividing a semiconductor substrate involves providing a semiconductor substrate. At least one separating trench is produced at a front side of the semiconductor substrate. A layer is produced at least at the bottom of the at least one separating trench. The semiconductor substrate is thinned at a... Agent: Infineon Technologies Ag Patent Department

20090061597 - Singulator method and apparatus: A method for the singulation of hybrid circuits from a pre-scribed plate containing hybrid circuits or made of other brittle materials. The method includes the steps of providing a platen used to support the hybrid plate and which has a surface comprised of a series of sections each angled downward... Agent: Jeffer, Mangels, Butler & Marmaro, LLP

20090061598 - Wafer-level packaging cutting method capable of protecting contact pads: A cutting method for wafer-level packaging capable of protecting the contact pad, in which several cavities and precutting lines are formed at the front surface of a cap wafer, and the depth of each precutting line is lesser than the thickness of the cap wafer, followed by the bonding of... Agent: North America Intellectual Property Corporation

20090061599 - Semiconductor wafer processing method: A semiconductor wafer processing method for planarizing an additional layer formed on the front side of a semiconductor wafer. First, the wafer is held on a chuck table included in a cutting device in the condition where the additional layer is exposed, and a table base supporting the chuck table... Agent: Greer, Burns & Crain

20090061600 - Method for reuse of wafers for growth of vertically-aligned wire arrays: Reusing a Si wafer for the formation of wire arrays by transferring the wire arrays to a polymer matrix, reusing a patterned oxide for several array growths, and finally polishing and reoxidizing the wafer surface and reapplying the patterned oxide.... Agent: Steinfl & Bruno

20090061601 - Method and apparatus for improved pumping medium for electro-osmotic pumps: Various embodiments of the present invention comprise systems and methods of fabricating porous silicon. One application of such porous silicon is in the fabrication of electro-osmotic pumps and electro-osmotic pump substrates. The method can comprise operations performed on a silicon wafer. A liner material can be deposited on the silicon... Agent: Troutman Sanders LLP/ Intel Corporation

20090061602 - Method for doping polysilicon and method for fabricating a dual poly gate using the same: A method for doping polysilicon improves a doping profile during plasma doping and includes forming a silicon layer using two separate operations. After forming a first silicon layer, thermal annealing is performed to crystallize the first silicon layer, such that the uniformity of a doping concentration according to the depth... Agent: Townsend And Townsend And Crew, LLP

20090061603 - Method of crystallizing semiconductor film: A method of crystallizing a semiconductor film including splitting a pulse laser beam oscillated from a laser oscillator, and synthesizing the split pulse laser beams after the split pulse laser beams have propagated through optical paths different in optical path length, modulating the synthesized pulse laser beam into a pulse... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090061604 - Germanium substrate-type materials and approach therefor: Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to... Agent: Fitzpatrick Cella Harper & Scinto

20090061605 - Profile adjustment in plasma ion implanter: A method to provide a dopant profile adjustment solution in plasma doping systems for meeting both concentration and junction depth requirements. Bias ramping and bias ramp rate adjusting may be performed to achieve a desired dopant profile so that surface peak dopant profiles and retrograde dopant profiles are realized. The... Agent: Varian Semiconductor Equipment Assc., Inc.

20090061606 - Method for reducing dislocation threading using a suppression implant: The present invention provides a method for manufacturing a semiconductor device. In one embodiment, the method for manufacturing the semiconductor device includes a method for manufacturing a zener diode, including among others, forming a doped well (240) within a substrate (210) and forming a suppression implant (420) within the substrate... Agent: Texas Instruments Incorporated

20090061607 - Method of manufacturing photomask and method of manufacturing semiconductor device: According to an aspect of an embodiment, a method of manufacturing a photomask has forming a laminate over a transparent substrate, the laminate having a light-shielding layer and a hard mask layer, forming a negative resist layer over the laminate, exposing and developing the negative resist layer over the laminate... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090061608 - Method of forming a semiconductor device having a silicon dioxide layer: A method of depositing a silicon dioxide layer for a semiconductor device. The method includes depositing the silicon dioxide layer to have a silicon concentration of greater than 30 atomic percent and a nitrogen concentration of less than 5 atomic percent. The depositing includes flowing nitric oxide gas with a... Agent: Freescale Semiconductor, Inc. Law Department

20090061609 - Methods of forming nitride read only memory and word lines thereof: A method of forming word lines of a memory includes providing a substrate and forming a conductive layer on the substrate. A metal silicide layer is formed on the conductive layer, and a mask pattern is formed on the metal silicide layer. A mask liner covering the mask pattern and... Agent: J C Patents, Inc.

20090061610 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a plate of semiconductor layer, an insulator layer formed on the plate of semiconductor layer and brought into contact with the plate of semiconductor layer by at least two adjacent faces, a thickness of the insulator layer in the vicinity of a boundary line between the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090061611 - Fabricating dual layer gate electrodes having polysilicon and a workfunction metal: A method for fabricating a dual layer gate electrode having a polysilicon layer and a workfunction metal layer comprises depositing a layer of a workfunction metal on a semiconductor substrate, depositing a layer of polysilicon on the workfunction metal layer, depositing a hard mask layer on the polysilicon layer, etching... Agent: Intel Corporation C/o Intellevate, LLC

20090061613 - Method of forming aluminum oxide layer and method of manufacturing charge trap memory device using the same: Provided is a method of forming an aluminum oxide layer and a method of manufacturing a charge trap memory device using the same. The method of forming an aluminum oxide layer may include forming an amorphous aluminum oxide layer on an underlying layer, forming a crystalline auxiliary layer on the... Agent: Harness, Dickey & Pierce, P.L.C

20090061612 - Nonvolatile memory device and method for fabricating the same: A nonvolatile memory device and method for fabricating the same are provided. The method for fabricating the nonvolatile memory device comprises providing a substrate. A tunnel insulating layer and a first conductive layer are formed in the substrate. A trench is formed through the first conductive layer and the tunnel... Agent: Quintero Law Office, PC

20090061614 - Method for forming bumps on under bump metallurgy: A method for forming a bump on under bump metallurgy according to the present invention is provided. A bonding pad is first formed on the active surface of a wafer. Subsequently, a passivation layer is formed on the active surface of the wafer and exposes the bonding pad. An under... Agent: Lowe Hauptman Ham & Berner, LLP

20090061615 - Method for forming contact in semiconductor device: A method for fabricating a semiconductor device includes providing a substrate, forming an insulation layer over the substrate, forming a photoresist pattern for a contact hole over the insulation layer, wherein the photoresist pattern includes an opening having a critical dimension (CD) greater than a desired contact CD, forming a... Agent: Lowe Hauptman Ham & Berner, LLP

20090061616 - Method for fabricating semiconductor device: A method for fabricating semiconductor device capable of minimizing hillocks and voids. The method includes subjecting an interlayer dielectric having a multi-protective dielectric structure including a first barrier metal layer and a first copper line to a plurality of NH3 treatment processes, forming a capping film on the first copper... Agent: Sherr & Vaughn, PLLC

20090061617 - Edge bead removal process with ecmp technology: A method and apparatus for the removal of a deposited conductive layer along an edge of a substrate using a power ring configured to electro polish an edge of the substrate are provided. The electro polishing of the substrate edge may occur simultaneously with the electrochemical mechanical processing of a... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090061618 - Method of manufacturing metal interconnection: A method of manufacturing a semiconductor is provided. A fist metal layer can be formed on a lower structural layer, and an interlayer metal dielectric (IMD) layer can be formed on the first metal layer. A sacrificial oxide layer can be formed on the IMD layer, and a planarization process... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090061619 - Method of fabricating metal line: A method of fabricating a metal line of a semiconductor device that prevents formation of serrations in a metal line to thereby increase operational reliability of a semiconductor device. The method includes forming a lower metal line in a semiconductor substrate; and then forming a first nitride layer as an... Agent: Sherr & Vaughn, PLLC

20090061620 - Method of manufacturing a semiconductor device: Exuding of a interconnecting material to a substrate, which occurs because of a thinned state of and a beak in a barrier metal layer is prevented, irrespective of a laminated state of the barrier metal layer. In the present invention, a protective layer is formed on a side wall by... Agent: Bruce L. Adams, Esq Adams & Wilks

20090061621 - Method of forming a metal directly on a conductive barrier layer by electrochemical deposition using an oxygen-depleted ambient: By suppressing the presence of free oxygen during a cleaning process and a subsequent electrochemical deposition of a seed layer, the quality of a corresponding interface between the barrier material and the seed layer may be enhanced, thereby also improving performance and the characteristics of the finally obtained metal region.... Agent: Williams, Morgan & Amerson

20090061622 - Method for manufacturing semiconductor device capable of preventing lifting of amorphous carbon layer for hard mask: In a method for manufacturing a semiconductor device, a conductive layer is formed on a semiconductor substrate. A surface of the conductive layer is then treated by plasma. After the conductive layer is treated, an amorphous carbon layer for a hard mask is formed on the surface of the conductive... Agent: Ladas & Parry LLP

20090061623 - Method of forming electrical connection structure: A method of forming an electrical connection structure is described. A dielectric layer is formed covering a first conductor on a substrate, and then an opening is formed in the dielectric layer exposing the first conductor. A first cleaning step is conducted using fluorine-containing plasma to clean the surfaces of... Agent: J C Patents, Inc.

20090061625 - Lcd driver ic and method for manufacturing the same: An LCD driver IC and a method for manufacturing the same. In one example embodiment, an LCD driver IC includes first and second main poly patterns formed separately from each other, a connection poly pattern connecting the main poly patterns, and a salicide blocking (SAB) pattern formed on the main... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090061624 - Method of fabricating integrated circuit with small pitch: A method of manufacturing an integrated circuit with a small pitch comprises providing a second material layer patterned to form at least two features with an opening between the features. The second material layer is formed over a first material layer and the first material layer is over a substrate.... Agent: Jianq Chyun Intellectual Property Office

20090061626 - Method of manunfacturing semiconductor device: Disclosed is a method for manufacturing a semiconductor device comprising forming a hydrophobic interlayer insulating film having a relative dielectric constant of 3.5 or less above a semiconductor substrate, forming a recess in the interlayer insulating film, depositing a conductive material above the interlayer insulating film having the recess to... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090061628 - Laser trimming problem suppressing semiconductor device manufacturing apparatus and method: A semiconductor device manufacturing apparatus includes a substrate holding section that holds a semiconductor wafer substrate, a discharge mechanism that discharges liquid drops of metal paste from a discharge nozzle toward a surface of the semiconductor wafer substrate, and a driving mechanism that moves at least one of the substrate... Agent: Dickstein Shapiro LLP

20090061627 - Method for producing a metal backside contact of a semiconductor component, in particular, a solar cell: The present invention relates to a method for manufacturing a backside contact of a semiconductor component, in particular, of a solar cell, comprising a metallic layer on the backside of a substrate in a vacuum treatment chamber, and the use of a vacuum treatment system for performing said method. Through... Agent: Patterson & Sheridan, L.L.P.

20090061629 - Method of forming a metal directly on a conductive barrier layer by electrochemical deposition using an oxygen-depleted ambient: By suppressing the presence of free oxygen during a cleaning process and a subsequent electrochemical deposition of a seed layer, the quality of a corresponding interface between the barrier material and the seed layer may be enhanced, thereby also improving performance and the characteristics of the finally obtained metal region.... Agent: Williams, Morgan & Amerson

20090061630 - Method for chemical mechanical planarization of a metal-containing substrate: A method using an associated composition for chemical mechanical planarization of a metal-containing substrate (e.g., a copper substrate) is described. This method affords low dishing and local erosion levels on the metal during CMP processing of the metal-containing substrate.... Agent: Air Products And Chemicals, Inc. Patent Department

20090061631 - Gate replacement with top oxide regrowth for the top oxide improvement: Methods of replacing/reforming a top oxide around a charge storage element of a memory cell and methods of improving quality of a top oxide around a charge storage element of a memory cell are provided. The method can involve removing a first poly over a first top oxide from the... Agent: Amin, Turocy & Calvin, LLP

20090061633 - Method of manufacturing semiconductor device: According to an aspect of an embodiment, a method of manufacturing a semiconductor device has forming an insulating layer comprising silica-based insulating material, processing the insulating layer, hydrophobizing the insulating layer by applying a silane compound to act on the insulating layer; and irradiating the insulating layer with light or... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090061632 - Methods for cleaning etch residue deposited by wet etch processes for high-k dielectrics: A method (100) of fabricating a device having at least one multi-cation high-k dielectric layer structure includes (101) providing a substrate having a semiconductor surface, (102) forming a multi-cation high-k dielectric layer on the semiconductor surface, and (103) forming a patterned masking layer including at least one masking layer region... Agent: Texas Instruments Incorporated

20090061634 - Method for metallizing a pattern in a dielectric film: A method of patterning a film stack is described. The method comprises preparing a film stack on a substrate, wherein the film stack comprises a SiCOH-containing layer formed on the substrate, a silicon oxide (SiOx) layer formed on the SiCOH-containing layer, and a mask layer formed on the silicon oxide... Agent: Tokyo Electron U.s. Holdings, Inc.

20090061635 - Method for forming micro-patterns: A method for forming micro-patterns is disclosed. The method forms a sacrificial layer and a mask layer. A plurality of first taper trenches is formed in the sacrificial layer. A photoresist layer is filled in the plurality of first taper trenches. The photoresist layer is used as a mask and... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090061636 - Etching method for nitride semiconductor: The invention discloses etching method for the nitride semiconductor. Firstly dielectric layer is formed on gallium nitride. The line pattern or dot pattern is formed on the dielectric layer by using the exposure, development, and etching processes. The dielectric layer is used as the mask for the epitaxial lateral overgrowth... Agent: Bacon & Thomas, PLLC

20090061637 - Manufacturing method for semiconductor device: A manufacturing method for a semiconductor device includes: forming a first material film, a second material film, each having a function of preventing metal diffusion, and a third material film of which the etching rate for a first etchant is sufficiently lower than that of the first material film and... Agent: Nixon & Vanderhye, PC

20090061638 - Method for fabricating micropattern of semiconductor device: A method for fabricating a micropattern of a semiconductor device is provided. The method includes forming a first hard mask over an etch target layer, forming a first sacrificial layer over the first hard mask, etching the first sacrificial layer to form a sacrificial pattern and forming spacers on both... Agent: Townsend And Townsend And Crew, LLP

20090061640 - Alternate gas delivery and evacuation system for plasma processing apparatuses: A gas distribution system for supplying a gas mixture to a plasma process chamber is provided. A first valve arrangement is connected to upstream ends of a first gas line and a second gas line. A second valve arrangement is connected to downstream ends of the first gas line and... Agent: Buchanan, Ingersoll & Rooney PC

20090061639 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes stacking a spin on carbon (SOC) layer and an multifunction hard mask (MFHM) layer on a substrate, forming a photoresist pattern over the MFHM layer, first etching the MFHM layer using a first amount of a fluorine-based gas, second etching the MFHM... Agent: Townsend And Townsend And Crew, LLP

20090061641 - Method of forming a micro pattern of a semiconductor device: In a method of forming micro patterns, an etch target layer, a hard mask layer, a silicon-containing bottom anti-reflective coating (BARC) layer, and first auxiliary patterns are formed over a semiconductor substrate. The silicon-containing BARC layer is etched to form silicon-containing BARC patterns. Insulating layers are formed on a surface... Agent: Townsend And Townsend And Crew, LLP

20090061642 - Nozzle assembly, apparatus for supplying processing solutions having the same and method of supplying processing solutions using the same: In a nozzle assembly for supplying processing solutions, the nozzle assembly includes a housing, a plurality of supply units arranged in the housing and through which different processing solutions flow onto the substrate, and a plurality of nozzles connected to the supply units, respectively, in such a configuration that a... Agent: Daly, Crowley, Mofford & Durkee, LLP

20090061643 - Substrate processing method and recording medium: A substrate processing method using a substrate processing apparatus including: a process container holding a substrate to be processed therein; first gas supplying means having flow rate adjusting means for supplying a first process gas to the process container; and second gas supplying means supplying a second process gas to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090061645 - semiconductor device including field effect transistors laterally enclosed by interlayer dielectric material having increased intrinsic stress: By appropriately treating an interlayer dielectric material above P-channel transistors, the compressive stress may be significantly enhanced, which may be accomplished by expanding the interlayer dielectric material, for instance, by providing a certain amount of oxidizable species and performing an oxidation process.... Agent: Williams, Morgan & Amerson

20090061644 - Vapor based combinatorial processing: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from... Agent: Martine Penilla Gencarella, LLP

20090061646 - Vapor based combinatorial processing: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from... Agent: Martine Penilla Gencarella, LLP

20090061647 - Curing methods for silicon dioxide thin films deposited from alkoxysilane precursor with harp ii process: Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, the silicon oxide layer including carbon species as a... Agent: Townsend And Townsend And Crew LLP

20090061648 - Method of manufacturing semiconductor device and substrate processing apparatus: A method of manufacturing a semiconductor device includes the steps of loading a substrate into a processing chamber; processing the substrate by supplying plural kinds of reaction substances into the processing chamber multiple number of times; and unloading the processed substrate from the processing chamber, wherein at least one of... Agent: Oliff & Berridge, PLC

20090061649 - Low k porous sicoh dielectric and integration with post film formation treatment: A porous SiCOH (e.g., p-SiCOH) dielectric film in which the stress change caused by increased tetrahedral strain is minimized by post treatment in unsaturated Hydrocarbon ambient. The inventive p-SiCOH dielectric film has more —(CHx) and less Si—O—H and Si—H bondings as compared to prior art p-SiCOH dielectric films. Moreover, a... Agent: Scully, Scott, Murphy & Presser, P.C.

20090061650 - Sacrificial nitride and gate replacement: Methods of forming a top oxide around a charge storage material layer of a memory cell and methods of improving quality of a top oxide around a charge storage material layer of a memory cell are provided. The method can involve providing a charge storage layer on a semiconductor substrate,... Agent: Amin, Turocy & Calvin, LLP

20090061651 - Substrate processing apparatus and method for manufacturing semiconductor device: A substrate processing apparatus comprising: a reaction tube that processes a substrate; a support portion that supports the substrate in the reaction tube; a process gas supply line that supplies a process gas into the reaction tube; and an exhaust line that exhausts an inside of the reaction tube, wherein... Agent: Oliff & Berridge, PLC