Semiconductor device manufacturing: process inventions 07/07

20070172967 - Pattern forming method and pattern forming system: Method of forming a pattern by a nanoimprint technique starts with preparing a mold with nanostructures on its surface. The mold is pressed against a substrate or plate coated with a resin film. The positions of alignment marks formed on the rear surface of the plate coated with the resin... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070172976 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070172979 - Method of manufacturing electronic device using ink-jet method: The present invention relates to a manufacturing method which uses an ink jet method for forming various kinds of thin films in an electronic device such as an organic EL panel or an organic thin film transistor and ink suitably used in the method. The manufacturing method manufactures an electronic... Agent: Reed Smith LLP

20070172964 - Method of forming self-aligned contact via for magnetic random access memory: A method of forming a self-aligned contact via for a MRAM is disclosed. A first conductive layer, a pinned layer, a tunneling barrier layer, a free layer, a capping layer and a first dielectric layer are formed sequentially over a substrate has formed lots of transistors and interconects. A portion... Agent: Jianq Chyun Intellectual Property Office

20070172966 - Automatic on-die defect isolation: Microcircuits may include polysilicon features that are vulnerable to defects due to undesirable phenomena during manufacturing processes such as, inter alia, over-etching. The same phenomena that may cause defects can be exploited to automatically isolate the affected circuit and thus limit the harm caused by defects or incipient defects.... Agent: Robert O'rourke Blakely, Sokoloff, Taylor & Zafman LLP

20070172968 - Method of processing semiconductor substrate: A method of processing a semiconductor substrate for manufacturing a semiconductor device includes: obtaining pattern density information of the semiconductor product; applying the pattern density information to a previously determined relation between pattern densities and etch parameters so as to obtain process conditions for the semiconductor product; and etching the... Agent: Mills & Onello LLP

20070172965 - Non-destructive trench volume determination and trench capacitance projection: Methods of determining trench volume are disclosed. In one embodiment, the method includes providing a semiconductor substrate with at least one trench in a trench area; filling each trench with a filling material; measuring a step height between the trench area and a trench free area; and determining the trench... Agent: Hoffman, Warnick & D'alessandro LLC

20070172969 - Additive printed mask process and structures produced thereby: A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask... Agent: Jonathan A. Small JasIPConsulting

20070172970 - Method of manufacturing a solid-state imaging device: A method of manufacturing a solid-state imaging device, wherein the solid-state imaging device comprising: a semiconductor substrate; a plurality of photodiodes that are formed on a surface of the semiconductor substrate so as to be arranged in an array form; and a light shielding film, provided on or above the... Agent: Birch Stewart Kolasch & Birch

20070172971 - Desiccant sealing arrangement for oled devices: A method of encapsulating an OLED device, comprising: providing a substrate; forming an OLED device over the substrate, and a cover over the OLED device; and providing a desiccant sealing arrangement between the cover and the substrate, with the desiccant sealing arrangement provided by forming a perimeter seal and a... Agent: Pamela R. Crocker Patent Legal Staff

20070172972 - Manufacture method of display device: It is an object of the present invention to reduce the consumption of materials for manufacturing a display device, simplify the manufacturing process and the apparatus used for it, and lower the manufacturing costs. The present invention provides a technique to manufacture a display device, applying a means to form... Agent: Nixon Peabody, LLP

20070172973 - Method of making diode having reflective layer: A method of forming a light emitting diode includes forming a transparent substrate and a GaN buffer layer on the transparent substrate. An n-GaN layer is formed on the buffer layer. An active layer is formed on the n-GaN layer. A p-GaN layer is formed on the active layer. A... Agent: Mckenna Long & Aldridge LLP

20070172974 - Fabrication method of cmos image sensor: Disclosed herein is a method of a method of fabricating a CMOS image sensor, in which process margin of a micro lens is secured to prevent defects from occurring in the micro lens to thereby improve the quality of image sensor products. An interlayer insulation layer is formed on a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070172975 - Semiconductor device and fabrication method thereof: A method of forming a MEMS structure over active circuitry in a semiconductor body includes forming active circuitry in a semiconductor body, and forming the MEMS structure over the active circuitry, wherein at least a portion of the MEMS structure spatially overlaps the active circuitry.... Agent: Texas Instruments Incorporated

20070172977 - Methods for forming alignment marks on semiconductor devices: A semiconductor device includes alignment marks that are aligned with device features. The semiconductor device includes a device feature, a pair of first alignment marks, a pair of second alignment marks, and a pair of third alignment marks. The first alignment marks are aligned along a first direction with the... Agent: Myers Bigel Sibley & Sajovec

20070172978 - Manufacture of a polymer device: A method of forming a polymer device including the steps of: (i) depositing on a substrate a solution comprising a polymer or oligomer and a crosslinking moiety, to form a layer; (ii) curing the layer formed in step (i) under conditions to form an insoluble crosslinked polymer, characterized in that... Agent: Marshall, Gerstein & Borun LLP

20070172980 - Semiconductor apparatus manufacturing method: The semiconductor apparatus includes a semiconductor chip, and a source electrode and a gate electrode which are formed on the semiconductor chip and electrically connected with a lead frame. The source electrode is electrically connected with the lead frame by being laser-welded with a thin-film shaped connecting portion formed at... Agent: Foley And Lardner LLP Suite 500

20070172981 - Method for making flip chip on leadframe package: The present invention relates to a flip chip on leadframe package and the method for making the same. The method comprises: (a) providing a leadframe having a plurality of inner leads; (b) providing a chip having an active surface; (c) forming a plurality of first bumps and at least one... Agent: Volentine & Whitt PLLC

20070172982 - Three-dimensional package and method of making the same: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a semiconductor body; (b) forming at least one blind hole in the semiconductor body; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a... Agent: Volentine & Whitt PLLC

20070172983 - Three-dimensional package and method of making the same: The present invention relates to a three-dimensional package and a method of making the same. The three-dimensional package comprises a first wafer, at least one first hole, a first isolation layer, a first conductive layer, a first solder, a second wafer, at least one second hole, a second isolation layer,... Agent: Volentine & Whitt PLLC

20070172984 - Three-dimensional package and method of making the same: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a wafer; (b) forming at least one blind hole in the wafer; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer... Agent: Volentine & Whitt PLLC

20070172985 - Three-dimensional package and method of making the same: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a wafer; (b) forming at least one blind hole in the wafer; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer... Agent: Volentine & Whitt PLLC

20070172986 - Three-dimensional package and method of making the same: The present invention relates to a three-dimensional package and a method of making the same. The three-dimensional package structure comprises a first wafer, at least one first hole, a first isolation layer, a first conductive layer, a first metal, a first solder, a second wafer, at least one second hole,... Agent: Volentine & Whitt PLLC

20070172987 - Membrane-based chip tooling: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at... Agent: Morgan & Finnegan, L.L.P.

20070172988 - Microstructure manufacturing method and microstructure: A microstructure, suitable for avoiding sticking phenomena, includes a base, a first structural portion joined to the base, and a second structural portion opposed to the base and having a fixed end fixed to the first structural portion. Such a microstructure is made by a method including the step of... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070172989 - Polymerization initiator systems containing aluminum compounds as curing inhibitors and polymerizable compositions made therewith: The invention is directed to a composition comprising an organoborane/amine complex and an effective amount of an aluminum compound to inhibit curing of the organoborane/amine complex when used as part of a polymerization initiator system in a polymerizable composition containing one or more monomers, oligomers or polymers having olefinic unsaturation.... Agent: Louis A Morris Akzo Nobel Inc

20070172990 - Method of packaging a semiconductor die and package thereof: A method of packaging a semiconductor die includes the steps of providing a flange (110), coupling one or more active die (341) to the flange with a lead-free die attach material (350), staking a leadframe (120) to the flange after coupling the one or more active die to the flange,... Agent: George C. Chen Bryan Cave LLP

20070172991 - Microstructure sealing tool and methods of using the same: A method of packing electronic devices and an apparatus thereof are disclosed herein. The method allows for usage of solder materials with a melting temperature of 180° C. or higher, such as from 210° C. to 300° C., and from 230° C. to 260° C., so as to provide reliable... Agent: Texas Instruments Incorporated

20070172992 - Methods for fabricating stiffeners for flexible substrates: Methods for fabricating stiffeners for flexible substrates, including, but not limited to, tapes, films, or other connective structures, which are configured to be secured to other semiconductor device components, are fabricated under control of a program. The stiffeners may be formed by selectively depositing or consolidating unconsolidated material. They may... Agent: Trask Britt, P.C./ Micron Technology

20070172993 - Flow cell and methods for using the same: A method of uniformly draining liquid from a patterned surface using a flow cell is provided. The method may be employed in a variety of applications, including in chemical array fabrication. In an exemplary embodiment, the invention provides an apparatus for fabricating a chemical array that employs a flow cell.... Agent: Agilent Technologies Inc.

20070172994 - Read-only memory device coded with selectively insulated gate electrodes: During fabrication of a mask read-only memory (ROM) device, a dielectric layer is grown on a substrate. Strip-stacked layers are formed on the dielectric layer, with each strip-stacked layer including a polysilicon and a silicon nitride layer. Source/drain regions are formed in the substrate between the strip-stacked layers, and spacers... Agent: Stout, Uxa, Buyan & Mullins LLP

20070172995 - Method for forming fuse of semiconductor device: A method for forming a fuse of a semiconductor device by forming a plate layer wherein a predetermined portion of the plate layer is cut by etching; forming an interlayer insulating film over the plate layer; forming a plate layer contact which is connected to the plate layer through the... Agent: Heller Ehrman LLP

20070172996 - Method of forming a semiconductor device with decreased undercutting of semiconductor material: A semiconductor device is formed by patterning a semiconductor layer to create a vertical active region and a horizontal active region, wherein the horizontal active region is adjacent the vertical active region. The semiconductor layer overlies an insulating layer. A spacer is formed adjacent the vertical active region and over... Agent: Freescale Semiconductor, Inc. Law Department

20070172997 - Semiconductor device and method of manufacturing the same: There is provided a semiconductor device including a substrate, a device isolation insulating film formed on the substrate, a gate electrode formed on the substrate, a gate wiring layer formed in the device isolation insulating film and connected to the gate electrode, source and drain electrodes arranged on the substrate... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070172998 - Thin film transistor substrate, method of manufacturing the same and liquid crystal display having the same: A thin film transistor substrate and method of manufacturing a thin film transistor substrate through a 3-sheet mask process includes forming a first conductive film on a substrate; forming a gate line including a gate electrode using a first photoresist film pattern formed on the first conductive film through a... Agent: Cantor Colburn, LLP

20070172999 - Method for manufacturing electronic device using thin film transistor with protective cap over flexible substrate: In a thin film semiconductor device realized on a flexible substrate, an electronic device using the same, and a manufacturing method thereof, the thin film semiconductor device and an electronic device include a flexible substrate, a semiconductor chip, which is formed on the flexible substrate, and a protective cap, which... Agent: Lee & Morse, P.C.

20070173000 - Method of manufacturing a semiconductor device: There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the... Agent: Eric Robinson

20070173001 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device includes expanding an active region and a recess region by an epitaxial growth process. As a result, a margin is sufficiently secured in processes for forming a device isolation film that defines the active region and for expanding a recess region to form... Agent: Heller Ehrman LLP

20070173002 - Spacer t-gate structure for cosi2 extendibility: A semiconductor process and apparatus provide a T-shaped structure (84) formed from a polysilicon structure (10) and polysilicon spacers (80, 82) and having a narrower bottom dimension (e.g., at or below 40 nm) and a larger top critical dimension (e.g., at or above 40 nm) so that a silicide may... Agent: Hamilton & Terrile, LLP

20070173003 - Methods of manufacturing semiconductor devices with rotated substrates: Integrated circuits are oriented on a substrate at an angle that is rotated between 5 to 40 degrees from a direction parallel or perpendicular to a preferred crystalline plane direction, such as the cleavage plane, of the substrate. Parameters such as stress and mobility of transistors may be optimized by... Agent: Slater & Matsil LLP

20070173004 - Epi t-gate structure for cosi2 extendibility: A semiconductor process and apparatus provide a T-shaped structure (96) formed from a polysilicon structure (10) and an epitaxially grown polysilicon layer (70) and having a narrower bottom critical dimension (e.g., at or below 40 nm) and a larger top critical dimension (e.g., at or above 40 nm) so that... Agent: Hamilton & Terrile, LLP

20070173005 - Method for fabricating semiconductor device: A method for manufacturing a semiconductor device in accordance with an embodiment of the present invention provides a channel region formed over a device isolation structure to form a semiconductor device including a SOI (Silicon-on-Insulator) channel structure, thereby decreasing ion implanting concentration of a channel region and improving tWR (Write... Agent: Townsend And Townsend And Crew, LLP

20070173006 - Semiconductor memory device and a method of manufacturing the same: A memory cell of an SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly comprise laminate formed of a lower semiconductor layer, intermediate semiconductor layer and upper semiconductor layer laminated in this... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070173007 - Semiconductor device and method for fabricating the same: The semiconductor device includes an active region, a recess channel region, a storage node junction region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate, wherein a lower part of sidewalls of the active region is... Agent: Townsend And Townsend And Crew, LLP

20070173008 - Introduction of metal impurity to change workfunction of conductive electrodes: Semiconductor structures, such as, for example, field effect transistors (FETs) and/or metal-oxide-semiconductor capacitor (MOSCAPs), are provided in which the workfunction of a conductive electrode stack is changed by introducing metal impurities into a metal-containing material layer which, together with a conductive electrode, is present in the electrode stack. The choice... Agent: Scully Scott Murphy & Presser, PC

20070173009 - Method of fabricating a dual-gate structure that prevents cut-through and lowered mobility: A method of fabricating a dual-gate semiconductor device, including forming a first PMOS transistor on a semiconductor substrate, the first PMOS transistor having a first gate electrode and a first gate insulation layer; and forming a first NMOS transistor on the semiconductor substrate, the first NMOS transistor having a second... Agent: Volentine & Whitt PLLC

20070173010 - Embedded phase-change memory and method of fabricating the same: An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and a MOS transistor, adjacent and electrically connected, on a substrate. The bipolar transistor includes a base composed of SiGe disposed... Agent: Ladas & Parry LLP

20070173012 - Semiconductor device featuring common capacitor electrode layer, and method for manufacturing such semiconductor device: In a semiconductor device, a semiconductor substrate is sectioned into a logic-circuit formation section in which a plurality of logic circuits are formed, and a memory formation section in which a plurality of memory cells are formed. A multi-layered insulating layer is formed on the substrate, and a conductive structure... Agent: Mcginn Intellectual Property Law Group, PLLC

20070173011 - Semiconductor device and method of manufacturing the same: Disclosed is a method of manufacturing a semiconductor device, which comprises the steps of: forming a hydrogen diffusion preventing insulating film covering capacitors; forming a capacitor protecting insulating film on the hydrogen diffusion preventing insulating film; and forming a first insulating film on the capacitor protecting insulating film by a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070173013 - Semiconductor fabrication that includes surface tension control: In one embodiment, a method includes providing a semiconductor substrate that includes a memory container having a double-sided capacitor. The method also includes vapor phase etching a layer adjacent to the side wall of the memory container with a vapor having a surface tension lowering agent.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070173014 - Method for forming memory cell and device: A memory cell, device, and system include a memory cell having a shared digitline, a storage capacitor, and a plurality of access transistors configured to selectively electrically couple the storage capacitor with the shared digitline. The digitline couples with adjacent memory cells and the access transistors selects which adjacent memory... Agent: Trask Britt, P.C./ Micron Technology

20070173015 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes forming first, second, and third device structures in a semiconductor substrate. Each device structure includes a first film, a second film over the first film, and a third film over the second film. The first and third device structures are device isolation... Agent: Townsend And Townsend And Crew, LLP

20070173016 - Integrated circuit system with dummy region: An integrated circuit system comprised by forming a first region, a second region and a third region within a dielectric over a substrate. The first region includes tungsten plugs. The second region is formed adjacent at least a portion of the perimeter of the first region and the third region... Agent: Ishimaru & Zahrt LLP

20070173020 - Semiconductor device and method of manufacturing the same: A semiconductor device manufacturing method includes forming a first insulating film on a semiconductor substrate containing silicon, the first insulating film having a first dielectric constant and constituting a part of a tunnel insulating film, forming a floating gate electrode film on the first insulating film, the floating gate electrode... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070173017 - Advanced non-volatile memory array and method of fabrication thereof: A method for creating a non-volatile memory array includes generating removable mask columns to define bit lines, implanting bit lines into the substrate at least between the columns, depositing oxide filler over the bit lines, removing the mask columns, depositing a polysilicon layer over the array and etching the polysilicon... Agent: Empk & Shiloh, LLP

20070173018 - Memory device fabrication: The invention provides methods of fabricating memory devices. One embodiment forms a bulk insulation layer overlying a plurality of source/drain regions formed in a substrate, removes a cap layer formed on each of a plurality of gate stacks formed on the substrate to expose an upper surface of each of... Agent: Leffert Jay & Polglaze, P.A. Attn: Tod A. Myrum

20070173019 - Programmable resistive ram and manufacturing method: Programmable resistive RAM cells have a resistance that depends on the size of the contacts. Manufacturing methods and integrated circuits for lowered contact resistance are disclosed that have contacts of reduced size.... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20070173021 - Self-aligned trench mosfet structure and method of manufacture: PATENT A trench gate FET is formed as follows. A well region is formed in a silicon region. A plurality of active gate trenches and a termination trench are simultaneously formed in an active region and a termination region of the FET, respectively, such that the well region is divided... Agent: Townsend And Townsend And Crew, LLP

20070173022 - Defect-free sige source/drain formation by epitaxy-free process: MOSFET transistors having localized stressors for improving carrier mobility are provided. Embodiments of the invention comprise a gate electrode formed over a substrate, a carrier channel region in the substrate under the gate electrode, and source/drain regions on either side of the carrier channel region. The source/drain regions include an... Agent: Slater & Matsil, L.L.P.

20070173023 - Semiconductor device manufacturing method: After gate insulating film formation films are formed in an element formation region of a semiconductor substrate, a gate electrode formation film is formed on the gate insulating film formation films. A fluorine-containing insulting film is formed on the gate electrode formation film. Then, thermal treatment is performed to diffuse... Agent: Mcdermott Will & Emery LLP

20070173024 - Method for producing two gates controlling the same channel: A semiconductor process and apparatus use a predetermined sequence of patterning and etching steps to etch a gate stack (62) formed over a substrate (11) and a first spacer structure (42), thereby forming etched gate structures (72, 74) that are physically separated from one another but that control a substrate... Agent: Hamilton & Terrile, LLP

20070173025 - Semiconductor device and method for fabricating the same: First and second gate portions each made of a gate insulating film, a silicon film, and a protective film are formed on a semiconductor substrate. Then, a first sidewall insulating film is formed on each of the side surfaces of the first and second gate portions. Subsequently, the protective film... Agent: Mcdermott Will & Emery LLP

20070173026 - Method for fabricating bipolar integrated circuits: The present invention discloses a method for fabricating bipolar integrated circuits, wherein LOCOS technology is used to define the active regions needed by all elements so that the self-alignment of the associated layers can be realized, and implant resistor regions are also directly defined in the active regions by local... Agent: Birch Stewart Kolasch & Birch

20070173027 - Semiconductor device and method of manufacturing the same: In a semiconductor device and a method of manufacturing the semiconductor device, the semiconductor device includes a conductive structure, first insulating layers and first conductive layer patterns. The conductive structure includes a first portion, second portions and third portions. The second portions extend in a first direction on the first... Agent: Mills & Onello LLP

20070173028 - Method of forming dielectric film and capacitor manufacturing method using the same: In a method of manufacturing a capacitor, a lower electrode of a capacitor is formed on or above a semiconductor substrate. An ozone gas and an inert gas are simultaneously introduced for a predetermined period into a reaction chamber of an atomic layer deposition apparatus in which the semiconductor substrate... Agent: Mcginn Intellectual Property Law Group, PLLC

20070173029 - Method for fabricating high performance metal-insulator-metal capacitor (mimcap): A method of fabricating a high performance metal-insulator-metal capacitor (MIMCAP) includes providing a first inter-level dielectric (ILD) layer over an isolation region; forming a MIMCAP pattern in the first ILD layer over the isolation region; depositing a conformal conductive liner over the MIMCAP pattern and the first ILD layer; depositing... Agent: Ibm Corporation RochesterIPLaw Dept 917

20070173030 - Methods of forming a plurality of capacitors: The invention includes methods of forming a plurality of capacitors. In one implementation, a plurality of capacitor electrode openings is formed over a substrate. Individual of the capacitor electrode openings are bounded on a first pair of opposing sides by a first capacitor electrode-forming material at one elevation and on... Agent: Wells St. John P.s.

20070173031 - Thin-film circuit device, method for manufacturing thin-film circuit device, and electronic apparatus: A thin-film circuit device includes a substrate and a thin-film circuit layer, disposed on the substrate, having an element region and a low-strength region. The element region includes thin-film elements. The low-strength region extends between an end portion of the thin-film circuit layer and the element region and has a... Agent: Harness, Dickey & Pierce, P.L.C

20070173033 - Method of fabricating a composite substrate with improved electrical properties: The invention concerns a method of fabricating a composite substrate comprising at least one thin insulating layer interposed between a support substrate and an active layer of semiconductor material. The method comprises: providing a source substrate that comprises a semiconductor material and a support substrate; forming or depositing an insulating... Agent: Winston & Strawn LLP Patent Department

20070173032 - Wafer dicing by channels and saw: In a silicon wafer two channels are etched in each street separated enough to bracket the saw. The channels may be shallow. The saw blade is positioned within the two channels so that the outer wall of each of the channels is beyond the outer edge of the saw. Cracks... Agent: Lexmark International, Inc. Intellectual Property Law Department

20070173034 - Method for manufacturing integrated circuit: A method for separating an integrated circuit formed by a thin film having a novel structure or a method for transfer-ring the integrated circuit to another substrate, that is, so-called transposing method, has not been proposed. According to the present invention, in the case that an integrated circuit having a... Agent: Eric Robinson

20070173035 - Manufacturing method of semiconductor device: When cutting a wafer, cutting is performed so that the portion of a V character-shaped shoulder may enter below the front surface of a wafer (depth Z2 from a substrate front surface) using the metal-bond blade which includes the abrasive particle whose fineness number is more than #3000, and whose... Agent: Mcdermott Will & Emery LLP

20070173036 - Production method of compound semiconductor light-emitting device wafer: The inventive production method of a compound semiconductor light-emitting device (LED)s wafer comprises a step of forming a protective film on the top and/or bottom surface of a compound semiconductor LEDs wafer, where the devices being regularly and periodically arranged with separation zones being disposed; a step of forming separation... Agent: Sughrue Mion, PLLC

20070173037 - Method of transferring strained semiconductor structures: The transfer of strained semiconductor layers from one substrate to another substrate involves depositing a multilayer structure on a substrate having surface contaminants. An interface that includes the contaminants is formed in between the deposited layer and the substrate. Hydrogen atoms are introduced into the structure and allowed to diffuse... Agent: Los Alamos National Security, LLC

20070173038 - Method for manufacturing semiconductor device: A method forming a semiconductor device includes forming a domed gate oxide film to relieve stress resulting from a thermal expansion rate difference of an oxide film and silicon film during a subsequent thermal process and preventing leakage current between source/drain regions through thickness regulation of the gate oxide film... Agent: Heller Ehrman LLP

20070173039 - Method for fabricating a semiconductor device and apparatus for inspecting a semiconductor: In a method for fabricating a semiconductor device and an apparatus for inspecting a semiconductor, laser processing is performed at different laser powers at different positions on a monitor substrate from a plurality of substrates having undergone an SPC step, to form polycrystalline silicon film over the entire area of... Agent: Sharp Kabushiki Kaisha C/o Keating & Bennett, LLP

20070173040 - Method of reducing an inter-atomic bond strength in a substance: A method of reducing an inter-atomic bond strength in a substance includes the steps of: providing a target material (110, 910, 1210, 1260, 1410, 1460); exposing the target material to a particle flood (140); and annealing the target material while exposing the target material to the particle flood. As an... Agent: Kenneth A. Nelson Bryan Cave LLP

20070173043 - Ion implantation system having variable screen aperture and ion implantation method using the same: An ion implantation system includes a source portion, a beam line portion, a target chamber having a platen, and a Faraday portion having a dose cup and a first variable screen aperture, wherein the platen is capable of moving in a second direction and supporting a semiconductor substrate, and the... Agent: Lee & Morse, P.C.

20070173042 - Method for fabricating semiconductor device: A method for fabricating a semiconductor device includes forming a gate structure comprising a stacked structure of a gate electrode and a gate hard mask layer over a semiconductor substrate having a device isolation structure. An insulating film filling up the gate structure is formed. A predetermined region of the... Agent: Heller Ehrman LLP

20070173041 - Method of manufacturing a semiconductor device and semiconductor device obtained with such a method: The invention relates to a method of manufacturing a semiconductor device (10) in which a semiconductor body (1) of silicon is provided, at a surface thereof, with a semiconductor region (4) of a first conductivity type, in which region a second semiconductor region (2A, 3A) of a second conductivity type,... Agent: Philips Intellectual Property & Standards

20070173044 - Wafer handler method and system: Systems and methods for handling wafers include retrieving a first wafer from a wafer cassette using a first arm, transferring the first wafer from the first transfer arm to a second arm, delivering the first wafer for processing to a process chamber using the second arm, removing the first wafer... Agent: Foley Hoag, LLP Patent Group, World Trade Center West

20070173045 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device having a back surface electrode, including: a step of preparing a semiconductor wafer having a front surface and a back surface; a thermal processing step of forming a first metal layer on the back surface of the semiconductor wafer and executing thermal processing,... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070173046 - Substrate processing apparatus and method and a manufacturing method of a thin film semiconductor device: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at... Agent: Eric Robinson

20070173047 - Fusi integration method using sog as a sacrificial planarization layer: A method for making a transistor 20 that includes using a transition metal nitride layer 200 and/or a SOG layer 220 to protect the source/drain regions 60 from silicidation during the silicidation of the gate electrode 90. The SOG layer 210 is planarized to expose the transition metal nitride layer... Agent: Texas Instruments Incorporated

20070173049 - Capacitor and method for fabricating the same: There is provided a capacitor and a method for fabricating the same. The method may include forming an interlayer insulation layer on a semiconductor substrate, patterning the interlayer insulation layer to form a contact hole exposing a region of the semiconductor substrate and forming a contact plug by filling the... Agent: Harness, Dickey & Pierce, P.L.C

20070173050 - Semiconductor device and method of manufacturing the same: A barrier metal film such as a TiN film is formed in a contact hole or a via hole. Then, a W nucleation film is formed on the barrier metal film by CVD that reduces WF6 gas with B2H6 gas. Subsequently, a W plug is formed as a contact plug... Agent: Mcdermott Will & Emery LLP

20070173048 - Method of manufacturing an electrical component: There is disclosed a method of manufacturing an electrical component, involving bonding a thin metal foil to an insulating substrate and thereby forming a component blank, and laser machining at least the metal foil of said component blank to produce at least one trench for defining one or more foil... Agent: Stites & Harbison PLLC

20070173051 - Method and/or system for forming a thin film: Embodiments of methods, apparatuses, devices, and/or systems for forming a thin film are described.... Agent: Hewlett Packard Company

20070173052 - Electroplating method by transmitting electric current from a ball side: An electroplating method by transmitting electric current from a ball side is provided. In the electroplating method, the circuit layer is firstly formed on the bump side of the IC board, and the electric current is transmitted to the portion of the circuit layer uncovered by the insulating layer formed... Agent: Lin & Associates Intellectual Property

20070173053 - Method for manufacturing wiring and method for manufacturing semiconductor device: The present invention provides a method for manufacturing a wiring and a method for manufacturing a semiconductor device, which do not require a photolithography step in connecting a pattern of an upper layer and a pattern of a lower layer. According to the present invention, a composition including a conductive... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070173054 - Insulating film forming method capable of enhancing adhesion of silicon carbide film, etc. and semiconductor device: A first film made of silicon carbide is formed over a substrate. The surface of the first film is exposed to an oxidizing atmosphere to oxidize the surface layer of the first film. The surface of the first film is made in contact with chemical which makes the surface hydrophilic.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070173055 - Fabrication method of semiconductor device: A method for fabricating a semiconductor device includes the steps of forming an opening defined by an inner wall surface in an insulation film, forming a Cu—Mn alloy layer in the opening, depositing a Cu layer on the Cu—Mn alloy layer and filling the opening with the Cu layer, and... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070173056 - Semiconductor device fabrication method and polishing apparatus: A method for fabricating a semiconductor device includes forming a barrier metal film on a substrate with an opening defined therein, forming a copper-containing film on said barrier metal film after having formed said barrier metal film on a surface of said substrate and an inner wall of said opening,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070173057 - Method for fabricating storage node contact in semiconductor device: A method for fabricating a storage node contact in a semiconductor device includes forming a plurality of bit line patterns, each bit line pattern including a bit line hard mask formed over a bit line conductive layer, forming an inter-layer insulation layer filled between the bit line patterns, planarizing the... Agent: Townsend And Townsend And Crew, LLP

20070173058 - Semiconductor device: A resin material having low dielectric constant is used as an inter-layer insulating film and its bottom surface is contacted with a silicon oxide film across the whole surface thereof. Thereby, the surface may be flattened and capacity produced between a thin film transistor and an pixel electrode may be... Agent: Fish & Richardson P.C.

20070173059 - Process kit components for titanium sputtering chamber: A process kit for a sputtering chamber comprises a deposition ring, cover ring, and a shield assembly, for placement about a substrate support in a sputtering chamber. The deposition ring comprising an annular band with an inner lip extending transversely, a raised ridge substantially parallel to the substrate support, an... Agent: Janah & Associates, P.C.

20070173060 - Methods of forming electrically conductive plugs and method of forming resistance variable elements: A method of forming an electrically conductive plug includes providing an opening within electrically insulative material over a node location on a substrate. An electrically conductive material is formed within the opening and elevationally over the insulative material. Some of the conductive material is removed effective to recess an outermost... Agent: Wells St. John P.s.

20070173061 - Copper metal interconnection with a local barrier metal layer: Embodiments relate to a method of forming a copper metal interconnection in a semiconductor device using a damascene process. In embodiments, the method may include forming a damascene pattern in an interlayer dielectric layer on a semiconductor substrate, burying a copper plating layer in the damascene pattern using an ECP... Agent: Sherr & Nourse, PLLC

20070173062 - Method of cleaning a surface of a cobalt-containing material, method of forming an opening to a cobalt-containing material, semiconductor processing method of forming an integrated circuit comprising a copper-containing conductive line, and a cobalt-conta: The invention includes methods of cleaning a surface of a cobalt-containing material, methods of forming an opening to a cobalt-containing material, semiconductor processing methods of forming an integrated circuit comprising a copper-containing conductive line, and cobalt-containing film cleaning solutions. In one implementation, a method of cleaning a surface of a... Agent: Wells St. John P.s.

20070173063 - Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram: A method for manufacturing a self aligned narrow structure over a wider structure based on mask trimming. A method for manufacturing a memory device comprises forming an electrode layer on a substrate which comprises circuitry made using front-end-of-line procedures. The electrode layer includes a first electrode and a second electrode,... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20070173064 - Manufacturing process for a transistor made of thin layers: m

20070173065 - Method for manufacturing semiconductor device: The invention is directed to a method for manufacturing semiconductor device. The method comprises steps of providing a substrate and then forming a dielectric material-containing device over the substrate. A plasma vapor deposition process is performed to form a dielectric layer over the substrate. A first baking process is performed.... Agent: Jianq Chyun Intellectual Property Office

20070173066 - Manufacturing method of electronic device: A manufacturing method of an electronic device, includes the steps of: implanting P (phosphorous) ions into a substrate semiconductor region made of Si or SiGe by using a resist as a mask; ashing the resist while it is heated in a vacuum environment; and taking out the substrate, the substrate... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070173067 - Opening hard mask and soi substrate in single process chamber: Methods for opening a hard mask and a silicon-on-insulator substrate in a single process chamber are disclosed. In one embodiment, the method includes patterning a photoresist over a stack including an anti-reflective coating (ARC) layer, a silicon dioxide (SiO2) based hard mask layer, a silicon nitride pad layer, a silicon... Agent: Hoffman, Warnick & D'alessandro LLC

20070173068 - Etching of substrates of light emitting devices: Fabrication of a light emitting device includes etching of a substrate of the light emitting device. The etch may be an aqueous etch sufficient to increase an amount of light extracted through the substrate. The etch may be a direct aqueous etch of a silicon carbide substrate. The etch may... Agent: Myers Bigel Sibley & Sajovec, P.A.

20070173069 - Method of forming insulating layer of semiconductor device: A method of forming an insulating layer on a silicon substrate in a process chamber is disclosed. The method comprises forming a nitride layer on the silicon substrate, and thereafter performing a thermal oxidation process on the silicon substrate and nitride layer, wherein the thermal oxidation process generates energized oxygen... Agent: Volentine & Whitt PLLC

20070173070 - Porous low-k dielectric film and fabrication method thereof: A method for fabricating a porous low-k dielectric film includes providing a substrate, performing a first CVD process by providing a back-bone precursor to form an interface dielectric layer, performing a second CVD process by providing a porogen precursor to form a back-bone layer, and removing the porogens in the... Agent: North America Intellectual Property Corporation

20070173071 - Sicoh dielectric: A porous composite material useful in semiconductor device manufacturing, in which the diameter (or characteristic dimension) of the pores and the pore size distribution (PSD) is controlled in a nanoscale manner and which exhibits improved cohesive strength (or equivalently, improved fracture toughness or reduced brittleness), and increased resistance to water... Agent: Scully Scott Murphy & Presser, PC

20070173072 - Method for producing silicon oxide film: p

20070173073 - Porous silicon dielectric: Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A manufacturing method comprises forming a layer of silicon over a substrate, forming an opening through the layer of silicon, filling the opening with a conductor; and anodically etching the layer of silicon so... Agent: Slater & Matsil LLP

20070173074 - Semiconductor interlayer dielectric material and a semiconductor device using the same: The present invention relates to low a dielectric material essential for a next generation semiconductor with high density and high performance, and more particularly to a low dielectric material that is thermally stable and has good film-forming properties and excellent mechanical properties, a dielectric film comprising the low dielectric material,... Agent: Mckenna Long & Aldridge LLP

20070173075 - Laser-based method and system for processing a multi-material device having conductive link structures: A laser-based method and system for selectively processing a multi-material device having a target link structure formed on a substrate while avoiding undesirable change to an adjacent link structure also formed on the substrate are disclosed. The method includes applying at least one focused laser pulse having a wavelength into... Agent: Brooks Kushman P.C.

20070173076 - Equipment for sensing malfunctioning roughing valves in an ion implantation apparatus: A system for detecting a malfunction of a roughing valve in an ion implantation apparatus, including a valve driving controller, at least one roughing valve having an open-state and a closed-state, at least one solenoid driver electrically connected to the valve driving controller and capable of operating the roughing valve,... Agent: Lee & Morse, P.C.

20070166849 - Method of manufacturing member with concave portions, member with concave portions, lens substrate, transmission type screen and rear projection: A method of manufacturing a member with concave portions includes preparing a base material, forming a mask formation film on the base material, forming a number of openings in the mask formation film by laser irradiation treatments using a branching filter, and etching the base material to form the concave... Agent: Harness, Dickey & Pierce, P.L.C

20070166858 - Method of manufacturing vertical inorganic alignment layer and liquid crystal display having the vertical inorganic alignment layer: In a method of manufacturing a vertical inorganic alignment layer and a liquid crystal display having the vertical inorganic alignment layer, a plasma power is applied to a plasma generating member attached to an outside of a reactor. When a process substrate to which a back-bias voltage and heat are... Agent: F. Chau & Associates, LLC

20070166857 - Rubbing system for alignment layer of lcd and method thereof: A rubbing system for an alignment layer of a liquid crystal display (LCD) device, comprises: a rubbing table on which a substrate having an alignment layer thereon is positioned; a rubbing roll on which a rubbing material is wound, substantially positioned on the rubbing table thus to substantially contact the... Agent: Mckenna Long & Aldridge LLP

20070166863 - Method for forming mirror devices for a digital light process apparatus: A method for forming mirror devices for a DLP apparatus. The method includes: forming a lower metal layer as wiring for driving a micromirror that perform light switching operation on a screen sensor; forming a lower inter-metal dielectric layer over the lower metal layer; forming a light path blocking plate... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070166865 - Cmos image sensor and method for manufacturing the same: A CMOS image sensor and a method for manufacturing the same are provided. The method includes: preparing a semiconductor substrate in which a device isolation region and an active region are defined; forming a gate pattern including a gate oxide layer and a gate electrode on the semiconductor substrate; implanting... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20070166870 - Method of forming a phase-changeable structure: In one embodiment, a phase-changeable structure can be formed by forming a phase-changeable layer on the lower electrode, forming a conductive layer on the phase-changeable layer, etching the conductive layer using a first etching material to form an upper electrode and etching the phase-changeable layer using a second etching material... Agent: Marger Johnson & Mccollom, P.C.

20070166871 - Npn-type low molecular aromatic ring compounds and organic semiconductors and electronic devices incorporating such compounds: Disclosed herein are NPN-type low molecular aromatic ring compounds, organic semiconductor layers formed from such compounds that exhibit improved electrical stability and methods of forming such layers using solution-based processes, for example, spin coating processes performed at or near room temperature. These NPN-type compounds may be used, either singly or... Agent: Harness, Dickey & Pierce, P.L.C

20070166839 - Method for fabricating magnetoresistance multi-layer: A fabrication method of a magnetoresistance multi-layer is provided. The method includes forming a multi-layer with at least an antiferromagnetic layer and performing an ion irradiation process to the multi-layer to transform a disordered structure of the antiferromagnetic layer to an ordered structure. Accordingly, the process time can be reduced... Agent: Jianq Chyun Intellectual Property Office

20070166838 - Method for patterning a ferroelectric polymer layer: Ferroelectric polymers such as for example copolymers of vinylidenedifluoride (VDF) and trifluoroethylene (TrFE) may be patterned by spincoating the ferroelectric polymer layer from a ferroelectric spincoating solution, which comprises a photosensitive crosslinker, onto a substrate followed by irradiating the ferroelectric polymer layer through a mask and removing the unexposed parts... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070166841 - Spin transistor and manufacturing method thereof: A spin transistor and a manufacturing method thereof are provided. The method includes defining a required area on a substrate by lithography; forming a doping area by ion-implantation, and forming a magnetoresistive film on the substrate. Finally, the method produces a spin transistor with the emitter, the base, and the... Agent: Rabin & Berdo, PC

20070166840 - Utilizing sidewall spacer features to form magnetic tunnel junctions in an integrated circuit: Novel methods for reliably and reproducibly forming magnetic tunnel junctions in integrated circuits are described. In accordance with aspects of the invention, sidewall spacer features are utilized during the processing of the film stack. Advantageously, these sidewall spacer features create a tapered masking feature which helps to avoid byproduct redeposition... Agent: Ryan, Mason & Lewis, LLP

20070166842 - Method for modifying circuit within substrate: The present invention relates to a method for modifying a circuit within a substrate, and the circuit includes a plurality of electrodes. The method includes: (a) selecting at least two from the plurality of electrodes for making connection; (b) removing materials covering said selected electrodes with a focused ion beam... Agent: Rosenberg, Klein & Lee

20070166843 - Method of repairing a light-emitting device and method of manufacturing a light-emitting device: A method of repairing a light-emitting device capable of performing high quality image display even if pinholes are formed when forming an organic compound layer is provided. Device contamination can be prevented during repair. By applying a reverse bias voltage to an organic light emitting element during fixed periods of... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070166844 - Ethcing method and system: An etching method and an etching system are adapted to produce a high etch selectivity for a mask, an excellent anisotropic profile and a large etching depth. An etching system according to the invention comprises a floating electrode arranged vis-à-vis a substrate electrode in a vacuum chamber and held in... Agent: Stites & Harbison PLLC

20070166845 - Method for measuring an amount of strain of a bonded strained wafer: The present invention is a method for measuring an amount of strain of a bonded strained wafer in which at least one strained layer is formed on a single crystal substrate by a bonding method, wherein at least, the bonded strained wafer is measured with respect to two asymmetric diffraction... Agent: Oliff & Berridge, PLC

20070166846 - Plasma doping method: It has been found that, if a bias is applied by irradiating B2H6/He plasma onto a silicon substrate, there is a time at which a dose of boron is made substantially uniform, and the saturation time is comparatively long and ease to stably use, compared with a time at which... Agent: Mcdermott Will & Emery LLP

20070166847 - Boxes for soft error rate calculation: Memory and logic error rates are predicted by breaking each transistor into theoretical “boxes” with differing sensitivities to ionizing radiation. The box dimensions and critical charge are determined using physics-based equations. The box dimensions and critical charge are used to calculate soft error rate (SER). This box method may be... Agent: Honeywell International Inc.

20070166848 - Method and structure to prevent circuit network charging during fabrication of integrated circuits: An integrated circuit and method of fabricating the integrated circuit. The integrated circuit, including: one or more power distribution networks; one or more ground distribution networks; one or more data networks; and fuses temporarily and electrically connecting power, ground or data wires of the same or different networks together, the... Agent: Schmeiser, Olsen & Watts

20070166851 - Light emitting diodes (leds) with improved light extraction by roughening: Systems and methods are disclosed for fabricating a semiconductor light-emitting diode (LED) device by forming an n-doped gallium nitride (n-GaN) layer on the LED device and roughening the surface of the n-GaN layer to extract light from an interior of the LED device.... Agent: Patterson & Sheridan, L.L.P.

20070166850 - Pattern forming apparatus and manufacturing apparatus using the same: A pattern forming apparatus 20 comprises a surface treatment system 13 and an ink jet system 14. A solvent is sprayed from a solvent spray nozzle 24 of the surface treatment system 13 to surface of a glass substrate 21 where a bus line pattern groove is formed. The ink... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070166852 - Diode-pumped microlasers including resonator microchips and methods for producing the same: A patent foramen ovale closure device, method of delivering and a delivery system are provided. The device may include a closure device releasably connectable to an actuator The device may include a proximal segment (206), an intermediate segment (210) and a distal segment (208). When delivered, the proximal segment and... Agent: Brown & Michaels, PC 400 M & T Bank Building

20070166853 - Led arrangement: The invention concerns an LED arrangement with at least one LED chip comprising a radiation decoupling surface through which the bulk of the electromagnetic radiation generated in the LED chip is decoupled. Arranged on the radiation decoupling surface is at least one phosphor layer for converting the electromagnetic radiation generated... Agent: Fish & Richardson PC

20070166854 - Passivation planarization: A pixel cell is formed by locating a first passivation layer over the final layer of metal lines. Subsequently, the uneven, non-uniform passivation layer is subjected to a planarization process such as chemical mechanical polishing, mechanical abrasion, or etching. A spin-on-glass layer may be deposited over the non-uniform passivation layer... Agent: Dickstein Shapiro LLP

20070166855 - Display device and method of manufacturing the same: A display device comprises an insulating substrate, an organic semiconductor layer formed on the insulating substrate, a source electrode and a drain electrode, wherein the source electrode and the drain electrode are interposed between the insulating substrate and the organic semiconductor layer, and spaced away from each other to define... Agent: Cantor Colburn, LLP

20070166860 - Active matrix type semicondcutor display device: There is provided an active matrix type semiconductor display device which realizes low power consumption and high reliability. In the active matrix type semiconductor display device of the present invention, a counter electrode is divided into two, different potentials are applied to the two counter electrodes, respectively and inversion driving... Agent: Eric Robinson

20070166859 - Array substrate for liquid crystal display device and manufacturing method thereof: An array substrate for an LCD device and a manufacturing method thereof. The array substrate includes: a gate line, a gate electrode, a gate pad, and a pixel electrode formed on the substrate; a gate insulation layer formed on the substrate to expose the gate line and the pixel electrode;... Agent: Song K. Jung Mckenna Long & Aldridge LLP

20070166856 - Liquid crystal display device and method of fabricating the same: The present invention provides a liquid crystal display device and a method of fabricating the same capable of reducing the number of mask processes. The liquid crystal display device and the method of fabricating the sane includes: forming a gate electrode and a common electrode on a substrate; forming a... Agent: Song K. Jung Mckenna Long & Aldridge LLP

20070166861 - Gallium nitride based light emitting diode and method of manufacturing the same: A GaN-based LED comprises a substrate; an an-type GaN layer formed on the substrate; an active layer formed on a predetermined region of the n-type GaN layer; a p-type GaN layer formed on the active layer; a transparent electrode formed on the p-type GaN layer; a p-electrode formed on the... Agent: Mcdermott Will & Emery LLP

20070166862 - Method for fabricating substrate with nano structures, light emitting device and manufacturing method thereof: A method of fabricating a substrate with nano structures, light emitting device using the substrate and a manufacturing method thereof, wherein a substrate for growing a light emitting device is formed with nano agglomerations, and the substrate is etched by using the agglomerations as a mask to allow nano structures... Agent: Mckenna Long & Aldridge LLP

20070166864 - Mirror package and method of manufacturing the mirror package: A mirror package is provided which can reflect a laser to an external screen according to a video signal when the laser enters from outside, and a method of manufacturing the mirror package. The mirror is packaged with a glass to protect from external contamination, an inlet and an outlet... Agent: Sughrue Mion, PLLC

20070166866 - Overmolded optical package: An optical semiconductor package includes a substrate, a chip, a plurality of bonding wires, a window, a supporter, and an encapsulant. The chip is disposed on the substrate and has an optical element. The bonding wires are used for electrically connecting the chip to the substrate. The window is supported... Agent: Lowe Hauptman Berner, LLP

20070166867 - Integrated circuit package system with image sensor system: An integrated circuit package system is provided including providing a wafer including image sensor systems having interconnects connected thereto and encapsulating the image sensor systems and interconnects in a transparent encapsulant. The system includes removing a portion of the transparent encapsulant to expose portions of the interconnects and singulating the... Agent: Ishimaru & Zahrt LLP

20070166868 - Method of fabricating an image sensor: A method of fabricating an image sensor on a semiconductor substrate having a sensor array region is described. A first planar layer is formed on a semiconductor substrate. Then, a color filter array (CFA) is formed on the first planar layer. A second planar layer is formed on the color... Agent: J.c. Patents, Inc.

20070166869 - Method for driving pixels of an organic light emitting display: A circuit and a method for driving pixels of an organic light-emitting display are provided. The circuit comprises a thin-film transistor having a source terminal connected to a voltage source, a storage capacitor having a first terminal connected to a gate terminal of the thin-film transistor, and an organic light-emitting... Agent: Jianq Chyun Intellectual Property Office

20070166873 - Organic electro luminescent display and manufacturing method thereof: A method for manufacturing an organic light emitting diode includes a lower substrate, a luminous element provided with upper and lower electrodes, and disposed on the lower substrate, a shielding layer disposed on the luminous element for shielding outer moisture, the shielding layer being formed of at least one layer,... Agent: Knobbe Martens Olson & Bear LLP

20070166872 - Process for producing thin photosensitized semiconducting films: The invention relates to a process for producing thin, semiconducting films photosensitized by one or more chromophores, which comprises at least one cycle comprising, in succession, the following steps: a) a step of depositing, on a support, at least one film of a solution obtained by sol-gel polymerization of one... Agent: Mckenna Long & Aldridge LLP

20070166874 - Fabrication method of nanoimprint mold core: A method for fabricating a nanoimprint mold core is disclosed. The method includes providing a substrate; forming on the substrate an amorphous thin film, which is transformed into a crystalline thin film upon receipt of energy, the crystalline thin film having physical and chemical characteristics different from those of the... Agent: Shoemaker And Mattare, Ltd

20070166877 - Electronic component and method for its assembly: An electronic component and method for its assembly is disclosed. In one embodiment, the electronic component comprises at least two semiconductor components and a circuit carrier comprising a die pad and a rewiring structure. At least one semiconductor component is a vertical semiconductor power switch having an upper surface comprising... Agent: Dicke, Billig & Czaja

20070166878 - Package structure and method for fabricating the same: A method for forming a package structure is disclosed. First, a wafer is provided, in which the front surface of the wafer includes a plurality of die areas and a plurality of scribe lines. Next, a plurality of cavities is formed on a back surface of the wafer with respect... Agent: North America Intellectual Property Corporation

20070166876 - Components, methods and assemblies for multi-chip packages: An ultra thin system-in-a-package (SIP) with independent test and repair capability comprises an interposer having arranged on a top surface and a bottom surface thereof a number of packaged semiconductor chips mounted via solder bumps in accordance with a Land Grid Array (LGA) format and wherein no underfill is used... Agent: Tessera Lerner David Et Al.

20070166875 - Method of forming a microelectronic package and microelectronic package formed according to the method: A microelectronic package, a substrate adapted to be used in forming the package, a method of forming the package, and a system including the package. The package includes a substrate; a die bonded to the substrate; a plurality of joint structures electrically bonding the die to the substrate. At least... Agent: Intel Corporation C/o Intellevate, LLC

20070166880 - Methods of fabrication of lead frame-based semiconductor device packages incorporating at least one land grid array package: Methods of fabrication of lead frame-based semiconductor device packages including at least one land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads of the interposer substrate. The terminal pads of the interposer substrate... Agent: Trask Britt

20070166879 - Multi-chip stack package and fabricating method thereof: A multi-chip stack package includes a substrate, a first chip, a second chip, a plurality of bumps, a plurality ofjunction interface bumps, a plurality of conductive wires, a filler material and an encapsulating material. The substrate has a plurality of first contacts and a plurality of second contacts thereon. The... Agent: Jianq Chyun Intellectual Property Office

20070166881 - Package structure and method for manufacturing the same: In the present invention, a package structure and the method for manufacturing the same are provided. The package structure includes a substrate and a chip flip-chip bonded to the substrate. The chip has central connecting pads and surrounding connecting pads surrounding the central connecting pads. A plurality of first bumps... Agent: Lowe Hauptman Berner, LLP

20070166882 - Methods for fabricating chip-scale packages having carrier bonds: A chip-scale package and method for making same. A pattern of conductive traces in the form of lead fingers is adhered to the active surface of a semiconductor die, preferably using a dielectric tape. The conductive traces are wire bonded to bond pads of the semiconductor die to establish electrical... Agent: Trask Britt, P.C./ Micron Technology

20070166884 - Circuit board and package structure thereof: A circuit board and a package structure thereof are proposed. The circuit board includes a main body and a solder mask layer covered on a surface of the main body. The circuit board is formed with a cutting path to define a plurality of array-arranged circuit board units, wherein the... Agent: Edwards Angell Palmer & Dodge LLP

20070166883 - Method of wafer level packaging and cutting: A packaging wafer has a plurality of cavities and a plurality of trenches on a front surface thereof. The packaging wafer is bonded to the element wafer, and a first cutting method is performed. Afterward a piece of tape is provided and is attached to the packaging wafer. Moreover, a... Agent: North America Intellectual Property Corporation

20070166885 - Electrode line structure having fine line width and method of forming the same: In an electrode line structure of a semiconductor device and a method for forming the same, the electrode line structure comprises a semiconductor substrate, and electrode lines, which are formed on the semiconductor substrate, and have an inclined end in the long axis direction. The electrode lines each include a... Agent: Mills & Onello LLP

20070166886 - Method for manufacturing an electronic module: This publication discloses a method for manufacturing an electronic module, in which manufacture commences from an insulating-material sheet (1). At least one recess (2) is made in the sheet (1) and extends through the insulating-material layer (1) as far as the conductive layer on the opposite surface (1a). A component... Agent: Baker & Daniels LLP

20070166887 - Semiconductor device structure and methods of manufacturing the same: A method of generating a layout for a semiconductor device array is provided. A first layout is provided, comprising an active conductive feature, a boundary area surrounding the active conductive feature, and an open area other than the active conductive feature and the boundary area. A plurality of dummy templates... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070166889 - Method of forming a well of a nand flash memory device: Disclosed herein are a NAND flash memory device and a method of forming a well of the NAND flash memory device. Triple wells of a NAND flash memory device are formed within a cell region in plural. A cell block including flash memory cells is formed on the triple wells.... Agent: Marshall, Gerstein & Borun LLP

20070166888 - Semiconductor devices having improved field plates: A field effect transistor device and method, such device having source and drain electrodes in ohmic contact a semiconductor. A gate electrode-field plate structure is disposed between the source and drain electrodes. The gate electrode-field plate structure comprises: a dielectric; a first metal in Schottky contact the semiconductor; and a... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20070166891 - Method of fabricating a fin field effect transistor in a semiconductor device: A method for fabricating a fin FET in a semiconductor device. The method includes sequentially depositing first and second insulation films on a semiconductor substrate, etching the first and second insulation films using a first mask to form a trench, and depositing a first conductor in the trench.... Agent: Sherr & Nourse, PLLC

20070166890 - Pfets and methods of manufacturing the same: In a first aspect, a first method of manufacturing a PFET on a substrate is provided. The first method includes the steps of (1) forming a gate channel region of the PFET having a first thickness on the substrate; and (2) forming at least one composite source/drain diffusion region of... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20070166894 - Fabricating method for thin film transistor array substrate and thin film transistor array substrate using the same: A method of fabricating a thin film transistor array substrate and a thin film transistor array substrate using the same is disclosed. Picture quality deterioration may be prevented.... Agent: Mckenna Long & Aldridge LLP

20070166893 - Fabrication method for thin film transistor array substrate: Scan lines are formed on a substrate. A patterned dielectric layer and a patterned semiconductor layer are formed to cover portions of the scan lines. A patterned transparent conductive layer and a patterned metal layer are sequentially formed to define data lines, source/drain electrodes, pixel electrodes and etching protecting layers.... Agent: Jianq Chyun Intellectual Property Office

20070166895 - Display substrate and method of manufacturing the same: A three mask process for forming an LCD substrate includes, depositing in sequence on a base substrate a gate metallic layer, a gate insulation layer and a channel layer. A first photoresist pattern is used to form a gate electrode of a switching device, a channel pattern and a gate... Agent: Macpherson Kwok Chen & Heid LLP

20070166892 - Method and apparatus of fabricating semiconductor device: An underlying film forming section forming an underlying film on a semiconductor substrate is provided to an apparatus of fabricating a semiconductor device. The apparatus is further provided with a cooling section cooling the semiconductor substrate and a plasma nitriding section introducing active nitrogen into the underlying film while keeping... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070166896 - Method of fabricating a lateral double-diffused mosfet: A method of monolithically fabricating an LDMOS transistor with a fabrication process that is compatible with a sub-micron CMOS fabrication process. The specification further describes an LDMOS transistor. The LDMOS transistor is implemented in a first impurity region on a substrate. The LDMOS transistor has a source that includes a... Agent: Fish & Richardson P.C.

20070166897 - Strained si on multiple materials for bulk or soi substrates: The present invention provides a strained-Si structure, in which the nFET regions of the structure are strained in tension and the pFET regions of the structure are strained in compression. Broadly the strained-Si structure comprises a substrate, a first layered stack atop the substrate, the first layered stack comprising a... Agent: Scully, Scott, Murphy & Presser, P.C.

20070166898 - Polysilicon structure, thin film transistor panel using the same, and manufacturing method of the same: A method for forming a polysilicon structure is provided. An amorphous silicon structure with a first amorphous silicon region and a second amorphous silicon region is formed in a first region and a second region of a substrate, respectively. The first amorphous silicon region is thinner than the second amorphous... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070166899 - Method of synthesizing silicon wires: A method of synthesizing silicon wires generally includes the steps of: providing a substrate; forming a copper catalyst particle layer on a top surface of the substrate; heating the reactive device at a temperature of above 450° C. in a flowing protective gas; and introducing a mixture of a protective... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070166900 - Device fabrication by anisotropic wet etch: A method of fabrication and a field effect device structure are presented that reduce source/drain capacitance and allow for device body contact. A Si based material pedestal is produced, the top surface and the sidewalls of which are oriented in a way to be substantially parallel with selected crystallographic planes... Agent: Innovation Interface, LLC

20070166901 - Method for fabricating soi device: A semiconductor-on-insulator (SOI) device is described, including a substrate, a first insulating layer and a second insulating layer on the substrate, a semiconductor layer covering the first and the second insulating layers, a gate dielectric layer and a gate on the semiconductor layer, and two doped regions as source/drain regions... Agent: Jianq Chyun Intellectual Property Office

20070166905 - Method of manufacturing semiconductor device with trench: In an embodiment of the present invention, after trenches, a gate oxide film and gate electrodes are formed, a channel layer is formed by plural high-acceleration ion implantations where acceleration voltages are different with one another. The channel layer is an impurity implanted layer on which diffusion by a heat... Agent: Morrison & Foerster LLP

20070166902 - Method to control the gate sidewall profile by graded material composition: A semiconductor process and apparatus uses a predetermined sequence of patterning and etching steps to etch a gate stack (30, 32) formed over a substrate (36), thereby forming an etched gate (33) having a vertical sidewall profile (35). By constructing the gate stack (30, 32) with a graded material composition... Agent: Hamilton & Terrile, LLP

20070166904 - Pre-gate dielectric process using hydrogen annealing: The preferred embodiment of the present invention provides a novel method of forming MOS devices using hydrogen annealing. The method includes providing a semiconductor substrate including a first region and a second region, forming at least a portion of a first MOS device covering at least a portion of the... Agent: Slater & Matsil, L.L.P.

20070166903 - Semiconductor structures formed by stepperless manufacturing: A manufacturing method for an array of polysilicon fins built up into fin blocks that are aligned in a comb-like array occupying a wafer surface. By subsurface and supersurface contact, fin blocks can be arranged into components or even systems. The method involves wafer area masking and etching over the... Agent: Schneck & Schneck

20070166906 - Method to reduce transistor gate to source/drain overlap capacitance by incorporation of carbon: The present invention pertains to formation of a transistor in a manner that mitigates overlap capacitances, thereby facilitating, among other things, enhanced switching speeds. More particularly, a gate stack of the transistor is formed to include an optional layer of poly-SiGe and a layer of poly-Si, where at least one... Agent: Texas Instruments Incorporated

20070166907 - Semiconductor device and manufacturing method of the same: In consideration of an optimum combination of impurities used for the purpose of forming an extension region (13) and a pocket region (11) and further inhibiting impurity diffusion in the extension region (13) when an impurity diffusion layer (21) is formed in a semiconductor device having an nMOS structure, at... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070166908 - Non-volatile memory device having dual gate and method of forming the same: A non-volatile memory device including a control gate pattern having a tunnel insulation pattern, a trap-insulation pattern, a blocking insulation pattern and a control gate electrode, which are stacked on a semiconductor substrate. A selection gate pattern is disposed on the semiconductor substrate at one side of the control gate... Agent: F. Chau & Associates, LLC

20070166913 - Semiconductor device and method of forming the same: There is provided a method of forming a semiconductor device. A dielectric layer including a metal (e.g., a gate insulating layer and/or a tunnel insulating layer) may be formed on a substr