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Semiconductor device and system having semiconductor device mounted thereonRelated Patent Categories: Semiconductor Device Manufacturing: Process, Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged SemiconductorSemiconductor device and system having semiconductor device mounted thereon description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20060286714, Semiconductor device and system having semiconductor device mounted thereon. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application is a divisional of U.S. application Ser. No. 10/385,919 filed Mar. 11, 2003, now pending, which claims priority from Japanese Patent Application 2002-195650 filed Jul. 4, 2002, the contents of which are herein incorporated by reference. BACKGROUND OF THE INVENTION [0002] (1) Field of the Invention [0003] This invention relates to a semiconductor device and a system having the semiconductor device mounted thereon, and more particularly to a ball grid array packaged semiconductor device and a system having the ball grid array packaged semiconductor device mounted thereon. [0004] (2) Description of the Related Art [0005] These days, with the progress of higher integration of elements into semiconductor devices, each semiconductor device has an increasing number of connection pins for connection to a mounting board. Further, to reduce the area of the semiconductor device, a narrower pin pitch is employed. [0006] Packages of semiconductor devices include a QFP (Quad Flat Package), an SQFP (Shrink Quad Flat Package), and so forth. However, these packages are limited in their capability of coping with increase in the number of connection pins and reduction in the area of the semiconductor device. To overcome the problem, recently, attention has come to be paid to a BGA (Ball Grid Array) package allowing a large number of connection pins to be arranged thereon. [0007] A BGA packaged semiconductor device includes connection pins (pads) on the underside of the package. FIG. 16 is a cross-sectional view of a conventional BGA packaged semiconductor device. The figure shows the semiconductor device 100, and a mounting board 110 on which the semiconductor device 100 is mounted. The semiconductor device 100 is mounted on the mounting board 110 by solder balls 111. [0008] The semiconductor device 100 is comprised of the package 101, an inner board 102 fixed to an inner wall of the package 101 toward the mounting board 110, cylindrical vias 103 extending through the inner board 102 to the underside of the package 101, a bare chip 104 fixed to the inner wall of the package 101 toward the mounting board 110, and bonding wires 105 connecting the bare chip 104 and the vias 103 to each other. [0009] Each via 103 has a pad 103a formed at one end thereof on the side of the inner board 102 for connection to one of the bonding wires 105, and a pad 103b formed at the other end thereof on the side of the mounting board 110 for connection to the wiring pattern on the mounting board 110 via one of the solder balls 111. The bare chip 104 have pads 104a for connection to the bonding wires 105. [0010] Signal lines routed on the top of or inside the bare chip 104 are connected to the respective pads 104a to allow connection thereto. The pads 104a and the pads 103a of the vias 103 are connected by the bonding wires 105. The pads 103b of the vias 103 are connected to the wiring pattern on the mounting board 110 via the solder balls 111. Thus, the semiconductor device 100 has its signal lines provided with respective conductive extensions leading only to the underside of the package 101 toward the mounting board 110. [0011] Incidentally, some BGA packaged semiconductor devices have 800 connection pins (pads 103b of the vias 103 in FIG. 16), and further some have a pin pitch of 0.8 mm. A semiconductor device of this kind with a large number of connection pins is mounted on a build-up board or a multi-layer board comprised of a lot of layers. [0012] However, the semiconductor device is further making a progress toward still higher integration of elements therein, resulting in an even larger number of connection pins provided thereon. This increases the wiring density of a wiring pattern on a mounting board, which makes the wiring pattern difficult to be routed. SUMMARY OF THE INVENTION [0013] The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device which makes it possible to reduce wiring density of a wiring pattern on a mounting board, thereby facilitating routing of the wiring pattern. [0014] To attain the above object, there is provided a ball grid array packaged semiconductor device. This semiconductor device is characterized by comprising pads fixed within a package and connected to signal lines of a bare chip, and vias extending from associated ones of the pads to a bottom surface and a top surface of the package. [0015] The above and other objects, features and advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying drawings which illustrate preferred embodiments of the present invention by way of example. BRIEF DESCRIPTION OF THE DRAWINGS [0016] FIG. 1 is a longitudinal sectional view of a semiconductor device according to a first embodiment of the present invention. [0017] FIG. 2 is an exploded view of the semiconductor device. [0018] FIG. 3 is a view of the FIG. 2 semiconductor device after being assembled. [0019] FIG. 4 is an exploded view (second one) of a semiconductor device. [0020] FIG. 5 is a view of the FIG. 4 semiconductor device after being assembled. Continue reading about Semiconductor device and system having semiconductor device mounted thereon... Full patent description for Semiconductor device and system having semiconductor device mounted thereon Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Semiconductor device and system having semiconductor device mounted thereon patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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