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Semiconductor device and method of manufacturing the semiconductor device   

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Abstract: In a method of manufacturing a semiconductor device to improve structural stability of a semiconductor device in a silicidation process, a substrate is provided to have an active region defined by an isolation layer. An etching mask is formed on the active region and the isolation layer to have a silicidation prevention pattern that at least partially exposes the active region. A gate structure is formed on the exposed active region. A gate spacer is formed on a sidewall of the gate structure positioned on the silicidation prevention pattern. Source/drain regions are formed on the active region using the gate spacer as a mask to thereby form the semiconductor device. Since voids may not be generated in a transistor of the semiconductor device or intrusion of the transistor may be prevented in the silicidation process, the semiconductor device including the transistor may have improved reliability and electrical characteristics. ...

Agent: Mills & Onello LLP - Boston, MA, US
Inventors: Shigenobu Maeda, Young-Wug Kim
USPTO Applicaton #: #20070170508 - Class: 257350000 (USPTO) - 07/26/07 - Class 257 

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Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Field Effect Device, Having Insulated Electrode (e.g., Mosfet, Mos Diode), Single Crystal Semiconductor Layer On Insulating Substrate (soi), Insulated Electrode Device Is Combined With Diverse Type Device (e.g., Complementary Mosfets, Fet With Resistor, Etc.)
The Patent Description & Claims data below is from USPTO Patent Application 20070170508, Semiconductor device and method of manufacturing the semiconductor device.

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