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Semiconductor device and method of manufacturing the same

Semiconductor device and method of manufacturing the same description/claims

This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2003-129177, filed May 7, 2003, the entire contents of which are incorporated herein by reference.

1. Field of the Invention

The present invention relates to a semiconductor device including double gate structure and a method of manufacturing the same.

2. Description of the Related Art

Current drive capability is given as one of MOSFET operation characteristic indexes. The enhancement of the current drive capability is conventionally achieved by micro-fabrication of elements. The gate length of the MOSFET is already micro-fabricated less than 0.1 μm scale. Currently, there has been made researches and developments of semiconductor process to realize further micro-fabrication. However, it is technically difficult to realize this kind of semiconductor process, and in addition, it is difficult to realize it in view of the development cost.

According to methods other than micro-fabrication, it is required to improve operation characteristics such as high drive current. The following proposal is made as one of the methods. The proposal is to employ a so-called double gate structure or gate all around structure. According to the double gate structure, both front side and backside surface of the semiconductor active layer are formed with a channel. The double gate structure is employed, and thereby, drain current increases generally twice as much, so that the current drive capability can be greatly improved.

In order to realize a MOSFET including the double gate structure, the backside (back gate side) need to be formed with a gate structure (gate electrode/gate insulator/semiconductor layer).

However, it is technically difficult to form the gate structure onto the backside surface. In addition, according to the conventional technique, it is possible. to realize the double gate structure only by the method of carrying out complicate processes (e.g., JPN. PAT. APPLN. KOKAI Publication No. 2000-12858). As a result, the MOSFET including the double gate structure has not been practically utilized.

On the other hand, the following report relating to the MOSFET including the gate all around structure has been made (S. Monfey et al., 2002 Symposium on VLSI Technology, 11.4, digest of Technical Papers p. 108). According to the report, the MOSFET includes the structure in which the periphery of a channel region is surrounded with a gate electrode. The MOSFET process includes the following processes of depositing SiGe, etching it, and the like; as a result, the process becomes complicated. In addition, there is a problem that it is difficult to control the width of the gate electrode on the backside of the MOSFET.

Incidentally, there has been known a MOS transistor including the structure similar to the double gate structure (JPN. PAT. APPLN. KOKAI Publications No. 2003-31799 and 2000-12858).

In FIG. 11 of JPN. PAT. APPLN. KOKAI Publication No. 2003-31799, there has been disclosed a device seen as if it is a MOS transistor including a double gate structure. However, the backside polysilicon 110 is not electrically connected with any components. According to the description of the paragraph 0037, it can be seen that thermal conductivity is simply improved, and thereby, the polysilicon 101 is merely used to prevent self-heating.

In FIG. 8C of JPN. PAT. APPLN. KOKAI Publication No. 2000-12858, there has been disclosed a structure close to the double gate structure. However, according to the structure, the component buried in a substrate is an insulating film, as seen from FIG. 8C. Therefore, the foregoing structure differs from the double gate structure.

According to an aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate; a MOSFET including a double gate structure provided on the semiconductor substrate; and an isolation region for isolating the MOSFET from other elements comprising a trench provided on the surface of the semiconductor substrate and an insulator provided in the trench, the isolation region having a region in the trench around the MOSFET, the region having a deeper bottom than other regions in the trench.

According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming an empty space in a semiconductor substrate; forming an isolation region on a surface of the semiconductor substrate comprising forming a trench by etching the surface of the semiconductor substrate so that a part of the empty space is opened, and forming an insulator in the trench without closing the empty space; and forming a MOSFET including a double gate structure isolated from other elements by the isolation region in the semiconductor substrate.

FIG. 1A is a plane view showing the process of manufacturing a MOSFET including double gate structure according to a first embodiment of the present invention, and FIG. 1B and FIG. 1C are cross-sectional views showing the same;

FIG. 2A is a plane view showing the process of manufacturing the MOSFET including double gate structure of the first embodiment, and FIG. 2B and FIG. 2C are cross-sectional views showing the same, following FIG. 1A, FIG. 1B and FIG. 1C;

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