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Semiconductor device and method of manufacturing the sameRelated Patent Categories: Semiconductor Device Manufacturing: Process, Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions, On Insulating Substrate Or Layer (e.g., Tft, Etc.)Semiconductor device and method of manufacturing the same description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070065995, Semiconductor device and method of manufacturing the same. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having a circuit composed of a thin film transistor (hereinafter referred to as TFT) and a method of manufacturing the same. In particular, the present invention relates to an elecro-optical device typified by a liquid crystal display device, a semiconductor device mounted with the electro-optical device as its component and a method of manufacturing the semiconductor device. Note that, the semiconductor device in this specification indicates devices in general being capable of functioning with the use of semiconductor characteristics and electro-optical devices, semiconductor circuits and electronic equipment are all included in the semiconductor devices. [0003] 2. Description of the Related Art [0004] In recent years, the development of a semiconductor device including a large-area integrated circuit formed from a TFT constituted of a thin film (thickness of approximately several to several hundreds of nm) formed on a substrate having an insulating surface has been progressing. As typical examples of the semiconductor device, an active matrix liquid crystal display device and a light emitting device are known. In particular since the TFT in which a crystalline silicon film is used for an active region has high electric field mobility, it can constitute various function circuits. [0005] For example, in the active matrix liquid crystal display device, a pixel circuit for conducting image display for each functional block and a driver circuit, which is mainly composed of a CMOS circuit, for controlling the pixel circuit, such as a shift register circuit, a level shifter circuit, a buffer circuit or a sampling circuit, are formed on one substrate. [0006] Further, the TFT comprises at least a semiconductor film, an insulating film constituted of a silicon oxide film, a silicon oxynitride film or the like, and wirings constituted of various metal materials. The wirings include a source wiring, a gate wiring (including a gate electrode), and the like. These films each have a thickness of approximately several to several hundreds of nm, and thus, can be said to be thin films. [0007] These thin films are formed by known film formation techniques such as CVD (chemical vapor phase growth method) and sputtering. However, it is known that the thin film has an internal stress. Note that the internal stress includes an intrinsic stress and a thermal stress that arises from a difference in a thermal expansion coefficient between the thin film and a substrate. [0008] The influence of the thermal stress can be disregarded by taking a material for a substrate, a process temperature, a pressure and the like into consideration. However, the generation mechanism of the intrinsic stress has not been absolutely made clear. It is rather considered that the intrinsic stress is generated due to a phase change and a composition change which are complicatedly interwound with each other and caused in a film growth process or by the subsequent heat treatment. [0009] The internal stress generally includes a compressive stress and a tensile stress. As shown in FIG. 5A, when a thin film 311 is to expand, a substrate 312 is compressed and formed such that the thin film 311 is on the outside thereof. This is called the compressive stress. On the other hand, as shown in FIG. 5B, when the thin film 311 is to contract with respect to the substrate 312, the substrate 312 pulls the thin film 311 in a direction in which the contraction is hindered so that the substrate 312 deforms such that the thin film is on the inside thereof. This is called the tensile stress. In general, the value of the tensile stress is shown with "+", and the value of the compressive stress is shown with "-" in many cases. [0010] The influence of the internal stress described above on electric characteristics of a transistor is described in, for example, "Influence of Stress of Etch Stop Nitride Film to 0.13 .mu.m CMOS Transistor Performance; Applied Physics Society Silicon Technology Section No. 25 Special Number on ULSI Device (2001) pp 36-39." According to this, it is reported that the mobility of an NMOS transistor is enhanced when a channel forming region thereof receives a tensile stress while the mobility of a PMOS transistor is enhanced when a channel forming region thereof receives a compressive stress. [0011] As described above, a wiring of a TFT is formed from a thin film. Therefore, the wiring also has an internal stress, and there has been a case where peeling is generated if the internal stress is strong. Further, a gate electrode formed from the same material as that for the wiring is formed on a semiconductor film through an insulating film. The internal stress of the gate electrode acts on even the semiconductor film, and imparts distortion to an interface between the insulating film and the semiconductor film or the semiconductor film. Thus, there is a case where electric characteristics typified by a threshold voltage and electric field mobility are affected. SUMMARY OF THE INVENTION [0012] The present invention has been made to solve the above-described problem, and an object of the present invention is therefore to improve operational characteristics of a semiconductor device and improve yield in an electro-optical device and a semiconductor device typified by an active matrix liquid crystal display device having a wiring. [0013] In the present invention, an impurity element is introduced into a wiring of a TFT, or the introduction of an impurity element and heat treatment are both conducted. Thus, the wiring can be controlled to have a desired internal stress. In particular, it is very effective that the present invention is applied to a gate electrode. That is, the stress applied to an active layer (particularly, a channel forming region) can be set to a desired stress by controlling the internal stress of the gate electrode. Further, when a gate insulating film is made thinner as a transistor is miniaturized, the influence of the stress applied on the active layer becomes conspicuous. Thus, the control of the internal stress of the gate electrode becomes important more and more. Furthermore, it is also possible to control the internal stress of the gate electrode to a desired internal stress by introducing an impurity element only into a desired region or conducting heat treatment. [0014] For example, by applying the present invention, it is possible that the stress that a channel forming region in an n-channel TFT receives is set as a tensile stress while the stress that a channel forming region in a p-channel TFT receives is set as a compressive stress. Further, it is also possible that the tensile stress in the channel forming region in the n-channel TFT is relatively made stronger than that in the channel forming region in the p-channel TFT and that the compressive stress in the channel forming region in the p-channel TFT is relatively made stronger than that in the channel forming region in the n-channel TFT. By adopting the above, electric characteristics of the TFT can be made satisfactory, and operational characteristics of the semiconductor device can also be remarkably improved. [0015] Plasma doping, ion implantation, ion shower doping or the like may be conducted as a method of introducing an impurity element. In such a method of introducing an impurity element, energy of ions implanted into a thin film is extremely larger than binding energy of elements constituting the thin film. Therefore, the ions implanted into the thin film may repel atoms constituting the semiconductor film from lattice points and exist at the lattice positions, or the atoms repelled from the lattice points by the implanted ions may exist at the positions in the lattice. In this way, a thin film is expanded. Thus, in a case where the thin film has a compressive stress, the compressive stress increases, and in a case where the thin film has a tensile stress, the tensile stress is relaxed. [0016] Further, since the atoms existing at the positions in the lattice return to the lattice positions due to heat treatment, regularity of atomic arrangement is improved. Thus, the thin film is contracted. Therefore, in a case where the thin film has a tensile stress, the tensile stress increases, and in a case where the thin film has a compressive stress, the compressive stress is relaxed. [0017] Further, when the introduction of the impurity element is conducted after the heat treatment is conducted accelerated ions are implanted into the film in which the regularity of an atomic arrangement is improved. Thus, it becomes possible for the ions to enter to depths along an opening in a crystal lattice without causing a collision (channeling). Therefore, the introduction of the impurity element for controlling the internal stress only requires a small dose amount, and can be conducted with a low accelerating voltage. [0018] Further, when the heat treatment is conducted after the introduction of the impurity element, a larger number of atoms than the number of atoms for forming a thin film are introduced into the thin film. Thus, a larger number of atoms than the number of atoms that return to the lattice position exist as the atoms existing at the position in the lattice. Therefore, the contraction of the thin film is smaller in comparison with the case where the introduction of the impurity element is not conducted, and thus, the increase amount of the tensile stress becomes small. In other words, in the case where it is clear that the heat treatment is conducted in the subsequent step, the change amount of the internal stress can be made small by previously introducing the impurity element. [0019] As described above, the introduction of the impurity element, or both the introduction of the impurity element and the heat treatment are conducted, whereby the internal stress can be controlled to a desired level. Of course, the number of times of the introduction of the impurity element or heat treatment is not limited to one, and a plurality of times may be adopted. In the present invention, the characteristics described above are applied to a wiring to control a stress of the wiring, thereby improving the operational characteristics of a semiconductor device. Particularly, the internal stress in a gate electrode of a TFT is controlled, whereby the stress that a semiconductor film receives can be controlled. Therefore, the electric characteristics typified by a threshold voltage and field effect mobility can be improved. Further, the stress of respective gate electrodes can be controlled, and thus, variation of the electric characteristics can be suppressed. [0020] A method of manufacturing a semiconductor device according to the present invention disclosed in this specification is characterized by comprising: forming an insulating film on a first semiconductor film and a second semiconductor film which are formed on an insulating surface; forming a first conductive film on the first semiconductor film and a second conductive film on the second semiconductor film through the insulating film: introducing a first impurity element into the first conductive film and the first semiconductor film to change an internal stress of the first conductive film and making a stress that the first semiconductor film receives a tensile stress; introducing a second impurity element into the second conductive film and the second semiconductor film to change an internal stress of the second conductive film and making a stress that the second semiconductor film receives a compressive stress; and manufacturing an n-channel TFT by using the first semiconductor film, the insulating film and the first conductive film and manufacturing a p-channel TFT by using the second semiconductor film, the insulating film and the second conductive film. [0021] In the above manufacturing method, a method of introducing the first impurity element or the second impurity element can be conducted by plasma doping, ion implantation, ion shower doping or the like. [0022] Further, in the above manufacturing method, there is no particular limitation on the first impurity element and the second impurity element, but it is desirable that the first impurity element is one or a plurality of elements selected from impurity elements imparting n-type conductivity and rare gas elements and that the second impurity element is one or a plurality of elements selected from impurity elements imparting n-type conductivity, impurity elements imparting p-type conductivity and rare gas elements. The impurity elements imparting n-type conductivity and the impurity elements imparting p-type conductivity are impurity elements indispensable for formation of a source region and a drain region. Thus, other impurity elements do not need to be newly prepared, which is economical. Particularly in a case where an impurity element is introduced into a gate electrode, this can be conducted simultaneously with the step of introducing the impurity element into the source region and the drain region. Thus, this is preferable since the introduction can be conducted without increasing the number of steps. Further, the rare gas element is an inert element, and thus, is preferable in a point that the rare gas element does not affect the electric characteristics of a TFT. Continue reading about Semiconductor device and method of manufacturing the same... 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