| Semiconductor device and control method -> Monitor Keywords |
|
|
  Semiconductor device and control methodUSPTO Application #: 20060189011Title: Semiconductor device and control method Abstract: In a semiconductor device for generating complementary PWM signals for, for example, controlling an inverter, a dead time is flexibly added by using a simple architecture. A dead time addition unit adds time elapsing until a value of a timer reaches a set value of a register as a first dead time at a rise of a first PWM signal. On the other hand, time elapsing until the value of the timer reaches a set value of another register is added as a second dead time at a rise of a second PWM signal. (end of abstract)
Agent: Mcdermott Will & Emery LLP - Washington, DC, US Inventors: Manabu Takahashi, Koji Kawamichi, Shohei Oishi, Masaru Kohara USPTO Applicaton #: 20060189011 - Class: 438014000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, With Measuring Or Testing The Patent Description & Claims data below is from USPTO Patent Application 20060189011. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF THE INVENTION [0001] The present invention relates to a semiconductor device for generating complementary PWM signals for, for example, controlling an inverter, and more particularly, it relates to a technique to add dead times to complementary PWM signals. [0002] An inverter circuit 5 including serially connected two switching elements 51 and 52 as shown in FIG. 11 is widely used as a circuit included in an induction heating apparatus such as an IH cooking device (see Japanese Laid-Open Patent Publication No. 10-149876 (hereinafter referred to as Document 1)). Also, an inverter circuit for driving a motor has an architecture in which three combinations for three phases each of serially connected two switching elements are connected in parallel, and this architecture is basically similar to that of the inverter circuit 5. [0003] Such an inverter circuit is generally controlled in accordance with PWM (Pulse Width Modulation) signals having a time at which none of the phases are simultaneously in an ON state (i.e., a dead time). An example of such signals is shown in FIG. 12A. One of the roles of the dead time is preventing an inverter control circuit from being broken by a through current passing when two switching elements are simultaneously in an ON state as shown in FIG. 12B. Also, in general, the dead time is set in order to minimize power loss of switching elements by setting optimum switching timings in accordance with the on-off characteristics of two different switching elements as shown in FIG. 13. The power loss is obtained as a product of a current and a voltage attained in on-off switching. [0004] Conventionally, the following three methods are known for setting a dead time: 1) General PWM outputs are used and a dead time is added on a control circuit; 2) PWM outputs with a given dead time supplied by a semiconductor device are used; and 3) the methods 1) and 2) are combined. [0005] The method 1) is described in, for example, Document 1, and a dead time can be set by adding a control circuit to an inverter driving circuit for controlling an induction heating cooking device. FIG. 11 described above shows a basic circuit configuration employed in this case, in which a dead time setting circuit 7 generates a signal for simultaneously turning off the two switching elements 51 and 52 by a driving control circuit 6. As shown in FIG. 13, a dead time td1 is set as a period elapsing from time when Vge2 becomes 0 V and the switching element 52 is turned off until time when the residual voltage of Vce1 is minimized, and a dead time td2 is set as a period elapsing from time when Vge1 becomes 0 V and the switching element 51 is turned off until the minus current of Ic2 (i.e., a freewheel diode current included in the switching element 51) is substantially halved. Both the dead times are determined in accordance with a constant of the circuit. [0006] Apart from the aforementioned methods, a method by using a combination of a PWM output and a delay circuit is known. For example, as shown in FIG. 14, dead times are added by providing delays to respective PWM signals by CR circuits 53 and 54 arbitrarily set. Thus, two kinds of output signals with dead times as shown in FIG. 15 can be generated. [0007] Alternatively, for avoiding necessity for adding a control circuit, a microcomputer having a function to generate PWM outputs with dead times has been realized. In setting a dead time in this case, one dead time register is used for setting a dead time, so as to add the same dead time at on-timing and off-timing of the PWM signal. [0008] Many of such microcomputers for controlling an inverter include a counter and a comparator. The counter counts up from 0 to a frequency set value, during which the count value and a duty set value are compared with each other. When the count value and the duty set value accord with each other, an output signal is inverted so as to generate a reference PWM signal. At this point, a dead time is added by comparing the count value and a dead time set value with each other and delaying the on-timing from the inverting timing until they accord with each other. In this case, the dead time can be set as a given period not depending upon the characteristic of a switching element. [0009] However, in the method described in Document 1 or in the method using the CR circuits, the dead time to be set is determined by hardware on a substrate, and therefore, merely a predetermined value can be set for each switching element. Therefore, it is difficult to change/set the optimum value of a dead time, and in order to attain advanced control, for example, it is necessary to provide a control circuit part for changing CR components by hardware. Furthermore, it is difficult to perform precise control because of the waveform of the resultant PWM signal having a time constant and owing to variation in components. [0010] Furthermore, in the method for obtaining a PWM output with a dead time by using the microcomputer for controlling an inverter, since merely one dead time register is used, merely the common dead time can be added at the rise and the fall. This does not cause any particular problem in controlling an inverter circuit in which pairing switching elements have symmetrical characteristics. However, in controlling an inverter circuit in which pairing switching elements have different characteristics, it is desired to individually set optimum dead times, and hence, this method is difficult to employ in such a case. SUMMARY OF THE INVENTION [0011] An object of the invention is, in a semiconductor device for generating complementary PWM signals for controlling, for example, an inverter, flexibly adding a dead time by using a simple architecture. [0012] Specifically, according to a first aspect of the invention, the semiconductor device includes a complementary PWM signal generation unit for generating a first PWM signal and a second PWM signal corresponding to an inverted signal of the first PWM signal; and a dead time addition unit for adding a first dead time at a rise of the first PWM signal and a second dead time at a rise of the second PWM signal, and the first dead time and the second dead time are individually settable in the dead time addition unit. [0013] In this aspect, the first dead time added at the rise of the first PWM signal and the second dead time added at the rise of the second PWM signal are individually set by the dead time addition unit. Therefore, advanced control can be flexibly realized as compared with the conventional technique. [0014] Preferably, the dead time addition unit of the semiconductor device according to the first aspect includes a dead time timer; and first and second dead time set registers, and time elapsing until a value of the dead time timer reaches a set value of the first dead time set register is set as the first dead time, and time elapsing until the value of the dead time timer reaches a set value of the second dead time set register is set as the second dead time. [0015] Preferably, the dead time addition unit of the semiconductor device according to the first aspect includes first and second dead time timers; and first and second dead time set registers, and time elapsing until a value of the first dead time timer reaches a set value of the first dead time set register is set as the first dead time, and time elapsing until a value of the second dead time timer reaches a set value of the second dead time set register is set as the second dead time. [0016] Preferably, the dead time addition unit of the semiconductor device according to the first aspect includes first and second dead time set registers; and a comparator for comparing a count value of a cycle counter included in the complementary PWM generation unit with set values of the first and second dead time set registers, and the first dead time is set on the basis of a result of comparison by the comparator with the set value of the first dead time set register, and the second dead time is set on the basis of a result of comparison by the comparator with the set value of the second dead time set register. [0017] Preferably, the dead time addition unit of the semiconductor device according to the first aspect includes first and second dead time set registers; a first comparator for comparing a count value of a cycle timer included in the complementary PWM signal generation unit with a set value of the first dead time set register; and a second comparator for comparing the count value of the cycle timer with a set value of the second dead time set register, and the first dead time is set on the basis of a result of comparison by the first comparator and the second dead time is set on the basis of a result of comparison by the second comparator. [0018] In the semiconductor device according to the first aspect, at least one of the first and second dead times is preferably changeable in accordance with a dead time switching input. [0019] According to a second aspect of the invention, in the control method employed in an induction heating apparatus that includes an inverter circuit for performing a heating operation with a coil and the aforementioned semiconductor device for controlling the inverter circuit by supplying the first and second PWM signals to which dead times have been added, the control method includes the steps of the inverter circuit supplying a signal to the semiconductor device as the dead time switching input; and the semiconductor device changing at least one of the first and second dead times in accordance with the supplied dead time switching input. BRIEF DESCRIPTION OF THE DRAWINGS [0020] FIG. 1 is a block diagram for showing the architecture of a semiconductor device according to Embodiment 1 of the invention; [0021] FIG. 2 is a timing chart for showing the operation of the semiconductor device of FIG. 1; Continue reading... Full patent description for Semiconductor device and control method Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Semiconductor device and control method patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Semiconductor device and control method or other areas of interest. ### Previous Patent Application: Method of testing fpc bonding yield and fpc having testing pads thereon Next Patent Application: Wirebond crack sensor for low-k die Industry Class: Semiconductor device manufacturing: process ### FreshPatents.com Support Thank you for viewing the Semiconductor device and control method patent info. IP-related news and info Results in 2.35028 seconds Other interesting Feshpatents.com categories: Medical: Surgery , Surgery(2) , Surgery(3) , Drug , Drug(2) , Prosthesis , Dentistry |
||
