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Semiconductor constructionsRelated Patent Categories: Semiconductor Device Manufacturing: Process, Chemical Etching, Liquid Phase EtchingSemiconductor constructions description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20050282397, Semiconductor constructions. Brief Patent Description - Full Patent Description - Patent Application Claims
TECHNICAL FIELD [0001] The present invention relates to semiconductor processing patterning methods and constructions. BACKGROUND OF THE INVENTION [0002] A continuing goal of semiconductor processing is increased miniaturization while maintaining high performance. Modern semiconductor processes are heavily reliant on photolithography when preparing semiconductors to achieve this goal. [0003] Photolithography typically involves the following steps. Initially, a layer of resist is formed over a substrate. A reticle/mask is subsequently placed above the resist and radiation is allowed to pass through openings of the reticle/mask and contact the resist in patterns defined by the reticle/mask. Depending on whether the resist is a negative resist or a positive resist, the radiation renders exposed portions of the resist more or less soluble in a solvent relative to unexposed portions. The solvent is subsequently utilized to remove the more soluble portions of the resist while leaving the less soluble portions as a patterned mask. The mask pattern can be transferred to the underlying substrate with a suitable etch. Exemplary methods of prior art photolithography and a problem therewith are illustrated in FIGS. 1-3. [0004] Referring first to FIG. 1, a semiconductor substrate 1 at one stage of semiconductor processing is shown that includes a bulk substrate 3, multilayers 4 (e.g., conductive, semiconductive and/or insulative layers) and a resist 5. To aid in interpretation of the claims that follow, the terms "semiconductive substrate" and "semiconductor substrate" are defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term "substrate" refers to any supporting structure, including, but not limited to, the semiconductive substrates described above. [0005] Referring to FIG. 2, photoresist layer 5 has been processed to form masking blocks 7. It would be desirable that these masking blocks be of constant respective width in the illustrated cross-section from top to bottom. However in certain instances, the patterned photoresist tends to flare out at the bottoms/bases, as shown, forming what are commonly referred to as "footing", depicted by feet 9. [0006] Referring to FIG. 3, layers 4 have been etched using blocks 7 as an etch mask. As shown, feet 9 have functioned as part of that mask making the pattern of layers 4 substantially wider than the predominate width of blocks 7. In many instances, this is undesirable and/or difficult to predict or control. SUMMARY OF THE INVENTION [0007] The invention includes semiconductor processing patterning methods and semiconductor constructions. In one implementation, a semiconductor processing patterning method includes forming a second composition resist layer over a different first composition resist layer. Overlapping portions of the first and second composition resist layers are exposed to actinic energy effective to change solubility of the exposed portions versus the unexposed portions of each of the first and second composition resist layers in a developer solution. The first and second composition resist layers are developed with the developer solution under conditions effective to remove the exposed portions of the first composition resist layer at a faster rate than removing the exposed portions of the second composition resist layer. [0008] In one implementation, a semiconductor construction includes a semiconductor substrate having a patterned resist mask received thereon. The resist mask includes a first composition resist portion and a different second composition resist portion received over the first composition resist portion. The first composition resist portion has opposing sidewalls in at least one cross section and the second composition resist portion has opposing sidewalls in the one cross section. At least a portion of the opposing sidewalls of the first composition resist portion are recessed laterally inward of at least a portion of the opposing sidewalls of the second composition resist portion. [0009] Additional aspects and implementations are contemplated. BRIEF DESCRIPTION OF THE DRAWINGS [0010] Preferred embodiments of the invention are described below with reference to the following accompanying drawings [0011] FIG. 1 is a diagrammatic cross-sectional view of a prior art semiconductor construction at one stage of processing. [0012] FIG. 2 is a view of the FIG. 1 construction shown at a processing step subsequent to that of FIG. 1. [0013] FIG. 3 is a view of the FIG. 2 construction shown at a processing step subsequent to that of FIG. 2. [0014] FIG. 4 is a diagrammatic cross-sectional view of a semiconductor construction in accordance with an aspect of the present invention at one stage of processing. [0015] FIG. 5 is a view of the FIG. 4 construction shown at a processing step subsequent to that of FIG. 4. [0016] FIG. 6 is a view of the FIG. 5 construction shown at a processing step subsequent to that of FIG. 5. [0017] FIG. 7 is an enlarged view of a portion of the FIG. 6 construction. [0018] FIG. 8 is a view of the FIG. 6 construction shown at a processing step subsequent to that of FIG. 6. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0019] This disclosure of the invention is submitted in furtherance of the constitutional purposes of the U.S. Patent Laws "to promote the progress of science and useful arts" (Article 1, Section 8). Continue reading about Semiconductor constructions... Full patent description for Semiconductor constructions Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Semiconductor constructions patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Semiconductor constructions or other areas of interest. ### Previous Patent Application: Micro-etching method to replicate alignment marks for semiconductor wafer photolithography Next Patent Application: Oxygen plasma treatment for enhanced hdp-cvd gapfill Industry Class: Semiconductor device manufacturing: process ### FreshPatents.com Support Thank you for viewing the Semiconductor constructions patent info. IP-related news and info Results in 1.16982 seconds Other interesting Feshpatents.com categories: Daimler Chrysler , DirecTV , Exxonmobil Chemical Company , Goodyear , Intel , Kyocera Wireless , 174 |
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