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Self-aligned implanted waveguide detectorRelated Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Responsive To Non-electrical Signal (e.g., Chemical, Stress, Light, Or Magnetic Field Sensors), Electromagnetic Or Particle Radiation, Light, Schottky Barrier (e.g., A Transparent Schottky Metallic Layer Or A Schottky Barrier Containing At Least One Of Indium Or Tin (e.g., Sno 2 , Indium Tin Oxide)), Pin Detector, Including Combinations With Non-light Responsive Active DevicesSelf-aligned implanted waveguide detector description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070272996, Self-aligned implanted waveguide detector. Brief Patent Description - Full Patent Description - Patent Application Claims
[0001] This application is a division of pending U.S. patent application Ser. No. 10/959,897, filed on Oct. 6, 2004 and claims the benefit of U.S. Provisional Application No. 60/509,202, filed Oct. 7, 2003. TECHNICAL FIELD [0002] The invention generally relates to optical detectors and methods of fabricating such detectors. BACKGROUND OF THE INVENTION [0003] To build an optical signal distribution network within a semiconductor substrate, one needs to be able to make good optical waveguides to distribute the optical signals and one needs to be able to fabricate elements that get the optical signals into and out of the waveguides to interface with other circuitry. Extracting the optical signals can be accomplished in at least two ways. Either the optical signal itself is extracted out of the waveguide and delivered to other circuitry that can convert it to the required form. Or the optical can be converted into electrical form in the waveguide and the electrical signal delivered to other the circuitry. Extracting the optical signal as an optical signal involves the use of mirrors within the waveguides or elements that function like mirrors. The scientific literature has an increasing number of examples of technologies that can be used to construct such mirrors. Extracting the optical signal as an electrical signal involves the use of detector within the waveguide, i.e., circuit elements that convert the optical signal to an electrical form. The scientific literature also has an increasing number of examples of detector designs that can be used to accomplish this. [0004] The challenge in finding the combination of elements that produces an acceptable optical distribution network becomes greater, however, when one limits the frame of reference to particular optical signal distribution network designs and to the financial reality that any such designs should be easy to fabricate and financially economical. [0005] The combination of silicon and SiGe has attracted attention as useful combination of materials from which one might be able to easily and economically fabricate optical signal distribution networks. With SiGe it is possible to fabricate waveguides in the silicon substrates. The index of refraction of SiGe is slightly higher than that of silicon. For example, SiGe with 5% Ge has a index of refraction of about 3.52 at an optical wavelength of about 1300 nm while crystalline silicon has an index of refraction that is less than that, e.g. about 3.50. So, if a SiGe core is formed in a silicon substrate, the difference in the indices of refraction is sufficient to enable the SiGe core to contain an optical signal through internal reflections. Moreover, this particular combination of materials lends itself to the use of conventional semiconductor fabrication technologies to fabricate the optical circuitry. [0006] Of course, for such a system to work as an optical signal distribution network, the optical signal must be at a wavelength at which the Si and SiGe are transparent. Since the bandgap of these materials is about 1.12 eV, they appear transparent to the commonly used optical wavelengths of greater than about 1100 nm. But, the transparency of these materials to optical signals having those wavelengths brings with it another problem. These materials are generally not suitable for building detectors that can convert the optical signals to electrical form. To be a good detector, the materials must be able to absorb the light. That is, the optical signal must be capable of generating electron transitions from the valence band to the conduction band within the detector to produce an electrical output signal. But the wavelengths of greater than about 1100 nm are too long to produce electron transitions in silicon. For example, at a wavelength of 1300 nm, the corresponding photon energy is about 0.95 eV, which is well below the bandgap of silicon or SiGe and consequently well below the amount necessary to cause transitions from the valence band into the conductor band. [0007] One class of detectors that has attracted some interest is the class of SiGe super lattice detectors. These detectors are made up of alternating thin layers of Si and SiGe. Because the lattice constant of these materials is not the same, when the two layers are grown on top of each other the lattice mismatch causes a strain in the SiGe layer. If the Si and SiGe layers are sufficiently thin (e.g. on the order of about 6 nm), and if the process temperatures to which the structure is exposed are sufficiently low (e.g. below about 800.degree. C.), then the induced strain will be permanent. The induced strain reduces the bandgap of the SiGe material. As the percentage of Ge in the SiGe increases, the mismatch becomes greater, the induced strain increases and the bandgap decreases further. [0008] FIG. 1 illustrates how the percentage of Ge impacts the bandgap in the super lattice structures. If the induced strain is maintained in the SiGe, as the percentage of Ge increases, the bandgap decreases along the lower curve. At some point the percentage of Ge will be enough to reduce the bandgap sufficiently so that it can serve as a detector for light having wavelengths of about 1200 nm (about 0.9 eV). However, if the lattice is allowed to relax thereby relieving the strain, the affect of increasing amounts of Ge on the bandgap will be less dramatic as indicated by the upper curve and it will not be possible fabricate an effective detector for that wavelength. SUMMARY OF THE INVENTION [0009] In general, in one aspect, the invention features a method of fabricating a detector. The method involves forming an island of detector core material on a substrate, the island having a horizontally oriented top end, a vertically oriented first sidewall, and a vertically oriented second sidewall that is opposite said first sidewall; implanting a first dopant into the first sidewall to form a first conductive region that has a top end that is part of the top end of the island; implanting a second dopant into the second sidewall to form a second conductive region that has a top end that is part of the top end of the island; fabricating a first electrical connection to the top end of the first conductive region; and fabricating a second electrical connection to the top end of the second conductive region. [0010] Embodiments have one or more of the following additional features. The process of forming of the island involves forming a layer of the detector core material on the substrate; and etching away selective portions of the detector core material layer to form the island of detector core material. The process of forming of the island also involves, after forming the layer of the detector core material on the substrate, forming a hard mask layer over the top end of the detector core material layer, and the etching away involves etching away selective portions of the hard mask layer and the detector core material layer to form the island of detector core material. The method further involves, after implanting the first and second dopants, removing the hard mask layer from the top end of the island; depositing an isolation material onto the substrate and covering the island; and planarizing the deposited isolation material so that the top ends of the first and second conductive regions are exposed. The method also involves depositing an insulator onto the planarized material; forming a first opening in the insulator above and extending down to the first conductive regions and a second opening in the insulator above and extending down to the second conductive regions; and depositing a metal in the first and second openings to make electrical contact to the first conductive regions. The process of implanting the first dopant involves implanting a p-type dopant and the process of implanting the second dopant involves implanting an n-type dopant. Alternatively, the first and second dopants are the same materials. [0011] In general, in another aspect, the invention features an optical detector including a substrate; and an island of detector material formed on the substrate, wherein the island has (1) a horizontally oriented top end, a vertically oriented first sidewall, and vertically oriented second sidewall that is opposite said first sidewall, (2) a first doped region extending into the island through first sidewall and forming a first conductive region that extends down into the island of detector material, and (3) a second doped region extending into the island through the second sidewall and forming a second conductive region that extends down into island of the detector material, the first and second conductive regions each having a top end that is part of the top end of the island. The optical detector also includes a first electrical connection to the top end of the first conductive region; and a second electrical connection to the top end of the second conductive region. [0012] Embodiments include one or more of the following additional features. The optical detector also includes an isolation material covering the first sidewall and the second sidewall of the island and forming a upper surface that is level with the top end of the island; an insulating layer over the isolation material and the island, the insulating layer including a first hole down to the first conductive region and a second hole down to the second conductive region; a first conductor filing the first hole and electrically connecting to the first conductive region; and a second conductor filing the second hole and electrically connecting to the second conductive region. The first conductive region is doped with a p-type dopant and the second conductive region is doped with an n-type dopant. Alternatively, the first and second conductive regions are doped with the same dopant. [0013] One advantage of some embodiments of the invention is that one can avoid having to use separate masks for the N.sup.+ and P.sup.+ implants in the N.sup.+-I-N.sup.+ and P.sup.+-I-N.sup.+ structures. [0014] Another advantage is that it provides a way of fabricating horizontally oriented detectors on a semiconductor substrate. [0015] Other features and advantages of the invention will be apparent from the following detailed and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS [0016] FIG. 1 shows the affect on bandgap of the percentage of Ge in a SiGe super lattice structure. [0017] FIGS. 2A-G illustrate the process for fabricating a SiGe super lattice detector. [0018] FIG. 3 illustrates use of a narrower hard mask so as to allow implantation of electrode dopants over more of the top of the structure. DETAILED DESCRIPTION [0019] Referring to FIG. 2A, starting with a substrate 100, e.g. a silicon substrate, a SiGe super lattice structure 102 is deposited onto the upper surface of substrate 100. Procedures for fabricating such a structure are generally known in the art and thus will not be described in detail here. In the described embodiment, the basic building block of the super lattice is a SiGe layer grown on top of a Si layer. The SiGe layer is thin enough to sustain the induced strain without relaxing (e.g. about 6 nm) with the percentage of Ge being about 60%. The Si layer is about 29 nm think. This basic two-layer building block is repeated about 29 times to fabricate a stack that is about 1 micron high. In the described embodiment, an epitaxial process is used to grow these layers with the composition of the feed gas varied throughout the process to deposit the individual layers. Continue reading about Self-aligned implanted waveguide detector... Full patent description for Self-aligned implanted waveguide detector Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Self-aligned implanted waveguide detector patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Self-aligned implanted waveguide detector or other areas of interest. ### Previous Patent Application: Photosensitive device Next Patent Application: Semiconductor device Industry Class: Active solid-state devices (e.g., transistors, solid-state diodes) ### FreshPatents.com Support Thank you for viewing the Self-aligned implanted waveguide detector patent info. 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