| Sample rate doubling using alternating adcs -> Monitor Keywords |
|
|
  Sample rate doubling using alternating adcsUSPTO Application #: 20060092056Title: Sample rate doubling using alternating adcs Abstract: One embodiment of the invention includes a system comprising an analog baseband signal input, a conversion circuit with N Analog to Digital Converters (ADCs) operable to receive the analog baseband signal, and a Finite Impulse Response (FIR) filter operable to receive outputs of the N ADCs and to produce a digital representation of the analog baseband signal corrected for a mismatch in the N ADCs. (end of abstract)
Agent: Agilent Technologies, Inc. Intellectual Property Administration, Legal Dept. - Loveland, CO, US Inventor: Howard E. Hilton USPTO Applicaton #: 20060092056 - Class: 341118000 (USPTO) The Patent Description & Claims data below is from USPTO Patent Application 20060092056. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF THE INVENTION [0001] In the filed of signal receivers, converting both broadband and baseband analog signals to digital signals involves an inherent trade-off between Analog to Digital Converter (ADC) sample rate and accuracy. Designers are faced with the choice of using a faster ADC that may lack a high degree of accuracy or using a lower sample rate ADC that has more accuracy. Oftentimes, the choice is made for the designer because the frequency of the received signal, F.sub.signal, dictates the minimum sample rate, F.sub.sample, that must be used to avoid aliasing. Typically this would be 2F.sub.signal=F.sub.sample. [0002] One approach that has seen some success in the conversion of Intermediate Frequency (IF) signals is to use alternating ADCs that each sample at half of the desired sample rate (assuming that the bandwidth of the IF signal is less than or equal to double the first Nyquist intervals of each of the ADCs). First, the IF signal is converted into one In-Phase (I) and one Quadrature (Q) signal (i.e., I/Q baseband signals). The I and Q signals are then each digitized by one of a pair of alternating ADCs that sample at one half F.sub.sample. Distortion is added to the signals because of non-ideal and non-matching frequency responses of the two ADCs. In fact, the frequency response mismatch of the two ADCs can eliminate much of the advantage of a two ADC system over a single ADC system. [0003] In one solution, the I and Q signals are then processed by local oscillators that multiply the I digitized signal by a sequence of [1, -1, 1 . . . ] and multiply the Q digitized signal by a sequence of [j, -j, . . . ]. This results in a clean, conceptual separation of I and Q samples between the real and imaginary paths for subsequent processing. The frequency response corruption of each ADC can then be associated with the real or imaginary data streams. A single Finite Impulse Response (FIR) filter is used to eliminate the corruption of the data paths, with the output of the filter being reassembled into one digital signal that includes all of the information of the original analog signal. [0004] The conceptual separation of distortion into real and imaginary components provides the key to understanding that a single FIR filter can be implemented to correct for the frequency response mismatch of the two ADCs. However, the IF signal solution does not necessarily lead to a solution for correcting for frequency response mismatch between two ADCs in a system that digitizes a single analog baseband input signal. This is because a single analog baseband input signal cannot be separated into real and imaginary components. BRIEF SUMMARY OF THE INVENTION [0005] One embodiment of the invention includes a system comprising an analog baseband signal input, a conversion circuit with N Analog to Digital Converters (ADCs) operable to receive the analog baseband signal, and a Finite Impulse Response (FIR) filter operable to receive outputs of the N ADCs and to produce a digital representation of the analog baseband signal corrected for a mismatch in the N ADCs. [0006] In another embodiment of the invention, correcting for frequency response mismatch in a dual-ADC system is accomplished by splitting the signal into even and odd paths, wherein the odd path signal is subjected to a time delay. The two paths are digitized by separate ADCs to produce even and odd digital representation components of the original analog baseband input signal. The even and odd components contain distortion from the frequency response mismatch between the two ADCs. To correct for the mismatch, the components are then input into a single FIR filter that applies 2.times.2 matrix filter taps. The result is corrected even and odd components that can be reassembled into a single digital signal that includes all of the information of the original analog baseband input signal. BRIEF DESCRIPTION OF THE DRAWINGS [0007] FIG. 1 is an illustration of one embodiment of the invention for performing sample rate doubling using alternating ADCs; [0008] FIG. 2 is a flowchart of one embodiment of the invention for correcting for ADC mismatch; [0009] FIG. 3 is an illustration of one embodiment of the invention for performing sample rate doubling using alternating ADCs; and [0010] FIG. 4 is an illustration of one embodiment of the invention for performing sample rate tripling using three ADCs. DETAILED DESCRIPTION OF THE INVENTION [0011] FIG. 1 is an illustration of one embodiment of the invention in which system 100 is shown for performing sample rate doubling using alternating Analog to Digital Converters (ADCs). In this example, input 120 is an analog baseband signal that is provided to circuit 101 for digital conversion. As with any circuit, circuit 110 includes an impulse response, illustrated by h(t) 101. Impulse response 101 is the response for ADCs 104 and 105, delay 102, and additional components of the circuit that are not shown. Although impulse response 101 is determined by the characteristics of the various components of circuit 110, it is illustrated as a separate component of circuit 110 for simplicity. [0012] Input 120 is provided to circuit 110 and split into two paths. The top path leads to ADC 104. The bottom path leads to delay 102 and ADC 105. In this embodiment, ADCs 104 and 105 are both run by clock 103. Accordingly, while both paths convert signal 120 into a digital signal, the lower path subjects input 120 to a time delay. Conceptually, ADCs 104 and 105 are alternating so that, in a given clock cycle, together they produce a set of samples corresponding to one delay of zero and one delay of T/2. The result is that ADCs 104 and 105 operate respectively to produce even and odd digital representation components 106 of analog input signal 120. Neither component by itself represents all of the information contained in analog baseband signal input 120 because ADCs 104 and 105 each perform undersampling. However, taken together, components 106 will represent all of the information in analog baseband signal input 120 as long as each ADC 104 and 105 samples input 120 at least at half of the desired sample frequency. [0013] Ideally, ADCs 104 and 105 sample analog baseband signal input 120 at exactly the same time and operate with exactly the same parameters. Practical embodiments, however, show some degree of frequency response mismatch. The result of frequency response mismatch is that when components 106 are assembled into a single digital signal, there will be some amount of information distortion. Therefore, the accuracy of the digital representation will be degraded. [0014] Impulse response 101 includes the frequency response mismatch between ADCs 104 and 105, and it is possible to use impulse response 101 to design filter 130 to effectively correct for the mismatch. System 100 includes Finite Impulse Response (FIR) filter 130 operable to receive outputs 106 of ADCs 104 and 105, and to produce digital representation 107 of analog baseband signal input 120 corrected for the mismatch between ADCs 104 and 105. [0015] A problem encountered in correcting for the frequency response mismatch between alternating ADCs is how to design a filter, such as FIR filter 130, that can account for the fact that each of the digital representation components 106 are not complete representations of analog baseband signal input 120. It is not as simple as putting a single filter behind each ADC 104 and 105. A single filter that receives only the even or odd components will not have enough information to correctly filter the component because there is an infinite combination of first and second Nyquist interval signals that could combine to produce the same sequence of samples that are found in that component. Therefore, the filter that is needed is one that receives and conditions both the even and odd sampled components. In other words, the filter cross-couples both the even and odd components to compute the linear combination of all samples to produce the correct even samples and the linear combination of all samples to produce the correct odd samples. FIR filter 130 provides such a solution by incorporating a sequence of 2.times.2 matrix filter taps that are each computed using even and odd components of system impulse response 101 and are each applied to even and odd components of representation 106. [0016] The process of calculating the correct FIR filter taps will now be explored. The following equations treat each pair of even and odd digital representation components 106 as a two-element vector. Performing the calculations with vectors and matrices is done for the convenience of the notation, since system 100 uses alternating ADCs 104 and 105. Those of skill in the art will understand that the calculations can also be performed with time-varying, piecemeal functions that represent the alternating of ADCs 104 and 105. [0017] The desired signal processing of analog baseband signal input signal 120, x(t), is given in Equation 1. y n = [ x .function. ( t ) g .function. ( t ) x .function. ( t + T / 2 ) g .function. ( t ) ] t = nT ( 1 ) where T is the sampling period of each ADC 104 and 105, and g(t) is the impulse response of the desired filtering to be applied to the signal. This response, g(t), has a bandwidth of less than 1/T in order for the composite sample rate to eliminate aliasing. This may be implemented, for example, as a flat pass band for the first Nyquist interval of x(t) with a transition band that rolls off rapidly to filter out frequencies of the second Nyquist interval. The filtering represented by g(t) may be a user's ideal analog-to-digital conversion of analog baseband signal input signal 120, and it is usually chosen by the user. [0018] However, the actual output signal 106 from circuit 110 (a dual-ADC front end) is represented by Equation 2: x n = [ x .function. ( t ) h 1 .function. ( t ) x .function. ( t ) h 2 .function. ( t ) ] t = nT ( 2 ) where h.sub.1(t) is the impulse response from the input connector through even-sample ADC 104, and h.sub.2(t) is the impulse response from the input connector through odd-sample ADC 105. Splitting impulse response 101 into h.sub.1(t) and h.sub.2(t) is a way of adapting response 101 to the vector notation used herein. It also expresses that each of the two paths have individual impulse responses. It should be noted that, similar to Equation 1, the right hand side represents an array of discrete sample values. Further, the bandwidth of h.sub.1(t) and h.sub.2(t) is assumed to be less than 1/T. [0019] The goal is to determine the appropriate calibration filter response, q.sub.n, of filter 130. Equation 3 represents the relationship of q.sub.n, y.sub.n, and x.sub.n. As shown below, Equation 3 can be manipulated to calculate q.sub.n. y.sub.n=q.sub.n{circle around (.times.)}x.sub.n (3) [0020] Equation 3 can be rewritten as Equation 4 by explicitly writing out the convolution integrals: [ .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau. ) .times. g .function. ( nT - .tau. ) .times. .times. d .tau. .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau.1 + T / 2 ) .times. g .function. ( nT - .tau. 1 ) .times. .times. d .tau. 1 ] = q n [ .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau. ) .times. h 1 .function. ( nT - .tau. ) .times. .times. d .tau. .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau. ) .times. h 2 .function. ( nT - .tau. ) .times. .times. d .tau. ] ( 4 ) where the new dummy integration variable .tau.=.tau.'+1/2. This does not change the integration result because of the infinite bounds. Similarly, the discrete sample data convolution summation can be written out explicitly, as in Equation 5. [ .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau. ) .times. g .function. ( nT - .tau. ) .times. .times. d .tau. .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau. ) .times. g .function. ( nT + T / 2 - .tau. ) .times. .times. d .tau. ] = .tau. = - .infin. .infin. .times. .times. q m .function. [ .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau. ) .times. h 1 .function. ( ( n - m ) .times. T - .tau. ) .times. .times. d .tau. .intg. .tau. = - .infin. .infin. .times. x .function. ( .tau. ) .times. h 2 .function. ( ( n - m ) .times. T - .tau. ) .times. .times. d .tau. ] ( 5 ) Continue reading... Full patent description for Sample rate doubling using alternating adcs Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Sample rate doubling using alternating adcs patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Sample rate doubling using alternating adcs or other areas of interest. ### Previous Patent Application: Linearity corrector using filter products Next Patent Application: Calibration system and method for a linearity corrector using filter products Industry Class: Coded data generation or conversion ### FreshPatents.com Support Thank you for viewing the Sample rate doubling using alternating adcs patent info. IP-related news and info Results in 1.68669 seconds Other interesting Feshpatents.com categories: Daimler Chrysler , DirecTV , Exxonmobil Chemical Company , Goodyear , Intel , Kyocera Wireless , |
||
