| Reducing oxidation of phase change memory electrodes -> Monitor Keywords |
|
|
  Reducing oxidation of phase change memory electrodesUSPTO Application #: 20060289848Title: Reducing oxidation of phase change memory electrodes Abstract: A phase change memory may be formed in a way which reduces oxygen infiltration through a chalcogenide layer overlying a lower electrode. Such infiltration may cause oxidation of the lower electrode which adversely affects performance. In one such embodiment, an etch through an overlying upper electrode layer may be stopped before reaching a layer which overlies said chalcogenide layer. Then, photoresist used for such etching may be utilized in a high temperature oxygen plasma. Only after such plasma treatment has been completed is that overlying layer removed, which ultimately exposes the chalcogenide. (end of abstract) Agent: Trop Pruner & Hu, PC - Houston, TX, US Inventor: Charles H. Dennison USPTO Applicaton #: 20060289848 - Class: 257003000 (USPTO) Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Bulk Effect Device, Bulk Effect Switching In Amorphous Material, With Means To Localize Region Of Conduction (e.g., "pore" Structure) The Patent Description & Claims data below is from USPTO Patent Application 20060289848. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND [0001] This invention relates generally to phase change memory devices. [0002] Phase change memory devices use phase change materials, i.e., materials that may be electrically switched between a generally amorphous and a generally crystalline state, for electronic memory application. One type of memory element utilizes a phase change material that may be, in one application, electrically switched between a structural state of generally amorphous and generally crystalline local order or between different detectable states of local order across the entire spectrum between completely amorphous and completely crystalline states. The state of the phase change materials is also non-volatile in that, when set in either a crystalline, semi-crystalline, amorphous, or semi-amorphous state representing a resistance value, that value is retained until changed by another programming event, as that value represents a phase or physical state of the material (e.g., crystalline or amorphous). The state is unaffected by removing electrical power. [0003] During the fabrication of phase change memories, electrodes within a memory cell may oxidize, leading to significant resistance increases. These increases may result in defective products. The number of cells in memories failing the high resistance tests may be reduced by taking great care in the processing steps and step sequences to minimize any opportunity for oxidation. However, such steps add to the cost of manufacturing the products and may not always be completely effective. [0004] Thus, there is a need for better ways to reduce the resistance increase, product failures, or other adverse consequences of electrode oxidation in phase change memories. BRIEF DESCRIPTION OF THE DRAWINGS [0005] FIG. 1 is an enlarged, cross-sectional view at an early stage of manufacture in accordance with one embodiment of the present invention; [0006] FIG. 2 is an enlarged, cross-sectional view at a subsequent stage in accordance with one embodiment of the present invention; [0007] FIG. 3 is an enlarged, cross-sectional view at a subsequent stage in accordance with one embodiment of the present invention; [0008] FIG. 4 is an enlarged, cross-sectional view at a subsequent stage in accordance with one embodiment of the present invention; [0009] FIG. 5 is an enlarged, cross-sectional view at a subsequent stage in accordance with one embodiment of the present invention; [0010] FIG. 6 is an enlarged, cross-sectional view at a subsequent stage in accordance with one embodiment of the present invention; [0011] FIG. 7 is an enlarged, cross-sectional view at a subsequent stage in accordance with one embodiment of the present invention; and [0012] FIG. 8 is a system depiction of one embodiment of the present invention. DETAILED DESCRIPTION [0013] In accordance with some embodiments of the present invention, oxygen infiltration may be reduced. Oxygen infiltration causes oxidation of the lower electrode, adversely affecting the performance of phase change memories. One modality for such oxidation is for oxygen to diffuse through a chalcogenide layer overlying the lower electrode. When that oxygen diffuses through and reaches the lower electrode it causes oxidation of that oxidizable lower electrode. To prevent such infiltration, a barrier layer may be utilized in one embodiment of the present invention, which is applied under appropriate circumstances to facilitate other process steps while still protecting the lower electrode, in some embodiments. [0014] In one embodiment, memory elements may comprise a phase change material. In this embodiment, the memory may be referred to as a phase change memory. A phase change material may be a material having electrical properties (e.g. resistance, capacitance, etc.) that may be changed through the application of energy such as, for example, heat, light, voltage potential, or electrical current. The phase change material may include a chalcogenide material. [0015] A chalcogenide alloy may be used in a memory element or in an electronic switch. A chalcogenide material may be a material that includes at least one element from column VI of the periodic table or may be a material that includes one or more of the chalcogen elements, e.g., any of the elements of tellurium, sulfur, or selenium. [0016] Referring to FIG. 1, in accordance with one embodiment of the present invention, a planar insulator 10, such as an interlayer dielectric, may be overlaid by a row line conductor 12. The row line conductor 12 may be chemical vapor deposited titanium silicon nitride. In one embodiment, the row line conductor may be about 2500 Angstroms in thickness. Overlying the row line conductor 12 may be a planar insulator 14. In one embodiment, the insulator 14 is blanket deposited, patterned, and etched to form openings which are filled by the resistive plugs 16. These resistive plugs 16 constitute the lower electrode of a phase change memory cell. In other words, each plug 16 may be used as the lower electrode of a different phase change memory cell. The lower electrodes may be made of material which is oxidizable such as chemical vapor deposited titanium silicon nitride. [0017] Referring to FIG. 2, a stack of layers may be deposited to form a phase change memory cell and/or a select device which, in one embodiment, may be an ovonic threshold switch. Initially, the phase change memory material or chalcogenide 18 may be deposited, for example, to a thickness of 500 Angstroms. Then, a top electrode 20 may be deposited, for example, to a thickness of 300 Angstroms. The top electrode may be TiAlN (titanium aluminum nitride) or a composite film of Ti/TiN (titanium/titanium nitride) in one embodiment. Next, in some embodiments, a barrier film 22 may be formed. The barrier film may be up to 100 Angstroms in thickness in some cases. [0018] In an embodiment using an ovonic threshold switch, an ovonic threshold switch lower electrode 24 may be deposited. In one embodiment, the lower electrode 24 may be formed of carbon and may be 300 Angstroms thick. Next, the ovonic threshold switch material 26 may be deposited. It may be a chalcogenide which is 500 Angstroms thick in one embodiment. It may be formed of a material which does not change phase. Finally, an upper electrode 28 may be deposited. It may be formed of TiAlN or a composite film of Ti/TiN, titanium, or titanium nitride in some embodiments. For example, it may be between 50 and 2000 Angstroms thick. [0019] Referring to FIG. 3, (showing only a portion of the structure shown in FIG. 2) the structure shown in FIG. 2 may be patterned and etched to form a large number of memory array cells, although only two are shown in FIG. 3. In one embodiment, the cells may be defined by a patterned hard mask 34 which is applied over the upper electrode 28. Next, the upper electrode 28 is etched, using the pre-patterned hard mask 34 as a mask in some embodiments. The etch proceeds down to the uppermost layer which, in the embodiment illustrated in FIG. 3, is the ovonic threshold switch material 26. By etching only partially and stopping at the layer 26, exposure of the lower chalcogenide 18 at this stage to an oxidizing environment to remove a photoresist pattern that was utilized to patterned the memory array cells is prevented. [0020] Moreover, photoresist used in patterning and etching may be removed using an oxygen plasma with the chalcogenide 18 protected by the overlying layers 20-26. Therefore, oxygen infiltration through the layer 18 to the lower electrode 16 is reduced or eliminated to this stage. [0021] In some embodiments, processing steps may be done in low oxygen atmospheres in order to prevent oxygen infiltration which may adversely affect the lower electrodes 16. For example, in-process wafers can be stored in a nitrogen environment prior to processing. In some embodiments, resist stripping may be done in a process which does not use a high temperature oxygen plasma step but, rather, is done in a wet bath and/or only a low temperature oxygen plasma resist strip is utilized. Continue reading... Full patent description for Reducing oxidation of phase change memory electrodes Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Reducing oxidation of phase change memory electrodes patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Reducing oxidation of phase change memory electrodes or other areas of interest. ### Previous Patent Application: Phase change memory and phase change recording medium Next Patent Application: Resistance variable memory device and method of fabrication Industry Class: Active solid-state devices (e.g., transistors, solid-state diodes) ### FreshPatents.com Support Thank you for viewing the Reducing oxidation of phase change memory electrodes patent info. IP-related news and info Results in 5.16782 seconds Other interesting Feshpatents.com categories: Medical: Surgery , Surgery(2) , Surgery(3) , Drug , Drug(2) , Prosthesis , Dentistry |
||
