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Reconfigurable semantic processorRelated Patent Categories: Electrical Computers And Digital Processing Systems: Multicomputer Data Transferring, Remote Data AccessingReconfigurable semantic processor description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070250593, Reconfigurable semantic processor. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation of U.S. patent application Ser. No. 10/843,727, filed on May 11, 2004, now pending, the disclosure of which is herein incorporated by reference FIELD OF THE INVENTION [0002] This invention relates generally to storage servers, and more specifically to storage server implementations using digital semantic processors. BACKGROUND OF THE INVENTION [0003] Traditionally, a storage server is a networked computer that provides media and file access to other computers and computing devices, referred to herein as "clients." The storage server may be accessible on a Wide-Area Network (WAN), a Local-Area Network (LAN), and/or share a dedicated point-to-point connection with another computing device. [0004] Storage servers can be of several types, including a Network Attached Storage (NAS) server, a Storage Area Network (SAN) server, and an application-style server. [0005] A NAS server comprehends directory structures. Requests to a NAS server generally specify a file path/filename and action such as create, read, write, append, etc. A NAS server converts the requests to one or more disk sector/block disk access transactions, accesses the disk (or other storage media), and performs the requested file-level transaction. Such a server maintains and utilizes a directory structure to locate the file starting locations, and a File Allocation Table to reconstruct segmented files and locate free sectors on a disk or other writeable media. [0006] A SAN server generally receives direct requests for disk sector/block-based transactions, and may have no knowledge of a file system or relationships between data blocks. Although block requests can relate to physical block locations on a media device, more typically a SAN server supports logical blocks--thus allowing the server to make one physical disk drive appear as several logical drives, or several physical disk drives appear as one logical drive, as in a RAID (Redundant Array of Independent Disks) scheme. [0007] An application-style server generally provides access to media in a media-specific format. For instance, an application-style server could provide access to streaming audio or video without the explicit knowledge of a filepath/filename by the client (who may not know the filename or have the authority to access a file directly), while reading the streaming media from files and encapsulating it in a streaming packet format. [0008] Architecturally, most storage servers differ little from general-purpose computers (other than in some cases including more and/or faster than usual disk drives and disk bus controllers). FIG. 1 shows a block diagram for a typical storage server 20. A Central Processing Unit (CPU) 22, typically one or more microprocessors, operates the server according to stored program instructions. This type of processor is often called a von Neumann (VN) processor or machine, after its innovator, who proposed its execution style of processing sequential instructions. [0009] CPU 22 connects through a Frontside Bus (FSB) 26 to a Memory Controller/Hub (MCH) 24, which is responsible for interfacing CPU 22 to other system components that store microprocessor program instructions and store, supply, and/or consume data. MCH 24 manages system memory 30 through memory bus 32. MCH 24 also communicates with PCI (Peripheral Component Interconnect) bridge 40 across hub bus 42 to move data between PCI-connected devices and either memory 30 or CPU 22. [0010] Many different types of data source/sink devices can connect to server 20 through PCI bridge 40 and PCI bus 44. For storage server purposes, the two necessary devices are a network interface card (NIC) 50 and a media controller, such as ATA (AT Attachment) controller 60. [0011] NIC 50 allows the server to attach directly to a Local Area Network (LAN) or other network, a Fibre Channel switch fabric, or other point-to-point connection to a client or another device that provides network visibility for the server. NIC 50 thereby provides a communication path for the server to receive data requests from clients and respond to those requests. The actual network physical communication protocol can be varied by inserting a different NIC, e.g., for whatever wired or wireless communication protocol is to be used, and loading a software device driver for that NIC onto CPU 22. [0012] ATA controller 60 provides at least one ATA bus 62 for attaching media devices 64 such as hard disks, optical disks, and/or tape drives. Each ATA bus 62 allows either one or two media devices 64 to attach to storage server 20. Some servers may employ other controllers, such as a SATA (serial ATA) controller or a SCSI (Small Computer System Interface) host adapter. [0013] In order to operate as a storage server, CPU 22 must execute a variety of software programs. With NAS, the two common formats are NFS (Networked File System) and CIFS (Common Internet File System); the former protocol is found primarily in UNIX environments, and the latter protocol in Microsoft operating system environments. For an NFS server, the following software processes help implement NFS: a network device driver for NIC 50; TCP/IP drivers; RPC (Remote Procedure Call) and XDR (External Data Representation) drivers to present data from TCP/IP to NFS server software; the NFS server software itself; a local file system; a VFS (Virtual File System) driver to interface the NFS server software with the local file system; data buffering software; and device drivers for the storage controller/host adapter. For each NFS data transaction. CPU 22 must execute a process for each of these software entities, switching context between them as required. To provide adequate performance, storage server 20 operates at relatively high speed and power, requiring forced air cooling and a substantial power supply to operate the microprocessor, chipset, network interface, memory, other peripherals, and cooling fans. The current state of the art, with a 1 Gbps (Gigabit per second) full duplex network connection, requires about 300 watts of power, occupies a volume of 800 cubic inches, and costs about $1500 without storage media. [0014] Some vendors have attempted to build custom integrated circuit hardware explicitly for processing NAS requests. Design costs for such circuits generally cannot be recaptured in the fluid world of telecommunication protocols, where a specific complex circuit built to handle a narrow combination of specific protocols and storage interfaces may become rapidly obsolete. SUMMARY OF THE INVENTION [0015] It has now been recognized that in many storage server applications a microprocessor/sequential program approach is inefficient and bulky. Most of the storage server's existence is spent executing storage server functions in response to client requests received at the NIC. The requests themselves are styled in a protocol-specific format with a limited number of requested functions and options. In response to these requests, well-defined storage system commands are supplied to a media device, and the results of those commands are used to return protocol-specific datagrams to the client. [0016] Storage server programmability and code commonality are highly desirable traits. Accordingly, high-volume processors and chipsets (such as those built by Intel Corporation and Advanced Micro Devices) have been used to allow programmability and the use of standard operating systems, and thereby reduce costs. Unfortunately, the flexibility and power of a general-purpose microprocessor-based system go largely unused, or used inefficiently, in such an operational configuration. [0017] The present invention provides a different architecture for a storage server, using in exemplary embodiments what is referred to generally as a semantic processor. Such a device is configurable, and preferably reconfigurable like a VN machine, as its processing depends on its "programming." As used herein, a "semantic processor" contains at least two components: a direct execution parser to parse an input stream according to a defined grammar; and an execution engine capable of manipulating data (e.g., data movement, mathematical, and logical operations) in response to requests from the direct execution parser. [0018] The programming of a semantic processor differs from the conventional machine code used by a VN machine. In a VN machine the protocol input parameters of a data packet are sequentially compared to all possible inputs using sequential machine instructions, with branching, looping, and thread-switching inefficiencies. In contrast, the semantic processor responds directly to the semantics of an input stream. In other words, the "code" segments that the semantic processor executes are driven directly by the input data. For instance, of the 75 or so possible CIFS commands that could appear in a packet, a single parsing cycle of an embodiment described below is all that is necessary to allow the semantic processor to load grammar and microinstructions pertinent to the actual CIFS command sent in the packet. [0019] In a storage server application as described in the embodiments below, a semantic processor can perform many of the functions of the prior art VN processor, chipset, and attached devices. The semantic processor receives datagrams from a network port or datagram interface. Some of these datagrams will include client requests for data operations. The semantic processor parses elements of the received datagrams using a parser table designed for the server protocol grammar(s) supported by the server. Based on what is parsed, the semantic processor transacts responsive data operations with a data storage device or devices. Generally, the data operations are performed by launching microinstruction code segments on a simple execution unit or units. As the data operations are performed, the semantic processor generates response datagrams to send back to the client. The resulting operational efficiency allows an entire storage server to be collapsed in some embodiments into a few relatively small integrated circuits that can be placed on a media device's printed circuit board, with the semantic processor itself drawing perhaps a few Watts of power. BRIEF DESCRIPTION OF THE DRAWING Continue reading about Reconfigurable semantic processor... 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